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idh-firmware.asm
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idh-firmware.asm
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; vim: syn=pic
;
; Ikea DIODER hack
; Copyright (C) 2011 B. Stultiens
;
; This program is free software: you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation, either version 3 of the License, or
; (at your option) any later version.
;
; This program is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with this program. If not, see <http://www.gnu.org/licenses/>.
;
;
;---------------
; The Ikea DIODER gadget, with the color-control panel, has three high power
; outputs for RGB, three buttons (active low) and a potentiometer for analog
; input.
;
; PIC16F684 Pinout:
; Pin Port I/O Name ICSP Description
; 1 Vdd pwr +5V Vdd Power supply
; 2 RA5 (I+pu) (RX) - (RX emulated RS232)
; 3 RA4 I S1 - Switch 1, active low
; 4 RA3 I S2 MCLR/Vpp Switch 2, active low
; 5 RC5 I S3 - Switch 3, active low
; 6 RC4 (O) (IND4) - (indicator 4)
; 7 RC3 AN7 WHEEL - 1k potmeter 0..5V
; 8 RC2 (O) (IND3) - (indicator 3)
; 9 RC1 (O) (IND2) - (indicator 2)
; 10 RC0 (O) (IND1) - (indicator 1)
; 11 RA2 O RED - Red LEDs
; 12 RA1 O BLUE CLK Blue LEDs
; 13 RA0 O GREEN DAT Green LEDs
; 14 Vss prw GND Vss Ground
;
; Pins/values in () are normally unconnected/unused
;
; Modifications:
; * The RA5(RX) pin is normally unconnected, but has an emulated RS232
; receiver, operating at 1200 Baud 8N1.
; * The IND[1..4] pins are normally unconnected, but are used as feedback
; indicators (put some LEDs on them, please). IND[0..2] indicate the
; running mode (binary encoded) and IND4 blinks on RS232 receive.
; * Use google (or hackaday) to find the programming pads on the PCB for
; manual programming this gadget.
;
;
; Serial protocol
;----------------
; A two-byte sequence is used for each command, where the first byte has the
; highest bit set and the second byte has the highest bit cleared.
;
; cmd Byte 0 Byte 1
; 1 10000--- 0------- Nop
; 2 11000000 0-hsvrgb Swap active and shadow values
; 3 11000001 0DMd-mmm Set running mode/direction
; 4 1100001d 0ddddddd Set running delay/speed
; 5 110001-- 0------- Nop
; 6 1a001--r 0rrrrrrr Set Red
; 7 1a010--g 0ggggggg Set Green
; 8 1a011--b 0bbbbbbb Set Blue
; 9 1a10hhhh 0hhhhhhh Set Hue
; 10 1a110--s 0sssssss Set Saturation
; 11 1a111--v 0vvvvvvv Set Value
;
; a = 1: activate immediately, 0: shadow store
; - = don't care, must be set to zero
; M = 1: set mode, 0: ignore mode
; D = 1: set direction, 0: ignore direction
;
; Swap active/shadow should employ either HSV or RGB values. Using both
; gives undefined results. Each '1' bit in the data-byte swaps the
; corresponding values.
;
; The host should send a CMD-byte followed by one or more DATA-byte(s). Each
; command is executed at the reception of the data byte. If multiple data
; bytes are sent, then the previous command remains in place and is used.
; The ommision of the command byte reduces the communication overhead
; for fast changing data.
; Note: multiple data bytes are /only/ useful if the initial command byte has
; the "activate immediately" bit set.
;
;
; Running modes
; -------------
; Button S2 advances the running mode (cyclic) from the following list.
; The mode-settings can be changed with the wheel while holding down
; indicated buttons.
; - off All LEDs are off
; - rampage LEDs cycle through rainbow colors at full strength
; * S3 set speed
; * S1 reverse direction
; - step A fixed set of colors is displayed sequentially
; * S3 set speed
; * S1 reverse direction
; - random A pseudo random set of colors is displayed
; * S3 set speed
; - wheel LEDs cycle through the HSV cone, the buttons S1 and S3 are used
; to select the color with the wheel:
; * S3 set speed
; * S3+S1 set value
; * S1 set saturation
; * direction depends on previous setting
; - fixed A fixed color is selected, the buttons S1 and S3 are used
; to select the color with the wheel:
; * S3 set hue
; * S3+S1 set value
; * S1 set saturation
; - serial Only serial input changes the colors
;
; The settings for each mode are automatically saved in eeprom. To save the
; running mode at startup press S1+S3 and then press S2.
;
;------------------------------------------------------------------------------
; Source code configuration defines
; =================================
;
; We need to use absolute assembly to support the jump-tables
; The COD is normally set from the assembler call:
; $ gpasm -DCOD=1 ...
;COD equ 1 ; Absolute assemble mode
;
;------------------------------------------------------------------------------
; Test for jump-table misalignments
; The following define, if set, disables nop insertions which align
; jump-tables. If unset, misalignments will create runtime problems.
; The test *only* works in absolute assembly mode.
#define TEST_ALIGNMENT 1
; Remove the alignment NOPs when defined (used for re-alignment)
#define REMOVE_ALIGNMENT 1
;
; If you get errors, check the list-file and see which jump-table is
; out of alignment and fix it by inserting code like:
;IFNDEF REMOVE_ALIGNMENT ; {
; nop ; Alignment for the xyz jump-table
; nop
; nop
;ENDIF ; }
;
IFDEF TEST_ALIGNMENT ; {
IFNDEF COD ; {
ERROR "Testing alignment only works in absolute assembly mode"
ENDIF ; }
ENDIF ; }
;
;------------------------------------------------------------------------------
; Limit ADC range
; The original DIODER limits the analog input to 0..4V.
; Limiting the range here makes calculations easier as the range
; is recalculated to fill the 10-bit ADC range at 4V.
#define LIMIT_ADC_RANGE 1
;
;------------------------------------------------------------------------------
; Baudrate setting
; Must be either 1200 or 2400 (borderline posssible)
; See bottom of ISR routine for timing details.
#define BAUDRATE 1200
;
;------------------------------------------------------------------------------
; Fake any writes to the eeprom is defined
; (FIXME: must be set until the eeprom code is fixed)
;#define FAKEEEPROM 1
;
;------------------------------------------------------------------------------
; Define to use the watchdog timer
#define USEWDT 1
;------------------------------------------------------------------------------
;
list
errorlevel 1
radix dec
IFDEF __16F684 ; {
include "p16f684.inc"
__CONFIG _FCMEN_OFF & _IESO_OFF & _BOD_OFF & _CPD_OFF & _CP_OFF & _MCLRE_OFF & _PWRTE_OFF & _WDT_OFF & _INTRC_OSC_NOCLKOUT & _INTOSCIO
ELSE ; }{
IFDEF __16F690 ; {
include "p16f690.inc"
__CONFIG _FCMEN_OFF & _IESO_OFF & _BOR_OFF & _CPD_OFF & _CP_OFF & _MCLRE_OFF & _PWRTE_OFF & _WDT_OFF & _INTRC_OSC_NOCLKOUT & _INTOSCIO
ELSE ; }{
ERROR "No supported processor type selected"
ENDIF ; }
ENDIF ; }
BITRED equ 2 ; PORTA high-power outputs
BITBLUE equ 1
BITGREEN equ 0
BITRX equ 5 ; PORTA position of RS232 receiver input
BITS1 equ 4 ; Input switches (S1, S2 on PORTA, S3 on PORTC)
BITS2 equ 3
BITS3 equ 5
BITIND1 equ 0 ; Indicator outputs on PORTC
BITIND2 equ 1
BITIND3 equ 2
BITIND4 equ 4
; Flag bits
BIT_S1 equ BITS1
BIT_S2 equ BITS2
BIT_S3 equ BITS3
BIT_RXREADY equ 6 ; Serial data available
BIT_DIR equ 7 ; Direction flag bit
; Serial data mode flags
BIT_RUN_ENABLE equ 5 ; Set mode/direction enable bits
BIT_DIR_ENABLE equ 6
; Button mappings
; - wheel: SPEED and SAT must be on different buttons
; - fixed: HUE and SAT must be on different buttons
BIT_SET_SPEED equ BIT_S3
BIT_SET_DIR equ BIT_S1
BIT_SET_HUE equ BIT_S3
BIT_SET_SAT equ BIT_S1
; BIT_SET_VAL -> combination of BIT_SET_HUE and BIT_SET_SAT
BIT_SET_MODE equ BIT_S2
RAM_B0_START equ 0x0020
RAM_B0_LAST equ 0x007F
RAM_B0_SIZE equ (RAM_B0_LAST - RAM_B0_START + 1)
; The following is in the shared space for the interrupt service routine
IFDEF COD ; {
org 0x0070
ELSE ; }{
sharebank udata_ovr 0x0070
ENDIF ; }
ovr_data_start
isr_ssave res 1 ; ISR: Status reg save
isr_wsave res 1 ; ISR: W reg save
isr_tmp res 1 ; ISR: temp variable
ee_tmp res 1 ; Temporary eeprom address store
ovr_data_end
IF (ovr_data_end - ovr_data_start) > 16 ; {
ERROR "Shared data size overflow"
ENDIF ; }
; Running variables
IFDEF COD ; {
org 0x0020
ELSE ; }{
databank udata 0x0020
ENDIF ; }
_pwm_r res 1 ; PWM counter red channel
_pwm_g res 1 ; PWM counter green channel
_pwm_b res 1 ; PWM counter blue channel
_bit_r res 1 ; Red channel
_bit_g res 1 ; Green channel
_bit_b res 1 ; Blue channel
_rxd res 1 ; Received serial data
_rxreg res 1 ; Serial data shift register
_bitrxcnt res 1 ; Serial data bit counter
_flags res 1 ; Flags from the ISR to main to indicate input
_dbs1 res 1 ; Debounce counter S1
_dbs2 res 1 ; Debounce counter S2
_dbs3 res 1 ; Debounce counter S3
hue_lo res 1 ; HSV colorspace
hue_hi res 1
value res 1
saturation res 1
frac_lo res 1 ; fraction helper for HSV
frac_hi res 1
mul_lo res 1 ; Multiply 16 bit source
mul_hi res 1
mul_tmp res 1 ; Multiply 8 bit source
res_lo res 1 ; Multiply 16 bit result
res_hi res 1
adc_lo res 1 ; Read A/D converter channel 7 value
adc_hi res 1
runmode res 1 ; Which running show to do
speed res 1 ; Speed of change
buttonstate res 1 ; complement of the S[1..3] _flags indicators
rampage_state res 1 ; Rampage mode state
step_state res 1 ; Which color to display
TMR1_DIVISOR equ 70 ; Timer1 divisor for step and random display
tmr1div res 1 ; Counter to speed down timer1
rand_0 res 1 ; Random number generator values
rand_1 res 1
rand_2 res 1
rand_3 res 1
shdw_red res 1 ; Shadow values for RGB and HSV
shdw_green res 1 ; These will be activated on serial command
shdw_blue res 1
shdw_hue_lo res 1
shdw_hue_hi res 1
shdw_value res 1
shdw_saturation res 1
rxcmd res 1 ; Received serial command and data
rxdata res 1
; Running modes
MODE_OFF equ 0
MODE_RAMPAGE equ 1
MODE_STEP equ 2
MODE_RANDOM equ 3
MODE_WHEEL equ 4
MODE_FIXED equ 5
MODE_SERIAL equ 6
MODE_7 equ 7
MODE_MASK equ 0x07
; EEPROM layout:
eeprom_startup_mode equ 0x00
eeprom_rampage_speed equ 0x01
eeprom_rampage_dir equ 0x02
eeprom_step_speed equ 0x03
eeprom_step_dir equ 0x04
eeprom_random_speed equ 0x05
eeprom_wheel_speed equ 0x06
eeprom_wheel_dir equ eeprom_step_dir ; (should be 0x07) We have no buttons left to set this...
eeprom_wheel_value equ 0x08
eeprom_wheel_saturation equ 0x09
eeprom_fixed_hue_lo equ 0x0a
eeprom_fixed_hue_hi equ 0x0b
eeprom_fixed_value equ 0x0c
eeprom_fixed_saturation equ 0x0d
;
; The fastest possible guaranteed speed is 1200 Baud. Higher, at 2400 works,
; but there is a border case that may lose the bit timing. Any faster than
; 2400 will skew the bit sampling too much and we miss the data.
IF (BAUDRATE == 1200) ; {
FIRST_BIT_TIME equ (-108) ; 1.037 bit delay at 1200 Baud
NEXT_BIT_TIME equ (-104) ; 0.9984 bit delay at 1200 Baud (plus overhead gets to > 1.0)
ELSE ; }{
IF (BAUDRATE == 2400) ; {
FIRST_BIT_TIME equ (-54) ; 1.037 bit delay at 2400 Baud
NEXT_BIT_TIME equ (-52) ; 0.9984 bit delay at 2400 Baud (plus overhead gets to > 1.0)
ENDIF ; }
ENDIF ; }
SEXTSIZE equ ((1 << 8) + 1)
SEXT0 equ (0 * SEXTSIZE)
SEXT1 equ (1 * SEXTSIZE)
SEXT2 equ (2 * SEXTSIZE)
SEXT3 equ (3 * SEXTSIZE)
SEXT4 equ (4 * SEXTSIZE)
SEXT5 equ (5 * SEXTSIZE)
MAX_HUE equ (6 * SEXTSIZE - 1)
MAX_VALUE equ 255
MAX_SATURATION equ 255
; Timer2 period register setting
; See below at bottom of ISR routine for timing overhead.
;TIMER2_PERIOD equ 156 ; 156 counts -> 12820.51/256 -> pwm:50.1Hz
;TIMER2_PERIOD equ 140 ; 140 counts -> 14285.71/256 -> pwm:55.8Hz
TIMER2_PERIOD equ 130 ; 130 counts -> 15384.61/256 -> pwm:60.1Hz
;
; Code origin
;
IFNDEF COD ; {
code_ikeavars code
ENDIF ; }
org 0x00
goto _main
nop
nop
nop
;
;------------------------------------------------------------------------------
; Interrupt service routine
; The isr should run in less than TIMER2_PERIOD clocks or timer2 will fire again
;------------------------------------------------------------------------------
;
org 0x04
_isr
; ()
movwf isr_wsave
swapf STATUS, w
movwf isr_ssave ; (3)
banksel 0 ; All our vars and regs reside in bank 0
;----- Timer2 handling -----
; ()
btfss PIR1, TMR2IF ; TMR2IF
goto no_tmr2
bcf PIR1, TMR2IF ; Clear TMR2IF
; (4)
clrf isr_tmp ; ()
incf _pwm_r, f ; Round-robin PWM counter
incf _pwm_g, f ; Round-robin PWM counter
incf _pwm_b, f ; Round-robin PWM counter
; if(bit_r > pwm) RA2 = 1
movf _bit_r, w
addwf _pwm_r, w
btfsc STATUS, C
bsf isr_tmp, BITRED
; if(bit_g > pwm) RA1 = 1
movf _bit_g, w
addwf _pwm_g, w
btfsc STATUS, C
bsf isr_tmp, BITGREEN
; if(bit_b > pwm) RA0 = 1
movf _bit_b, w
addwf _pwm_b, w
btfsc STATUS, C
bsf isr_tmp, BITBLUE
movf isr_tmp, w ; Set the LED outputs simultaneously
movwf PORTA ; (18)
; Check the serial input ; ()
movf _bitrxcnt, w ; Only check if not currently receiving
btfss STATUS, Z
goto no_startbit
btfsc PORTA, BITRX ; Check if a start-bit is detected on RA5
goto no_startbit
movlw FIRST_BIT_TIME ; Set Timer0 to fire at middle of first serial bit
movwf TMR0
bcf INTCON, T0IF ; Clear TMR0IF
bsf INTCON, T0IE ; Enable Timer0 interrupt
movlw 9
movwf _bitrxcnt
bsf PORTC, BITIND4 ; Set the receive indicator
; (12)
no_startbit ; (4,5)
; Check the buttons and debounce
; if(~button ^ flag == 0)
; dbcnt = 0;
; if(!--dbcnt)
; flag = ~button;
comf PORTA, w ; ()
xorwf _flags, w
andlw (1 << BITS1) ; if((~PORTA ^ _flags) & (1 << BITS1) == 0)
btfsc STATUS, Z
clrf _dbs1 ; _dbs1 = 0
decf _dbs1, f ; if(!--_dbs1)
btfss STATUS, Z
goto no_change_s1 ; false-clause -> skip to next button
bsf _flags, BIT_S1 ; true-clause -> reversed flag: buttons active low
btfsc PORTA, BITS1
bcf _flags, BIT_S1 ; (9, 11)
no_change_s1
comf PORTA, w ; ()
xorwf _flags, w
andlw (1 << BIT_S2)
btfsc STATUS, Z
clrf _dbs2
decf _dbs2, f
btfss STATUS, Z
goto no_change_s2
bsf _flags, BIT_S2
btfsc PORTA, BITS2
bcf _flags, BIT_S2 ; (9, 11)
no_change_s2
comf PORTC, w ; ()
xorwf _flags, w
andlw (1 << BIT_S3)
btfsc STATUS, Z
clrf _dbs3
decf _dbs3, f
btfss STATUS, Z
goto no_change_s3
bsf _flags, BIT_S3
btfsc PORTC, BITS3
bcf _flags, BIT_S3 ; (9,11)
no_change_s3
no_tmr2
; Timer2 handling cycles:
; - not fired: 4
; - fired: 52..55+4..5 = 56..60
; - startbit: 52..55+12 = 64..67
;----- Timer0 handling -----
; ()
btfss INTCON, T0IE ; Do we have timer0 enable?
goto no_tmr0
btfss INTCON, T0IF ; Do we have timer0 interrupt?
goto no_tmr0
; (4)
; ()
movlw NEXT_BIT_TIME ; Set Timer0 to fire at next bit
movwf TMR0
bcf INTCON, T0IF ; Clear TMR0IF
; (3)
; if(_bitrxcnt > 1)
; read bit
; else
; check stop bit
movf _bitrxcnt, w ; ()
sublw 1 ; 1 - _bitrxcnt
btfsc STATUS, C ; if(_bitrxcnt <= 1)
goto check_stopbit ; check stopbit
bcf STATUS, C ; Read the input state
btfsc PORTA, BITRX
bsf STATUS, C
rrf _rxreg, f ; and put the bit in receiver
goto next_bit
check_stopbit
btfsc PORTA, BITRX ; The stopbit must be '1'
goto next_bit
; error, the stopbit is not '1'
clrf _bitrxcnt ; clear the counter
bcf INTCON, T0IE ; stop the timer
; Now it will read a "start-bit" at next timer2 interrupt,
; but we don't care and the errors will continue until
; the line is idle for a longer period.
bcf PORTC, BITIND4 ; Clear the receive indicator
goto done_tmr0 ; (12)
next_bit
decf _bitrxcnt, f ; Have all bits?
btfss STATUS, Z
goto done_tmr0 ; no
; (14)
bits_done ; ()
bcf INTCON, T0IE ; yes, clear timer0 interrupt enable
movf _rxreg, w ; Move data to received data
btfss _flags, BIT_RXREADY ; Don't overwrite existing data, just drop
movwf _rxd
bsf _flags, BIT_RXREADY ; Indicate data received
; (18)
done_tmr0
no_tmr0
; Timer0 handling cycles:
; not enable: 3
; not fired: 5
; fired, bit: 4+3+14 = 21
; fires, error: 4+3+12 = 19
; fired, rx: 4+3+18 = 25
; ()
swapf isr_ssave, w
movwf STATUS
swapf isr_wsave, f
swapf isr_wsave, w
retfie ; (6)
; ISR timing
; intro: 3
; timer2: 4, 56..67
; timer0: 3,4,19,21,25
; exit: 6
; Timer0 case: 3+4+(19,21,25)+6 = 32..38
; Timer2 case: 3+56..67+(3,4)+6 = 68..80
; Both timers: 3+(56..67)+(19..25)+6 = 84..101
; @50.1Hz PWM (Timer2 = 156) overhead:
; - isr best case: ~21%
; - isr avarage: ~47%
; - isr worst case: ~65%
; @55.8Hz PWM (Timer2 = 140) overhead:
; - isr best case: ~23%
; - isr avarage: ~53%
; - isr worst case: ~72%
; @60.1Hz PWM (Timer2 = 130) overhead:
; - isr best case: ~25%
; - isr avarage: ~57%
; - isr worst case: ~78%
; Worst case serial bit skew:
; - 9 * ~86(+2) = ~774(+18) cycles = ~387(+9)us
; with 416.67us per bit @2400, that means losing time of up to
; 93% (95%) of one bit. That means we should catch all bits
; reliably if the startbit is detected fast. With the next
; startbit detection max. at 78us (18%) away (timer2@50Hz PWM),
; we may fail to receive the next byte.
; @1200 we do not see these problems. Worst case skew @1200 is
; 46.5% (47.5%) and the startbit detection delay is worst case
; at 9.5%.
;
;------------------------------------------------------------------------------
; Main entry point
;------------------------------------------------------------------------------
;
_main
; Initialize registers
clrf STATUS ; Be sure to load BANK0
movlw 0
movwf INTCON ; Disable all interrupts
movwf PORTA ; All LEDs off
movwf PORTC
IFDEF USEWDT ; {
movlw 00010011b
movwf WDTCON ; Watchdog enable, period scale 1:16384 (~0.52 seconds)
; Timer1 should fire at least ~3.8 times per second, which
; kicks the dog in the main loop. If it hasn't, we'll be
; in reset shortly thereafter.
clrwdt
ENDIF ; }
banksel TRISA ; BANK1
movlw 11111000b
movwf TRISA ; RA[012] output, RA[345] input
movlw 11101000b
movwf TRISC ; RC[0124] output, RC[35] input
movlw 0x02
movwf PIE1 ; Enable Timer2 interrupts
movlw 0x71
movwf OSCCON ; Internal 8MHz oscillator
movlw 0x20
movwf WPUA ; RA5 week pull-up enable
movlw 0x03
clrwdt ; pic16f684 Errata.1
movwf OPTION_REG ; Enable RA pull-up, internal TMR0 clock, presclaler for TMR0, prescale 1:16
movlw 0x00
movwf IOCA ; No interrupt-on-change
movlw 01010000b
movwf ADCON1 ; ADC clock Fosc/16
movlw TIMER2_PERIOD
movwf PR2 ; Timer2 period register
IFDEF __16F690 ; {
banksel ANSEL
ENDIF ; }
movlw 0x80
movwf ANSEL ; RC3/AN7 analog input
IFDEF __16F690 ; {
movlw 0x00
movwf ANSELH ; None analog in the high bits
ENDIF ; }
banksel ADCON0 ; BANK0
movlw 0x9d
movwf ADCON0 ; ADC right justify, Vdd ref, AN7 selected, ADC enable
movlw 0x04
movwf T2CON ; Timer2 postscaler 1:1, Timer2 enable, Timer2 prescaler 1
movlw 00110101b
movwf T1CON ; Timer1 enable, internal Fosc/4, prescale 1:8
movlw 0x00
movwf TMR2 ; Reset Timer2
movwf PIR1 ; Clear all peripheral int flags
; Setup memory
; Clear BANK0 memory
movlw LOW(RAM_B0_START)
movwf FSR
movlw LOW(RAM_B0_SIZE)
clear_ram_b0
clrf INDF
incf FSR, f
addlw -1
btfss STATUS, Z
goto clear_ram_b0
; Setup variables
; Everything that should be zero is already set.
;movlw 0x00
;movwf _pwm_r ; The PWM counters are time-shifted to distribute the on-current surge
movlw 0x01
movwf _pwm_g
movlw 0x02
movwf _pwm_b
movlw TMR1_DIVISOR ; Timer1 divisor at max
movwf tmr1div
movlw 0xde ; Random generator init at 0xdeadbeef
movwf rand_3
movlw 0xad
movwf rand_2
movlw 0xbe
movwf rand_1
movlw 0xef
movwf rand_0
movlw 0xc0 ; Enable global and peripheral interrupts
iorwf INTCON, f
; continue into main loop
; Get the eeprom stored runmode
movlw eeprom_startup_mode
call eeprom_read
movwf runmode ; Start stored mode
; if(runmode > 7)
; eeprom_init()
andlw ~MODE_MASK
btfss STATUS, Z
call eeprom_init
call restore_mode_init ; Set state and IND[0..2]
;
;------------------------------------------------------------------------------
; Main Loop
;------------------------------------------------------------------------------
;
; Timer1 fires between 3.8 and 976.6 times per second. This is for
; ramping about between 1.56 and 401.1 seconds round-trip.
; For step and random it means changes between 0.071 and 18.3 seconds.
clrw ; Set timer1 to speed:0
movwf TMR1L
movf speed, w
movwf TMR1H
bcf PIR1, TMR1IF ; Clear the timer1 interrupt flag
clrwdt ; Kick the dog before we start looping
main_loop
btfsc _flags, BIT_RXREADY
call handle_rx
movf _flags, w ; See if S2 has changed state since last time
xorwf buttonstate, w
andlw (1 << BIT_SET_MODE)
btfss STATUS, Z
call handle_set_mode
btfss PIR1, TMR1IF ; keep looping until timer1 fires
goto main_loop
; Restart the timer here so that we don't use too many
; cycles before it is restarted and thereby throwing
; the timing off
clrw ; Set timer1 to speed:0
movwf TMR1L ; timer1 fires between 3.8 and 976.6 times per second
movf speed, w
movwf TMR1H
bcf PIR1, TMR1IF ; Clear the timer1 interrupt flag
; Timer1 fired, run the step-code
; We kick the dog here to ensure that we will step through
; the mode dispatcher at regular intervals. Otherwise we
; could be stuck inside the timer1 wait...
clrwdt ; Kick!
movlw HIGH(mode_table_start)
movwf PCLATH
movf runmode, w
andlw MODE_MASK ; We only know 8 modes
call gotomode
goto main_loop
gotomode
addwf PCL, f
mode_table_start
goto off_step
goto rampage_step
goto step_step
goto random_step
goto wheel_step
goto fixed_step
return ; goto serial_step
goto mode7_step
mode_table_end
IFDEF COD ; {
IFDEF TEST_ALIGNMENT ; {
IF HIGH((mode_table_end-1) ^ mode_table_start) != 0 ; {
ERROR "mode_table crosses page boundary"
ENDIF ; }
ENDIF ; }
ENDIF ; }
;
;------------------------------------------------------------------------------
; Serial mode
; This is a no-op, the serial data will set all values
;------------------------------------------------------------------------------
;
;serial_init
; return
;serial_step
; return
;
;------------------------------------------------------------------------------
; S2 button handling
; Called when a S2 state-change is detected
;------------------------------------------------------------------------------
;
handle_set_mode
btfss buttonstate, BIT_SET_MODE
goto handle_set_mode_on ; Only do something if it is pressed
bcf buttonstate, BIT_SET_MODE
return
handle_set_mode_on
bsf buttonstate, BIT_SET_MODE
; If S1 and S3 are pressed too, save the runmode to eeprom
btfss _flags, BIT_S1
goto do_set_mode
btfss _flags, BIT_S3
goto do_set_mode
; Now all three buttons are pressed
movf runmode, w ; Startup mode data in FSR
movwf FSR
movlw eeprom_startup_mode ; Eeprom address in Wreg
goto eeprom_write ; Save the mode and return
do_set_mode
; Advance to next state
movf runmode, w ; Advance to next mode
addlw 1
andlw MODE_MASK
movwf runmode
; Fallthrough to init next mode and set IND[0..2]
; Restore new state
restore_mode_init
movlw HIGH(modeinit_table_start)
movwf PCLATH
movf runmode, w
andlw MODE_MASK ; We only know 8 modes
call gotomodeinit
goto show_mode
gotomodeinit
addwf PCL, f
modeinit_table_start
return ; goto off_init
goto rampage_init
goto step_init
goto random_init
goto wheel_init
goto fixed_init
return ; goto serial_init
return ; goto mode7_init
modeinit_table_end
IFDEF COD ; {
IFDEF TEST_ALIGNMENT ; {
IF HIGH((modeinit_table_end-1) ^ modeinit_table_start) != 0 ; {
ERROR "modeinit_table crosses page boundary"
ENDIF ; }
ENDIF ; }
ENDIF ; }
show_mode
; Show mode on IND[0..2]
movlw 0xf8
andwf PORTC, f
movf runmode, w
iorwf PORTC, f
return
;
;------------------------------------------------------------------------------
; Mode 7
;------------------------------------------------------------------------------
;
;mode7_init
; return
;
mode7_step
; Not implemented, yet
; set off mode for now
movlw MODE_OFF
movwf runmode
goto restore_mode_init
;
;------------------------------------------------------------------------------
; Read the ADC channel 7
;------------------------------------------------------------------------------
;
read_adc
bsf ADCON0, GO ; Start A/D conversion
btfsc ADCON0, GO ; Poll until done
goto $-1
banksel ADRESL
movf ADRESL, w ; Read low A/D result
banksel ADRESH
movwf adc_lo
movf ADRESH, w ; Read high A/D result
movwf adc_hi
IFDEF LIMIT_ADC_RANGE ; {
; The analog input of the DIODER is limited to 0...4V because
; the potentiometer is blocked to cover the whole turn-angle
; by plastic blocks.
; To compensate we're gonna kill the resolution to 4/5 and
; extend the range again to 5/4.
;
; if(adc > MAX_ADC)
; adc = MAX_ADC;
; adc = adc * 5 / 4
MAX_ADC equ (1023 * 4 / 5)
movlw HIGH(MAX_ADC+1)
subwf adc_hi, w
btfss STATUS, Z
goto adc_checkc
movlw LOW(MAX_ADC+1)
subwf adc_lo, w
adc_checkc
btfss STATUS, C
goto adc_lessmax
movlw HIGH(MAX_ADC) ; adc = MAX_ADC
movwf adc_hi
movlw LOW(MAX_ADC)
movwf adc_lo
adc_lessmax
; The adc value is now 0..MAX_ADC, calculate *5/4
movf adc_lo, w
movwf mul_lo
movf adc_hi, w
movwf mul_hi
bcf STATUS, C
rlf adc_lo, f ; *4
rlf adc_hi, f
rlf adc_lo, f
rlf adc_hi, f
movf mul_lo, w ; *(4+1)
addwf adc_lo, f
movf mul_hi, w
btfsc STATUS, C
addlw 1
addwf adc_hi, f
bcf STATUS, C
rrf adc_hi, f ; *(4+1)/4
rrf adc_lo, f
bcf STATUS, C
rrf adc_hi, f
rrf adc_lo, f
ENDIF ; }
return
;
;------------------------------------------------------------------------------
; Set speed from ADC and save to eeprom on button release
; Input: eeprom address in Wreg
;------------------------------------------------------------------------------
;
set_speed
movwf mul_tmp ; Save address of eeprom target
btfss _flags, BIT_SET_SPEED
goto set_speed_save ; If not set check if we need to save
bsf buttonstate, BIT_SET_SPEED ; Else set the speed
call read_adc
rrf adc_hi, f ; Reduce AD to 8 bit
rrf adc_lo, f
rrf adc_hi, f
rrf adc_lo, w
movwf speed
return
set_speed_save
btfss buttonstate, BIT_SET_SPEED ; Only save if button just went off
return
bcf buttonstate, BIT_SET_SPEED
movf speed, w
movwf FSR
movf mul_tmp, w
goto eeprom_write ; Store speed
;
;------------------------------------------------------------------------------
; Set direction from button and save to eeprom on initial button press
; Input: eeprom address in Wreg
; Output: C set if direction changed
;------------------------------------------------------------------------------
;
set_dir
movwf mul_tmp ; Save address of eeprom target
bcf STATUS, C ; Default to no dir change
btfss _flags, BIT_SET_DIR ; Don't do anything on not-pressed
goto set_dir_nopress
; Ok, button is pressed, seen it before?
btfsc buttonstate, BIT_SET_DIR
return ; Yes, seen it pressed, do nothing
bsf buttonstate, BIT_SET_DIR
movlw (1 << BIT_DIR)
xorwf _flags, f ; Invert direction
movf _flags, w ; Read the direction
andlw ~(1 << BIT_DIR) ; Isolate it
movwf FSR
movf mul_tmp, w
call eeprom_write ; and store in eeprom
bsf STATUS, C ; Return status that dir changed
return
set_dir_nopress
bcf buttonstate, BIT_SET_DIR
return
;
;------------------------------------------------------------------------------
; OFF step
; Simply blanks all outputs...
;------------------------------------------------------------------------------
;