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elagilelagil
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fix: build
1 parent f93bfe2 commit 66f30d7

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15 files changed

+105
-105
lines changed

15 files changed

+105
-105
lines changed

‎embassy-stm32/src/adc/g4.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -178,14 +178,14 @@ impl<'d, T: Instance> Adc<'d, T> {
178178
fn configure_differential_inputs(&mut self) {
179179
T::regs().difsel().modify(|w| {
180180
for n in 0..18 {
181-
w.set_difsel(n, Difsel::SINGLEENDED);
181+
w.set_difsel(n, Difsel::SINGLE_ENDED);
182182
}
183183
});
184184
}
185185

186186
fn calibrate(&mut self) {
187187
T::regs().cr().modify(|w| {
188-
w.set_adcaldif(Adcaldif::SINGLEENDED);
188+
w.set_adcaldif(Adcaldif::SINGLE_ENDED);
189189
});
190190

191191
T::regs().cr().modify(|w| w.set_adcal(true));
@@ -266,7 +266,7 @@ impl<'d, T: Instance> Adc<'d, T> {
266266
if enable {
267267
Difsel::DIFFERENTIAL
268268
} else {
269-
Difsel::SINGLEENDED
269+
Difsel::SINGLE_ENDED
270270
},
271271
);
272272
});
@@ -435,7 +435,7 @@ impl<'d, T: Instance> Adc<'d, T> {
435435
T::regs().cfgr().modify(|reg| {
436436
reg.set_discen(false);
437437
reg.set_cont(true);
438-
reg.set_dmacfg(Dmacfg::ONESHOT);
438+
reg.set_dmacfg(Dmacfg::ONE_SHOT);
439439
reg.set_dmaen(Dmaen::ENABLE);
440440
});
441441

‎embassy-stm32/src/crc/v2v3.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -118,7 +118,7 @@ impl<'d> Crc<'d> {
118118
w.set_rev_in(match self._config.reverse_in {
119119
InputReverseConfig::None => vals::RevIn::NORMAL,
120120
InputReverseConfig::Byte => vals::RevIn::BYTE,
121-
InputReverseConfig::Halfword => vals::RevIn::HALFWORD,
121+
InputReverseConfig::Halfword => vals::RevIn::HALF_WORD,
122122
InputReverseConfig::Word => vals::RevIn::WORD,
123123
});
124124
// configure the polynomial.

‎embassy-stm32/src/dma/dma_bdma.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -100,7 +100,7 @@ impl From<Priority> for pac::dma::vals::Pl {
100100
Priority::Low => pac::dma::vals::Pl::LOW,
101101
Priority::Medium => pac::dma::vals::Pl::MEDIUM,
102102
Priority::High => pac::dma::vals::Pl::HIGH,
103-
Priority::VeryHigh => pac::dma::vals::Pl::VERYHIGH,
103+
Priority::VeryHigh => pac::dma::vals::Pl::VERY_HIGH,
104104
}
105105
}
106106
}
@@ -112,7 +112,7 @@ impl From<Priority> for pac::bdma::vals::Pl {
112112
Priority::Low => pac::bdma::vals::Pl::LOW,
113113
Priority::Medium => pac::bdma::vals::Pl::MEDIUM,
114114
Priority::High => pac::bdma::vals::Pl::HIGH,
115-
Priority::VeryHigh => pac::bdma::vals::Pl::VERYHIGH,
115+
Priority::VeryHigh => pac::bdma::vals::Pl::VERY_HIGH,
116116
}
117117
}
118118
}
@@ -233,8 +233,8 @@ mod bdma_only {
233233
impl From<Dir> for vals::Dir {
234234
fn from(raw: Dir) -> Self {
235235
match raw {
236-
Dir::MemoryToPeripheral => Self::FROMMEMORY,
237-
Dir::PeripheralToMemory => Self::FROMPERIPHERAL,
236+
Dir::MemoryToPeripheral => Self::FROM_MEMORY,
237+
Dir::PeripheralToMemory => Self::FROM_PERIPHERAL,
238238
}
239239
}
240240
}

‎embassy-stm32/src/gpio.rs

Lines changed: 19 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -61,7 +61,7 @@ impl<'d> Flex<'d> {
6161
#[cfg(gpio_v2)]
6262
{
6363
r.pupdr().modify(|w| w.set_pupdr(n, pull.to_pupdr()));
64-
r.otyper().modify(|w| w.set_ot(n, vals::Ot::PUSHPULL));
64+
r.otyper().modify(|w| w.set_ot(n, vals::Ot::PUSH_PULL));
6565
r.moder().modify(|w| w.set_moder(n, vals::Moder::INPUT));
6666
}
6767
});
@@ -82,13 +82,13 @@ impl<'d> Flex<'d> {
8282
{
8383
r.cr(n / 8).modify(|w| {
8484
w.set_mode(n % 8, speed.to_mode());
85-
w.set_cnf_out(n % 8, vals::CnfOut::PUSHPULL);
85+
w.set_cnf_out(n % 8, vals::CnfOut::PUSH_PULL);
8686
});
8787
}
8888
#[cfg(gpio_v2)]
8989
{
9090
r.pupdr().modify(|w| w.set_pupdr(n, vals::Pupdr::FLOATING));
91-
r.otyper().modify(|w| w.set_ot(n, vals::Ot::PUSHPULL));
91+
r.otyper().modify(|w| w.set_ot(n, vals::Ot::PUSH_PULL));
9292
r.ospeedr().modify(|w| w.set_ospeedr(n, speed.to_ospeedr()));
9393
r.moder().modify(|w| w.set_moder(n, vals::Moder::OUTPUT));
9494
}
@@ -112,7 +112,7 @@ impl<'d> Flex<'d> {
112112
let r = self.pin.block();
113113
let n = self.pin.pin() as usize;
114114
r.cr(n / 8).modify(|w| w.set_mode(n % 8, speed.to_mode()));
115-
r.cr(n / 8).modify(|w| w.set_cnf_out(n % 8, vals::CnfOut::OPENDRAIN));
115+
r.cr(n / 8).modify(|w| w.set_cnf_out(n % 8, vals::CnfOut::OPEN_DRAIN));
116116
});
117117

118118
#[cfg(gpio_v2)]
@@ -130,7 +130,7 @@ impl<'d> Flex<'d> {
130130
let r = self.pin.block();
131131
let n = self.pin.pin() as usize;
132132
r.pupdr().modify(|w| w.set_pupdr(n, pull.to_pupdr()));
133-
r.otyper().modify(|w| w.set_ot(n, vals::Ot::OPENDRAIN));
133+
r.otyper().modify(|w| w.set_ot(n, vals::Ot::OPEN_DRAIN));
134134
r.ospeedr().modify(|w| w.set_ospeedr(n, speed.to_ospeedr()));
135135
r.moder().modify(|w| w.set_moder(n, vals::Moder::OUTPUT));
136136
});
@@ -253,8 +253,8 @@ impl Pull {
253253
const fn to_pupdr(self) -> vals::Pupdr {
254254
match self {
255255
Pull::None => vals::Pupdr::FLOATING,
256-
Pull::Up => vals::Pupdr::PULLUP,
257-
Pull::Down => vals::Pupdr::PULLDOWN,
256+
Pull::Up => vals::Pupdr::PULL_UP,
257+
Pull::Down => vals::Pupdr::PULL_DOWN,
258258
}
259259
}
260260
}
@@ -293,11 +293,11 @@ impl Speed {
293293
#[cfg(gpio_v2)]
294294
const fn to_ospeedr(self: Speed) -> vals::Ospeedr {
295295
match self {
296-
Speed::Low => vals::Ospeedr::LOWSPEED,
297-
Speed::Medium => vals::Ospeedr::MEDIUMSPEED,
296+
Speed::Low => vals::Ospeedr::LOW_SPEED,
297+
Speed::Medium => vals::Ospeedr::MEDIUM_SPEED,
298298
#[cfg(not(syscfg_f0))]
299-
Speed::High => vals::Ospeedr::HIGHSPEED,
300-
Speed::VeryHigh => vals::Ospeedr::VERYHIGHSPEED,
299+
Speed::High => vals::Ospeedr::HIGH_SPEED,
300+
Speed::VeryHigh => vals::Ospeedr::VERY_HIGH_SPEED,
301301
}
302302
}
303303
}
@@ -539,16 +539,16 @@ impl OutputType {
539539
#[cfg(gpio_v1)]
540540
const fn to_cnf_out(self) -> vals::CnfOut {
541541
match self {
542-
OutputType::PushPull => vals::CnfOut::ALTPUSHPULL,
543-
OutputType::OpenDrain => vals::CnfOut::ALTOPENDRAIN,
542+
OutputType::PushPull => vals::CnfOut::ALTPUSH_PULL,
543+
OutputType::OpenDrain => vals::CnfOut::ALTOPEN_DRAIN,
544544
}
545545
}
546546

547547
#[cfg(gpio_v2)]
548548
const fn to_ot(self) -> vals::Ot {
549549
match self {
550-
OutputType::PushPull => vals::Ot::PUSHPULL,
551-
OutputType::OpenDrain => vals::Ot::OPENDRAIN,
550+
OutputType::PushPull => vals::Ot::PUSH_PULL,
551+
OutputType::OpenDrain => vals::Ot::OPEN_DRAIN,
552552
}
553553
}
554554
}
@@ -624,8 +624,8 @@ impl AfType {
624624
pub const fn input(pull: Pull) -> Self {
625625
Self {
626626
pupdr: pull.to_pupdr(),
627-
ot: vals::Ot::PUSHPULL,
628-
ospeedr: vals::Ospeedr::LOWSPEED,
627+
ot: vals::Ot::PUSH_PULL,
628+
ospeedr: vals::Ospeedr::LOW_SPEED,
629629
}
630630
}
631631

@@ -705,8 +705,8 @@ fn get_pull(pin_port: u8) -> Pull {
705705
#[cfg(gpio_v2)]
706706
return match r.pupdr().read().pupdr(n) {
707707
vals::Pupdr::FLOATING => Pull::None,
708-
vals::Pupdr::PULLDOWN => Pull::Down,
709-
vals::Pupdr::PULLUP => Pull::Up,
708+
vals::Pupdr::PULL_DOWN => Pull::Down,
709+
vals::Pupdr::PULL_UP => Pull::Up,
710710
vals::Pupdr::_RESERVED_3 => Pull::None,
711711
};
712712
}

‎embassy-stm32/src/i2c/v2.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -74,7 +74,7 @@ impl<'d, M: Mode> I2c<'d, M> {
7474
// is BUSY or I2C is in slave mode.
7575

7676
let reload = if reload {
77-
i2c::vals::Reload::NOTCOMPLETED
77+
i2c::vals::Reload::NOT_COMPLETED
7878
} else {
7979
i2c::vals::Reload::COMPLETED
8080
};
@@ -115,7 +115,7 @@ impl<'d, M: Mode> I2c<'d, M> {
115115
}
116116

117117
let reload = if reload {
118-
i2c::vals::Reload::NOTCOMPLETED
118+
i2c::vals::Reload::NOT_COMPLETED
119119
} else {
120120
i2c::vals::Reload::COMPLETED
121121
};
@@ -144,7 +144,7 @@ impl<'d, M: Mode> I2c<'d, M> {
144144
}
145145

146146
let reload = if reload {
147-
i2c::vals::Reload::NOTCOMPLETED
147+
i2c::vals::Reload::NOT_COMPLETED
148148
} else {
149149
i2c::vals::Reload::COMPLETED
150150
};

‎embassy-stm32/src/opamp.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@ impl From<OpAmpSpeed> for crate::pac::opamp::vals::Opahsm {
3030
fn from(v: OpAmpSpeed) -> Self {
3131
match v {
3232
OpAmpSpeed::Normal => crate::pac::opamp::vals::Opahsm::NORMAL,
33-
OpAmpSpeed::HighSpeed => crate::pac::opamp::vals::Opahsm::HIGHSPEED,
33+
OpAmpSpeed::HighSpeed => crate::pac::opamp::vals::Opahsm::HIGH_SPEED,
3434
}
3535
}
3636
}
@@ -105,7 +105,7 @@ impl<'d, T: Instance> OpAmp<'d, T> {
105105
w.set_vm_sel(VmSel::from_bits(vm_sel));
106106
w.set_pga_gain(PgaGain::from_bits(pga_gain));
107107
#[cfg(opamp_g4)]
108-
w.set_opaintoen(Opaintoen::OUTPUTPIN);
108+
w.set_opaintoen(Opaintoen::OUTPUT_PIN);
109109
w.set_opampen(true);
110110
});
111111

@@ -131,7 +131,7 @@ impl<'d, T: Instance> OpAmp<'d, T> {
131131

132132
w.set_vm_sel(VmSel::OUTPUT);
133133
w.set_vp_sel(VpSel::DAC3_CH1);
134-
w.set_opaintoen(Opaintoen::OUTPUTPIN);
134+
w.set_opaintoen(Opaintoen::OUTPUT_PIN);
135135
w.set_opampen(true);
136136
});
137137

‎embassy-stm32/src/rcc/bd.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -45,8 +45,8 @@ impl From<LseDrive> for crate::pac::rcc::vals::Lsedrv {
4545
match value {
4646
#[cfg(not(stm32h5))] // ES0565: LSE Low drive mode is not functional
4747
LseDrive::Low => Lsedrv::LOW,
48-
LseDrive::MediumLow => Lsedrv::MEDIUMLOW,
49-
LseDrive::MediumHigh => Lsedrv::MEDIUMHIGH,
48+
LseDrive::MediumLow => Lsedrv::MEDIUM_LOW,
49+
LseDrive::MediumHigh => Lsedrv::MEDIUM_HIGH,
5050
LseDrive::High => Lsedrv::HIGH,
5151
}
5252
}

‎embassy-stm32/src/rtc/v3.rs

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ impl super::Rtc {
1212
self.write(true, |rtc| {
1313
rtc.cr().modify(|w| {
1414
w.set_bypshad(true);
15-
w.set_fmt(Fmt::TWENTYFOURHOUR);
15+
w.set_fmt(Fmt::TWENTY_FOUR_HOUR);
1616
w.set_osel(Osel::DISABLED);
1717
w.set_pol(Pol::HIGH);
1818
});
@@ -25,7 +25,7 @@ impl super::Rtc {
2525
// TODO: configuration for output pins
2626
rtc.cr().modify(|w| {
2727
w.set_out2en(false);
28-
w.set_tampalrm_type(TampalrmType::PUSHPULL);
28+
w.set_tampalrm_type(TampalrmType::PUSH_PULL);
2929
w.set_tampalrm_pu(false);
3030
});
3131
});
@@ -56,10 +56,10 @@ impl super::Rtc {
5656
rtc.calr().write(|w| {
5757
match period {
5858
RtcCalibrationCyclePeriod::Seconds8 => {
59-
w.set_calw8(Calw8::EIGHTSECONDS);
59+
w.set_calw8(Calw8::EIGHT_SECONDS);
6060
}
6161
RtcCalibrationCyclePeriod::Seconds16 => {
62-
w.set_calw16(Calw16::SIXTEENSECONDS);
62+
w.set_calw16(Calw16::SIXTEEN_SECONDS);
6363
}
6464
RtcCalibrationCyclePeriod::Seconds32 => {
6565
// Set neither `calw8` nor `calw16` to use 32 seconds
@@ -79,7 +79,7 @@ impl super::Rtc {
7979
// When the offset is positive (0 to 512), the opposite of
8080
// the offset (512 - offset) is masked, i.e. for the
8181
// maximum offset (512), 0 pulses are masked.
82-
w.set_calp(Calp::INCREASEFREQ);
82+
w.set_calp(Calp::INCREASE_FREQ);
8383
w.set_calm(512 - clock_drift as u16);
8484
} else {
8585
// Minimum (about -510.7) rounds to -511.
@@ -88,7 +88,7 @@ impl super::Rtc {
8888
// When the offset is negative or zero (-511 to 0),
8989
// the absolute offset is masked, i.e. for the minimum
9090
// offset (-511), 511 pulses are masked.
91-
w.set_calp(Calp::NOCHANGE);
91+
w.set_calp(Calp::NO_CHANGE);
9292
w.set_calm((clock_drift * -1.0) as u16);
9393
}
9494
});

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