diff --git a/litex/build/efinix/common.py b/litex/build/efinix/common.py
index f43afb0c6a..28aa62c747 100644
--- a/litex/build/efinix/common.py
+++ b/litex/build/efinix/common.py
@@ -295,7 +295,8 @@ def __init__(self, platform, io, o1, o2, oe1, oe2, i1, i2, clk):
             "out_reg"           : "DDIO_RESYNC",
             "out_clk_pin"       : clk,
             "oe_reg"            : "REG",
-            "is_inclk_inverted" : False,
+            "in_clk_inv"        : 0,
+            "out_clk_inv"       : 0,
             "drive_strength"    : io_prop_dict.get("DRIVE_STRENGTH", "4")
         }
         platform.toolchain.ifacewriter.blocks.append(block)
@@ -333,7 +334,8 @@ def __init__(self, platform, io, o, oe, i, clk):
             "out_reg"           : "REG",
             "out_clk_pin"       : clk,
             "oe_reg"            : "REG",
-            "is_inclk_inverted" : False,
+            "in_clk_inv"        : 0,
+            "out_clk_inv"       : 0,
             "drive_strength"    : io_prop_dict.get("DRIVE_STRENGTH", "4")
         }
         platform.toolchain.ifacewriter.blocks.append(block)
@@ -365,7 +367,7 @@ def __init__(self, platform, i, o, clk):
             "size"              : 1,
             "out_reg"           : "REG",
             "out_clk_pin"       : clk,
-            "is_inclk_inverted" : False,
+            "out_clk_inv"       : 0,
             "drive_strength"    : io_prop_dict.get("DRIVE_STRENGTH", "4")
         }
         platform.toolchain.ifacewriter.blocks.append(block)
@@ -399,7 +401,7 @@ def __init__(self, platform, i1, i2, o, clk):
             "size"              : 1,
             "out_reg"           : "DDIO_RESYNC",
             "out_clk_pin"       : clk,
-            "is_inclk_inverted" : False,
+            "out_clk_inv"       : 0,
             "drive_strength"    : io_prop_dict.get("DRIVE_STRENGTH", "4")
         }
         platform.toolchain.ifacewriter.blocks.append(block)
@@ -460,7 +462,7 @@ def __init__(self, platform, i, o1, o2, clk):
             "size"              : 1,
             "in_reg"            : "DDIO_RESYNC",
             "in_clk_pin"        : clk,
-            "is_inclk_inverted" : False
+            "in_clk_inv"        : 0
         }
         platform.toolchain.ifacewriter.blocks.append(block)
         platform.toolchain.excluded_ios.append(platform.get_pin(i))
diff --git a/litex/build/efinix/ifacewriter.py b/litex/build/efinix/ifacewriter.py
index 6a53c8ccb3..ffae3b2d94 100644
--- a/litex/build/efinix/ifacewriter.py
+++ b/litex/build/efinix/ifacewriter.py
@@ -166,9 +166,6 @@ def generate_gpio(self, block, verbose=True):
                     cmd += f'design.assign_pkg_pin("{name}[{i}]","{pad}")\n'
 
             if "out_reg" in block:
-                cmd += f'design.set_property("{name}","oe_REG","{block["out_reg"]}")\n'
-
-            if "oe_reg" in block:
                 cmd += f'design.set_property("{name}","OUT_REG","{block["out_reg"]}")\n'
                 cmd += f'design.set_property("{name}","OUT_CLK_PIN","{block["out_clk_pin"]}")\n'
                 if "out_delay" in block:
@@ -176,7 +173,6 @@ def generate_gpio(self, block, verbose=True):
 
             if "out_clk_inv" in block:
                 cmd += f'design.set_property("{name}","IS_OUTCLK_INVERTED","{block["out_clk_inv"]}")\n'
-                cmd += f'design.set_property("{name}","OE_CLK_PIN_INV","{block["out_clk_inv"]}")\n'
 
             if "in_reg" in block:
                 cmd += f'design.set_property("{name}","IN_REG","{block["in_reg"]}")\n'
@@ -189,8 +185,6 @@ def generate_gpio(self, block, verbose=True):
 
             if "oe_reg" in block:
                 cmd += f'design.set_property("{name}","OE_REG","{block["oe_reg"]}")\n'
-            if "oe_clk_pin" in block:
-                cmd += f'design.set_property("{name}","OE_CLK_PIN","{block["oe_clk_pin"]}")\n'
 
             if "drive_strength" in block:
                 cmd += 'design.set_property("{}","DRIVE_STRENGTH","{}")\n'.format(name, block["drive_strength"])
@@ -225,6 +219,8 @@ def generate_gpio(self, block, verbose=True):
                 cmd += f'design.set_property("{name}","IN_CLK_PIN","{in_clk_pin}")\n'
                 if "in_delay" in block:
                     cmd += f'design.set_property("{name}","INDELAY","{block["in_delay"]}")\n'
+            if "in_clk_inv" in block:
+                cmd += f'design.set_property("{name}","IS_INCLK_INVERTED","{block["in_clk_inv"]}")\n'
             if prop:
                 for p, val in prop:
                     cmd += 'design.set_property("{}","{}","{}")\n'.format(name, p, val)
@@ -248,7 +244,6 @@ def generate_gpio(self, block, verbose=True):
 
             if "out_clk_inv" in block:
                 cmd += f'design.set_property("{name}","IS_OUTCLK_INVERTED","{block["out_clk_inv"]}")\n'
-                cmd += f'design.set_property("{name}","OE_CLK_PIN_INV","{block["out_clk_inv"]}")\n'
 
             if "drive_strength" in block:
                 cmd += 'design.set_property("{}","DRIVE_STRENGTH","{}")\n'.format(name, block["drive_strength"])