build/efinix/common.py: ClkInput: added ClockSignal support

Author: trabucayre

litex/build/efinix/common.py

@@ -67,13 +67,14 @@ def lower(dr):
 
 class EfinixClkInputImpl(Module):
     def __init__(self, platform, i, o):
-        o_clk  = platform.add_iface_io(o) # FIXME.
+        if not isinstance(o, Signal):
+            o_clk  = platform.add_iface_io(o) # FIXME.
         block = {
             "type"       : "GPIO",
             "size"       : 1,
             "location"   : platform.get_pin_location(i)[0],
             "properties" : platform.get_pin_properties(i),
-            "name"       : platform.get_pin_name(o_clk),
+            "name"       : o.name_override if isinstance(o, Signal) else platform.get_pin_name(o_clk),
             "mode"       : "INPUT_CLK",
         }
         platform.toolchain.ifacewriter.blocks.append(block)