diff --git a/.appveyor.yml b/.appveyor.yml new file mode 100644 index 0000000..e3116d2 --- /dev/null +++ b/.appveyor.yml @@ -0,0 +1,51 @@ +cache: + - C:\Users\appveyor\.tools + +init: + - git config --global core.autocrlf true + +clone_depth: 50 + +skip_commits: + files: + - 'documentation/*' + - '**/*.html' + - '**/*.md' + - '.travis.yml' + +# Build Configurations: dll/static, regular/debug +configuration: + - dynamic + - static + - dynamic-debug + - static-debug + +environment: + # common / default variables for all jobs + SETUP_PATH: .ci-local + + matrix: + - CMP: vs2019 + BASE: 7.0 + APPVEYOR_BUILD_WORKER_IMAGE: Visual Studio 2019 + +# Platform: processor architecture +platform: + - x64 + +install: + - cmd: git submodule update --init --recursive + +build_script: + - cmd: python .ci/cue.py prepare + - cmd: python .ci/cue.py build + +test_script: + - cmd: python .ci/cue.py test + +on_finish: + - ps: Get-ChildItem *.tap -Recurse -Force | % { Push-AppveyorArtifact $_.FullName -FileName $_.Name } + - cmd: python .ci/cue.py test-results + +notifications: + - provider: GitHubPullRequest diff --git a/.ci-local/defaults.set b/.ci-local/defaults.set new file mode 100644 index 0000000..1e35c18 --- /dev/null +++ b/.ci-local/defaults.set @@ -0,0 +1,6 @@ +# EPICS Base +BASE_DIRNAME=base +BASE_REPONAME=epics-base +BASE_REPOOWNER=epics-base +BASE_VARNAME=EPICS_BASE +BASE_RECURSIVE=no diff --git a/.gitattributes b/.gitattributes new file mode 100644 index 0000000..23b792c --- /dev/null +++ b/.gitattributes @@ -0,0 +1 @@ +README.md export-subst diff --git a/.github/workflows/ci-scripts-build.yml b/.github/workflows/ci-scripts-build.yml new file mode 100644 index 0000000..b68745a --- /dev/null +++ b/.github/workflows/ci-scripts-build.yml @@ -0,0 +1,129 @@ +# .github/workflows/ci-scripts-build.yml for use with EPICS Base ci-scripts +# (see: https://github.com/epics-base/ci-scripts) + +# This is YAML - indentation levels are crucial + +# Set the 'name:' properties to values that work for you (pvxs) + +name: devlib2 + +# Trigger on pushes and PRs to any branch +on: + push: + paths-ignore: + - "documentation/**" + - "**/*.md" + pull_request: + paths-ignore: + - "documentation/**" + - "**/*.md" + workflow_dispatch: + +env: + SETUP_PATH: .ci-local:.ci + EPICS_TEST_IMPRECISE_TIMING: YES + +jobs: + build-base: + name: ${{ matrix.base }}/${{ matrix.os }}/${{ matrix.cmp }}/${{ matrix.configuration }}${{ matrix.rtems }}/${{ matrix.extra }} + runs-on: ${{ matrix.os }} + # Set environment variables from matrix parameters + env: + BASE: ${{ matrix.base }} + CMP: ${{ matrix.cmp }} + BCFG: ${{ matrix.configuration }} + RTEMS: ${{ matrix.rtems }} + EXTRA: ${{ matrix.extra }} + TEST: ${{ matrix.test }} + strategy: + fail-fast: false + matrix: + include: + - os: ubuntu-20.04 + cmp: gcc + configuration: default + base: "7.0" + wine: "64" + + - os: ubuntu-20.04 + cmp: gcc + configuration: static + base: "7.0" + + - os: ubuntu-20.04 + cmp: gcc + configuration: default + base: "3.15" + + - os: ubuntu-20.04 + cmp: gcc + configuration: default + base: "3.14" + + - os: ubuntu-20.04 + cmp: gcc + configuration: static + base: "7.0" + extra: "CMD_CXXFLAGS=-std=c++11" + + - os: ubuntu-20.04 + cmp: clang + configuration: default + base: "7.0" + extra: "CMD_CXXFLAGS=-std=c++11" + + - os: ubuntu-20.04 + cmp: gcc + configuration: default + base: "7.0" + rtems: "4.10" + + - os: ubuntu-20.04 + cmp: gcc + configuration: default + base: "7.0" + rtems: "4.9" + + - os: ubuntu-20.04 + cmp: gcc-8 + utoolchain: "8" + configuration: default + base: "7.0" + + - os: ubuntu-20.04 + cmp: clang + configuration: default + base: "7.0" + + steps: + - uses: actions/checkout@v2 + with: + submodules: true + - name: Cache Dependencies + uses: actions/cache@v2 + with: + path: ~/.cache + key: ${{ matrix.base }}/${{ matrix.os }}/${{ matrix.cmp }}/${{ matrix.configuration }}/${{ matrix.wine }}${{ matrix.rtems }}/${{ matrix.extra }} + - name: Automatic core dump analysis + uses: mdavidsaver/ci-core-dumper@master + - name: "apt-get install" + run: | + sudo apt-get update + sudo apt-get -y install qemu-system-x86 g++-mingw-w64-x86-64 gdb + if: runner.os == 'Linux' + - name: "apt-get install ${{ matrix.cmp }}" + run: | + sudo apt-get update + sudo apt-get -y install software-properties-common + sudo add-apt-repository -y ppa:ubuntu-toolchain-r/test + sudo apt-get update + sudo apt-get -y install g++-${{ matrix.utoolchain }} + if: matrix.utoolchain + - name: Prepare and compile dependencies + run: python .ci/cue.py prepare + - name: Build main module + run: python .ci/cue.py build + - name: Run main module tests + run: python .ci/cue.py test + - name: Collect and show test results + run: python .ci/cue.py test-results diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..948af4a --- /dev/null +++ b/.gitignore @@ -0,0 +1,8 @@ +/bin/ +/db/ +/dbd/ +/include/ +/lib/ +/cfg/ +O.*/ +*.local diff --git a/.gitmodules b/.gitmodules new file mode 100644 index 0000000..16d8e49 --- /dev/null +++ b/.gitmodules @@ -0,0 +1,3 @@ +[submodule ".ci"] + path = .ci + url = https://github.com/epics-base/ci-scripts.git diff --git a/.hgignore b/.hgignore new file mode 100644 index 0000000..605543d --- /dev/null +++ b/.hgignore @@ -0,0 +1,9 @@ +O.* +^bin$ +^db$ +^dbd$ +^include$ +^lib$ +^envPaths$ +^html$ +^documentation/doc$ diff --git a/.hgtags b/.hgtags new file mode 100644 index 0000000..25005c0 --- /dev/null +++ b/.hgtags @@ -0,0 +1,7 @@ +e23cb6805b9fb3a5489ae6f041e065ef841a84eb 2.0 +f8131c88926e6d5b0cf7195edf55f2a8e6311745 2.1 +da086a6d94ae8b2f2447dd3eba39dd6ff929a35e 2.2 +921aed1b0b86ada325b9e5fe70acfd383636e008 2.3 +4ceac34e67b963a6be0a2c6f032004f337568912 2.4 +9dd68ea8e138c64e1f6c1a8e874ba8629dc8b07e 2.5 +8f9f3f208d469f694812a0c8333d8316443919d0 2.6 diff --git a/annotated.html b/annotated.html new file mode 100644 index 0000000..9479da7 --- /dev/null +++ b/annotated.html @@ -0,0 +1,67 @@ + + + + + + + +devLib2: Data Structures + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + +
+
+
+
Data Structures
+
+
+
Here are the data structures with brief descriptions:
+ + + + + + + + + + + +
 Cbdf
 Cbdfmatch
 CdevLibPCI
 CepicsPCIDeviceDevice token
 CepicsPCIIDPCI device identifier
 CosdPCIDevice
 CPCIBar
 CrangeItem
 Csearchinfo
 CVMECSRIDID info for a VME64(x) device This structure is used to hold identifying information for a VME64 compatible device. When used for searching each field can hold a specific value of the 'VMECSRANY' wildcard
+
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/bc_s.png b/bc_s.png new file mode 100644 index 0000000..224b29a Binary files /dev/null and b/bc_s.png differ diff --git a/bdwn.png b/bdwn.png new file mode 100644 index 0000000..940a0b9 Binary files /dev/null and b/bdwn.png differ diff --git a/classes.html b/classes.html new file mode 100644 index 0000000..8dceda6 --- /dev/null +++ b/classes.html @@ -0,0 +1,73 @@ + + + + + + + +devLib2: Data Structure Index + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + +
+
+
+
Data Structure Index
+
+
+
b | d | e | o | p | r | s | v
+ + + + + + + + + +
  b  
+
  e  
+
  p  
+
  s  
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bdf   epicsPCIDevice   PCIBar   searchinfo   
bdfmatch   epicsPCIID   
  r  
+
  v  
+
  d  
+
  o  
+
rangeItem   VMECSRID   
devLibPCI   osdPCIDevice   
+
b | d | e | o | p | r | s | v
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/closed.png b/closed.png new file mode 100644 index 0000000..98cc2c9 Binary files /dev/null and b/closed.png differ diff --git a/dev_lib_p_c_i_8c.html b/dev_lib_p_c_i_8c.html new file mode 100644 index 0000000..b2899ad --- /dev/null +++ b/dev_lib_p_c_i_8c.html @@ -0,0 +1,362 @@ + + + + + + + +devLib2: devLibPCI.c File Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+Data Structures | +Macros | +Functions | +Variables
+
+
devLibPCI.c File Reference
+
+
+
#include <stdlib.h>
+#include <string.h>
+#include <ctype.h>
+#include <ellLib.h>
+#include <errlog.h>
+#include <epicsThread.h>
+#include <epicsMutex.h>
+#include <iocsh.h>
+#include <epicsStdio.h>
+#include "devLibPCIImpl.h"
+#include "devLibPCI.h"
+#include <epicsExport.h>
+
+

Go to the source code of this file.

+ + + + + + +

+Data Structures

struct  bdfmatch
 
struct  searchinfo
 
+ + + + + + + +

+Macros

#define epicsExportSharedSymbols
 
#define CONTAINER(ptr, structure, member)   ((structure*)((char*)(ptr) - offsetof(structure, member)))
 
#define PCIINIT
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

int devLibPCIRegisterDriver2 (devLibPCI *drv, size_t drvsize)
 
int devLibPCIUse (const char *use)
 Select driver implementation. Pick driver implementation by name, or NULL to use default. If no selection is made then the default will be used if available. More...
 
const char * devLibPCIDriverName ()
 
int devLibPCIMatch (const epicsPCIID *match, const epicsPCIID *dev)
 
int devPCIFindCB (const epicsPCIID *idlist, devPCISearchFn searchfn, void *arg, unsigned int opt)
 PCI bus search w/ callback. More...
 
int devPCIFindSpec (const epicsPCIID *idlist, const char *spec, const epicsPCIDevice **found, unsigned int opt)
 PCI bus search by specification string. More...
 
int devPCIFindDBDF (const epicsPCIID *idlist, unsigned int domain, unsigned int b, unsigned int d, unsigned int f, const epicsPCIDevice **found, unsigned int opt)
 PCI bus probe. More...
 
int devPCIFindBDF (const epicsPCIID *idlist, unsigned int b, unsigned int d, unsigned int f, const epicsPCIDevice **found, unsigned int opt)
 
int devPCIToLocalAddr (const epicsPCIDevice *curdev, unsigned int bar, volatile void **ppLocalAddr, unsigned int opt)
 Get pointer to PCI BAR. More...
 
int devPCIBarLen (const epicsPCIDevice *curdev, unsigned int bar, epicsUInt32 *len)
 Find the size of a BAR. More...
 
int devPCIConnectInterrupt (const epicsPCIDevice *curdev, void(*pFunction)(void *), void *parameter, unsigned int opt)
 Request interrupts for device. More...
 
int devPCIDisconnectInterrupt (const epicsPCIDevice *curdev, void(*pFunction)(void *), void *parameter)
 Stop receiving interrupts. More...
 
void devPCIShow (int lvl, int vendor, int device, int exact)
 
void devPCIShowMatch (int lvl, const char *spec, int vendor, int device)
 
void devPCIShowDevice (int lvl, const epicsPCIDevice *dev)
 
int devPCIConfigRead8 (const epicsPCIDevice *dev, unsigned offset, epicsUInt8 *pResult)
 Read byte from configuration space. More...
 
int devPCIConfigRead16 (const epicsPCIDevice *dev, unsigned offset, epicsUInt16 *pResult)
 Read (16-bit) word from configuration space. More...
 
int devPCIConfigRead32 (const epicsPCIDevice *dev, unsigned offset, epicsUInt32 *pResult)
 Read (32-bit) dword from configuration space. More...
 
int devPCIConfigWrite8 (const epicsPCIDevice *dev, unsigned offset, epicsUInt8 value)
 Write byte to configuration space. More...
 
int devPCIConfigWrite16 (const epicsPCIDevice *dev, unsigned offset, epicsUInt16 value)
 Write (16-bit) word from configuration space. More...
 
int devPCIConfigWrite32 (const epicsPCIDevice *dev, unsigned offset, epicsUInt32 value)
 Write (32-bit) dword from configuration space. More...
 
int devPCIEnableInterrupt (const epicsPCIDevice *dev)
 Enable interrupts at the device. More...
 
int devPCIDisableInterrupt (const epicsPCIDevice *dev)
 Enable interrupts at the device. More...
 
 epicsExportRegistrar (devLibPCIIOCSH)
 
 epicsExportAddress (int, devPCIDebug)
 
+ + + +

+Variables

int devPCIDebug = 0
 
+

Macro Definition Documentation

+ +

◆ CONTAINER

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
#define CONTAINER( ptr,
 structure,
 member 
)   ((structure*)((char*)(ptr) - offsetof(structure, member)))
+
+ +

Definition at line 33 of file devLibPCI.c.

+ +
+
+ +

◆ epicsExportSharedSymbols

+ +
+
+ + + + +
#define epicsExportSharedSymbols
+
+ +

Definition at line 22 of file devLibPCI.c.

+ +
+
+ +

◆ PCIINIT

+ +
+
+ + + + +
#define PCIINIT
+
+Value:
do { \
epicsThreadOnce(&devPCIInit_once, &devInit, NULL); \
if (devPCIInit_result) return devPCIInit_result; \
} while(0)
+

Definition at line 205 of file devLibPCI.c.

+ +
+
+

Function Documentation

+ +

◆ devLibPCIMatch()

+ +
+
+ + + + + + + + + + + + + + + + + + +
int devLibPCIMatch (const epicsPCIID * match,
const epicsPCIID * dev 
)
+
+

Helper for implementing devLibPCI::pDevPCIFind()

+

Returns true if the given match (which may include DEVPCI_ANY_* wildcards) matches the given device (which may not).

+ +

Definition at line 153 of file devLibPCI.c.

+ +
+
+ +

◆ devLibPCIRegisterDriver2()

+ +
+
+ + + + + + + + + + + + + + + + + + +
int devLibPCIRegisterDriver2 (devLibPCI * drv,
size_t drvsize 
)
+
+ +

Definition at line 70 of file devLibPCI.c.

+ +
+
+ +

◆ epicsExportAddress()

+ +
+
+ + + + + + + + + + + + + + + + + + +
epicsExportAddress (int ,
devPCIDebug  
)
+
+ +
+
+ +

◆ epicsExportRegistrar()

+ +
+
+ + + + + + + + +
epicsExportRegistrar (devLibPCIIOCSH )
+
+ +
+
+

Variable Documentation

+ +

◆ devPCIDebug

+ +
+
+ + + + +
int devPCIDebug = 0
+
+ +

Definition at line 48 of file devLibPCI.c.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/dev_lib_p_c_i_8c_source.html b/dev_lib_p_c_i_8c_source.html new file mode 100644 index 0000000..aee81b4 --- /dev/null +++ b/dev_lib_p_c_i_8c_source.html @@ -0,0 +1,152 @@ + + + + + + + +devLib2: devLibPCI.c Source File + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+
devLibPCI.c
+
+
+Go to the documentation of this file.
1 /*************************************************************************\
2 * Copyright (c) 2010 Brookhaven Science Associates, as Operator of
3 * Brookhaven National Laboratory.
4 * devLib2 is distributed subject to a Software License Agreement found
5 * in file LICENSE that is included with this distribution.
6 \*************************************************************************/
7 /*
8  * Author: Michael Davidsaver <mdavidsaver@gmail.com>
9  */
10 
11 #include <stdlib.h>
12 #include <string.h>
13 #include <ctype.h>
14 
15 #include <ellLib.h>
16 #include <errlog.h>
17 #include <epicsThread.h>
18 #include <epicsMutex.h>
19 #include <iocsh.h>
20 #include <epicsStdio.h>
21 
22 #define epicsExportSharedSymbols
23 #include "devLibPCIImpl.h"
24 #include "devLibPCI.h"
25 
26 #ifndef CONTAINER
27 # ifdef __GNUC__
28 # define CONTAINER(ptr, structure, member) ({ \
29  const __typeof(((structure*)0)->member) *_ptr = (ptr); \
30  (structure*)((char*)_ptr - offsetof(structure, member)); \
31  })
32 # else
33 # define CONTAINER(ptr, structure, member) \
34  ((structure*)((char*)(ptr) - offsetof(structure, member)))
35 # endif
36 #endif
37 
38 #if defined(vxWorks) && !defined(_WRS_VXWORKS_MAJOR)
39 /* vxWorks 5 has no strdup */
40 #define strdup(x) ({char*s=malloc(strlen(x)+1);s?strcpy(s,x):s;})
41 #endif
42 
43 #ifdef _WIN32
44 /* Windows uses different name for strtok_r */
45 #define strtok_r strtok_s
46 #endif
47 
48 int devPCIDebug = 0;
49 
50 static ELLLIST pciDrivers;
51 
52 static devLibPCI *pdevLibPCI;
53 
54 static epicsMutexId pciDriversLock;
55 static epicsThreadOnceId devPCIReg_once = EPICS_THREAD_ONCE_INIT;
56 
57 static epicsThreadOnceId devPCIInit_once = EPICS_THREAD_ONCE_INIT;
58 static int devPCIInit_result = 42;
59 
60 /******************* Initialization *********************/
61 
62 static
63 void regInit(void* junk)
64 {
65  (void)junk;
66  pciDriversLock = epicsMutexMustCreate();
67 }
68 
69 int
70 devLibPCIRegisterDriver2(devLibPCI* drv, size_t drvsize)
71 {
72  int ret=0;
73  ELLNODE *cur;
74 
75  if (!drv->name) return 1;
76 
77  if(drvsize!=sizeof(*drv)) {
78  fprintf(stderr, "devLibPCIRegisterDriver() fails with inconsistent PCI OS struct sizes.\n"
79  "expect %lu but given %lu\n"
80  "Please do a clean rebuild of devLib2 and any code with custom PCI OS structs\n",
81  (unsigned long)sizeof(*drv),
82  (unsigned long)drvsize);
83  return S_dev_internal;
84  }
85 
86  epicsThreadOnce(&devPCIReg_once, &regInit, NULL);
87 
88  epicsMutexMustLock(pciDriversLock);
89 
90  for(cur=ellFirst(&pciDrivers); cur; cur=ellNext(cur)) {
91  devLibPCI *other=CONTAINER(cur, devLibPCI, node);
92  if (strcmp(drv->name, other->name)==0) {
93  fprintf(stderr, "Failed to register PCI bus driver: name already taken\n");
94  ret=1;
95  break;
96  }
97  }
98  if (!ret)
99  ellAdd(&pciDrivers, &drv->node);
100 
101  epicsMutexUnlock(pciDriversLock);
102 
103  return ret;
104 }
105 
106 int
107 devLibPCIUse(const char* use)
108 {
109  ELLNODE *cur;
110  devLibPCI *drv;
111 
112  if (!use)
113  use="native";
114 
115  epicsThreadOnce(&devPCIReg_once, &regInit, NULL);
116 
117  epicsMutexMustLock(pciDriversLock);
118 
119  if (pdevLibPCI) {
120  epicsMutexUnlock(pciDriversLock);
121  fprintf(stderr, "PCI bus driver already selected. Can't change selection\n");
122  return 1;
123  }
124 
125  for(cur=ellFirst(&pciDrivers); cur; cur=ellNext(cur)) {
126  drv=CONTAINER(cur, devLibPCI, node);
127  if (strcmp(drv->name, use)==0) {
128  pdevLibPCI = drv;
129  epicsMutexUnlock(pciDriversLock);
130  return 0;
131  }
132  }
133  epicsMutexUnlock(pciDriversLock);
134  fprintf(stderr, "PCI bus driver '%s' not found\n",use);
135  return 1;
136 }
137 
138 const char* devLibPCIDriverName()
139 {
140  const char* ret=NULL;
141 
142  epicsThreadOnce(&devPCIReg_once, &regInit, NULL);
143 
144  epicsMutexMustLock(pciDriversLock);
145  if (pdevLibPCI)
146  ret = pdevLibPCI->name;
147  epicsMutexUnlock(pciDriversLock);
148 
149  return ret;
150 }
151 
152 int
153 devLibPCIMatch(const epicsPCIID *match, const epicsPCIID *dev)
154 {
155  if (match->device!=DEVPCI_ANY_DEVICE && match->device!=dev->device) {
156  if(devPCIDebug>1) printf(" mismatch device %x %x\n",
157  (unsigned)match->device, (unsigned)dev->device);
158  return 0;
159  } else if (match->vendor!=DEVPCI_ANY_VENDOR && match->vendor!=dev->vendor) {
160  if(devPCIDebug>1) printf(" mismatch vendor %x %x\n",
161  (unsigned)match->vendor, (unsigned)dev->vendor);
162  return 0;
163  } else if (match->sub_device!=DEVPCI_ANY_SUBDEVICE && match->sub_device!=dev->sub_device) {
164  if(devPCIDebug>1) printf(" mismatch subdevice %x %x\n",
165  (unsigned)match->sub_device, (unsigned)dev->sub_device);
166  return 0;
167  } else if (match->sub_vendor!=DEVPCI_ANY_SUBVENDOR && match->sub_vendor!=dev->sub_vendor) {
168  if(devPCIDebug>1) printf(" mismatch subvendor %x %x\n",
169  (unsigned)match->sub_vendor, (unsigned)dev->sub_vendor);
170  return 0;
171  } else if (match->pci_class!=DEVPCI_ANY_CLASS && match->pci_class!=dev->pci_class) {
172  if(devPCIDebug>1) printf(" mismatch class %x %x\n",
173  (unsigned)match->pci_class, (unsigned)dev->pci_class);
174  return 0;
175  } else if (match->revision!=DEVPCI_ANY_REVISION && match->revision!=dev->revision) {
176  if(devPCIDebug>1) printf(" mismatch revision %x %x\n",
177  match->revision, dev->revision);
178  return 0;
179  } else {
180  if(devPCIDebug>1)
181  printf(" Match\n");
182  return 1;
183  }
184 }
185 
186 static
187 void devInit(void* junk)
188 {
189  (void)junk;
190  epicsThreadOnce(&devPCIReg_once, &regInit, NULL);
191  epicsMutexMustLock(pciDriversLock);
192  if(!pdevLibPCI && devLibPCIUse(NULL)) {
193  epicsMutexUnlock(pciDriversLock);
194  devPCIInit_result = S_dev_internal;
195  return;
196  }
197  epicsMutexUnlock(pciDriversLock);
198 
199  if(!!pdevLibPCI->pDevInit)
200  devPCIInit_result = (*pdevLibPCI->pDevInit)();
201  else
202  devPCIInit_result = 0;
203 }
204 
205 #define PCIINIT \
206  do { \
207  epicsThreadOnce(&devPCIInit_once, &devInit, NULL); \
208  if (devPCIInit_result) return devPCIInit_result; \
209  } while(0)
210 
211 
212 /**************** API functions *****************/
213 
214 int devPCIFindCB(
215  const epicsPCIID *idlist,
216  devPCISearchFn searchfn,
217  void *arg,
218  unsigned int opt /* always 0 */
219  )
220 {
221  if(!idlist || !searchfn)
222  return S_dev_badArgument;
223 
224  PCIINIT;
225 
226  return (*pdevLibPCI->pDevPCIFind)(idlist,searchfn,arg,opt);
227 }
228 
229 
230 struct bdfmatch
231 {
232  unsigned int matchaddr:1;
233  unsigned int matchslot:1;
234 
235  unsigned int domain,b,d,f;
236  char slot[11];
237  unsigned int sofar, stopat;
238 
239  const epicsPCIDevice* found;
240 };
241 
242 static
243 int devmatch(void* ptr, const epicsPCIDevice* cur)
244 {
245  struct bdfmatch *mt=ptr;
246 
247  unsigned match = 1;
248 
249  if(mt->matchaddr)
250  match &= cur->domain==mt->domain &&
251  cur->bus==mt->b &&
252  cur->device==mt->d &&
253  cur->function==mt->f;
254 
255  if(mt->matchslot)
256  match &= cur->slot==DEVPCI_NO_SLOT ? 0 : strcmp(cur->slot, mt->slot)==0;
257 
258  if(match && mt->sofar++==mt->stopat)
259  {
260  mt->found=cur;
261  return 1;
262  }
263 
264  return 0;
265 }
266 
267 int devPCIFindSpec(
268  const epicsPCIID *idlist,
269  const char *spec,
270  const epicsPCIDevice **found,
271  unsigned int opt
272  )
273 {
274  int err = 0;
275  struct bdfmatch find;
276  memset(&find, 0, sizeof(find));
277 
278  if(!found || !spec)
279  return S_dev_badArgument;
280 
281  /* When originally introduced in 2.8, devPCIFindSpec() parsed as decimal,
282  * which is confusing as BDF are usually shown in hex.
283  * Changed in 2.9 to parse as hex.
284  * TODO: remove this notice after 2.9
285  */
286  if(devPCIDebug>=0) {
287  static int shown=0;
288  if(!shown) {
289  fprintf(stderr, "Notice: devPCIFindSpec() expect B:D.F in hex\n");
290  shown = 1;
291  }
292  }
293 
294  /* parse the spec. string */
295  {
296  char *save, *alloc, *tok;
297 
298  alloc = strdup(spec);
299  if(!alloc) return S_dev_noMemory;
300 
301  for(tok = strtok_r(alloc, " ", &save);
302  tok;
303  tok=strtok_r(NULL, " ", &save))
304  {
305  unsigned dom, bus, dev, func=0;
306 
307  if(sscanf(tok, "%x:%x:%x.%x", &dom, &bus, &dev, &func)>=3) {
308  find.matchaddr = 1;
309  find.domain = dom;
310  find.b = bus;
311  find.d = dev;
312  find.f = func;
313 
314  } else if(sscanf(tok, "%x:%x.%x", &bus, &dev, &func)>=2) {
315  find.matchaddr = 1;
316  find.domain = 0;
317  find.b = bus;
318  find.d = dev;
319  find.f = func;
320 
321  } else if(sscanf(tok, "slot=%10s", find.slot)==1) {
322  if(strlen(find.slot)==10)
323  fprintf(stderr, "Slot label '%s' truncated?\n", find.slot);
324  find.matchslot = 1;
325 
326  } else if(sscanf(tok, "instance=%u", &dom)==1) {
327  find.stopat = dom==0 ? 0 : dom-1;
328 
329  } else if(sscanf(tok, "inst=%u", &dom)==1) {
330  find.stopat = dom==0 ? 0 : dom-1;
331 
332  } else if(strchr(tok, '=')!=NULL) {
333  fprintf(stderr, "Ignoring unknown spec '%s'\n", tok);
334 
335  } else {
336  fprintf(stderr, "Error: invalid spec '%s'\n", tok);
337  err = S_dev_badArgument;
338  }
339  }
340 
341  free(alloc);
342  }
343 
344  if(err)
345  return err;
346 
347  if(devPCIDebug>4) {
348  if(find.matchaddr)
349  fprintf(stderr, " Match BDF %x:%x:%x.%x\n",
350  find.domain, find.b, find.d, find.f);
351  if(find.matchslot)
352  fprintf(stderr, " Match slot %s\n", find.slot);
353  fprintf(stderr, " Instance %u\n", find.stopat);
354  }
355 
356  /* PCIINIT is called by devPCIFindCB() */
357 
358  err=devPCIFindCB(idlist,&devmatch,&find, opt);
359  if(err!=0){
360  /* Search failed? */
361  return err;
362  }
363 
364  if(!find.found){
365  /* Not found */
366  return S_dev_noDevice;
367  }
368 
369  *found=find.found;
370  return 0;
371 }
372 
373 /*
374  * The most common PCI search using only id fields and BDF.
375  */
376 int devPCIFindDBDF(
377  const epicsPCIID *idlist,
378  unsigned int domain,
379  unsigned int b,
380  unsigned int d,
381  unsigned int f,
382  const epicsPCIDevice **found,
383  unsigned int opt
384  )
385 {
386  int err;
387  struct bdfmatch find;
388 
389  if(!found)
390  return S_dev_badArgument;
391 
392  memset(&find, 0, sizeof(find));
393  find.matchaddr = 1;
394  find.domain=domain;
395  find.b=b;
396  find.d=d;
397  find.f=f;
398  find.found=NULL;
399 
400  /* PCIINIT is called by devPCIFindCB() */
401 
402  err=devPCIFindCB(idlist,&devmatch,&find, opt);
403  if(err!=0){
404  /* Search failed? */
405  return err;
406  }
407 
408  if(!find.found){
409  /* Not found */
410  return S_dev_noDevice;
411  }
412 
413  *found=find.found;
414  return 0;
415 }
416 
417 /* for backward compatilility: b=domain*0x100+bus */
418 int devPCIFindBDF(
419  const epicsPCIID *idlist,
420  unsigned int b,
421  unsigned int d,
422  unsigned int f,
423  const epicsPCIDevice **found,
424  unsigned int opt
425  )
426 {
427  return devPCIFindDBDF(idlist, b>>8, b&0xff, d, f, found, opt);
428 }
429 
430 int
431 devPCIToLocalAddr(
432  const epicsPCIDevice *curdev,
433  unsigned int bar,
434  volatile void **ppLocalAddr,
435  unsigned int opt
436  )
437 {
438  PCIINIT;
439 
440  if(bar>=PCIBARCOUNT)
441  return S_dev_badArgument;
442 
443  return (*pdevLibPCI->pDevPCIToLocalAddr)(curdev,bar,ppLocalAddr,opt);
444 }
445 
446 
447 
448 int
449 devPCIBarLen(
450  const epicsPCIDevice *curdev,
451  unsigned int bar,
452  epicsUInt32 *len
453  )
454 {
455  PCIINIT;
456 
457  if(bar>=PCIBARCOUNT)
458  return S_dev_badArgument;
459 
460  return (*pdevLibPCI->pDevPCIBarLen)(curdev,bar,len);
461 }
462 
463 int devPCIConnectInterrupt(
464  const epicsPCIDevice *curdev,
465  void (*pFunction)(void *),
466  void *parameter,
467  unsigned int opt
468  )
469 {
470  PCIINIT;
471 
472  return (*pdevLibPCI->pDevPCIConnectInterrupt)
473  (curdev,pFunction,parameter,opt);
474 }
475 
476 int devPCIDisconnectInterrupt(
477  const epicsPCIDevice *curdev,
478  void (*pFunction)(void *),
479  void *parameter
480  )
481 {
482  PCIINIT;
483 
484  return (*pdevLibPCI->pDevPCIDisconnectInterrupt)
485  (curdev,pFunction,parameter);
486 }
487 
488 typedef struct {
489  int lvl;
490  int matched;
491 } searchinfo;
492 
493 static
494 int
495 searchandprint(void* praw,const epicsPCIDevice* dev)
496 {
497  searchinfo *pinfo=praw;
498  pinfo->matched++;
499  devPCIShowDevice(pinfo->lvl,dev);
500  return 0;
501 }
502 
503 void
504 devPCIShow(int lvl, int vendor, int device, int exact)
505 {
506  epicsPCIID ids[] = {
507  DEVPCI_DEVICE_VENDOR(device,vendor),
508  DEVPCI_END
509  };
510  searchinfo info;
511  info.lvl=lvl;
512  info.matched=0;
513 
514  if (vendor==0 && !exact) ids[0].vendor=DEVPCI_ANY_VENDOR;
515  if (device==0 && !exact) ids[0].device=DEVPCI_ANY_DEVICE;
516 
517  devPCIFindCB(ids,&searchandprint, &info, 0);
518  printf("Matched %d devices\n", info.matched);
519 }
520 
521 void
522 devPCIShowMatch(int lvl, const char *spec, int vendor, int device)
523 {
524  epicsPCIID ids[] = {
525  DEVPCI_DEVICE_VENDOR(device,vendor),
526  DEVPCI_END
527  };
528  const epicsPCIDevice *found = NULL;
529 
530  if (vendor==0) ids[0].vendor=DEVPCI_ANY_VENDOR;
531  if (device==0) ids[0].device=DEVPCI_ANY_DEVICE;
532 
533  if(!devPCIFindSpec(ids, spec, &found, 0)) {
534  devPCIShowDevice(lvl, found);
535  } else {
536  printf("No match\n");
537  }
538 }
539 
540 void
541 devPCIShowDevice(int lvl, const epicsPCIDevice *dev)
542 {
543  unsigned int i;
544 
545  printf("PCI %04x:%02x:%02x.%x IRQ %u\n"
546  " vendor:device %04x:%04x rev %02x\n",
547  dev->domain, dev->bus, dev->device, dev->function, dev->irq,
548  dev->id.vendor, dev->id.device, dev->id.revision);
549  if(lvl<1)
550  return;
551  printf(" subved:subdev %04x:%04x\n"
552  " class %06x %s\n",
553  dev->id.sub_vendor, dev->id.sub_device,
554  dev->id.pci_class,
555  devPCIDeviceClassToString(dev->id.pci_class));
556  if(dev->slot!=DEVPCI_NO_SLOT)
557  printf(" slot: %s\n", dev->slot);
558  if (dev->driver) printf(" driver %s\n",
559  dev->driver);
560  if(lvl<2)
561  return;
562  for(i=0; i<PCIBARCOUNT; i++)
563  {
564  epicsUInt32 len;
565 
566  if ((*pdevLibPCI->pDevPCIBarLen)(dev, i, &len) == 0 && len > 0)
567  {
568  char* u = "";
569  if (len >= 1024) { len >>= 10; u = "k"; }
570  if (len >= 1024) { len >>= 10; u = "M"; }
571  if (len >= 1024) { len >>= 10; u = "G"; }
572 
573  printf(" BAR %u %s-bit %s%s %3u %sB\n",i,
574  dev->bar[i].addr64?"64":"32",
575  dev->bar[i].ioport?"IO Port":"MMIO ",
576  dev->bar[i].below1M?" Below 1M":"",
577  len, u);
578  }
579  /* 64 bit bars use 2 entries */
580  if (dev->bar[i].addr64) i++;
581  }
582 }
583 
584 static int
585 checkCfgAccess(const epicsPCIDevice *dev, unsigned offset, void *arg, devPCIAccessMode mode)
586 {
587  int rval;
588 
589  if ( (offset & (CFG_ACC_WIDTH(mode) - 1)) )
590  return S_dev_badArgument; /* misaligned */
591  if ( ! pdevLibPCI->pDevPCIConfigAccess )
592  return S_dev_badFunction; /* not implemented */
593 
594  rval = (*pdevLibPCI->pDevPCIConfigAccess)(dev, offset, arg, mode);
595 
596  if ( rval )
597  return rval;
598 
599  return 0;
600 }
601 
602 int
603 devPCIConfigRead8(const epicsPCIDevice *dev, unsigned offset, epicsUInt8 *pResult)
604 {
605  return checkCfgAccess(dev, offset, pResult, RD_08);
606 }
607 
608 int
609 devPCIConfigRead16(const epicsPCIDevice *dev, unsigned offset, epicsUInt16 *pResult)
610 {
611  return checkCfgAccess(dev, offset, pResult, RD_16);
612 }
613 
614 int
615 devPCIConfigRead32(const epicsPCIDevice *dev, unsigned offset, epicsUInt32 *pResult)
616 {
617  return checkCfgAccess(dev, offset, pResult, RD_32);
618 }
619 
620 int
621 devPCIConfigWrite8(const epicsPCIDevice *dev, unsigned offset, epicsUInt8 value)
622 {
623  return checkCfgAccess(dev, offset, &value, WR_08);
624 }
625 
626 int
627 devPCIConfigWrite16(const epicsPCIDevice *dev, unsigned offset, epicsUInt16 value)
628 {
629  return checkCfgAccess(dev, offset, &value, WR_16);
630 }
631 
632 int
633 devPCIConfigWrite32(const epicsPCIDevice *dev, unsigned offset, epicsUInt32 value)
634 {
635  return checkCfgAccess(dev, offset, &value, WR_32);
636 }
637 
638 
639 int
640 devPCIEnableInterrupt(const epicsPCIDevice *dev)
641 {
642  if ( ! pdevLibPCI->pDevPCIConfigAccess )
643  return S_dev_badFunction; /* not implemented */
644 
645  return pdevLibPCI->pDevPCISwitchInterrupt(dev, 0);
646 }
647 
648 int
649 devPCIDisableInterrupt(const epicsPCIDevice *dev)
650 {
651  if ( ! pdevLibPCI->pDevPCIConfigAccess )
652  return S_dev_badFunction; /* not implemented */
653 
654  return pdevLibPCI->pDevPCISwitchInterrupt(dev, 1);
655 }
656 
657 
658 static const iocshArg devPCIShowArg0 = { "verbosity level",iocshArgInt};
659 static const iocshArg devPCIShowArg1 = { "PCI Vendor ID (0=any)",iocshArgInt};
660 static const iocshArg devPCIShowArg2 = { "PCI Device ID (0=any)",iocshArgInt};
661 static const iocshArg devPCIShowArg3 = { "exact (1=treat 0 as 0)",iocshArgInt};
662 static const iocshArg * const devPCIShowArgs[4] =
663 {&devPCIShowArg0,&devPCIShowArg1,&devPCIShowArg2,&devPCIShowArg3};
664 static const iocshFuncDef devPCIShowFuncDef =
665 {"devPCIShow",4,devPCIShowArgs};
666 static void devPCIShowCallFunc(const iocshArgBuf *args)
667 {
668  devPCIShow(args[0].ival,args[1].ival,args[2].ival,args[3].ival);
669 }
670 
671 static const iocshArg devLibPCIUseArg0 = { "verbosity level",iocshArgString};
672 static const iocshArg * const devLibPCIUseArgs[1] =
673 {&devLibPCIUseArg0};
674 static const iocshFuncDef devLibPCIUseFuncDef =
675 {"devLibPCIUse",1,devLibPCIUseArgs};
676 static void devLibPCIUseCallFunc(const iocshArgBuf *args)
677 {
678  devLibPCIUse(args[0].sval);
679 }
680 
681 #include <epicsExport.h>
682 
683 static
684 void devLibPCIIOCSH()
685 {
686  iocshRegister(&devPCIShowFuncDef,devPCIShowCallFunc);
687  iocshRegister(&devLibPCIUseFuncDef,devLibPCIUseCallFunc);
688 }
689 
690 epicsExportRegistrar(devLibPCIIOCSH);
691 
692 epicsExportAddress(int,devPCIDebug);
DEVPCI_END
#define DEVPCI_END
The last item in a list of PCI IDS.
Definition: devLibPCI.h:72
+
epicsPCIDevice::driver
const char * driver
Definition: devLibPCI.h:122
+
DEVPCI_ANY_REVISION
#define DEVPCI_ANY_REVISION
Definition: devLibPCI.h:67
+
devPCISearchFn
int(* devPCISearchFn)(void *ptr, const epicsPCIDevice *dev)
PCI search callback prototype.
Definition: devLibPCI.h:136
+
DEVPCI_ANY_SUBVENDOR
#define DEVPCI_ANY_SUBVENDOR
Definition: devLibPCI.h:65
+
epicsPCIID::sub_device
epicsUInt32 sub_device
Definition: devLibPCI.h:57
+
bdfmatch::stopat
unsigned int stopat
Definition: devLibPCI.c:237
+
devPCIEnableInterrupt
int devPCIEnableInterrupt(const epicsPCIDevice *dev)
Enable interrupts at the device.
Definition: devLibPCI.c:640
+
devLibPCIDriverName
const char * devLibPCIDriverName()
Definition: devLibPCI.c:138
+
devPCIConnectInterrupt
int devPCIConnectInterrupt(const epicsPCIDevice *curdev, void(*pFunction)(void *), void *parameter, unsigned int opt)
Request interrupts for device.
Definition: devLibPCI.c:463
+
PCIBar::ioport
unsigned int ioport
Definition: devLibPCI.h:98
+
devLibPCI::pDevPCISwitchInterrupt
int(* pDevPCISwitchInterrupt)(const epicsPCIDevice *id, int level)
Definition: devLibPCIImpl.h:64
+
devPCIConfigWrite32
int devPCIConfigWrite32(const epicsPCIDevice *dev, unsigned offset, epicsUInt32 value)
Write (32-bit) dword from configuration space.
Definition: devLibPCI.c:633
+
DEVPCI_ANY_CLASS
#define DEVPCI_ANY_CLASS
Definition: devLibPCI.h:66
+ +
devPCIDisableInterrupt
int devPCIDisableInterrupt(const epicsPCIDevice *dev)
Enable interrupts at the device.
Definition: devLibPCI.c:649
+
bdfmatch::b
unsigned int b
Definition: devLibPCI.c:235
+ +
devLibPCIMatch
int devLibPCIMatch(const epicsPCIID *match, const epicsPCIID *dev)
Definition: devLibPCI.c:153
+
DEVPCI_DEVICE_VENDOR
#define DEVPCI_DEVICE_VENDOR(dev, vend)
Definition: devLibPCI.h:79
+
devPCIConfigWrite16
int devPCIConfigWrite16(const epicsPCIDevice *dev, unsigned offset, epicsUInt16 value)
Write (16-bit) word from configuration space.
Definition: devLibPCI.c:627
+
PCIINIT
#define PCIINIT
Definition: devLibPCI.c:205
+
PCIBar::below1M
unsigned int below1M
Definition: devLibPCI.h:100
+
devPCIAccessMode
devPCIAccessMode
Definition: devLibPCIImpl.h:27
+
epicsPCIID::sub_vendor
epicsUInt32 sub_vendor
Definition: devLibPCI.h:57
+
epicsPCIDevice::bus
unsigned int bus
Definition: devLibPCI.h:114
+
epicsPCIDevice::irq
epicsUInt8 irq
Definition: devLibPCI.h:120
+
devPCIConfigRead8
int devPCIConfigRead8(const epicsPCIDevice *dev, unsigned offset, epicsUInt8 *pResult)
Read byte from configuration space.
Definition: devLibPCI.c:603
+
PCIBARCOUNT
#define PCIBARCOUNT
The maximum number of base address registers (BARs).
Definition: devLibPCI.h:126
+
devPCIDebug
int devPCIDebug
Definition: devLibPCI.c:48
+
CONTAINER
#define CONTAINER(ptr, structure, member)
Definition: devLibPCI.c:33
+
bdfmatch::found
const epicsPCIDevice * found
Definition: devLibPCI.c:239
+
searchinfo::matched
int matched
Definition: devLibPCI.c:490
+
devPCIToLocalAddr
int devPCIToLocalAddr(const epicsPCIDevice *curdev, unsigned int bar, volatile void **ppLocalAddr, unsigned int opt)
Get pointer to PCI BAR.
Definition: devLibPCI.c:431
+
devLibPCI::name
const char * name
Definition: devLibPCIImpl.h:40
+
devPCIShowDevice
void devPCIShowDevice(int lvl, const epicsPCIDevice *dev)
Definition: devLibPCI.c:541
+
DEVPCI_ANY_VENDOR
#define DEVPCI_ANY_VENDOR
Definition: devLibPCI.h:63
+
devLibPCIRegisterDriver2
int devLibPCIRegisterDriver2(devLibPCI *drv, size_t drvsize)
Definition: devLibPCI.c:70
+ +
DEVPCI_NO_SLOT
#define DEVPCI_NO_SLOT
Definition: devLibPCI.h:95
+
epicsPCIID::device
epicsUInt32 device
Definition: devLibPCI.h:56
+
CFG_ACC_WIDTH
#define CFG_ACC_WIDTH(mode)
Definition: devLibPCIImpl.h:36
+
devLibPCI::pDevPCIConfigAccess
int(* pDevPCIConfigAccess)(const epicsPCIDevice *id, unsigned offset, void *pArg, devPCIAccessMode mode)
Definition: devLibPCIImpl.h:61
+
devPCIShowMatch
void devPCIShowMatch(int lvl, const char *spec, int vendor, int device)
Definition: devLibPCI.c:522
+
epicsPCIDevice
Device token.
Definition: devLibPCI.h:112
+
devPCIConfigRead16
int devPCIConfigRead16(const epicsPCIDevice *dev, unsigned offset, epicsUInt16 *pResult)
Read (16-bit) word from configuration space.
Definition: devLibPCI.c:609
+
bdfmatch::domain
unsigned int domain
Definition: devLibPCI.c:235
+ + +
epicsPCIDevice::domain
unsigned int domain
Definition: devLibPCI.h:121
+
epicsPCIDevice::device
unsigned int device
Definition: devLibPCI.h:115
+
epicsPCIDevice::bar
struct PCIBar bar[6]
Definition: devLibPCI.h:119
+
devLibPCI::pDevPCIDisconnectInterrupt
int(* pDevPCIDisconnectInterrupt)(const epicsPCIDevice *id, void(*pFunction)(void *), void *parameter)
Definition: devLibPCIImpl.h:57
+
devPCIFindDBDF
int devPCIFindDBDF(const epicsPCIID *idlist, unsigned int domain, unsigned int b, unsigned int d, unsigned int f, const epicsPCIDevice **found, unsigned int opt)
PCI bus probe.
Definition: devLibPCI.c:376
+
bdfmatch::sofar
unsigned int sofar
Definition: devLibPCI.c:237
+
devLibPCI::pDevInit
int(* pDevInit)(void)
Definition: devLibPCIImpl.h:42
+
devLibPCI::pDevPCIToLocalAddr
int(* pDevPCIToLocalAddr)(const epicsPCIDevice *dev, unsigned int bar, volatile void **a, unsigned int o)
Definition: devLibPCIImpl.h:48
+
devPCIFindSpec
int devPCIFindSpec(const epicsPCIID *idlist, const char *spec, const epicsPCIDevice **found, unsigned int opt)
PCI bus search by specification string.
Definition: devLibPCI.c:267
+
devPCIDisconnectInterrupt
int devPCIDisconnectInterrupt(const epicsPCIDevice *curdev, void(*pFunction)(void *), void *parameter)
Stop receiving interrupts.
Definition: devLibPCI.c:476
+
bdfmatch::matchslot
unsigned int matchslot
Definition: devLibPCI.c:233
+
epicsPCIID
PCI device identifier.
Definition: devLibPCI.h:55
+
devPCIConfigWrite8
int devPCIConfigWrite8(const epicsPCIDevice *dev, unsigned offset, epicsUInt8 value)
Write byte to configuration space.
Definition: devLibPCI.c:621
+
PCIBar::addr64
unsigned int addr64
Definition: devLibPCI.h:99
+
devLibPCI::pDevPCIFind
int(* pDevPCIFind)(const epicsPCIID *ids, devPCISearchFn searchfn, void *arg, unsigned int o)
Definition: devLibPCIImpl.h:46
+
epicsPCIID::revision
epicsUInt16 revision
Definition: devLibPCI.h:59
+
DEVPCI_ANY_SUBDEVICE
#define DEVPCI_ANY_SUBDEVICE
Definition: devLibPCI.h:64
+
bdfmatch::d
unsigned int d
Definition: devLibPCI.c:235
+
epicsExportAddress
epicsExportAddress(int, devPCIDebug)
+
epicsPCIDevice::slot
const char * slot
Definition: devLibPCI.h:118
+ +
devPCIFindBDF
int devPCIFindBDF(const epicsPCIID *idlist, unsigned int b, unsigned int d, unsigned int f, const epicsPCIDevice **found, unsigned int opt)
Definition: devLibPCI.c:418
+ + +
devLibPCIUse
int devLibPCIUse(const char *use)
Select driver implementation. Pick driver implementation by name, or NULL to use default. If no selection is made then the default will be used if available.
Definition: devLibPCI.c:107
+ +
devPCIDeviceClassToString
epicsShareFunc const char * devPCIDeviceClassToString(int classId)
Translate class id to string.
Definition: devLibPCIStrings.c:7
+
DEVPCI_ANY_DEVICE
#define DEVPCI_ANY_DEVICE
Definition: devLibPCI.h:62
+
devLibPCI::pDevPCIConnectInterrupt
int(* pDevPCIConnectInterrupt)(const epicsPCIDevice *id, void(*pFunction)(void *), void *parameter, unsigned int opt)
Definition: devLibPCIImpl.h:52
+ +
bdfmatch::slot
char slot[11]
Definition: devLibPCI.c:236
+ +
devPCIShow
void devPCIShow(int lvl, int vendor, int device, int exact)
Definition: devLibPCI.c:504
+
bdfmatch::matchaddr
unsigned int matchaddr
Definition: devLibPCI.c:232
+
devPCIBarLen
int devPCIBarLen(const epicsPCIDevice *curdev, unsigned int bar, epicsUInt32 *len)
Find the size of a BAR.
Definition: devLibPCI.c:449
+
epicsPCIDevice::id
epicsPCIID id
Exact ID of device.
Definition: devLibPCI.h:113
+
epicsPCIID::pci_class
epicsUInt32 pci_class
Definition: devLibPCI.h:58
+
devPCIConfigRead32
int devPCIConfigRead32(const epicsPCIDevice *dev, unsigned offset, epicsUInt32 *pResult)
Read (32-bit) dword from configuration space.
Definition: devLibPCI.c:615
+
devLibPCI::node
ELLNODE node
Definition: devLibPCIImpl.h:65
+
epicsPCIID::vendor
epicsUInt32 vendor
Definition: devLibPCI.h:56
+
epicsPCIDevice::function
unsigned int function
Definition: devLibPCI.h:116
+
devPCIFindCB
int devPCIFindCB(const epicsPCIID *idlist, devPCISearchFn searchfn, void *arg, unsigned int opt)
PCI bus search w/ callback.
Definition: devLibPCI.c:214
+
bdfmatch::f
unsigned int f
Definition: devLibPCI.c:235
+
epicsExportRegistrar
epicsExportRegistrar(devLibPCIIOCSH)
+ +
devLibPCI::pDevPCIBarLen
int(* pDevPCIBarLen)(const epicsPCIDevice *dev, unsigned int bar, epicsUInt32 *len)
Definition: devLibPCIImpl.h:50
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/dev_lib_p_c_i_8h.html b/dev_lib_p_c_i_8h.html new file mode 100644 index 0000000..2171ec3 --- /dev/null +++ b/dev_lib_p_c_i_8h.html @@ -0,0 +1,201 @@ + + + + + + + +devLib2: devLibPCI.h File Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+Data Structures | +Macros | +Typedefs | +Functions | +Variables
+
+
devLibPCI.h File Reference
+
+
+
#include <dbDefs.h>
+#include <epicsTypes.h>
+#include <devLib.h>
+#include <shareLib.h>
+
+

Go to the source code of this file.

+ + + + + + + + + + +

+Data Structures

struct  epicsPCIID
 PCI device identifier. More...
 
struct  PCIBar
 
struct  epicsPCIDevice
 Device token. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define DEVLIBPCI_MAJOR   1
 API major version. More...
 
#define DEVLIBPCI_MINOR   3
 API minor version. More...
 
#define DEVPCI_ANY_DEVICE   0x10000
 
#define DEVPCI_ANY_VENDOR   0x10000
 
#define DEVPCI_ANY_SUBDEVICE   0x10000
 
#define DEVPCI_ANY_SUBVENDOR   0x10000
 
#define DEVPCI_ANY_CLASS   0x1000000
 
#define DEVPCI_ANY_REVISION   0x100
 
#define DEVPCI_LAST_DEVICE   0xffff0000
 
#define DEVPCI_END   {DEVPCI_LAST_DEVICE,0,0,0,0,0}
 The last item in a list of PCI IDS. More...
 
#define DEVPCI_DEVICE_ANY()
 
#define DEVPCI_DEVICE_VENDOR(dev, vend)
 
#define DEVPCI_DEVICE_VENDOR_CLASS(dev, vend, pclass)
 
#define DEVPCI_SUBDEVICE_SUBVENDOR(dev, vend, sdev, svend)
 
#define DEVPCI_SUBDEVICE_SUBVENDOR_CLASS(dev, vend, sdev, svend, revision, pclass)
 
#define DEVPCI_NO_SLOT   NULL
 
#define PCIBARCOUNT   NELEMENTS( ((epicsPCIDevice*)0)->bar )
 The maximum number of base address registers (BARs). More...
 
#define DEVLIB_MAP_UIO1TO1   0
 
#define DEVLIB_MAP_UIOCOMPACT   0
 
+ + + + +

+Typedefs

typedef int(* devPCISearchFn) (void *ptr, const epicsPCIDevice *dev)
 PCI search callback prototype. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

epicsShareFunc int devPCIFindCB (const epicsPCIID *idlist, devPCISearchFn searchfn, void *arg, unsigned int opt)
 PCI bus search w/ callback. More...
 
epicsShareFunc int devPCIFindSpec (const epicsPCIID *idlist, const char *spec, const epicsPCIDevice **found, unsigned int opt)
 PCI bus search by specification string. More...
 
epicsShareFunc int devPCIFindDBDF (const epicsPCIID *idlist, unsigned int domain, unsigned int b, unsigned int d, unsigned int f, const epicsPCIDevice **found, unsigned int opt)
 PCI bus probe. More...
 
epicsShareFunc int devPCIFindBDF (const epicsPCIID *idlist, unsigned int b, unsigned int d, unsigned int f, const epicsPCIDevice **found, unsigned int opt)
 
epicsShareFunc int devPCIToLocalAddr (const epicsPCIDevice *id, unsigned int bar, volatile void **ppLocalAddr, unsigned int opt)
 Get pointer to PCI BAR. More...
 
epicsShareFunc int devPCIBarLen (const epicsPCIDevice *id, unsigned int bar, epicsUInt32 *len)
 Find the size of a BAR. More...
 
epicsShareFunc int devPCIConnectInterrupt (const epicsPCIDevice *id, void(*pFunction)(void *), void *parameter, unsigned int opt)
 Request interrupts for device. More...
 
epicsShareFunc int devPCIDisconnectInterrupt (const epicsPCIDevice *id, void(*pFunction)(void *), void *parameter)
 Stop receiving interrupts. More...
 
epicsShareFunc void devPCIShow (int lvl, int vendor, int device, int exact)
 
epicsShareFunc void devPCIShowMatch (int lvl, const char *spec, int vendor, int device)
 
epicsShareFunc void devPCIShowDevice (int lvl, const epicsPCIDevice *dev)
 
epicsShareFunc int devLibPCIUse (const char *name)
 Select driver implementation. Pick driver implementation by name, or NULL to use default. If no selection is made then the default will be used if available. More...
 
epicsShareFunc const char * devLibPCIDriverName ()
 
epicsShareFunc int devPCIConfigRead8 (const epicsPCIDevice *dev, unsigned offset, epicsUInt8 *pResult)
 Read byte from configuration space. More...
 
epicsShareFunc int devPCIConfigRead16 (const epicsPCIDevice *dev, unsigned offset, epicsUInt16 *pResult)
 Read (16-bit) word from configuration space. More...
 
epicsShareFunc int devPCIConfigRead32 (const epicsPCIDevice *dev, unsigned offset, epicsUInt32 *pResult)
 Read (32-bit) dword from configuration space. More...
 
epicsShareFunc int devPCIConfigWrite8 (const epicsPCIDevice *dev, unsigned offset, epicsUInt8 value)
 Write byte to configuration space. More...
 
epicsShareFunc int devPCIConfigWrite16 (const epicsPCIDevice *dev, unsigned offset, epicsUInt16 value)
 Write (16-bit) word from configuration space. More...
 
epicsShareFunc int devPCIConfigWrite32 (const epicsPCIDevice *dev, unsigned offset, epicsUInt32 value)
 Write (32-bit) dword from configuration space. More...
 
epicsShareFunc int devPCIEnableInterrupt (const epicsPCIDevice *dev)
 Enable interrupts at the device. More...
 
epicsShareFunc int devPCIDisableInterrupt (const epicsPCIDevice *dev)
 Enable interrupts at the device. More...
 
epicsShareFunc const char * devPCIDeviceClassToString (int classId)
 Translate class id to string. More...
 
+ + + +

+Variables

epicsShareExtern int devPCIDebug
 
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/dev_lib_p_c_i_8h_source.html b/dev_lib_p_c_i_8h_source.html new file mode 100644 index 0000000..4119d8f --- /dev/null +++ b/dev_lib_p_c_i_8h_source.html @@ -0,0 +1,98 @@ + + + + + + + +devLib2: devLibPCI.h Source File + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
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+
+
+
devLibPCI.h
+
+
+Go to the documentation of this file.
1 /*************************************************************************\
2 * Copyright (c) 2010 Brookhaven Science Associates, as Operator of
3 * Brookhaven National Laboratory.
4 * devLib2 is distributed subject to a Software License Agreement found
5 * in file LICENSE that is included with this distribution.
6 \*************************************************************************/
7 /*
8  * Author: Michael Davidsaver <mdavidsaver@gmail.com>
9  */
10 
11 #ifndef DEVLIBPCI_H_INC
12 #define DEVLIBPCI_H_INC 1
13 
14 #include <dbDefs.h>
15 #include <epicsTypes.h>
16 #include <devLib.h>
17 #include <shareLib.h>
18 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
30 #define DEVLIBPCI_MAJOR 1
31 #define DEVLIBPCI_MINOR 3
55 typedef struct {
56  epicsUInt32 device, vendor;
57  epicsUInt32 sub_device, sub_vendor;
58  epicsUInt32 pci_class;
59  epicsUInt16 revision;
60 } epicsPCIID;
61 
62 #define DEVPCI_ANY_DEVICE 0x10000
63 #define DEVPCI_ANY_VENDOR 0x10000
64 #define DEVPCI_ANY_SUBDEVICE 0x10000
65 #define DEVPCI_ANY_SUBVENDOR 0x10000
66 #define DEVPCI_ANY_CLASS 0x1000000
67 #define DEVPCI_ANY_REVISION 0x100
68 
69 #define DEVPCI_LAST_DEVICE 0xffff0000
70 
72 #define DEVPCI_END {DEVPCI_LAST_DEVICE,0,0,0,0,0}
73 
74 #define DEVPCI_DEVICE_ANY() \
75 { DEVPCI_ANY_DEVICE, DEVPCI_ANY_VENDOR, \
76  DEVPCI_ANY_SUBDEVICE, DEVPCI_ANY_SUBVENDOR, \
77  DEVPCI_ANY_CLASS, DEVPCI_ANY_REVISION }
78 
79 #define DEVPCI_DEVICE_VENDOR(dev,vend) \
80 { dev, vend, DEVPCI_ANY_SUBDEVICE, DEVPCI_ANY_SUBVENDOR, \
81  DEVPCI_ANY_CLASS, DEVPCI_ANY_REVISION }
82 
83 #define DEVPCI_DEVICE_VENDOR_CLASS(dev,vend,pclass) \
84 { dev, vend, DEVPCI_ANY_SUBDEVICE, DEVPCI_ANY_SUBVENDOR, \
85  pclass, DEVPCI_ANY_REVISION }
86 
87 #define DEVPCI_SUBDEVICE_SUBVENDOR(dev,vend,sdev,svend) \
88 { dev, vend, sdev, svend, \
89  DEVPCI_ANY_CLASS, DEVPCI_ANY_REVISION }
90 
91 #define DEVPCI_SUBDEVICE_SUBVENDOR_CLASS(dev,vend,sdev,svend,revision,pclass) \
92 { dev, vend, sdev, svend, \
93  pclass, revision }
94 
95 #define DEVPCI_NO_SLOT NULL
96 
97 struct PCIBar {
98  unsigned int ioport:1;
99  unsigned int addr64:1;
100  unsigned int below1M:1;
101 };
102 
112 typedef struct {
113  epicsPCIID id;
114  unsigned int bus;
115  unsigned int device;
116  unsigned int function;
118  const char* slot;
119  struct PCIBar bar[6];
120  epicsUInt8 irq;
121  unsigned int domain;
122  const char* driver;
123 } epicsPCIDevice;
124 
126 #define PCIBARCOUNT NELEMENTS( ((epicsPCIDevice*)0)->bar )
127 
136 typedef int (*devPCISearchFn)(void* ptr,const epicsPCIDevice* dev);
137 
154 epicsShareFunc
155 int devPCIFindCB(
156  const epicsPCIID *idlist,
157  devPCISearchFn searchfn,
158  void *arg,
159  unsigned int opt /* always 0 */
160  );
161 
180 epicsShareFunc
181 int devPCIFindSpec(
182  const epicsPCIID *idlist,
183  const char *spec,
184  const epicsPCIDevice **found,
185  unsigned int opt /* always 0 */
186  );
187 
206 epicsShareFunc
207 int devPCIFindDBDF(
208  const epicsPCIID *idlist,
209  unsigned int domain,
210  unsigned int b,
211  unsigned int d,
212  unsigned int f,
213  const epicsPCIDevice **found,
214  unsigned int opt /* always 0 */
215  );
216 
217 epicsShareFunc
218 int devPCIFindBDF(
219  const epicsPCIID *idlist,
220  unsigned int b,
221  unsigned int d,
222  unsigned int f,
223  const epicsPCIDevice **found,
224  unsigned int opt /* always 0 */
225  );
226 
227 #ifdef __linux__
228 #define DEVLIB_MAP_UIO1TO1 0
229 #define DEVLIB_MAP_UIOCOMPACT 1
230 #else
231 /* UIO options have no meaning for non-Linux OSs */
232 #define DEVLIB_MAP_UIO1TO1 0
233 #define DEVLIB_MAP_UIOCOMPACT 0
234 #endif
235 
256 epicsShareFunc
257 int
258 devPCIToLocalAddr(
259  const epicsPCIDevice *id,
260  unsigned int bar,
261  volatile void **ppLocalAddr,
262  unsigned int opt /* always 0 */
263  );
264 
279 epicsShareFunc
280 int
281 devPCIBarLen(
282  const epicsPCIDevice *id,
283  unsigned int bar,
284  epicsUInt32 *len
285  );
286 
305 epicsShareFunc
306 int devPCIConnectInterrupt(
307  const epicsPCIDevice *id,
308  void (*pFunction)(void *),
309  void *parameter,
310  unsigned int opt /* always 0 */
311  );
312 
321 epicsShareFunc
322 int devPCIDisconnectInterrupt(
323  const epicsPCIDevice *id,
324  void (*pFunction)(void *),
325  void *parameter
326  );
327 
328 epicsShareFunc
329 void
330 devPCIShow(int lvl, int vendor, int device, int exact);
331 
332 epicsShareFunc
333 void
334 devPCIShowMatch(int lvl, const char *spec, int vendor, int device);
335 
336 epicsShareFunc
337 void
338 devPCIShowDevice(int lvl, const epicsPCIDevice *dev);
339 
347 epicsShareFunc
348 int
349 devLibPCIUse(const char* name);
350 
351 epicsShareFunc
352 const char* devLibPCIDriverName();
353 
354 epicsShareExtern int devPCIDebug;
355 
364 epicsShareFunc
365 int devPCIConfigRead8(const epicsPCIDevice *dev, unsigned offset, epicsUInt8 *pResult);
366 
376 epicsShareFunc
377 int devPCIConfigRead16(const epicsPCIDevice *dev, unsigned offset, epicsUInt16 *pResult);
378 
387 epicsShareFunc
388 int devPCIConfigRead32(const epicsPCIDevice *dev, unsigned offset, epicsUInt32 *pResult);
389 
398 epicsShareFunc
399 int devPCIConfigWrite8(const epicsPCIDevice *dev, unsigned offset, epicsUInt8 value);
400 
410 epicsShareFunc
411 int devPCIConfigWrite16(const epicsPCIDevice *dev, unsigned offset, epicsUInt16 value);
412 
421 epicsShareFunc
422 int devPCIConfigWrite32(const epicsPCIDevice *dev, unsigned offset, epicsUInt32 value);
423 
431 epicsShareFunc
432 int devPCIEnableInterrupt(const epicsPCIDevice *dev);
433 
442 epicsShareFunc
443 int devPCIDisableInterrupt(const epicsPCIDevice *dev);
444 
451 epicsShareFunc
452 const char* devPCIDeviceClassToString(int classId);
453 
454 #ifdef __cplusplus
455 } /* extern "C" */
456 #endif
457 
460 #endif /* DEVLIBPCI_H_INC */
epicsPCIDevice::driver
const char * driver
Definition: devLibPCI.h:122
+
devPCISearchFn
int(* devPCISearchFn)(void *ptr, const epicsPCIDevice *dev)
PCI search callback prototype.
Definition: devLibPCI.h:136
+
devPCIEnableInterrupt
epicsShareFunc int devPCIEnableInterrupt(const epicsPCIDevice *dev)
Enable interrupts at the device.
Definition: devLibPCI.c:640
+
devLibPCIDriverName
epicsShareFunc const char * devLibPCIDriverName()
Definition: devLibPCI.c:138
+
devPCIConnectInterrupt
epicsShareFunc int devPCIConnectInterrupt(const epicsPCIDevice *id, void(*pFunction)(void *), void *parameter, unsigned int opt)
Request interrupts for device.
Definition: devLibPCI.c:463
+
PCIBar::ioport
unsigned int ioport
Definition: devLibPCI.h:98
+
devPCIConfigWrite32
epicsShareFunc int devPCIConfigWrite32(const epicsPCIDevice *dev, unsigned offset, epicsUInt32 value)
Write (32-bit) dword from configuration space.
Definition: devLibPCI.c:633
+
devPCIDisableInterrupt
epicsShareFunc int devPCIDisableInterrupt(const epicsPCIDevice *dev)
Enable interrupts at the device.
Definition: devLibPCI.c:649
+ +
devPCIConfigWrite16
epicsShareFunc int devPCIConfigWrite16(const epicsPCIDevice *dev, unsigned offset, epicsUInt16 value)
Write (16-bit) word from configuration space.
Definition: devLibPCI.c:627
+
PCIBar::below1M
unsigned int below1M
Definition: devLibPCI.h:100
+
epicsPCIID::sub_vendor
epicsUInt32 sub_vendor
Definition: devLibPCI.h:57
+
epicsPCIDevice::bus
unsigned int bus
Definition: devLibPCI.h:114
+
epicsPCIDevice::irq
epicsUInt8 irq
Definition: devLibPCI.h:120
+
devPCIConfigRead8
epicsShareFunc int devPCIConfigRead8(const epicsPCIDevice *dev, unsigned offset, epicsUInt8 *pResult)
Read byte from configuration space.
Definition: devLibPCI.c:603
+
devPCIToLocalAddr
epicsShareFunc int devPCIToLocalAddr(const epicsPCIDevice *id, unsigned int bar, volatile void **ppLocalAddr, unsigned int opt)
Get pointer to PCI BAR.
Definition: devLibPCI.c:431
+
devPCIShowDevice
epicsShareFunc void devPCIShowDevice(int lvl, const epicsPCIDevice *dev)
Definition: devLibPCI.c:541
+
devPCIShowMatch
epicsShareFunc void devPCIShowMatch(int lvl, const char *spec, int vendor, int device)
Definition: devLibPCI.c:522
+
epicsPCIDevice
Device token.
Definition: devLibPCI.h:112
+
devPCIConfigRead16
epicsShareFunc int devPCIConfigRead16(const epicsPCIDevice *dev, unsigned offset, epicsUInt16 *pResult)
Read (16-bit) word from configuration space.
Definition: devLibPCI.c:609
+
epicsPCIDevice::domain
unsigned int domain
Definition: devLibPCI.h:121
+
epicsPCIDevice::device
unsigned int device
Definition: devLibPCI.h:115
+
devPCIFindDBDF
epicsShareFunc int devPCIFindDBDF(const epicsPCIID *idlist, unsigned int domain, unsigned int b, unsigned int d, unsigned int f, const epicsPCIDevice **found, unsigned int opt)
PCI bus probe.
Definition: devLibPCI.c:376
+
devPCIFindSpec
epicsShareFunc int devPCIFindSpec(const epicsPCIID *idlist, const char *spec, const epicsPCIDevice **found, unsigned int opt)
PCI bus search by specification string.
Definition: devLibPCI.c:267
+
devPCIDisconnectInterrupt
epicsShareFunc int devPCIDisconnectInterrupt(const epicsPCIDevice *id, void(*pFunction)(void *), void *parameter)
Stop receiving interrupts.
Definition: devLibPCI.c:476
+
epicsPCIID
PCI device identifier.
Definition: devLibPCI.h:55
+
devPCIConfigWrite8
epicsShareFunc int devPCIConfigWrite8(const epicsPCIDevice *dev, unsigned offset, epicsUInt8 value)
Write byte to configuration space.
Definition: devLibPCI.c:621
+
PCIBar::addr64
unsigned int addr64
Definition: devLibPCI.h:99
+
epicsPCIID::revision
epicsUInt16 revision
Definition: devLibPCI.h:59
+
epicsPCIDevice::slot
const char * slot
Definition: devLibPCI.h:118
+
devPCIFindBDF
epicsShareFunc int devPCIFindBDF(const epicsPCIID *idlist, unsigned int b, unsigned int d, unsigned int f, const epicsPCIDevice **found, unsigned int opt)
Definition: devLibPCI.c:418
+
devLibPCIUse
epicsShareFunc int devLibPCIUse(const char *name)
Select driver implementation. Pick driver implementation by name, or NULL to use default. If no selection is made then the default will be used if available.
Definition: devLibPCI.c:107
+
devPCIDeviceClassToString
epicsShareFunc const char * devPCIDeviceClassToString(int classId)
Translate class id to string.
Definition: devLibPCIStrings.c:7
+
devPCIShow
epicsShareFunc void devPCIShow(int lvl, int vendor, int device, int exact)
Definition: devLibPCI.c:504
+
devPCIBarLen
epicsShareFunc int devPCIBarLen(const epicsPCIDevice *id, unsigned int bar, epicsUInt32 *len)
Find the size of a BAR.
Definition: devLibPCI.c:449
+
epicsPCIDevice::id
epicsPCIID id
Exact ID of device.
Definition: devLibPCI.h:113
+
epicsPCIID::pci_class
epicsUInt32 pci_class
Definition: devLibPCI.h:58
+
devPCIConfigRead32
epicsShareFunc int devPCIConfigRead32(const epicsPCIDevice *dev, unsigned offset, epicsUInt32 *pResult)
Read (32-bit) dword from configuration space.
Definition: devLibPCI.c:615
+
devPCIDebug
epicsShareExtern int devPCIDebug
Definition: devLibPCI.h:354
+
epicsPCIID::vendor
epicsUInt32 vendor
Definition: devLibPCI.h:56
+
devPCIFindCB
epicsShareFunc int devPCIFindCB(const epicsPCIID *idlist, devPCISearchFn searchfn, void *arg, unsigned int opt)
PCI bus search w/ callback.
Definition: devLibPCI.c:214
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/dev_lib_p_c_i_impl_8h.html b/dev_lib_p_c_i_impl_8h.html new file mode 100644 index 0000000..abcfe65 --- /dev/null +++ b/dev_lib_p_c_i_impl_8h.html @@ -0,0 +1,277 @@ + + + + + + + +devLib2: devLibPCIImpl.h File Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+Data Structures | +Macros | +Enumerations | +Functions
+
+
devLibPCIImpl.h File Reference
+
+
+
#include <stddef.h>
+#include <dbDefs.h>
+#include <ellLib.h>
+#include <shareLib.h>
+#include <epicsTypes.h>
+#include "devLibPCI.h"
+
+

Go to the source code of this file.

+ + + + +

+Data Structures

struct  devLibPCI
 
+ + + + + + + +

+Macros

#define CFG_ACC_WIDTH(mode)   ((mode) & 0x0f)
 
#define CFG_ACC_WRITE(mode)   ((mode) & 0x10)
 
#define devLibPCIRegisterDriver(TPTR)   devLibPCIRegisterDriver2(TPTR, sizeof(*(TPTR)))
 
+ + + +

+Enumerations

enum  devPCIAccessMode {
+  RD_08 = 0x01, +RD_16 = 0x02, +RD_32 = 0x04, +WR_08 = 0x11, +
+  WR_16 = 0x12, +WR_32 = 0x14 +
+ }
 
+ + + + + + + +

+Functions

epicsShareFunc int devLibPCIRegisterDriver2 (devLibPCI *, size_t)
 
epicsShareFunc void devLibPCIRegisterBaseDefault (void)
 
epicsShareFunc int devLibPCIMatch (const epicsPCIID *match, const epicsPCIID *dev)
 
+

Macro Definition Documentation

+ +

◆ CFG_ACC_WIDTH

+ +
+
+ + + + + + + + +
#define CFG_ACC_WIDTH( mode)   ((mode) & 0x0f)
+
+ +

Definition at line 36 of file devLibPCIImpl.h.

+ +
+
+ +

◆ CFG_ACC_WRITE

+ +
+
+ + + + + + + + +
#define CFG_ACC_WRITE( mode)   ((mode) & 0x10)
+
+ +

Definition at line 37 of file devLibPCIImpl.h.

+ +
+
+ +

◆ devLibPCIRegisterDriver

+ +
+
+ + + + + + + + +
#define devLibPCIRegisterDriver( TPTR)   devLibPCIRegisterDriver2(TPTR, sizeof(*(TPTR)))
+
+ +

Definition at line 72 of file devLibPCIImpl.h.

+ +
+
+

Enumeration Type Documentation

+ +

◆ devPCIAccessMode

+ +
+
+ + + + +
enum devPCIAccessMode
+
+ + + + + + + +
Enumerator
RD_08 
RD_16 
RD_32 
WR_08 
WR_16 
WR_32 
+ +

Definition at line 27 of file devLibPCIImpl.h.

+ +
+
+

Function Documentation

+ +

◆ devLibPCIMatch()

+ +
+
+ + + + + + + + + + + + + + + + + + +
epicsShareFunc int devLibPCIMatch (const epicsPCIID * match,
const epicsPCIID * dev 
)
+
+

Helper for implementing devLibPCI::pDevPCIFind()

+

Returns true if the given match (which may include DEVPCI_ANY_* wildcards) matches the given device (which may not).

+ +

Definition at line 153 of file devLibPCI.c.

+ +
+
+ +

◆ devLibPCIRegisterBaseDefault()

+ +
+
+ + + + + + + + +
epicsShareFunc void devLibPCIRegisterBaseDefault (void )
+
+

Register default implementation

+

Not needed by IOCs

+ +
+
+ +

◆ devLibPCIRegisterDriver2()

+ +
+
+ + + + + + + + + + + + + + + + + + +
epicsShareFunc int devLibPCIRegisterDriver2 (devLibPCI * ,
size_t  
)
+
+ +

Definition at line 70 of file devLibPCI.c.

+ +
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+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/dev_lib_p_c_i_impl_8h_source.html b/dev_lib_p_c_i_impl_8h_source.html new file mode 100644 index 0000000..9e356a5 --- /dev/null +++ b/dev_lib_p_c_i_impl_8h_source.html @@ -0,0 +1,74 @@ + + + + + + + +devLib2: devLibPCIImpl.h Source File + + + + + + +
+
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devLib2 +  2.11 +
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devLibPCIImpl.h
+
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+Go to the documentation of this file.
1 /*************************************************************************\
2 * Copyright (c) 2010 Brookhaven Science Associates, as Operator of
3 * Brookhaven National Laboratory.
4 * devLib2 is distributed subject to a Software License Agreement found
5 * in file LICENSE that is included with this distribution.
6 \*************************************************************************/
7 /*
8  * Author: Michael Davidsaver <mdavidsaver@gmail.com>
9  */
10 
11 #ifndef DEVLIBPCIIMPL_H_INC
12 #define DEVLIBPCIIMPL_H_INC
13 
14 #include <stddef.h>
15 
16 #include <dbDefs.h>
17 #include <ellLib.h>
18 #include <shareLib.h>
19 #include <epicsTypes.h>
20 
21 #include "devLibPCI.h"
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
27 typedef enum {
28  RD_08 = 0x01,
29  RD_16 = 0x02,
30  RD_32 = 0x04,
31  WR_08 = 0x11,
32  WR_16 = 0x12,
33  WR_32 = 0x14
34 } devPCIAccessMode;
35 
36 #define CFG_ACC_WIDTH(mode) ((mode) & 0x0f)
37 #define CFG_ACC_WRITE(mode) ((mode) & 0x10)
38 
39 typedef struct {
40  const char *name;
41 
42  int (*pDevInit)(void);
43 
44  int (*pDevFinal)(void);
45 
46  int (*pDevPCIFind)(const epicsPCIID *ids, devPCISearchFn searchfn, void *arg, unsigned int o);
47 
48  int (*pDevPCIToLocalAddr)(const epicsPCIDevice* dev,unsigned int bar,volatile void **a,unsigned int o);
49 
50  int (*pDevPCIBarLen)(const epicsPCIDevice* dev,unsigned int bar,epicsUInt32 *len);
51 
52  int (*pDevPCIConnectInterrupt)(const epicsPCIDevice *id,
53  void (*pFunction)(void *),
54  void *parameter,
55  unsigned int opt);
56 
57  int (*pDevPCIDisconnectInterrupt)(const epicsPCIDevice *id,
58  void (*pFunction)(void *),
59  void *parameter);
60 
61  int (*pDevPCIConfigAccess)(const epicsPCIDevice *id, unsigned offset, void *pArg, devPCIAccessMode mode);
62 
63  /* level 0 enables, higher levels disable - on error a negative value is returned */
64  int (*pDevPCISwitchInterrupt)(const epicsPCIDevice *id, int level);
65  ELLNODE node;
66 } devLibPCI;
67 
68 epicsShareFunc
69 int
70 devLibPCIRegisterDriver2(devLibPCI*, size_t);
71 
72 #define devLibPCIRegisterDriver(TPTR) devLibPCIRegisterDriver2(TPTR, sizeof(*(TPTR)))
73 
76 epicsShareFunc
77 void devLibPCIRegisterBaseDefault(void);
78 
84 epicsShareFunc
85 int
86 devLibPCIMatch(const epicsPCIID *match, const epicsPCIID *dev);
87 
88 #ifdef __cplusplus
89 } /* extern "C" */
90 #endif
91 
92 #endif /* DEVLIBPCIIMPL_H_INC */
devPCISearchFn
int(* devPCISearchFn)(void *ptr, const epicsPCIDevice *dev)
PCI search callback prototype.
Definition: devLibPCI.h:136
+ + +
devLibPCIRegisterDriver2
epicsShareFunc int devLibPCIRegisterDriver2(devLibPCI *, size_t)
Definition: devLibPCI.c:70
+
devLibPCIRegisterBaseDefault
epicsShareFunc void devLibPCIRegisterBaseDefault(void)
+
devPCIAccessMode
devPCIAccessMode
Definition: devLibPCIImpl.h:27
+
devLibPCI::name
const char * name
Definition: devLibPCIImpl.h:40
+ +
epicsPCIDevice
Device token.
Definition: devLibPCI.h:112
+ +
epicsPCIID
PCI device identifier.
Definition: devLibPCI.h:55
+ + + + +
devLibPCIMatch
epicsShareFunc int devLibPCIMatch(const epicsPCIID *match, const epicsPCIID *dev)
Definition: devLibPCI.c:153
+
devLibPCI::node
ELLNODE node
Definition: devLibPCIImpl.h:65
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/dev_lib_p_c_i_strings_8c.html b/dev_lib_p_c_i_strings_8c.html new file mode 100644 index 0000000..c1ce980 --- /dev/null +++ b/dev_lib_p_c_i_strings_8c.html @@ -0,0 +1,95 @@ + + + + + + + +devLib2: devLibPCIStrings.c File Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+Macros | +Functions
+
+
devLibPCIStrings.c File Reference
+
+
+
#include <stdlib.h>
+#include <stdio.h>
+#include <epicsAssert.h>
+#include "devLibPCI.h"
+
+

Go to the source code of this file.

+ + + + +

+Macros

#define epicsExportSharedSymbols
 
+ + + + +

+Functions

const char * devPCIDeviceClassToString (int classId)
 Translate class id to string. More...
 
+

Macro Definition Documentation

+ +

◆ epicsExportSharedSymbols

+ +
+
+ + + + +
#define epicsExportSharedSymbols
+
+ +

Definition at line 4 of file devLibPCIStrings.c.

+ +
+
+
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+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/dev_lib_p_c_i_strings_8c_source.html b/dev_lib_p_c_i_strings_8c_source.html new file mode 100644 index 0000000..761f610 --- /dev/null +++ b/dev_lib_p_c_i_strings_8c_source.html @@ -0,0 +1,59 @@ + + + + + + + +devLib2: devLibPCIStrings.c Source File + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
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+
+
devLibPCIStrings.c
+
+
+Go to the documentation of this file.
1 #include <stdlib.h>
2 #include <stdio.h>
3 #include <epicsAssert.h>
4 #define epicsExportSharedSymbols
5 #include "devLibPCI.h"
6 
7 const char* devPCIDeviceClassToString(int classId)
8 {
9  struct {int classId; const char* name;} classes [] =
10  {
11  { 0x0000, "legacy device" },
12  { 0x0001, "legacy VGA device" },
13 
14  { 0x0100, "SCSI controller" },
15  { 0x0101, "IDE controller" },
16  { 0x0102, "Floppy controller" },
17  { 0x0103, "IPI controller" },
18  { 0x0104, "RAID controller" },
19  { 0x0105, "ATA controller" },
20  { 0x0106, "SATA controller" },
21  { 0x0107, "srial attached SCSI controller" },
22  { 0x0180, "generic mass storage controller" },
23  { 0x01ff, "unknown mass storage controller" },
24 
25  { 0x0200, "Ethernet controller" },
26  { 0x0201, "Token Ring controller" },
27  { 0x0202, "FDDI controller" },
28  { 0x0203, "ATM controller" },
29  { 0x0204, "ISDN controller" },
30  { 0x0205, "WorldFip controller" },
31  { 0x0206, "PCIMG controller" },
32  { 0x0207, "Infiniband controller" },
33  { 0x0280, "generic network controller" },
34  { 0x02ff, "unknown network controller" },
35 
36  { 0x0300, "VGA controller" },
37  { 0x0301, "XGA controller" },
38  { 0x0302, "3D display controller" },
39  { 0x0380, "generic display controller" },
40  { 0x03ff, "unknown display controller" },
41 
42  { 0x0400, "video controller" },
43  { 0x0401, "audio controller" },
44  { 0x0402, "telephony controller" },
45  { 0x0403, "audio controller" },
46  { 0x0480, "generic multimedia controller" },
47  { 0x04ff, "unknown multimedia controller" },
48 
49  { 0x0500, "RAM controller" },
50  { 0x0501, "Flash controller" },
51  { 0x0580, "generic memory controller" },
52  { 0x05ff, "unknown memory controller" },
53 
54  { 0x0600, "PCI host bridge" },
55  { 0x0601, "ISA bridge" },
56  { 0x0602, "EISA bridge" },
57  { 0x0603, "Micro Channel bridge" },
58  { 0x0604, "PCI-to-PCI bridge" },
59  { 0x0605, "PCMCIA bridge" },
60  { 0x0606, "NuBus bridge" },
61  { 0x0607, "Cardbus bridge" },
62  { 0x0608, "RACEway bridge" },
63  { 0x0609, "semi-transparent PCI-to-PCI bridge" },
64  { 0x060a, "Infiniband PCI Host bridge" },
65  { 0x0680, "generic bus bridge" },
66  { 0x06ff, "unknown bus bridge" },
67 
68  { 0x0700, "serial port controller" },
69  { 0x0701, "parallel port controller" },
70  { 0x0702, "multi port serial controller" },
71  { 0x0703, "modem" },
72  { 0x0704, "GPIB controller" },
73  { 0x0705, "SmartCard controller" },
74  { 0x0780, "generic communication controller" },
75  { 0x07ff, "unknown communication controller" },
76 
77  { 0x0800, "PIC controller" },
78  { 0x0801, "DMA controller" },
79  { 0x0802, "timer" },
80  { 0x0803, "real time clock" },
81  { 0x0804, "PCI hot-plug controller" },
82  { 0x0805, "SD host controller" },
83  { 0x0805, "IOMMU controller" },
84  { 0x0880, "generic system peripheral" },
85  { 0x08ff, "unknown system peripheral" },
86 
87  { 0x0900, "keyboard" },
88  { 0x0901, "digitizer pen" },
89  { 0x0902, "scanner" },
90  { 0x0903, "gameport" },
91  { 0x0980, "generic input device" },
92  { 0x09ff, "unknown input device" },
93 
94  { 0x0a00, "docking station" },
95  { 0x0a80, "generic docking station" },
96  { 0x0aff, "unknown docking station" },
97 
98  { 0x0b00, "386 processor" },
99  { 0x0b01, "486 processor" },
100  { 0x0b02, "Pentium processor" },
101  { 0x0b10, "Alpha processor" },
102  { 0x0b20, "PowerPC processor" },
103  { 0x0b30, "MIPS processor" },
104  { 0x0b40, "co-processor" },
105  { 0x0b80, "generic processor" },
106  { 0x0bff, "unknown processor" },
107 
108  { 0x0c00, "FireWire controller" },
109  { 0x0c01, "ACCESS controller" },
110  { 0x0c02, "SSA controller" },
111  { 0x0c03, "USB controller" },
112  { 0x0c04, "Fibre Channel controller" },
113  { 0x0c05, "SMBus controller" },
114  { 0x0c06, "InfiniBand controller" },
115  { 0x0c07, "IPMI SMIC controller" },
116  { 0x0c08, "SERCOS controller" },
117  { 0x0c09, "CANBUS controller" },
118  { 0x0c80, "generic serial bus controller" },
119  { 0x0cff, "unknown serial bus controller" },
120 
121  { 0x0d00, "IRDA controller" },
122  { 0x0d01, "IR controller" },
123  { 0x0d10, "RF controller" },
124  { 0x0d11, "Bluetooth controller" },
125  { 0x0d12, "Broadband controller" },
126  { 0x0d20, "802.1a controller" },
127  { 0x0d21, "802.1b controller" },
128  { 0x0d80, "generic wireless controller" },
129  { 0x0dff, "unknown wireless controller" },
130 
131  { 0x0e00, "I2O controller" },
132  { 0x0e80, "generic intelligent controller" },
133  { 0x0eff, "unknown intelligent controller" },
134 
135  { 0x0f01, "satellite TV controller" },
136  { 0x0f02, "satellite audio controller" },
137  { 0x0f03, "satellite video controller" },
138  { 0x0f04, "satellite data communications controller" },
139  { 0x0f80, "generic satellite communications controller" },
140  { 0x0fff, "unknown satellite communications controller" },
141 
142  { 0x1000, "network and computing encryption device" },
143  { 0x1001, "entertainment encryption device" },
144  { 0x1080, "generic encryption device" },
145  { 0x10ff, "unknown encryption device" },
146 
147  { 0x1100, "DPIO controller" },
148  { 0x1101, "performance counter" },
149  { 0x1110, "communication synchronizer" },
150  { 0x1120, "signal processing management" },
151  { 0x1180, "generic signal processing controller" },
152  { 0x11ff, "unknown signal processing controller" },
153 
154  { 0x1200, "processing accelerator" },
155  { 0x1280, "generic processing accelerator" },
156  { 0x12ff, "unknown processing accelerator" },
157 
158  { 0x1300, "non-essential instrumentation" },
159  { 0x1380, "generic non-essential instrumentation" },
160  { 0x13ff, "unknown non-essential instrumentation" },
161 
162  { 0xffff, "unknown device class" }
163  };
164 
165  unsigned int n = 0;
166  const unsigned int nument = sizeof(classes)/sizeof(classes[0])-1;
167  unsigned int m = nument;
168  unsigned int i;
169 
170  classId >>= 8;
171 
172  /* binary search */
173  while (m>n)
174  {
175  i = (n+m)>>1;
176  assert(i<nument);
177  if (classes[i].classId == classId) return classes[i].name;
178  if (classes[i].classId < classId) n=i+1;
179  if (classes[i].classId > classId) m=i;
180  }
181  if(i<nument-1) {
182  /* unknown device class linear search */
183  classId |= 0xff;
184  assert(i<nument-1);
185  while (classes[++i].classId < classId);
186  return classes[i].name;
187  } else {
188  /* unknown device class */
189  return classes[nument].name;
190  }
191 }
+
devPCIDeviceClassToString
const char * devPCIDeviceClassToString(int classId)
Translate class id to string.
Definition: devLibPCIStrings.c:7
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/dev_lib_v_m_e_8c.html b/dev_lib_v_m_e_8c.html new file mode 100644 index 0000000..b0df79b --- /dev/null +++ b/dev_lib_v_m_e_8c.html @@ -0,0 +1,403 @@ + + + + + + + +devLib2: devLibVME.c File Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+Data Structures | +Macros | +Functions | +Variables
+
+
devLibVME.c File Reference
+
+
+
#include <string.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include "dbDefs.h"
+#include "epicsMutex.h"
+#include "errlog.h"
+#include "ellLib.h"
+#include "devLibVME.h"
+#include <epicsExport.h>
+
+

Go to the source code of this file.

+ + + + +

+Data Structures

struct  rangeItem
 
+ + + + + + + +

+Macros

#define epicsExportSharedSymbols
 
#define NO_DEVLIB_COMPAT
 
#define SUCCESS   0
 
+ + + + + + + + + + + + + + + +

+Functions

long devBusToLocalAddr2 (epicsAddressType addrType, size_t busAddr, volatile void **ppLocalAddress)
 
long devRegisterAddress2 (const char *pOwnerName, epicsAddressType addrType, size_t base, size_t size, volatile void **ppPhysicalAddress)
 
long devUnregisterAddress2 (epicsAddressType addrType, size_t baseAddress, const char *pOwnerName)
 
long devAllocAddress2 (const char *pOwnerName, epicsAddressType addrType, size_t size, unsigned alignment, volatile void **pLocalAddress)
 
long devAddressMap2 (void)
 
void devReplaceVirtualOS (void)
 
 epicsExportRegistrar (devReplaceVirtualOS)
 
+ + + +

+Variables

const char * epicsAddressTypeName2 []
 
+

Macro Definition Documentation

+ +

◆ epicsExportSharedSymbols

+ +
+
+ + + + +
#define epicsExportSharedSymbols
+
+ +

Definition at line 31 of file devLibVME.c.

+ +
+
+ +

◆ NO_DEVLIB_COMPAT

+ +
+
+ + + + +
#define NO_DEVLIB_COMPAT
+
+ +

Definition at line 37 of file devLibVME.c.

+ +
+
+ +

◆ SUCCESS

+ +
+
+ + + + +
#define SUCCESS   0
+
+ +

Definition at line 142 of file devLibVME.c.

+ +
+
+

Function Documentation

+ +

◆ devAddressMap2()

+ +
+
+ + + + + + + + +
long devAddressMap2 (void )
+
+ +

Definition at line 702 of file devLibVME.c.

+ +
+
+ +

◆ devAllocAddress2()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
long devAllocAddress2 (const char * pOwnerName,
epicsAddressType addrType,
size_t size,
unsigned alignment,
volatile void ** pLocalAddress 
)
+
+ +

Definition at line 569 of file devLibVME.c.

+ +
+
+ +

◆ devBusToLocalAddr2()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
long devBusToLocalAddr2 (epicsAddressType addrType,
size_t busAddr,
volatile void ** ppLocalAddress 
)
+
+ +

Definition at line 147 of file devLibVME.c.

+ +
+
+ +

◆ devRegisterAddress2()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
long devRegisterAddress2 (const char * pOwnerName,
epicsAddressType addrType,
size_t base,
size_t size,
volatile void ** ppPhysicalAddress 
)
+
+ +

Definition at line 198 of file devLibVME.c.

+ +
+
+ +

◆ devReplaceVirtualOS()

+ +
+
+ + + + + + + + +
void devReplaceVirtualOS (void )
+
+ +

Definition at line 811 of file devLibVME.c.

+ +
+
+ +

◆ devUnregisterAddress2()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
long devUnregisterAddress2 (epicsAddressType addrType,
size_t baseAddress,
const char * pOwnerName 
)
+
+ +

Definition at line 432 of file devLibVME.c.

+ +
+
+ +

◆ epicsExportRegistrar()

+ +
+
+ + + + + + + + +
epicsExportRegistrar (devReplaceVirtualOS )
+
+ +
+
+

Variable Documentation

+ +

◆ epicsAddressTypeName2

+ +
+
+ + + + +
const char* epicsAddressTypeName2[]
+
+Initial value:
= {
"VME A16",
"VME A24",
"VME A32",
"ISA",
"VME CR/CSR"
}
+

Definition at line 71 of file devLibVME.c.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/dev_lib_v_m_e_8c_source.html b/dev_lib_v_m_e_8c_source.html new file mode 100644 index 0000000..ac46420 --- /dev/null +++ b/dev_lib_v_m_e_8c_source.html @@ -0,0 +1,78 @@ + + + + + + + +devLib2: devLibVME.c Source File + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+
devLibVME.c
+
+
+Go to the documentation of this file.
1 /*************************************************************************\
2 * Copyright (c) 2010 Brookhaven Science Associates, as Operator of
3 * Brookhaven National Laboratory.
4 * Copyright (c) 2008 UChicago Argonne LLC, as Operator of Argonne
5 * National Laboratory.
6 * Copyright (c) 2002 The Regents of the University of California, as
7 * Operator of Los Alamos National Laboratory.
8 * EPICS BASE is distributed subject to a Software License Agreement found
9 * in file LICENSE that is included with this distribution.
10 \*************************************************************************/
11 /* devLib.c - support for allocation of common device resources */
12 /* $Id$ */
13 
14 /*
15  * Original Author: Marty Kraimer
16  * Author: Jeff Hill
17  * Date: 03-10-93
18  *
19  * NOTES:
20  * .01 06-14-93 joh needs devAllocInterruptVector() routine
21  *
22  * This is a stripped down version of the similarly named file from EPICS Base
23  */
24 
25 static const char sccsID[] = "@(#) $Id$";
26 
27 #include <string.h>
28 #include <stdio.h>
29 #include <stdlib.h>
30 
31 #define epicsExportSharedSymbols
32 #include "dbDefs.h"
33 #include "epicsMutex.h"
34 #include "errlog.h"
35 #include "ellLib.h"
36 
37 #define NO_DEVLIB_COMPAT
38 #include "devLibVME.h"
39 
40 static ELLLIST addrAlloc[atLast];
41 static ELLLIST addrFree[atLast];
42 
43 static size_t addrLast[atLast] = {
44  0xffff,
45  0xffffff,
46  0xffffffff,
47  0xffffff,
48  0xffffff,
49  };
50 
51 static unsigned addrHexDig[atLast] = {
52  4,
53  6,
54  8,
55  6,
56  6
57  };
58 
59 static long addrFail[atLast] = {
60  S_dev_badA16,
61  S_dev_badA24,
62  S_dev_badA32,
63  S_dev_badA24,
64  S_dev_badA24
65  };
66 
67 static epicsMutexId addrListLock;
68 static char devLibInitFlag;
69 
70 const char *epicsAddressTypeName2[]
71  = {
72  "VME A16",
73  "VME A24",
74  "VME A32",
75  "ISA",
76  "VME CR/CSR"
77  };
78 
79 typedef struct{
80  ELLNODE node;
81  const char *pOwnerName;
82  volatile void *pPhysical;
83  /*
84  * first, last is used here instead of base, size
85  * so that we can store a block that is the maximum size
86  * available in type size_t
87  */
88  size_t begin;
89  size_t end;
90 }rangeItem;
91 
92 /*
93  * These routines are not exported
94  */
95 
96 static long devLibInit(void);
97 
98 static long addrVerify(
99  epicsAddressType addrType,
100  size_t base,
101  size_t size);
102 
103 static long blockFind (
104  epicsAddressType addrType,
105  const rangeItem *pRange,
106  /* size needed */
107  size_t requestSize,
108  /* n ls bits zero in base addr */
109  unsigned alignment,
110  /* base address found */
111  size_t *pFirst);
112 
113 static void report_conflict(
114  epicsAddressType addrType,
115  size_t base,
116  size_t size,
117  const char *pOwnerName);
118 
119 static void report_conflict_device(
120  epicsAddressType addrType,
121  const rangeItem *pRange);
122 
123 static void devInsertAddress(
124  ELLLIST *pRangeList,
125  rangeItem *pNewRange);
126 
127 static long devListAddressMap(
128  ELLLIST *pRangeList);
129 
130 static long devCombineAdjacentBlocks(
131  ELLLIST *pRangeList,
132  rangeItem *pRange);
133 
134 static long devInstallAddr(
135  rangeItem *pRange, /* item on the free list to be split */
136  const char *pOwnerName,
137  epicsAddressType addrType,
138  size_t base,
139  size_t size,
140  volatile void **ppPhysicalAddress);
141 
142 #define SUCCESS 0
143 
144 /*
145  * devBusToLocalAddr()
146  */
147 long devBusToLocalAddr2(
148  epicsAddressType addrType,
149  size_t busAddr,
150  volatile void **ppLocalAddress)
151 {
152  long status;
153  volatile void *localAddress;
154 
155  /*
156  * Make sure that devLib has been intialized
157  */
158  if (!devLibInitFlag) {
159  status = devLibInit();
160  if(status){
161  return status;
162  }
163  }
164 
165  /*
166  * Make sure we have a valid bus address
167  */
168  status = addrVerify (addrType, busAddr, 4);
169  if (status) {
170  return status;
171  }
172 
173  /*
174  * Call the virtual os routine to map the bus address to a CPU address
175  */
176  status = (*pdevLibVirtualOS->pDevMapAddr) (addrType, 0, busAddr, 4, &localAddress);
177  if (status) {
178  errPrintf (status, __FILE__, __LINE__, "%s bus address =0X%X\n",
179  epicsAddressTypeName[addrType], (unsigned int)busAddr);
180  return status;
181  }
182 
183  /*
184  * Return the local CPU address if the pointer is supplied
185  */
186  if (ppLocalAddress) {
187  *ppLocalAddress = localAddress;
188  }
189 
190  return SUCCESS;
191 
192 }/*end devBusToLocalAddr()*/
193 
194 
195 /*
196  * devRegisterAddress()
197  */
198 long devRegisterAddress2(
199  const char *pOwnerName,
200  epicsAddressType addrType,
201  size_t base,
202  size_t size,
203  volatile void **ppPhysicalAddress)
204 {
205  rangeItem *pRange;
206  long s;
207 
208  if (!devLibInitFlag) {
209  s = devLibInit();
210  if(s){
211  return s;
212  }
213  }
214 
215  s = addrVerify (addrType, base, size);
216  if (s) {
217  return s;
218  }
219 
220  if (size == 0) {
221  return S_dev_lowValue;
222  }
223 
224 #ifdef DEBUG
225  errlogPrintf ("Req Addr 0X%X Size 0X%X\n", base, size);
226 #endif
227 
228  epicsMutexMustLock(addrListLock);
229  pRange = (rangeItem *) ellFirst(&addrFree[addrType]);
230  while (TRUE) {
231  if (pRange->begin > base) {
232  pRange = NULL;
233 # ifdef DEBUG
234  errlogPrintf ("Unable to locate a free block\n");
235  devListAddressMap (&addrFree[addrType]);
236 # endif
237  break;
238  }
239  else if (base + (size - 1) <= pRange->end) {
240 # ifdef DEBUG
241  errlogPrintf ("Found free block Begin 0X%X End 0X%X\n",
242  pRange->begin, pRange->end);
243 # endif
244  break;
245  }
246 
247  pRange = (rangeItem *) ellNext (&pRange->node);
248  }
249  epicsMutexUnlock(addrListLock);
250 
251  if (pRange==NULL) {
252  report_conflict (addrType, base, size, pOwnerName);
253  return S_dev_addressOverlap;
254  }
255 
256  s = devInstallAddr(
257  pRange, /* item on the free list to be split */
258  pOwnerName,
259  addrType,
260  base,
261  size,
262  ppPhysicalAddress);
263 
264  return s;
265 }
266 
267 /*
268  * devInstallAddr()
269  */
270 static long devInstallAddr (
271  rangeItem *pRange, /* item on the free list to be split */
272  const char *pOwnerName,
273  epicsAddressType addrType,
274  size_t base,
275  size_t size,
276  volatile void **ppPhysicalAddress)
277 {
278  volatile void *pPhysicalAddress;
279  rangeItem *pNewRange;
280  size_t reqEnd = base + (size-1);
281  long status;
282 
283  /*
284  * does it start below the specified block
285  */
286  if (base < pRange->begin) {
287  return S_dev_badArgument;
288  }
289 
290  /*
291  * does it end above the specified block
292  */
293  if (reqEnd > pRange->end) {
294  return S_dev_badArgument;
295  }
296 
297  /*
298  * always map through the virtual os in case the memory
299  * management is set up there
300  */
301  status = (*pdevLibVirtualOS->pDevMapAddr) (addrType, 0, base,
302  size, &pPhysicalAddress);
303  if (status) {
304  errPrintf (status, __FILE__, __LINE__, "%s base=0X%X size = 0X%X",
305  epicsAddressTypeName[addrType], (unsigned int)base, (unsigned int)size);
306  return status;
307  }
308 
309  /*
310  * set the callers variable if the pointer is supplied
311  */
312  if (ppPhysicalAddress) {
313  *ppPhysicalAddress = pPhysicalAddress;
314  }
315 
316  /*
317  * does it start at the beginning of the block
318  */
319  if (pRange->begin == base) {
320  if (pRange->end == reqEnd) {
321  epicsMutexMustLock(addrListLock);
322  ellDelete(&addrFree[addrType], &pRange->node);
323  epicsMutexUnlock(addrListLock);
324  free ((void *)pRange);
325  }
326  else {
327  pRange->begin = base + size;
328  }
329  }
330  /*
331  * does it end at the end of the block
332  */
333  else if (pRange->end == reqEnd) {
334  pRange->end = base-1;
335  }
336  /*
337  * otherwise split the item on the free list
338  */
339  else {
340 
341  pNewRange = (rangeItem *) calloc (1, sizeof(*pRange));
342  if(!pNewRange){
343  return S_dev_noMemory;
344  }
345 
346  pNewRange->begin = base + size;
347  pNewRange->end = pRange->end;
348  pNewRange->pOwnerName = "<fragmented block>";
349  pNewRange->pPhysical = NULL;
350  pRange->end = base - 1;
351 
352  /*
353  * add the node after the old item on the free list
354  * (blocks end up ordered by address)
355  */
356  epicsMutexMustLock(addrListLock);
357  ellInsert(&addrFree[addrType], &pRange->node, &pNewRange->node);
358  epicsMutexUnlock(addrListLock);
359  }
360 
361  /*
362  * allocate a new address range entry and add it to
363  * the list
364  */
365  pNewRange = (rangeItem *)calloc (1, sizeof(*pRange));
366  if (!pNewRange) {
367  return S_dev_noMemory;
368  }
369 
370  pNewRange->begin = base;
371  pNewRange->end = reqEnd;
372  pNewRange->pOwnerName = pOwnerName;
373  pNewRange->pPhysical = pPhysicalAddress;
374 
375  devInsertAddress (&addrAlloc[addrType], pNewRange);
376 
377  return SUCCESS;
378 }
379 
380 /*
381  * report_conflict()
382  */
383 static void report_conflict (
384  epicsAddressType addrType,
385  size_t base,
386  size_t size,
387  const char *pOwnerName
388 )
389 {
390  const rangeItem *pRange;
391 
392  errPrintf (
393  S_dev_addressOverlap,
394  __FILE__,
395  __LINE__,
396  "%10s 0X%08X - OX%08X Requested by %s",
397  epicsAddressTypeName[addrType],
398  (unsigned int)base,
399  (unsigned int)(base+size-1),
400  pOwnerName);
401 
402  pRange = (rangeItem *) ellFirst(&addrAlloc[addrType]);
403  while (pRange) {
404 
405  if (pRange->begin <= base + (size-1) && pRange->end >= base) {
406  report_conflict_device (addrType, pRange);
407  }
408 
409  pRange = (rangeItem *) pRange->node.next;
410  }
411 }
412 
413 /*
414  * report_conflict_device()
415  */
416 static void report_conflict_device(epicsAddressType addrType, const rangeItem *pRange)
417 {
418  errPrintf (
419  S_dev_identifyOverlap,
420  __FILE__,
421  __LINE__,
422  "%10s 0X%08X - 0X%08X Owned by %s",
423  epicsAddressTypeName[addrType],
424  (unsigned int)pRange->begin,
425  (unsigned int)pRange->end,
426  pRange->pOwnerName);
427 }
428 
429 /*
430  * devUnregisterAddress()
431  */
432 long devUnregisterAddress2(
433  epicsAddressType addrType,
434  size_t baseAddress,
435  const char *pOwnerName)
436 {
437  rangeItem *pRange;
438  int s;
439 
440  if (!devLibInitFlag) {
441  s = devLibInit();
442  if(s) {
443  return s;
444  }
445  }
446 
447  s = addrVerify (addrType, baseAddress, 1);
448  if (s != SUCCESS) {
449  return s;
450  }
451 
452  epicsMutexMustLock(addrListLock);
453  pRange = (rangeItem *) ellFirst(&addrAlloc[addrType]);
454  while (pRange) {
455  if (pRange->begin == baseAddress) {
456  break;
457  }
458  if (pRange->begin > baseAddress) {
459  pRange = NULL;
460  break;
461  }
462  pRange = (rangeItem *) ellNext(&pRange->node);
463  }
464  epicsMutexUnlock(addrListLock);
465 
466  if (!pRange) {
467  return S_dev_addressNotFound;
468  }
469 
470  if (strcmp(pOwnerName,pRange->pOwnerName)) {
471  s = S_dev_addressOverlap;
472  errPrintf (
473  s,
474  __FILE__,
475  __LINE__,
476  "unregister address for %s at 0X%X failed because %s owns it",
477  pOwnerName,
478  (unsigned int)baseAddress,
479  pRange->pOwnerName);
480  return s;
481  }
482 
483  epicsMutexMustLock(addrListLock);
484  ellDelete (&addrAlloc[addrType], &pRange->node);
485  epicsMutexUnlock(addrListLock);
486 
487  pRange->pOwnerName = "<released fragment>";
488  devInsertAddress (&addrFree[addrType], pRange);
489  s = devCombineAdjacentBlocks (&addrFree[addrType], pRange);
490  if(s){
491  errMessage (s, "devCombineAdjacentBlocks error");
492  return s;
493  }
494 
495  return SUCCESS;
496 }
497 
498 /*
499  * devCombineAdjacentBlocks()
500  */
501 static long devCombineAdjacentBlocks(
502  ELLLIST *pRangeList,
503  rangeItem *pRange)
504 {
505  rangeItem *pBefore;
506  rangeItem *pAfter;
507 
508  pBefore = (rangeItem *) ellPrevious (&pRange->node);
509  pAfter = (rangeItem *) ellNext (&pRange->node);
510 
511  /*
512  * combine adjacent blocks
513  */
514  if (pBefore) {
515  if (pBefore->end == pRange->begin-1) {
516  epicsMutexMustLock(addrListLock);
517  pRange->begin = pBefore->begin;
518  ellDelete (pRangeList, &pBefore->node);
519  epicsMutexUnlock(addrListLock);
520  free ((void *)pBefore);
521  }
522  }
523 
524  if (pAfter) {
525  if (pAfter->begin == pRange->end+1) {
526  epicsMutexMustLock(addrListLock);
527  pRange->end = pAfter->end;
528  ellDelete (pRangeList, &pAfter->node);
529  epicsMutexUnlock(addrListLock);
530  free((void *)pAfter);
531  }
532  }
533 
534  return SUCCESS;
535 }
536 
537 /*
538  * devInsertAddress()
539  */
540 static void devInsertAddress(
541 ELLLIST *pRangeList,
542 rangeItem *pNewRange)
543 {
544  rangeItem *pBefore;
545  rangeItem *pAfter;
546 
547  epicsMutexMustLock(addrListLock);
548  pAfter = (rangeItem *) ellFirst (pRangeList);
549  while (pAfter) {
550  if (pNewRange->end < pAfter->begin) {
551  break;
552  }
553  pAfter = (rangeItem *) ellNext (&pAfter->node);
554  }
555 
556  if (pAfter) {
557  pBefore = (rangeItem *) ellPrevious (&pAfter->node);
558  ellInsert (pRangeList, &pBefore->node, &pNewRange->node);
559  }
560  else {
561  ellAdd (pRangeList, &pNewRange->node);
562  }
563  epicsMutexUnlock(addrListLock);
564 }
565 
566 /*
567  * devAllocAddress()
568  */
569 long devAllocAddress2(
570  const char *pOwnerName,
571  epicsAddressType addrType,
572  size_t size,
573  unsigned alignment, /* n ls bits zero in base addr*/
574  volatile void ** pLocalAddress )
575 {
576  int s;
577  rangeItem *pRange;
578  size_t base = 0;
579 
580  if (!devLibInitFlag) {
581  s = devLibInit();
582  if(s){
583  return s;
584  }
585  }
586 
587  s = addrVerify (addrType, 0, size);
588  if(s){
589  return s;
590  }
591 
592  if (size == 0) {
593  return S_dev_lowValue;
594  }
595 
596  epicsMutexMustLock(addrListLock);
597  pRange = (rangeItem *) ellFirst (&addrFree[addrType]);
598  while (pRange) {
599  if ((pRange->end - pRange->begin) + 1 >= size){
600  s = blockFind (
601  addrType,
602  pRange,
603  size,
604  alignment,
605  &base);
606  if (s==SUCCESS) {
607  break;
608  }
609  }
610  pRange = (rangeItem *) pRange->node.next;
611  }
612  epicsMutexUnlock(addrListLock);
613 
614  if(!pRange){
615  s = S_dev_deviceDoesNotFit;
616  errMessage(s, epicsAddressTypeName[addrType]);
617  return s;
618  }
619 
620  s = devInstallAddr (pRange, pOwnerName, addrType, base,
621  size, pLocalAddress);
622 
623  return s;
624 }
625 
626 /*
627  * addrVerify()
628  *
629  * care has been taken here not to overflow type size_t
630  */
631 static long addrVerify(epicsAddressType addrType, size_t base, size_t size)
632 {
633  if (addrType>=atLast) {
634  return S_dev_uknAddrType;
635  }
636 
637  if (size == 0) {
638  return addrFail[addrType];
639  }
640 
641  if (size-1 > addrLast[addrType]) {
642  return addrFail[addrType];
643  }
644 
645  if (base > addrLast[addrType]) {
646  return addrFail[addrType];
647  }
648 
649  if (size - 1 > addrLast[addrType] - base) {
650  return addrFail[addrType];
651  }
652 
653  return SUCCESS;
654 }
655 
656 /*
657  * devLibInit()
658  */
659 static long devLibInit (void)
660 {
661  rangeItem *pRange;
662  int i;
663 
664 
665  if(devLibInitFlag) return(SUCCESS);
666  if(!pdevLibVirtualOS) {
667  epicsPrintf ("pdevLibVirtualOS is NULL\n");
668  return S_dev_internal;
669  }
670 
671  if (NELEMENTS(addrAlloc) != NELEMENTS(addrFree)) {
672  return S_dev_internal;
673  }
674 
675  addrListLock = epicsMutexMustCreate();
676 
677  epicsMutexMustLock(addrListLock);
678  for (i=0; i<NELEMENTS(addrAlloc); i++) {
679  ellInit (&addrAlloc[i]);
680  ellInit (&addrFree[i]);
681  }
682 
683  for (i=0; i<NELEMENTS(addrAlloc); i++) {
684  pRange = (rangeItem *) malloc (sizeof(*pRange));
685  if (!pRange) {
686  return S_dev_noMemory;
687  }
688  pRange->pOwnerName = "<Vacant>";
689  pRange->pPhysical = NULL;
690  pRange->begin = 0;
691  pRange->end = addrLast[i];
692  ellAdd (&addrFree[i], &pRange->node);
693  }
694  epicsMutexUnlock(addrListLock);
695  devLibInitFlag = TRUE;
696  return pdevLibVirtualOS->pDevInit();
697 }
698 
699 /*
700  * devAddressMap()
701  */
702 long devAddressMap2(void)
703 {
704  return devListAddressMap(addrAlloc);
705 }
706 
707 /*
708  * devListAddressMap()
709  */
710 static long devListAddressMap(ELLLIST *pRangeList)
711 {
712  rangeItem *pri;
713  int i;
714 
715  if (!devLibInitFlag) {
716  long s = devLibInit ();
717  if (s) {
718  return s;
719  }
720  }
721  errlogFlush();
722 
723  epicsMutexMustLock(addrListLock);
724  for (i=0; i<NELEMENTS(addrAlloc); i++) {
725  pri = (rangeItem *) ellFirst(&pRangeList[i]);
726  if (pri) {
727  errlogPrintf ("%s Address Map\n", epicsAddressTypeName[i]);
728  }
729  while (pri) {
730  errlogPrintf ("\t0X%0*lX - 0X%0*lX physical base %p %s\n",
731  addrHexDig[i],
732  (unsigned long) pri->begin,
733  addrHexDig[i],
734  (unsigned long) pri->end,
735  pri->pPhysical,
736  pri->pOwnerName);
737  pri = (rangeItem *) ellNext (&pri->node);
738  }
739  }
740  epicsMutexUnlock(addrListLock);
741 
742  return SUCCESS;
743 }
744 
745 
746 /*
747  *
748  * blockFind()
749  *
750  * Find unoccupied block in a large block
751  *
752  */
753 static long blockFind (
754  epicsAddressType addrType,
755  const rangeItem *pRange,
756  /* size needed */
757  size_t requestSize,
758  /* n ls bits zero in base addr */
759  unsigned alignment,
760  /* base address found */
761  size_t *pBase)
762 {
763  int s = SUCCESS;
764  size_t bb;
765  size_t mask;
766  size_t newBase;
767  size_t newSize;
768 
769  /*
770  * align the block base
771  */
772  mask = devCreateMask (alignment);
773  newBase = pRange->begin;
774  if ( mask & newBase ) {
775  newBase |= mask;
776  newBase++;
777  }
778 
779  if ( requestSize == 0) {
780  return S_dev_badRequest;
781  }
782 
783  /*
784  * align size of block
785  */
786  newSize = requestSize;
787  if (mask & newSize) {
788  newSize |= mask;
789  newSize++;
790  }
791 
792  if (pRange->end - pRange->begin + 1 < newSize) {
793  return S_dev_badRequest;
794  }
795 
796  bb = pRange->begin;
797  while (bb <= (pRange->end + 1) - newSize) {
798  s = devNoResponseProbe (addrType, bb, newSize);
799  if (s==SUCCESS) {
800  *pBase = bb;
801  return SUCCESS;
802  }
803  bb += newSize;
804  }
805 
806  return s;
807 }
808 
809 #include <epicsExport.h>
810 
811 void devReplaceVirtualOS(void)
812 {
813  pdevLibVirtualOS = pdevLibVME2;
814 }
815 
816 epicsExportRegistrar(devReplaceVirtualOS);
SUCCESS
#define SUCCESS
Definition: devLibVME.c:142
+
devAddressMap2
long devAddressMap2(void)
Definition: devLibVME.c:702
+
rangeItem::pPhysical
volatile void * pPhysical
Definition: devLibVME.c:82
+
epicsExportRegistrar
epicsExportRegistrar(devReplaceVirtualOS)
+
devRegisterAddress2
long devRegisterAddress2(const char *pOwnerName, epicsAddressType addrType, size_t base, size_t size, volatile void **ppPhysicalAddress)
Definition: devLibVME.c:198
+
pdevLibVirtualOS
devLibVirtualOS * pdevLibVirtualOS
Definition: devlib_dummy.c:86
+ +
devUnregisterAddress2
long devUnregisterAddress2(epicsAddressType addrType, size_t baseAddress, const char *pOwnerName)
Definition: devLibVME.c:432
+
pdevLibVME2
devLibVirtualOS * pdevLibVME2
+
rangeItem::end
size_t end
Definition: devLibVME.c:89
+
rangeItem::node
ELLNODE node
Definition: devLibVME.c:80
+
rangeItem::pOwnerName
const char * pOwnerName
Definition: devLibVME.c:81
+
devReplaceVirtualOS
void devReplaceVirtualOS(void)
Definition: devLibVME.c:811
+
devNoResponseProbe
long devNoResponseProbe(epicsAddressType addrType, size_t base, size_t size)
Definition: devlib_dummy.c:30
+
devBusToLocalAddr2
long devBusToLocalAddr2(epicsAddressType addrType, size_t busAddr, volatile void **ppLocalAddress)
Definition: devLibVME.c:147
+
devAllocAddress2
long devAllocAddress2(const char *pOwnerName, epicsAddressType addrType, size_t size, unsigned alignment, volatile void **pLocalAddress)
Definition: devLibVME.c:569
+
rangeItem::begin
size_t begin
Definition: devLibVME.c:88
+
epicsAddressTypeName
const char * epicsAddressTypeName[]
Definition: devlib_dummy.c:24
+
atLast
#define atLast
Definition: devLibVME.h:40
+
epicsAddressTypeName2
const char * epicsAddressTypeName2[]
Definition: devLibVME.c:71
+ +
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/dev_lib_v_m_e_8h.html b/dev_lib_v_m_e_8h.html new file mode 100644 index 0000000..73b06c2 --- /dev/null +++ b/dev_lib_v_m_e_8h.html @@ -0,0 +1,479 @@ + + + + + + + +devLib2: devLibVME.h File Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+Macros | +Functions | +Variables
+
+
devLibVME.h File Reference
+
+
+
#include "dbDefs.h"
+#include "osdVME.h"
+#include "errMdef.h"
+#include "shareLib.h"
+#include "devLib.h"
+
+

Go to the source code of this file.

+ + + + + + + + + + + + + + + + + + +

+Macros

#define atVMECSR   ((epicsAddressType)4)
 
#define atLast   ((epicsAddressType)5)
 
#define epicsAddressTypeName   epicsAddressTypeName2
 
#define devAddressMap   devAddressMap2
 
#define devBusToLocalAddr   devBusToLocalAddr2
 
#define devRegisterAddress   devRegisterAddress2
 
#define devUnregisterAddress   devUnregisterAddress2
 
#define devAllocAddress   devAllocAddress2
 
+ + + + + + + + + + + + + +

+Functions

epicsShareFunc long devAddressMap2 (void)
 
epicsShareFunc long devBusToLocalAddr2 (epicsAddressType addrType, size_t busAddr, volatile void **ppLocalAddr)
 
epicsShareFunc long devRegisterAddress2 (const char *pOwnerName, epicsAddressType addrType, size_t logicalBaseAddress, size_t size, volatile void **pPhysicalAddress)
 
epicsShareFunc long devUnregisterAddress2 (epicsAddressType addrType, size_t logicalBaseAddress, const char *pOwnerName)
 
epicsShareFunc long devAllocAddress2 (const char *pOwnerName, epicsAddressType addrType, size_t size, unsigned alignment, volatile void **pLocalAddress)
 
epicsShareFunc void devReplaceVirtualOS (void)
 
+ + + + + +

+Variables

epicsShareExtern const char * epicsAddressTypeName2 []
 
devLibVirtualOS * pdevLibVME2
 
+

Macro Definition Documentation

+ +

◆ atLast

+ +
+
+ + + + +
#define atLast   ((epicsAddressType)5)
+
+ +

Definition at line 40 of file devLibVME.h.

+ +
+
+ +

◆ atVMECSR

+ +
+
+ + + + +
#define atVMECSR   ((epicsAddressType)4)
+
+ +

Definition at line 39 of file devLibVME.h.

+ +
+
+ +

◆ devAddressMap

+ +
+
+ + + + +
#define devAddressMap   devAddressMap2
+
+ +

Definition at line 56 of file devLibVME.h.

+ +
+
+ +

◆ devAllocAddress

+ +
+
+ + + + +
#define devAllocAddress   devAllocAddress2
+
+ +

Definition at line 92 of file devLibVME.h.

+ +
+
+ +

◆ devBusToLocalAddr

+ +
+
+ + + + +
#define devBusToLocalAddr   devBusToLocalAddr2
+
+ +

Definition at line 67 of file devLibVME.h.

+ +
+
+ +

◆ devRegisterAddress

+ +
+
+ + + + +
#define devRegisterAddress   devRegisterAddress2
+
+ +

Definition at line 75 of file devLibVME.h.

+ +
+
+ +

◆ devUnregisterAddress

+ +
+
+ + + + +
#define devUnregisterAddress   devUnregisterAddress2
+
+ +

Definition at line 81 of file devLibVME.h.

+ +
+
+ +

◆ epicsAddressTypeName

+ +
+
+ + + + +
#define epicsAddressTypeName   epicsAddressTypeName2
+
+ +

Definition at line 47 of file devLibVME.h.

+ +
+
+

Function Documentation

+ +

◆ devAddressMap2()

+ +
+
+ + + + + + + + +
epicsShareFunc long devAddressMap2 (void )
+
+ +

Definition at line 702 of file devLibVME.c.

+ +
+
+ +

◆ devAllocAddress2()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc long devAllocAddress2 (const char * pOwnerName,
epicsAddressType addrType,
size_t size,
unsigned alignment,
volatile void ** pLocalAddress 
)
+
+ +

Definition at line 569 of file devLibVME.c.

+ +
+
+ +

◆ devBusToLocalAddr2()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc long devBusToLocalAddr2 (epicsAddressType addrType,
size_t busAddr,
volatile void ** ppLocalAddr 
)
+
+ +

Definition at line 147 of file devLibVME.c.

+ +
+
+ +

◆ devRegisterAddress2()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc long devRegisterAddress2 (const char * pOwnerName,
epicsAddressType addrType,
size_t logicalBaseAddress,
size_t size,
volatile void ** pPhysicalAddress 
)
+
+ +

Definition at line 198 of file devLibVME.c.

+ +
+
+ +

◆ devReplaceVirtualOS()

+ +
+
+ + + + + + + + +
epicsShareFunc void devReplaceVirtualOS (void )
+
+ +

Definition at line 87 of file devlib_compat.c.

+ +
+
+ +

◆ devUnregisterAddress2()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc long devUnregisterAddress2 (epicsAddressType addrType,
size_t logicalBaseAddress,
const char * pOwnerName 
)
+
+ +

Definition at line 432 of file devLibVME.c.

+ +
+
+

Variable Documentation

+ +

◆ epicsAddressTypeName2

+ +
+
+ + + + +
epicsShareExtern const char* epicsAddressTypeName2[]
+
+ +

Definition at line 46 of file devLibVME.h.

+ +
+
+ +

◆ pdevLibVME2

+ +
+
+ + + + +
devLibVirtualOS* pdevLibVME2
+
+ +
+
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/dev_lib_v_m_e_8h_source.html b/dev_lib_v_m_e_8h_source.html new file mode 100644 index 0000000..d5e1097 --- /dev/null +++ b/dev_lib_v_m_e_8h_source.html @@ -0,0 +1,65 @@ + + + + + + + +devLib2: devLibVME.h Source File + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+
devLibVME.h
+
+
+Go to the documentation of this file.
1 /*************************************************************************\
2 * Copyright (c) 2008 UChicago Argonne LLC, as Operator of Argonne
3 * National Laboratory.
4 * Copyright (c) 2002 The Regents of the University of California, as
5 * Operator of Los Alamos National Laboratory.
6 * EPICS BASE is distributed subject to a Software License Agreement found
7 * in file LICENSE that is included with this distribution.
8 \*************************************************************************/
9 
10 /*
11  * Compatibility overlay for devLib
12  *
13  * Provide updated interface (VME CSR).
14  * This is a stripped down version of devLib.h having
15  * only the interface functions which use the epicsAddressType
16  * enum (externally or internally).
17  *
18  */
19 
20 #ifndef INCdevLibVMEh
21 #define INCdevLibVMEh 1
22 
23 #include "dbDefs.h"
24 #include "osdVME.h"
25 #include "errMdef.h"
26 #include "shareLib.h"
27 #include "devLib.h"
28 
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32 
33 /*
34  * Earlier versions of EPICS may not implement CR/CSR addressing
35  * in base devLib. Make sure that we have a definition for atVMECSR
36  * and that atLast indicates the end of the devLib2 address tables.
37  */
38 
39 #define atVMECSR ((epicsAddressType)4)
40 #define atLast ((epicsAddressType)5)
41 
42 /*
43  * pointer to an array of strings for each of
44  * the VME address types
45  */
46 epicsShareExtern const char *epicsAddressTypeName2[];
47 #define epicsAddressTypeName epicsAddressTypeName2
48 
49 /*
50  * General API
51  *
52  * This section applies to all bus types
53  */
54 
55 epicsShareFunc long devAddressMap2(void); /* print an address map */
56 #define devAddressMap devAddressMap2
57 
58 /*
59  * devBusToLocalAddr()
60  *
61  * OSI routine to translate bus addresses their local CPU address mapping
62  */
63 epicsShareFunc long devBusToLocalAddr2 (
64  epicsAddressType addrType,
65  size_t busAddr,
66  volatile void **ppLocalAddr);
67 #define devBusToLocalAddr devBusToLocalAddr2
68 
69 epicsShareFunc long devRegisterAddress2(
70  const char *pOwnerName,
71  epicsAddressType addrType,
72  size_t logicalBaseAddress,
73  size_t size, /* bytes */
74  volatile void **pPhysicalAddress);
75 #define devRegisterAddress devRegisterAddress2
76 
77 epicsShareFunc long devUnregisterAddress2(
78  epicsAddressType addrType,
79  size_t logicalBaseAddress,
80  const char *pOwnerName);
81 #define devUnregisterAddress devUnregisterAddress2
82 
83 /*
84  * allocate and register an unoccupied address block
85  */
86 epicsShareFunc long devAllocAddress2(
87  const char *pOwnerName,
88  epicsAddressType addrType,
89  size_t size,
90  unsigned alignment, /*n ls bits zero in addr*/
91  volatile void **pLocalAddress);
92 #define devAllocAddress devAllocAddress2
93 
94 extern devLibVirtualOS *pdevLibVME2;
95 epicsShareFunc void devReplaceVirtualOS(void);
96 
97 #ifdef __cplusplus
98 }
99 #endif
100 
101 #endif /* INCdevLibVMEh.h*/
devReplaceVirtualOS
epicsShareFunc void devReplaceVirtualOS(void)
Definition: devlib_compat.c:87
+
devRegisterAddress2
epicsShareFunc long devRegisterAddress2(const char *pOwnerName, epicsAddressType addrType, size_t logicalBaseAddress, size_t size, volatile void **pPhysicalAddress)
Definition: devLibVME.c:198
+
pdevLibVME2
devLibVirtualOS * pdevLibVME2
+
devAddressMap2
epicsShareFunc long devAddressMap2(void)
Definition: devLibVME.c:702
+
devBusToLocalAddr2
epicsShareFunc long devBusToLocalAddr2(epicsAddressType addrType, size_t busAddr, volatile void **ppLocalAddr)
Definition: devLibVME.c:147
+
devAllocAddress2
epicsShareFunc long devAllocAddress2(const char *pOwnerName, epicsAddressType addrType, size_t size, unsigned alignment, volatile void **pLocalAddress)
Definition: devLibVME.c:569
+
devUnregisterAddress2
epicsShareFunc long devUnregisterAddress2(epicsAddressType addrType, size_t logicalBaseAddress, const char *pOwnerName)
Definition: devLibVME.c:432
+
epicsAddressTypeName2
epicsShareExtern const char * epicsAddressTypeName2[]
Definition: devLibVME.h:46
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/devcsr_8c.html b/devcsr_8c.html new file mode 100644 index 0000000..983a218 --- /dev/null +++ b/devcsr_8c.html @@ -0,0 +1,104 @@ + + + + + + + +devLib2: devcsr.c File Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+Macros | +Functions
+
+
devcsr.c File Reference
+
+
+
#include <stdio.h>
+#include <errlog.h>
+#include "devLib.h"
+#include "devcsr.h"
+
+

Go to the source code of this file.

+ + + + +

+Macros

#define epicsExportSharedSymbols
 
+ + + + + + + + + + + + + +

+Functions

volatile unsigned char * devCSRProbeSlot (int slot)
 Get the CSR base address for a slot. More...
 
volatile unsigned char * devCSRTestSlot (const struct VMECSRID *devs, int slot, struct VMECSRID *info)
 Probe a VME slot then check its ID. More...
 
void vmecsrprint (int N, int v)
 Decode contents of CSR/CR and print to screen. More...
 
void vmecsrdump (int v)
 Decode contents of CSR/CR for all cards and print to screen. More...
 
+

Macro Definition Documentation

+ +

◆ epicsExportSharedSymbols

+ +
+
+ + + + +
#define epicsExportSharedSymbols
+
+ +

Definition at line 15 of file devcsr.c.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/devcsr_8c_source.html b/devcsr_8c_source.html new file mode 100644 index 0000000..392bf49 --- /dev/null +++ b/devcsr_8c_source.html @@ -0,0 +1,113 @@ + + + + + + + +devLib2: devcsr.c Source File + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+
devcsr.c
+
+
+Go to the documentation of this file.
1 /*************************************************************************\
2 * Copyright (c) 2010 Brookhaven Science Associates, as Operator of
3 * Brookhaven National Laboratory.
4 * devLib2 is distributed subject to a Software License Agreement found
5 * in file LICENSE that is included with this distribution.
6 \*************************************************************************/
7 /*
8  * Author: Michael Davidsaver <mdavidsaver@gmail.com>
9  */
10 
11 #include <stdio.h>
12 
13 #include <errlog.h>
14 #include "devLib.h"
15 #define epicsExportSharedSymbols
16 #include "devcsr.h"
17 
18 volatile unsigned char* devCSRProbeSlot(int slot)
19 {
20  volatile unsigned char* addr;
21  char cr[3];
22 
23  if(slot<0 || slot>VMECSRSLOTMAX){
24  errlogPrintf("VME slot number out of range\n");
25  return NULL;
26  }
27 
28  if( devBusToLocalAddr(
29  atVMECSR,
30  CSRSlotBase(slot),
31  (volatile void**)(void*)&addr) )
32  {
33 
34  errlogPrintf("Failed to map slot %d to CR/CSR address 0x%08lx\n",slot,
35  (unsigned long)CSRSlotBase(slot));
36  return NULL;
37  }
38 
39  if( devReadProbe(1, addr+CR_ASCII_C, &cr[0]) ){
40  errlogPrintf("No card in slot %d\n",slot);
41  return NULL;
42  }
43 
44  cr[1]=*(addr+CR_ASCII_R);
45  cr[2]='\0';
46 
47  if( cr[0]!='C' || cr[1]!='R' ){
48  errlogPrintf("Card in slot %d has non-standard CR layout. Ignoring...\n",slot);
49  return NULL;
50  }
51 
52  return addr;
53 }
54 
55 /*
56  * @return 0 Not match
57  * @return 1 Match
58  */
59 static
60 int csrMatch(const struct VMECSRID* A, const struct VMECSRID* B)
61 {
62  if( A->vendor!=B->vendor &&
63  A->vendor!=VMECSRANY &&
64  B->vendor!=VMECSRANY
65  )
66  return 0;
67 
68  if( A->board!=B->board &&
69  A->board!=VMECSRANY &&
70  B->board!=VMECSRANY
71  )
72  return 0;
73 
74  if( A->revision!=B->revision &&
75  A->revision!=VMECSRANY &&
76  B->revision!=VMECSRANY
77  )
78  return 0;
79 
80  return 1;
81 }
82 
83 volatile unsigned char* devCSRTestSlot(
84  const struct VMECSRID* devs,
85  int slot,
86  struct VMECSRID* info
87  )
88 {
89  struct VMECSRID test;
90  volatile unsigned char* addr=devCSRProbeSlot(slot);
91 
92  if(!addr) return addr;
93 
94  test.vendor=CSRRead24(addr + CR_IEEE_OUI);
95  test.board=CSRRead32(addr + CR_BOARD_ID);
96  test.revision=CSRRead32(addr + CR_REVISION_ID);
97 
98  for(; devs && devs->vendor; devs++){
99  if(csrMatch(devs,&test)){
100  if(!!info){
101  info->vendor=test.vendor;
102  info->board=test.board;
103  info->revision=test.revision;
104  }
105  return addr;
106  }
107  }
108 
109  return NULL;
110 }
111 
112 /* Decode contents of CSR/CR and print to screen.
113  *
114  * v=0 - basic identification info (vendor/board id)
115  * v=1 - config/capability info
116  * v=2 - hex dump of start of CR
117  */
118 
119 void vmecsrprint(int N,int v)
120 {
121  volatile unsigned char* addr;
122  char ctrlsts=0;
123  int space;
124 
125  if( N<0 || N>=32 ){
126  errlogPrintf("Slot number of of range (1-31)\n");
127  return;
128  }
129 
130  errlogPrintf("====== Slot %d\n",N);
131 
132  addr=devCSRProbeSlot(N);
133  if(!addr) return;
134 
135  if(v>=2){
136  unsigned i;
137  for(i=0;i<512;i++){
138  if(i%16==0) {
139  printf("%04x: ",i);
140  }
141 
142  printf("%02x", ((int)*(addr+i))&0xff);
143 
144  if(i%16==15)
145  printf("\n");
146  else if(i%4==3)
147  printf(" ");
148  }
149  }
150 
151  if(v>=1){
152  errlogPrintf("ROM Checksum : 0x%02x\n",CSRRead8(addr + CR_ROM_CHECKSUM));
153  errlogPrintf("ROM Length : 0x%06x\n",CSRRead24(addr + CR_ROM_LENGTH));
154  errlogPrintf("CR data width: 0x%02x\n",CSRRead8(addr + CR_DATA_ACCESS_WIDTH));
155  errlogPrintf("CSR data width:0x%02x\n",CSRRead8(addr + CSR_DATA_ACCESS_WIDTH));
156  }
157 
158  space=CSRRead8(addr + CR_SPACE_ID);
159  errlogPrintf("CR space id: ");
160  if(space==1)
161  errlogPrintf("VME64\n");
162  else if(space==2)
163  errlogPrintf("VME64x\n");
164  else
165  errlogPrintf("Unknown (0x%02x)\n",space);
166 
167  errlogFlush();
168 
169  if(space>=1){
170  errlogPrintf("Vendor ID : 0x%06x\n",CSRRead24(addr + CR_IEEE_OUI));
171  errlogPrintf("Board ID : 0x%08x\n",CSRRead32(addr + CR_BOARD_ID));
172  errlogPrintf("Revision ID : 0x%08x\n",CSRRead32(addr + CR_REVISION_ID));
173  errlogPrintf("Program ID : 0x%02x\n",CSRRead8(addr + CR_PROGRAM_ID));
174 
175  errlogPrintf("CSR Bar : 0x%02x\n",CSRRead8(addr + CSR_BAR));
176  ctrlsts=CSRRead8(addr + CSR_BIT_SET);
177  errlogPrintf("CSR CS : 0x%02x\n",ctrlsts);
178  errlogPrintf("CSR Reset : %s\n",(ctrlsts&CSR_BITSET_RESET_MODE)?"Yes":"No");
179  errlogPrintf("CSR Sysfail : %s\n",(ctrlsts&CSR_BITSET_SYSFAIL_ENA)?"Yes":"No");
180  errlogPrintf("CSR Fail : %s\n",(ctrlsts&CSR_BITSET_MODULE_FAIL)?"Yes":"No");
181  errlogPrintf("CSR Enabled : %s\n",(ctrlsts&CSR_BITSET_MODULE_ENA)?"Yes":"No");
182  errlogPrintf("CSR Bus Err : %s\n",(ctrlsts&CSR_BITSET_BERR)?"Yes":"No");
183  }
184 
185  if(space>=2){
186  unsigned i;
187  errlogPrintf("User CR : %08x -> %08x\n",
188  CSRRead24(addr + CR_BEG_UCR),CSRRead24(addr + CR_END_UCR));
189  errlogPrintf("User CSR : %08x -> %08x\n",
190  CSRRead24(addr + CR_BEG_UCSR),CSRRead24(addr + CR_END_UCSR));
191  errlogPrintf("CSR Owned : %s\n",(ctrlsts&CSR_BITSET_CRAM_OWNED)?"Yes":"No");
192  errlogPrintf("Owner : 0x%02x\n",CSRRead8(addr + CSR_CRAM_OWNER));
193  errlogPrintf("User bits : 0x%02x\n",CSRRead8(addr + CSR_UD_BIT_SET));
194  errlogPrintf("Serial Number: 0x");
195  for(i=CR_BEG_SN; i<=CR_END_SN; i+=4)
196  errlogPrintf("%02x",CSRRead8(addr + i));
197  errlogPrintf("\n");
198  if(v>=1){
199  errlogFlush();
200  errlogPrintf("Master Cap. : 0x%02x\n",CSRRead16(addr + CR_MASTER_CHAR));
201  errlogPrintf("Slave Cap. : 0x%02x\n",CSRRead16(addr + CR_SLAVE_CHAR));
202  errlogPrintf("IRQ Sink Cap.: 0x%02x\n",CSRRead8(addr + CR_IRQ_HANDLER_CAP));
203  errlogPrintf("IRQ Src Cap. : 0x%02x\n",CSRRead8(addr + CR_IRQ_CAP));
204  errlogPrintf("CRAM data width:0x%02x\n",CSRRead8(addr + CR_CRAM_WIDTH));
205  for(i=0;i<8;i++){
206  unsigned j;
207  size_t ader;
208  errlogPrintf("Function %d\n",i);
209  errlogPrintf(" Data width: %02x\n",CSRRead8(addr + CR_FN_DAWPR(i)));
210  errlogPrintf(" Data AM : ");
211  for(j=0;j<0x20;j+=4)
212  errlogPrintf("%02x",CSRRead8(addr + CR_FN_AMCAP(i) + j));
213  errlogPrintf("\n");
214  errlogPrintf(" Data XAM : ");
215  for(j=0;j<0x80;j+=4)
216  errlogPrintf("%02x",CSRRead8(addr + CR_FN_XAMCAP(i) + j));
217  errlogPrintf("\n");
218  errlogPrintf(" Data ADEM : ");
219  for(j=0;j<0x10;j+=4)
220  errlogPrintf("%02x",CSRRead8(addr + CR_FN_ADEM(i) + j));
221  errlogPrintf("\n");
222  ader=CSRRead32(addr + CSR_FN_ADER(i));
223  errlogPrintf(" Data ADER : Base %08x Mod %02x\n",
224  (unsigned int)ader&0xFfffFf00,(int)(ader&0xff)>>2);
225  }
226  }
227  }
228 
229  return;
230 }
231 
232 
233 void vmecsrdump(int v)
234 {
235  int i;
236  errlogFlush();
237 
238  errlogPrintf(">>> CSR/CR Dump\n");
239 
240  for(i=0;i<22;i++) {
241  vmecsrprint(i,v);
242  errlogFlush();
243  }
244 
245  errlogPrintf(">>> CSR/CR Dump End\n");
246  return;
247 }
CR_IEEE_OUI
#define CR_IEEE_OUI
IEEE Organizationally Unique Identifier (OUI)
Definition: devcsr.h:225
+
CR_ROM_CHECKSUM
#define CR_ROM_CHECKSUM
8-bit checksum of Configuration ROM space
Definition: devcsr.h:216
+
CSR_BITSET_BERR
#define CSR_BITSET_BERR
Module has asserted a Bus Error.
Definition: devcsr.h:317
+
CSR_BAR
#define CSR_BAR
Base Address Register (MSB of our CR/CSR address)
Definition: devcsr.h:296
+
devBusToLocalAddr
#define devBusToLocalAddr
Definition: devLibVME.h:67
+
CSR_DATA_ACCESS_WIDTH
#define CSR_DATA_ACCESS_WIDTH
Control/Status Reg area (CSR) data access method.
Definition: devcsr.h:219
+
CR_FN_ADEM
#define CR_FN_ADEM(N)
Start of Address Decoder Mask (ADEM) registers.
Definition: devcsr.h:275
+
VMECSRID::vendor
epicsUInt32 vendor
Definition: devcsr.h:59
+
CR_BEG_SN
#define CR_BEG_SN
Offset to beginning of board serial number.
Definition: devcsr.h:246
+
CSRRead16
#define CSRRead16(addr)
Definition: devcsr.h:144
+ +
CR_ROM_LENGTH
#define CR_ROM_LENGTH
Number of bytes in Configuration ROM to checksum.
Definition: devcsr.h:217
+
CR_SLAVE_CHAR
#define CR_SLAVE_CHAR
Board&#39;s slave-mode characteristics.
Definition: devcsr.h:249
+
CR_ASCII_R
#define CR_ASCII_R
ASCII "R" (identifies this as CR space)
Definition: devcsr.h:223
+
CSR_UD_BIT_SET
#define CSR_UD_BIT_SET
User-Defined Bit Set Register (for user-defined fns)
Definition: devcsr.h:303
+
CR_ASCII_C
#define CR_ASCII_C
ASCII "C" (identifies this as CR space)
Definition: devcsr.h:222
+
CSRSlotBase
#define CSRSlotBase(slot)
Derives the CSR space base address for a slot.
Definition: devcsr.h:130
+
VMECSRANY
#define VMECSRANY
Match any value. May be used in any field of VMECSRID.
Definition: devcsr.h:66
+
vmecsrprint
void vmecsrprint(int N, int v)
Decode contents of CSR/CR and print to screen.
Definition: devcsr.c:119
+
CSRRead24
#define CSRRead24(addr)
Definition: devcsr.h:146
+
CSR_BITSET_CRAM_OWNED
#define CSR_BITSET_CRAM_OWNED
CRAM is owned.
Definition: devcsr.h:318
+
CR_END_SN
#define CR_END_SN
Offset to end of board serial number.
Definition: devcsr.h:247
+
devCSRTestSlot
volatile unsigned char * devCSRTestSlot(const struct VMECSRID *devs, int slot, struct VMECSRID *info)
Probe a VME slot then check its ID.
Definition: devcsr.c:83
+
CR_IRQ_CAP
#define CR_IRQ_CAP
Interrupt levels board can assert.
Definition: devcsr.h:256
+
CR_END_UCSR
#define CR_END_UCSR
Offset to end of manufacturer-defined CSR space.
Definition: devcsr.h:244
+
CSR_BITSET_RESET_MODE
#define CSR_BITSET_RESET_MODE
Module is in reset mode.
Definition: devcsr.h:313
+
VMECSRID
ID info for a VME64(x) device This structure is used to hold identifying information for a VME64 comp...
Definition: devcsr.h:58
+
CR_SPACE_ID
#define CR_SPACE_ID
CR/CSR space ID (VME64, VME64X, etc).
Definition: devcsr.h:220
+
CSR_BITSET_MODULE_ENA
#define CSR_BITSET_MODULE_ENA
Module is enabled.
Definition: devcsr.h:316
+
CR_DATA_ACCESS_WIDTH
#define CR_DATA_ACCESS_WIDTH
Configuration ROM area (CR) data access method.
Definition: devcsr.h:218
+
CR_REVISION_ID
#define CR_REVISION_ID
Manufacturer&#39;s board revision ID.
Definition: devcsr.h:229
+
devCSRProbeSlot
volatile unsigned char * devCSRProbeSlot(int slot)
Get the CSR base address for a slot.
Definition: devcsr.c:18
+
VMECSRSLOTMAX
#define VMECSRSLOTMAX
The highest slot number.
Definition: devcsr.h:69
+
CR_BEG_UCSR
#define CR_BEG_UCSR
Offset to start of manufacturer-defined CSR space.
Definition: devcsr.h:243
+
VMECSRID::board
epicsUInt32 board
Definition: devcsr.h:59
+
atVMECSR
#define atVMECSR
Definition: devLibVME.h:39
+
CR_CRAM_WIDTH
#define CR_CRAM_WIDTH
Configuration RAM (CRAM) data access method)
Definition: devcsr.h:258
+
CSRRead32
#define CSRRead32(addr)
Definition: devcsr.h:148
+
CSR_BITSET_SYSFAIL_ENA
#define CSR_BITSET_SYSFAIL_ENA
SYSFAIL driver is enabled.
Definition: devcsr.h:314
+
CSR_BITSET_MODULE_FAIL
#define CSR_BITSET_MODULE_FAIL
Module has failed.
Definition: devcsr.h:315
+
CR_BOARD_ID
#define CR_BOARD_ID
Manufacturer&#39;s board ID.
Definition: devcsr.h:227
+
CR_FN_DAWPR
#define CR_FN_DAWPR(N)
Start of Data Access Width Parameter (DAWPR) regs.
Definition: devcsr.h:260
+
CR_FN_XAMCAP
#define CR_FN_XAMCAP(N)
Start of Extended Address Mode Cap (XAMCAP) registers.
Definition: devcsr.h:270
+
CSR_FN_ADER
#define CSR_FN_ADER(N)
Function N Address Decoder Compare Register (1st byte)
Definition: devcsr.h:305
+
CR_BEG_UCR
#define CR_BEG_UCR
Offset to start of manufacturer-defined CR space.
Definition: devcsr.h:236
+
CR_FN_AMCAP
#define CR_FN_AMCAP(N)
Start of Address Mode Capability (AMCAP) registers.
Definition: devcsr.h:265
+
CSRRead8
#define CSRRead8(addr)
Definition: devcsr.h:142
+
vmecsrdump
void vmecsrdump(int v)
Decode contents of CSR/CR for all cards and print to screen.
Definition: devcsr.c:233
+
CSR_CRAM_OWNER
#define CSR_CRAM_OWNER
Configuration RAM Owner Register (0 = not owned)
Definition: devcsr.h:302
+
CR_MASTER_CHAR
#define CR_MASTER_CHAR
Board&#39;s master-mode characteristics.
Definition: devcsr.h:252
+
CR_PROGRAM_ID
#define CR_PROGRAM_ID
Program ID code for CR space.
Definition: devcsr.h:232
+
CSR_BIT_SET
#define CSR_BIT_SET
Bit Set Register (writing a 1 sets the control bit)
Definition: devcsr.h:297
+
VMECSRID::revision
epicsUInt32 revision
Definition: devcsr.h:59
+
CR_IRQ_HANDLER_CAP
#define CR_IRQ_HANDLER_CAP
Interrupt levels board can respond to (handle)
Definition: devcsr.h:255
+
devReadProbe
long devReadProbe(unsigned wordSize, volatile const void *ptr, void *pValueRead)
Definition: devlib_dummy.c:28
+
CR_END_UCR
#define CR_END_UCR
Offset to end of manufacturer-defined CR space.
Definition: devcsr.h:237
+
+ +
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+ + diff --git a/devcsr_8h.html b/devcsr_8h.html new file mode 100644 index 0000000..11fd096 --- /dev/null +++ b/devcsr_8h.html @@ -0,0 +1,303 @@ + + + + + + + +devLib2: devcsr.h File Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+Data Structures | +Macros | +Functions
+
+
devcsr.h File Reference
+
+
+
#include <epicsVersion.h>
+#include "devLib.h"
+#include <epicsTypes.h>
+#include "epicsMMIO.h"
+#include "vmedefs.h"
+#include <shareLib.h>
+
+

Go to the source code of this file.

+ + + + + +

+Data Structures

struct  VMECSRID
 ID info for a VME64(x) device This structure is used to hold identifying information for a VME64 compatible device. When used for searching each field can hold a specific value of the 'VMECSRANY' wildcard. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define DEVLIBVME_MAJOR   1
 API major version. More...
 
#define DEVLIBVME_MINOR   0
 API minor version. More...
 
#define VMECSR_END   {0,0,0}
 Must be the last entry in a device list. More...
 
#define VMECSRANY   0xFfffFfff
 Match any value. May be used in any field of VMECSRID. More...
 
#define VMECSRSLOTMAX   ((1<<5)-1)
 The highest slot number. More...
 
#define CSRSlotBase(slot)   ( (slot)<<19 )
 Derives the CSR space base address for a slot. More...
 
#define CSRADER(addr, mod)   ( ((addr)&0xFfffFf00) | ( ((mod)&0x3f)<<2 ) )
 Computes values for the VME64x address decode registers (ADER). More...
 
#define CSRRead8(addr)   ioread8(addr)
 
#define CSRRead16(addr)   ( CSRRead8(addr)<<8 | CSRRead8(addr+4) )
 
#define CSRRead24(addr)   ( CSRRead16(addr)<<8 | CSRRead8(addr+8) )
 
#define CSRRead32(addr)   ( CSRRead24(addr)<<8 | CSRRead8(addr+12) )
 
#define CSRWrite8(addr, val)   iowrite8(addr, val)
 
#define CSRWrite16(addr, val)   do{ CSRWrite8(addr,(val&0xff00)>>8); CSRWrite8(addr+4,val&0xff); }while(0)
 
#define CSRWrite24(addr, val)   do{ CSRWrite16(addr,(val&0xffff00)>>8); CSRWrite8(addr+8,val&0xff); }while(0)
 
#define CSRWrite32(addr, val)   do{ CSRWrite24(addr,(val&0xffffff00)>>8); CSRWrite8(addr+12,val&0xff); }while(0)
 
#define CR_ROM_CHECKSUM   0x0003
 8-bit checksum of Configuration ROM space More...
 
#define CR_ROM_LENGTH   0x0007
 Number of bytes in Configuration ROM to checksum. More...
 
#define CR_DATA_ACCESS_WIDTH   0x0013
 Configuration ROM area (CR) data access method. More...
 
#define CSR_DATA_ACCESS_WIDTH   0x0017
 Control/Status Reg area (CSR) data access method. More...
 
#define CR_SPACE_ID   0x001B
 CR/CSR space ID (VME64, VME64X, etc). More...
 
#define CR_ASCII_C   0x001F
 ASCII "C" (identifies this as CR space) More...
 
#define CR_ASCII_R   0x0023
 ASCII "R" (identifies this as CR space) More...
 
#define CR_IEEE_OUI   0x0027
 IEEE Organizationally Unique Identifier (OUI) More...
 
#define CR_IEEE_OUI_BYTES   3
 Number of bytes in manufacturer's OUI. More...
 
#define CR_BOARD_ID   0x0033
 Manufacturer's board ID. More...
 
#define CR_BOARD_ID_BYTES   4
 Number of bytes in manufacturer's OUI. More...
 
#define CR_REVISION_ID   0x0043
 Manufacturer's board revision ID. More...
 
#define CR_REVISION_ID_BYTES   4
 Number of bytes in board revision ID. More...
 
#define CR_ASCII_STRING   0x0053
 Offset to ASCII string (manufacturer-specific) More...
 
#define CR_PROGRAM_ID   0x007F
 Program ID code for CR space. More...
 
#define CR_BEG_UCR   0x0083
 Offset to start of manufacturer-defined CR space. More...
 
#define CR_END_UCR   0x008F
 Offset to end of manufacturer-defined CR space. More...
 
#define CR_BEG_UCSR_BYTES   3
 Number of bytes in User CSR starting offset. More...
 
#define CR_BEG_CRAM   0x009B
 Offset to start of Configuration RAM (CRAM) space. More...
 
#define CR_END_CRAM   0x00A7
 Offset to end of Configuration RAM (CRAM) space. More...
 
#define CR_BEG_UCSR   0x00B3
 Offset to start of manufacturer-defined CSR space. More...
 
#define CR_END_UCSR   0x00BF
 Offset to end of manufacturer-defined CSR space. More...
 
#define CR_BEG_SN   0x00CB
 Offset to beginning of board serial number. More...
 
#define CR_END_SN   0x00DF
 Offset to end of board serial number. More...
 
#define CR_SLAVE_CHAR   0x00E3
 Board's slave-mode characteristics. More...
 
#define CR_UD_SLAVE_CHAR   0x00E7
 Manufacturer-defined slave-mode characteristics. More...
 
#define CR_MASTER_CHAR   0x00EB
 Board's master-mode characteristics. More...
 
#define CR_UD_MASTER_CHAR   0x00EF
 Manufacturer-defined master-mode characteristics. More...
 
#define CR_IRQ_HANDLER_CAP   0x00F3
 Interrupt levels board can respond to (handle) More...
 
#define CR_IRQ_CAP   0x00F7
 Interrupt levels board can assert. More...
 
#define CR_CRAM_WIDTH   0x00FF
 Configuration RAM (CRAM) data access method) More...
 
#define CR_FN_DAWPR(N)   ( 0x0103 + (N)*0x04 ) /* N = 0 -> 7 */
 Start of Data Access Width Parameter (DAWPR) regs. More...
 
#define CR_DAWPR_BYTES   1 /* Number of bytes in a DAWPR register */
 
#define CR_FN_AMCAP(N)   ( 0x0123 + (N)*0x20 ) /* N = 0 -> 7 */
 Start of Address Mode Capability (AMCAP) registers. More...
 
#define CR_AMCAP_BYTES   8 /* Number of bytes in an AMCAP register */
 
#define CR_FN_XAMCAP(N)   ( 0x0223 + (N)*0x80 ) /* N = 0 -> 7 */
 Start of Extended Address Mode Cap (XAMCAP) registers. More...
 
#define CR_XAMCAP_BYTES   32 /* Number of bytes in an XAMCAP register */
 
#define CR_FN_ADEM(N)   ( 0x0623 + (N)*0x10 ) /* N = 0 -> 7 */
 Start of Address Decoder Mask (ADEM) registers. More...
 
#define CR_ADEM_BYTES   4 /* Number of bytes in an ADEM register */
 
#define CR_MASTER_DAWPR   0x06AF
 Master Data Access Width Parameter. More...
 
#define CR_MASTER_AMCAP   0x06B3
 Master Address Mode Capabilities (8 entries) More...
 
#define CR_MASTER_XAMCAP   0x06D3
 Master Extended Address Mode Capabilities (8 entries) More...
 
#define CR_SIZE   0x0750
 Size of CR space (in total bytes) More...
 
#define CR_BYTES   (CR_SIZE>>2)
 Number of bytes in CR space. More...
 
#define CSR_BAR   0x7ffff
 Base Address Register (MSB of our CR/CSR address) More...
 
#define CSR_BIT_SET   0x7fffb
 Bit Set Register (writing a 1 sets the control bit) More...
 
#define CSR_BIT_CLEAR   0x7fff7
 Bit Clear Register (writing a 1 clears the control bit) More...
 
#define CSR_CRAM_OWNER   0x7fff3
 Configuration RAM Owner Register (0 = not owned) More...
 
#define CSR_UD_BIT_SET   0x7ffef
 User-Defined Bit Set Register (for user-defined fns) More...
 
#define CSR_UD_BIT_CLEAR   0x7ffeb
 User-Defined Bit Clear Register (for user-defined fns) More...
 
#define CSR_FN_ADER(N)   (0x7ff63 + (N)*0x10) /* N = 0 -> 7 */
 Function N Address Decoder Compare Register (1st byte) More...
 
#define CSR_ADER_BYTES   4 /* Number of bytes in an ADER register */
 
#define CSR_BITSET_RESET_MODE   0x80
 Module is in reset mode. More...
 
#define CSR_BITSET_SYSFAIL_ENA   0x40
 SYSFAIL driver is enabled. More...
 
#define CSR_BITSET_MODULE_FAIL   0x20
 Module has failed. More...
 
#define CSR_BITSET_MODULE_ENA   0x10
 Module is enabled. More...
 
#define CSR_BITSET_BERR   0x08
 Module has asserted a Bus Error. More...
 
#define CSR_BITSET_CRAM_OWNED   0x04
 CRAM is owned. More...
 
+ + + + + + + + + + + + + + + + +

+Functions

epicsShareFunc volatile unsigned char * devCSRProbeSlot (int slot)
 Get the CSR base address for a slot. More...
 
epicsShareFunc volatile unsigned char * devCSRTestSlot (const struct VMECSRID *devs, int slot, struct VMECSRID *info)
 Probe a VME slot then check its ID. More...
 
epicsShareExtern void vmecsrprint (int N, int verb)
 Decode contents of CSR/CR and print to screen. More...
 
epicsShareExtern void vmecsrdump (int verb)
 Decode contents of CSR/CR for all cards and print to screen. More...
 
INLINE void CSRSetBase (volatile void *base, epicsUInt8 N, epicsUInt32 addr, epicsUInt8 amod)
 Set base address for VME64x function N. More...
 
+
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+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/devcsr_8h_source.html b/devcsr_8h_source.html new file mode 100644 index 0000000..d57ac2f --- /dev/null +++ b/devcsr_8h_source.html @@ -0,0 +1,72 @@ + + + + + + + +devLib2: devcsr.h Source File + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
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+ + + + + + + +
+
+
+
devcsr.h
+
+
+Go to the documentation of this file.
1 /*************************************************************************\
2 * Copyright (c) 2010 Brookhaven Science Associates, as Operator of
3 * Brookhaven National Laboratory.
4 * Copyright (c) 2006 The University of Chicago,
5 * as Operator of Argonne National Laboratory.
6 * Copyright (c) 2006 The Regents of the University of California,
7 * as Operator of Los Alamos National Laboratory.
8 * Copyright (c) 2006 The Board of Trustees of the Leland Stanford Junior
9 * University, as Operator of the Stanford Linear Accelerator Center.
10 * devLib2 is distributed subject to a Software License Agreement found
11 * in file LICENSE that is included with this distribution.
12 \*************************************************************************/
13 /*
14  * Author: Michael Davidsaver <mdavidsaver@gmail.com>
15  */
16 
17 #ifndef DEVLIBCSR_H
18 #define DEVLIBCSR_H 1
19 
28 #include <epicsVersion.h>
29 
30 #if EPICS_VERSION==3 && EPICS_REVISION==14 && EPICS_MODIFICATION<10
31 # include "devLibVME.h"
32 #else
33 # include "devLib.h"
34 #endif
35 
36 #include <epicsTypes.h>
37 #include "epicsMMIO.h"
38 #include "vmedefs.h"
39 
40 #include <shareLib.h>
41 
42 #ifdef __cplusplus
43 extern "C" {
44 
45 # ifndef INLINE
46 # define INLINE inline
47 # endif
48 #endif
49 
50 #define DEVLIBVME_MAJOR 1
51 #define DEVLIBVME_MINOR 0
58 struct VMECSRID {
59  epicsUInt32 vendor,board,revision;
60 };
61 
63 #define VMECSR_END {0,0,0}
64 
66 #define VMECSRANY 0xFfffFfff
67 
69 #define VMECSRSLOTMAX ((1<<5)-1)
70 
86 epicsShareFunc
87 volatile unsigned char* devCSRProbeSlot(int slot);
88 
116 epicsShareFunc
117 volatile unsigned char* devCSRTestSlot(
118  const struct VMECSRID* devs,
119  int slot,
120  struct VMECSRID* info
121 );
122 
130 #define CSRSlotBase(slot) ( (slot)<<19 )
131 
137 #define CSRADER(addr,mod) ( ((addr)&0xFfffFf00) | ( ((mod)&0x3f)<<2 ) )
138 
139 /* Read/Write CR for standard sizes
140  */
141 
142 #define CSRRead8(addr) ioread8(addr)
143 
144 #define CSRRead16(addr) ( CSRRead8(addr)<<8 | CSRRead8(addr+4) )
145 
146 #define CSRRead24(addr) ( CSRRead16(addr)<<8 | CSRRead8(addr+8) )
147 
148 #define CSRRead32(addr) ( CSRRead24(addr)<<8 | CSRRead8(addr+12) )
149 
150 #define CSRWrite8(addr,val) iowrite8(addr, val)
151 
152 #define CSRWrite16(addr,val) \
153 do{ CSRWrite8(addr,(val&0xff00)>>8); CSRWrite8(addr+4,val&0xff); }while(0)
154 
155 #define CSRWrite24(addr,val) \
156 do{ CSRWrite16(addr,(val&0xffff00)>>8); CSRWrite8(addr+8,val&0xff); }while(0)
157 
158 #define CSRWrite32(addr,val) \
159 do{ CSRWrite24(addr,(val&0xffffff00)>>8); CSRWrite8(addr+12,val&0xff); }while(0)
160 
161 /*
162  * Utility functions
163  */
164 
174 epicsShareExtern void vmecsrprint(int N,int verb);
175 
182 epicsShareExtern void vmecsrdump(int verb);
183 
210 /**************************************************************************************************/
211 /* CR/CSR Configuration ROM (CR) Register Definitions */
212 /**************************************************************************************************/
213 
214 /* VME64 required CR registers */
215 
216 #define CR_ROM_CHECKSUM 0x0003
217 #define CR_ROM_LENGTH 0x0007
218 #define CR_DATA_ACCESS_WIDTH 0x0013
219 #define CSR_DATA_ACCESS_WIDTH 0x0017
220 #define CR_SPACE_ID 0x001B
222 #define CR_ASCII_C 0x001F
223 #define CR_ASCII_R 0x0023
225 #define CR_IEEE_OUI 0x0027
226 #define CR_IEEE_OUI_BYTES 3
227 #define CR_BOARD_ID 0x0033
228 #define CR_BOARD_ID_BYTES 4
229 #define CR_REVISION_ID 0x0043
230 #define CR_REVISION_ID_BYTES 4
231 #define CR_ASCII_STRING 0x0053
232 #define CR_PROGRAM_ID 0x007F
234 /* VME64x required CR registers */
235 
236 #define CR_BEG_UCR 0x0083
237 #define CR_END_UCR 0x008F
238 #define CR_BEG_UCSR_BYTES 3
240 #define CR_BEG_CRAM 0x009B
241 #define CR_END_CRAM 0x00A7
243 #define CR_BEG_UCSR 0x00B3
244 #define CR_END_UCSR 0x00BF
246 #define CR_BEG_SN 0x00CB
247 #define CR_END_SN 0x00DF
249 #define CR_SLAVE_CHAR 0x00E3
250 #define CR_UD_SLAVE_CHAR 0x00E7
252 #define CR_MASTER_CHAR 0x00EB
253 #define CR_UD_MASTER_CHAR 0x00EF
255 #define CR_IRQ_HANDLER_CAP 0x00F3
256 #define CR_IRQ_CAP 0x00F7
258 #define CR_CRAM_WIDTH 0x00FF
260 #define CR_FN_DAWPR(N) ( 0x0103 + (N)*0x04 ) /* N = 0 -> 7 */
261 
262 #define CR_DAWPR_BYTES 1 /* Number of bytes in a DAWPR register */
263 
264 #define CR_FN_AMCAP(N) ( 0x0123 + (N)*0x20 ) /* N = 0 -> 7 */
265 
266 #define CR_AMCAP_BYTES 8 /* Number of bytes in an AMCAP register */
267 
268 #define CR_FN_XAMCAP(N) ( 0x0223 + (N)*0x80 ) /* N = 0 -> 7 */
269 
270 #define CR_XAMCAP_BYTES 32 /* Number of bytes in an XAMCAP register */
271 
272 #define CR_FN_ADEM(N) ( 0x0623 + (N)*0x10 ) /* N = 0 -> 7 */
273 
274 #define CR_ADEM_BYTES 4 /* Number of bytes in an ADEM register */
275 
276 #define CR_MASTER_DAWPR 0x06AF
277 #define CR_MASTER_AMCAP 0x06B3
278 #define CR_MASTER_XAMCAP 0x06D3
280 /*---------------------
281  * Size (in total bytes) of CR space
282  */
283 #define CR_SIZE 0x0750
284 #define CR_BYTES (CR_SIZE>>2)
286 /**************************************************************************************************/
287 /* CR/CSR Control and Status Register (CSR) Offsets */
288 /**************************************************************************************************/
289 
290 /* VME64 required CSR registers */
291 
292 #define CSR_BAR 0x7ffff
293 #define CSR_BIT_SET 0x7fffb
294 #define CSR_BIT_CLEAR 0x7fff7
296 /* VME64x required CSR registers */
297 
298 #define CSR_CRAM_OWNER 0x7fff3
299 #define CSR_UD_BIT_SET 0x7ffef
300 #define CSR_UD_BIT_CLEAR 0x7ffeb
301 #define CSR_FN_ADER(N) (0x7ff63 + (N)*0x10) /* N = 0 -> 7 */
302 
303 #define CSR_ADER_BYTES 4 /* Number of bytes in an ADER register */
304 
305 /*---------------------
306  * Bit offset definitions for the Bit Set Status Register
307  */
308 #define CSR_BITSET_RESET_MODE 0x80
309 #define CSR_BITSET_SYSFAIL_ENA 0x40
310 #define CSR_BITSET_MODULE_FAIL 0x20
311 #define CSR_BITSET_MODULE_ENA 0x10
312 #define CSR_BITSET_BERR 0x08
313 #define CSR_BITSET_CRAM_OWNED 0x04
316 /* Common things to set in CSR
317  */
318 
328 INLINE
329 void
330 CSRSetBase(volatile void* base, epicsUInt8 N, epicsUInt32 addr, epicsUInt8 amod)
331 {
332  volatile char* ptr=(volatile char*)base;
333  if (N>7) return;
334  CSRWrite32((ptr) + CSR_FN_ADER(N), CSRADER(addr,amod) );
335 }
336 
337 #ifdef __cplusplus
338 } /* extern "C" */
339 #endif
340 
341 #endif /* DEVLIBCSR_H */
+
VMECSRID::vendor
epicsUInt32 vendor
Definition: devcsr.h:59
+
CSRSetBase
INLINE void CSRSetBase(volatile void *base, epicsUInt8 N, epicsUInt32 addr, epicsUInt8 amod)
Set base address for VME64x function N.
Definition: devcsr.h:335
+
vmecsrprint
epicsShareExtern void vmecsrprint(int N, int verb)
Decode contents of CSR/CR and print to screen.
Definition: devcsr.c:119
+
devCSRTestSlot
epicsShareFunc volatile unsigned char * devCSRTestSlot(const struct VMECSRID *devs, int slot, struct VMECSRID *info)
Probe a VME slot then check its ID.
Definition: devcsr.c:83
+
VMECSRID
ID info for a VME64(x) device This structure is used to hold identifying information for a VME64 comp...
Definition: devcsr.h:58
+
devCSRProbeSlot
epicsShareFunc volatile unsigned char * devCSRProbeSlot(int slot)
Get the CSR base address for a slot.
Definition: devcsr.c:18
+
VMECSRID::board
epicsUInt32 board
Definition: devcsr.h:59
+
CSRWrite32
#define CSRWrite32(addr, val)
Definition: devcsr.h:158
+
CSR_FN_ADER
#define CSR_FN_ADER(N)
Function N Address Decoder Compare Register (1st byte)
Definition: devcsr.h:305
+
vmecsrdump
epicsShareExtern void vmecsrdump(int verb)
Decode contents of CSR/CR for all cards and print to screen.
Definition: devcsr.c:233
+
VMECSRID::revision
epicsUInt32 revision
Definition: devcsr.h:59
+
CSRADER
#define CSRADER(addr, mod)
Computes values for the VME64x address decode registers (ADER).
Definition: devcsr.h:137
+ + +
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/devlib__compat_8c.html b/devlib__compat_8c.html new file mode 100644 index 0000000..f47919e --- /dev/null +++ b/devlib__compat_8c.html @@ -0,0 +1,155 @@ + + + + + + + +devLib2: devlib_compat.c File Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+Macros | +Functions
+
+
devlib_compat.c File Reference
+
+
+
#include <stdlib.h>
+#include <epicsVersion.h>
+#include <devLib.h>
+#include "devlibversion.h"
+#include <shareLib.h>
+#include <epicsExport.h>
+
+

Go to the source code of this file.

+ + + + + + +

+Macros

#define epicsExportSharedSymbols
 
#define NEED_IFACE
 
+ + + + + +

+Functions

void devReplaceVirtualOS (void)
 
 epicsExportRegistrar (devReplaceVirtualOS)
 
+

Macro Definition Documentation

+ +

◆ epicsExportSharedSymbols

+ +
+
+ + + + +
#define epicsExportSharedSymbols
+
+ +

Definition at line 18 of file devlib_compat.c.

+ +
+
+ +

◆ NEED_IFACE

+ +
+
+ + + + +
#define NEED_IFACE
+
+ +

Definition at line 29 of file devlib_compat.c.

+ +
+
+

Function Documentation

+ +

◆ devReplaceVirtualOS()

+ +
+
+ + + + + + + + +
void devReplaceVirtualOS (void )
+
+ +

Definition at line 87 of file devlib_compat.c.

+ +
+
+ +

◆ epicsExportRegistrar()

+ +
+
+ + + + + + + + +
epicsExportRegistrar (devReplaceVirtualOS )
+
+ +
+
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/devlib__compat_8c_source.html b/devlib__compat_8c_source.html new file mode 100644 index 0000000..027022b --- /dev/null +++ b/devlib__compat_8c_source.html @@ -0,0 +1,64 @@ + + + + + + + +devLib2: devlib_compat.c Source File + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+
devlib_compat.c
+
+
+Go to the documentation of this file.
1 /*************************************************************************\
2 * Copyright (c) 2010 Brookhaven Science Associates, as Operator of
3 * Brookhaven National Laboratory.
4 * devLib2 is distributed subject to a Software License Agreement found
5 * in file LICENSE that is included with this distribution.
6 \*************************************************************************/
7 /*
8  * Author: Michael Davidsaver <mdavidsaver@gmail.com>
9  */
10 
11 #include <stdlib.h>
12 
13 #include <epicsVersion.h>
14 #include <devLib.h>
15 
16 #include "devlibversion.h"
17 
18 #define epicsExportSharedSymbols
19 #include <shareLib.h>
20 
21 #if defined(__rtems__)
22 # if !defined(__PPC__) && !defined(__mcf528x__)
23 # define NEED_IFACE
24 # define NEED_PIMPL
25 # endif
26 #elif defined(vxWorks)
27 /* nothing needed */
28 #else
29 # define NEED_IFACE
30 #endif
31 
32 #ifdef NEED_IFACE
33 
34 #if EPICS_VERSION_INT<VERSION_INT(3,14,12,0)
35 /*
36  * Most devlib function go through an indirection table with a null
37  * implimentation provided for systems which doen't impliment some
38  * functionality. However, the functions below don't use this table.
39  *
40  * For most functions we can use the deprecated API, but before 3.14.12
41  * no wrapper for devInterruptInUseVME() was provided so can't implement
42  * that one
43  */
44 
45 long devEnableInterruptLevelVME (unsigned vectorNumber)
46 {
47  return devEnableInterruptLevel(intVME, vectorNumber);
48 }
49 
50 long devConnectInterruptVME (
51  unsigned vectorNumber,
52  void (*pFunction)(void *),
53  void *parameter)
54 {
55  return devConnectInterrupt(intVME,vectorNumber, pFunction, parameter);
56 }
57 
58 long devDisconnectInterruptVME (
59  unsigned vectorNumber,
60  void (*pFunction)(void *))
61 {
62  return devDisconnectInterrupt(intVME, vectorNumber, pFunction);
63 }
64 
65 int devInterruptInUseVME (unsigned vectorNumber)
66 {
67  return -1; /* Not implemented in Base <= 3.14.11 */
68 }
69 #endif /* EPICS < 3.14.12 */
70 
71 
72 #endif /* NEED_IFACE */
73 
74 #ifdef NEED_PIMPL
75 
76 #if EPICS_VERSION_INT<VERSION_INT(3,14,12,0)
77 devLibVirtualOS *pdevLibVirtualOS = NULL;
78 #else
79 devLibVME *pdevLibVirtualOS = NULL;
80 #endif
81 
82 #endif /* NEED_PIMPL */
83 
84 #if EPICS_VERSION_INT>=VERSION_INT(3,14,10,0)
85 #include <epicsExport.h>
86 
87 void devReplaceVirtualOS(void)
88 {
89  /* not needed after 3.14.9 */
90 }
91 
92 epicsExportRegistrar(devReplaceVirtualOS);
93 #endif
devEnableInterruptLevel
long devEnableInterruptLevel(epicsInterruptType intType, unsigned level)
Definition: devlib_dummy.c:76
+ +
epicsExportRegistrar
epicsExportRegistrar(devReplaceVirtualOS)
+
pdevLibVirtualOS
devLibVirtualOS * pdevLibVirtualOS
Definition: devlib_dummy.c:86
+
devReplaceVirtualOS
void devReplaceVirtualOS(void)
Definition: devlib_compat.c:87
+
devConnectInterrupt
long devConnectInterrupt(epicsInterruptType intType, unsigned vectorNumber, void(*pFunction)(void *), void *parameter)
Definition: devlib_dummy.c:65
+
devDisconnectInterrupt
long devDisconnectInterrupt(epicsInterruptType intType, unsigned vectorNumber, void(*pFunction)(void *))
Definition: devlib_dummy.c:71
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/devlib__dummy_8c.html b/devlib__dummy_8c.html new file mode 100644 index 0000000..340ce7a --- /dev/null +++ b/devlib__dummy_8c.html @@ -0,0 +1,689 @@ + + + + + + + +devLib2: devlib_dummy.c File Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+Functions | +Variables
+
+
devlib_dummy.c File Reference
+
+
+
#include <string.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <devLib.h>
+
+

Go to the source code of this file.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

long devAddressMap (void)
 
long devReadProbe (unsigned wordSize, volatile const void *ptr, void *pValueRead)
 
long devNoResponseProbe (epicsAddressType addrType, size_t base, size_t size)
 
long devWriteProbe (unsigned wordSize, volatile void *ptr, const void *pValueWritten)
 
long devRegisterAddress (const char *pOwnerName, epicsAddressType addrType, size_t logicalBaseAddress, size_t size, volatile void **pPhysicalAddress)
 
long devUnregisterAddress (epicsAddressType addrType, size_t logicalBaseAddress, const char *pOwnerName)
 
long devAllocAddress (const char *pOwnerName, epicsAddressType addrType, size_t size, unsigned alignment, volatile void **pLocalAddress)
 
long devDisableInterruptLevelVME (unsigned level)
 
void * devLibA24Malloc (size_t l)
 
void * devLibA24Calloc (size_t l)
 
void devLibA24Free (void *pBlock)
 
long devConnectInterrupt (epicsInterruptType intType, unsigned vectorNumber, void(*pFunction)(void *), void *parameter)
 
long devDisconnectInterrupt (epicsInterruptType intType, unsigned vectorNumber, void(*pFunction)(void *))
 
long devEnableInterruptLevel (epicsInterruptType intType, unsigned level)
 
long devDisableInterruptLevel (epicsInterruptType intType, unsigned level)
 
long locationProbe (epicsAddressType addrType, char *pLocation)
 
void bcopyLongs (char *source, char *destination, int nlongs)
 
+ + + + + +

+Variables

const char * epicsAddressTypeName [] = {"","","","","",""}
 
devLibVirtualOS * pdevLibVirtualOS =NULL
 
+

Function Documentation

+ +

◆ bcopyLongs()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
void bcopyLongs (char * source,
char * destination,
int nlongs 
)
+
+ +

Definition at line 83 of file devlib_dummy.c.

+ +
+
+ +

◆ devAddressMap()

+ +
+
+ + + + + + + + +
long devAddressMap (void )
+
+ +

Definition at line 26 of file devlib_dummy.c.

+ +
+
+ +

◆ devAllocAddress()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
long devAllocAddress (const char * pOwnerName,
epicsAddressType addrType,
size_t size,
unsigned alignment,
volatile void ** pLocalAddress 
)
+
+ +

Definition at line 51 of file devlib_dummy.c.

+ +
+
+ +

◆ devConnectInterrupt()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
long devConnectInterrupt (epicsInterruptType intType,
unsigned vectorNumber,
void(*)(void *) pFunction,
void * parameter 
)
+
+ +

Definition at line 65 of file devlib_dummy.c.

+ +
+
+ +

◆ devDisableInterruptLevel()

+ +
+
+ + + + + + + + + + + + + + + + + + +
long devDisableInterruptLevel (epicsInterruptType intType,
unsigned level 
)
+
+ +

Definition at line 78 of file devlib_dummy.c.

+ +
+
+ +

◆ devDisableInterruptLevelVME()

+ +
+
+ + + + + + + + +
long devDisableInterruptLevelVME (unsigned level)
+
+ +

Definition at line 59 of file devlib_dummy.c.

+ +
+
+ +

◆ devDisconnectInterrupt()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
long devDisconnectInterrupt (epicsInterruptType intType,
unsigned vectorNumber,
void(*)(void *) pFunction 
)
+
+ +

Definition at line 71 of file devlib_dummy.c.

+ +
+
+ +

◆ devEnableInterruptLevel()

+ +
+
+ + + + + + + + + + + + + + + + + + +
long devEnableInterruptLevel (epicsInterruptType intType,
unsigned level 
)
+
+ +

Definition at line 76 of file devlib_dummy.c.

+ +
+
+ +

◆ devLibA24Calloc()

+ +
+
+ + + + + + + + +
void* devLibA24Calloc (size_t l)
+
+ +

Definition at line 62 of file devlib_dummy.c.

+ +
+
+ +

◆ devLibA24Free()

+ +
+
+ + + + + + + + +
void devLibA24Free (void * pBlock)
+
+ +

Definition at line 63 of file devlib_dummy.c.

+ +
+
+ +

◆ devLibA24Malloc()

+ +
+
+ + + + + + + + +
void* devLibA24Malloc (size_t l)
+
+ +

Definition at line 61 of file devlib_dummy.c.

+ +
+
+ +

◆ devNoResponseProbe()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
long devNoResponseProbe (epicsAddressType addrType,
size_t base,
size_t size 
)
+
+ +

Definition at line 30 of file devlib_dummy.c.

+ +
+
+ +

◆ devReadProbe()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
long devReadProbe (unsigned wordSize,
volatile const void * ptr,
void * pValueRead 
)
+
+ +

Definition at line 28 of file devlib_dummy.c.

+ +
+
+ +

◆ devRegisterAddress()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
long devRegisterAddress (const char * pOwnerName,
epicsAddressType addrType,
size_t logicalBaseAddress,
size_t size,
volatile void ** pPhysicalAddress 
)
+
+ +

Definition at line 39 of file devlib_dummy.c.

+ +
+
+ +

◆ devUnregisterAddress()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
long devUnregisterAddress (epicsAddressType addrType,
size_t logicalBaseAddress,
const char * pOwnerName 
)
+
+ +

Definition at line 46 of file devlib_dummy.c.

+ +
+
+ +

◆ devWriteProbe()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
long devWriteProbe (unsigned wordSize,
volatile void * ptr,
const void * pValueWritten 
)
+
+ +

Definition at line 36 of file devlib_dummy.c.

+ +
+
+ +

◆ locationProbe()

+ +
+
+ + + + + + + + + + + + + + + + + + +
long locationProbe (epicsAddressType addrType,
char * pLocation 
)
+
+ +

Definition at line 80 of file devlib_dummy.c.

+ +
+
+

Variable Documentation

+ +

◆ epicsAddressTypeName

+ +
+
+ + + + +
const char* epicsAddressTypeName[] = {"","","","","",""}
+
+ +

Definition at line 24 of file devlib_dummy.c.

+ +
+
+ +

◆ pdevLibVirtualOS

+ +
+
+ + + + +
devLibVirtualOS* pdevLibVirtualOS =NULL
+
+ +

Definition at line 86 of file devlib_dummy.c.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/devlib__dummy_8c_source.html b/devlib__dummy_8c_source.html new file mode 100644 index 0000000..abbb3d4 --- /dev/null +++ b/devlib__dummy_8c_source.html @@ -0,0 +1,76 @@ + + + + + + + +devLib2: devlib_dummy.c Source File + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+
devlib_dummy.c
+
+
+Go to the documentation of this file.
1 /*************************************************************************\
2 * Copyright (c) 2010 Brookhaven Science Associates, as Operator of
3 * Brookhaven National Laboratory.
4 * devLib2 is distributed subject to a Software License Agreement found
5 * in file LICENSE that is included with this distribution.
6 \*************************************************************************/
7 /*
8  * Author: Michael Davidsaver <mdavidsaver@gmail.com>
9  */
10 
11 #include <string.h>
12 #include <stdio.h>
13 #include <stdlib.h>
14 
15 #include <devLib.h>
16 
17 /*
18  * Before 3.14.9 there was not default implementation of devLib
19  * so host builds were not possible.
20  *
21  * add a null implementation
22  */
23 
24 const char *epicsAddressTypeName[] = {"","","","","",""};
25 
26 long devAddressMap(void) {return -1;}
27 
28 long devReadProbe (unsigned wordSize, volatile const void *ptr, void *pValueRead) {return -1;}
29 
30 long devNoResponseProbe(
31  epicsAddressType addrType,
32  size_t base,
33  size_t size
34 ) {return -1;}
35 
36 long devWriteProbe (unsigned wordSize, volatile void *ptr, const void *pValueWritten) {return -1;}
37 
38 
39 long devRegisterAddress(
40  const char *pOwnerName,
41  epicsAddressType addrType,
42  size_t logicalBaseAddress,
43  size_t size, /* bytes */
44  volatile void **pPhysicalAddress) {return -1;}
45 
46 long devUnregisterAddress(
47  epicsAddressType addrType,
48  size_t logicalBaseAddress,
49  const char *pOwnerName) {return -1;}
50 
51 long devAllocAddress(
52  const char *pOwnerName,
53  epicsAddressType addrType,
54  size_t size,
55  unsigned alignment, /*n ls bits zero in addr*/
56  volatile void **pLocalAddress) {return -1;}
57 
58 
59 long devDisableInterruptLevelVME (unsigned level) {return -1;}
60 
61 void *devLibA24Malloc(size_t l) {return NULL;}
62 void *devLibA24Calloc(size_t l) {return NULL;}
63 void devLibA24Free(void *pBlock) {}
64 
65 long devConnectInterrupt(
66  epicsInterruptType intType,
67  unsigned vectorNumber,
68  void (*pFunction)(void *),
69  void *parameter) {return -1;}
70 
71 long devDisconnectInterrupt(
72  epicsInterruptType intType,
73  unsigned vectorNumber,
74  void (*pFunction)(void *)) {return -1;}
75 
76 long devEnableInterruptLevel(epicsInterruptType intType, unsigned level) {return -1;}
77 
78 long devDisableInterruptLevel (epicsInterruptType intType, unsigned level) {return -1;}
79 
80 long locationProbe (epicsAddressType addrType, char *pLocation) {return -1;}
81 
82 #ifndef vxWorks
83 void bcopyLongs(char *source, char *destination, int nlongs) {}
84 #endif
85 
86 devLibVirtualOS *pdevLibVirtualOS=NULL;
devRegisterAddress
long devRegisterAddress(const char *pOwnerName, epicsAddressType addrType, size_t logicalBaseAddress, size_t size, volatile void **pPhysicalAddress)
Definition: devlib_dummy.c:39
+
devEnableInterruptLevel
long devEnableInterruptLevel(epicsInterruptType intType, unsigned level)
Definition: devlib_dummy.c:76
+
pdevLibVirtualOS
devLibVirtualOS * pdevLibVirtualOS
Definition: devlib_dummy.c:86
+
devLibA24Malloc
void * devLibA24Malloc(size_t l)
Definition: devlib_dummy.c:61
+
devUnregisterAddress
long devUnregisterAddress(epicsAddressType addrType, size_t logicalBaseAddress, const char *pOwnerName)
Definition: devlib_dummy.c:46
+
devLibA24Calloc
void * devLibA24Calloc(size_t l)
Definition: devlib_dummy.c:62
+
devDisableInterruptLevelVME
long devDisableInterruptLevelVME(unsigned level)
Definition: devlib_dummy.c:59
+
devAllocAddress
long devAllocAddress(const char *pOwnerName, epicsAddressType addrType, size_t size, unsigned alignment, volatile void **pLocalAddress)
Definition: devlib_dummy.c:51
+
devNoResponseProbe
long devNoResponseProbe(epicsAddressType addrType, size_t base, size_t size)
Definition: devlib_dummy.c:30
+
devLibA24Free
void devLibA24Free(void *pBlock)
Definition: devlib_dummy.c:63
+
epicsAddressTypeName
const char * epicsAddressTypeName[]
Definition: devlib_dummy.c:24
+
devConnectInterrupt
long devConnectInterrupt(epicsInterruptType intType, unsigned vectorNumber, void(*pFunction)(void *), void *parameter)
Definition: devlib_dummy.c:65
+
devAddressMap
long devAddressMap(void)
Definition: devlib_dummy.c:26
+
devDisableInterruptLevel
long devDisableInterruptLevel(epicsInterruptType intType, unsigned level)
Definition: devlib_dummy.c:78
+
devDisconnectInterrupt
long devDisconnectInterrupt(epicsInterruptType intType, unsigned vectorNumber, void(*pFunction)(void *))
Definition: devlib_dummy.c:71
+
locationProbe
long locationProbe(epicsAddressType addrType, char *pLocation)
Definition: devlib_dummy.c:80
+
bcopyLongs
void bcopyLongs(char *source, char *destination, int nlongs)
Definition: devlib_dummy.c:83
+
devWriteProbe
long devWriteProbe(unsigned wordSize, volatile void *ptr, const void *pValueWritten)
Definition: devlib_dummy.c:36
+
devReadProbe
long devReadProbe(unsigned wordSize, volatile const void *ptr, void *pValueRead)
Definition: devlib_dummy.c:28
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/devlibversion_8h.html b/devlibversion_8h.html new file mode 100644 index 0000000..09f004f --- /dev/null +++ b/devlibversion_8h.html @@ -0,0 +1,129 @@ + + + + + + + +devLib2: devlibversion.h File Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+Macros
+
+
devlibversion.h File Reference
+
+
+
#include <epicsVersion.h>
+
+

Go to the source code of this file.

+ + + + + + +

+Macros

#define VERSION_INT(V, R, M, P)   ( ((V)<<24) | ((R)<<16) | ((M)<<8) | (P))
 
#define EPICS_VERSION_INT   VERSION_INT(EPICS_VERSION, EPICS_REVISION, EPICS_MODIFICATION, EPICS_PATCH_LEVEL)
 
+

Macro Definition Documentation

+ +

◆ EPICS_VERSION_INT

+ +
+
+ + + + +
#define EPICS_VERSION_INT   VERSION_INT(EPICS_VERSION, EPICS_REVISION, EPICS_MODIFICATION, EPICS_PATCH_LEVEL)
+
+ +

Definition at line 8 of file devlibversion.h.

+ +
+
+ +

◆ VERSION_INT

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
#define VERSION_INT( V,
 R,
 M,
 P 
)   ( ((V)<<24) | ((R)<<16) | ((M)<<8) | (P))
+
+ +

Definition at line 7 of file devlibversion.h.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/devlibversion_8h_source.html b/devlibversion_8h_source.html new file mode 100644 index 0000000..c2fd72d --- /dev/null +++ b/devlibversion_8h_source.html @@ -0,0 +1,57 @@ + + + + + + + +devLib2: devlibversion.h Source File + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
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+
+
+
devlibversion.h
+
+
+Go to the documentation of this file.
1 #ifndef DEVLIBVERSION_H
2 #define DEVLIBVERSION_H
3 
4 #include <epicsVersion.h>
5 
6 #ifndef VERSION_INT
7 # define VERSION_INT(V,R,M,P) ( ((V)<<24) | ((R)<<16) | ((M)<<8) | (P))
8 # define EPICS_VERSION_INT VERSION_INT(EPICS_VERSION, EPICS_REVISION, EPICS_MODIFICATION, EPICS_PATCH_LEVEL)
9 #endif
10 
11 #endif // DEVLIBVERSION_H
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/dir_2976ee4f147f272cae6cc1fcb9a979f4.html b/dir_2976ee4f147f272cae6cc1fcb9a979f4.html new file mode 100644 index 0000000..dfe5a89 --- /dev/null +++ b/dir_2976ee4f147f272cae6cc1fcb9a979f4.html @@ -0,0 +1,70 @@ + + + + + + + +devLib2: common Directory Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+
common Directory Reference
+
+
+ + + + +

+Directories

directory  os
 
+ + + + + +

+Files

file  devlibversion.h [code]
 
file  epicsEndian.h [code]
 
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/dir_4a2464d699097f87a3d185216afae503.html b/dir_4a2464d699097f87a3d185216afae503.html new file mode 100644 index 0000000..a4e1691 --- /dev/null +++ b/dir_4a2464d699097f87a3d185216afae503.html @@ -0,0 +1,69 @@ + + + + + + + +devLib2: documentation Directory Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
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+
+
+
documentation Directory Reference
+
+
+ + + + + + + + + + +

+Files

file  explore.h [code]
 
file  linux.h [code]
 
file  mainpage.h [code]
 
file  usage.h [code]
 
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/dir_8af83c0dc83a45a35ca6968cdc29a7af.html b/dir_8af83c0dc83a45a35ca6968cdc29a7af.html new file mode 100644 index 0000000..715e675 --- /dev/null +++ b/dir_8af83c0dc83a45a35ca6968cdc29a7af.html @@ -0,0 +1,63 @@ + + + + + + + +devLib2: tmp Directory Reference + + + + + + +
+
+ + + + + + +
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+Directories

directory  devlib2
 
+
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+ background-position: 0 -5px; + height:30px; + line-height:30px; + color:#8AA0CC; + border:solid 1px #C2CDE4; + overflow:hidden; + margin:0px; + padding:0px; +} + +.navpath li +{ + list-style-type:none; + float:left; + padding-left:10px; + padding-right:15px; + background-image:url('bc_s.png'); + background-repeat:no-repeat; + background-position:right; + color:#364D7C; +} + +.navpath li.navelem a +{ + height:32px; + display:block; + text-decoration: none; + outline: none; + color: #283A5D; + font-family: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + text-decoration: none; +} + +.navpath li.navelem a:hover +{ + color:#6884BD; +} + +.navpath li.footer +{ + list-style-type:none; + float:right; + padding-left:10px; + padding-right:15px; + background-image:none; + background-repeat:no-repeat; + background-position:right; + color:#364D7C; + font-size: 8pt; +} + + +div.summary +{ + float: right; + font-size: 8pt; + padding-right: 5px; + width: 50%; + text-align: right; +} + +div.summary a +{ + white-space: nowrap; +} + +table.classindex +{ + margin: 10px; + white-space: nowrap; + margin-left: 3%; + margin-right: 3%; + width: 94%; + border: 0; + border-spacing: 0; + padding: 0; +} + +div.ingroups +{ + font-size: 8pt; + width: 50%; + text-align: left; +} + +div.ingroups a +{ + white-space: nowrap; +} + +div.header +{ + background-image:url('nav_h.png'); + background-repeat:repeat-x; + background-color: #F9FAFC; + margin: 0px; + border-bottom: 1px solid #C4CFE5; +} + +div.headertitle +{ + padding: 5px 5px 5px 10px; +} + +dl +{ + padding: 0 0 0 10px; +} + +/* dl.note, dl.warning, dl.attention, dl.pre, dl.post, dl.invariant, dl.deprecated, dl.todo, dl.test, dl.bug */ +dl.section +{ + margin-left: 0px; + padding-left: 0px; +} + +dl.note +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #D0C000; +} + +dl.warning, dl.attention +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #FF0000; +} + +dl.pre, dl.post, dl.invariant +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00D000; +} + +dl.deprecated +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #505050; +} + +dl.todo +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00C0E0; +} + +dl.test +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #3030E0; +} + +dl.bug +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #C08050; +} + +dl.section dd { + margin-bottom: 6px; +} + + +#projectlogo +{ + text-align: center; + vertical-align: bottom; + border-collapse: separate; +} + +#projectlogo img +{ + border: 0px none; +} + +#projectalign +{ + vertical-align: middle; +} + +#projectname +{ + font: 300% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 2px 0px; +} + +#projectbrief +{ + font: 120% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#projectnumber +{ + font: 50% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#titlearea +{ + padding: 0px; + margin: 0px; + width: 100%; + border-bottom: 1px solid #5373B4; +} + +.image +{ + text-align: center; +} + +.dotgraph +{ + text-align: center; +} + +.mscgraph +{ + text-align: center; +} + +.plantumlgraph +{ + text-align: center; +} + +.diagraph +{ + text-align: center; +} + +.caption +{ + font-weight: bold; +} + +div.zoom +{ + border: 1px solid #90A5CE; +} + +dl.citelist { + margin-bottom:50px; +} + +dl.citelist dt { + color:#334975; + float:left; + font-weight:bold; + margin-right:10px; + padding:5px; +} + +dl.citelist dd { + margin:2px 0; + padding:5px 0; +} + +div.toc { + padding: 14px 25px; + background-color: #F4F6FA; + border: 1px solid #D8DFEE; + border-radius: 7px 7px 7px 7px; + float: right; + height: auto; + margin: 0 8px 10px 10px; + width: 200px; +} + +div.toc li { + background: url("bdwn.png") no-repeat scroll 0 5px transparent; + font: 10px/1.2 Verdana,DejaVu Sans,Geneva,sans-serif; + margin-top: 5px; + padding-left: 10px; + padding-top: 2px; +} + +div.toc h3 { + font: bold 12px/1.2 Arial,FreeSans,sans-serif; + color: #4665A2; + border-bottom: 0 none; + margin: 0; +} + +div.toc ul { + list-style: none outside none; + border: medium none; + padding: 0px; +} + +div.toc li.level1 { + margin-left: 0px; +} + +div.toc li.level2 { + margin-left: 15px; +} + +div.toc li.level3 { + margin-left: 30px; +} + +div.toc li.level4 { + margin-left: 45px; +} + +.inherit_header { + font-weight: bold; + color: gray; + cursor: pointer; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +.inherit_header td { + padding: 6px 0px 2px 5px; +} + +.inherit { + display: none; +} + +tr.heading h2 { + margin-top: 12px; + margin-bottom: 4px; +} + +/* tooltip related style info */ + +.ttc { + position: absolute; + display: none; +} + +#powerTip { + cursor: default; + white-space: nowrap; + background-color: white; + border: 1px solid gray; + border-radius: 4px 4px 4px 4px; + box-shadow: 1px 1px 7px gray; + display: none; + font-size: smaller; + max-width: 80%; + opacity: 0.9; + padding: 1ex 1em 1em; + position: absolute; + z-index: 2147483647; +} + +#powerTip div.ttdoc { + color: grey; + font-style: italic; +} + +#powerTip div.ttname a { + font-weight: bold; +} + +#powerTip div.ttname { + font-weight: bold; +} + +#powerTip div.ttdeci { + color: #006318; +} + +#powerTip div { + margin: 0px; + padding: 0px; + font: 12px/16px Roboto,sans-serif; +} + +#powerTip:before, #powerTip:after { + content: ""; + position: absolute; + margin: 0px; +} + +#powerTip.n:after, #powerTip.n:before, +#powerTip.s:after, #powerTip.s:before, +#powerTip.w:after, #powerTip.w:before, +#powerTip.e:after, #powerTip.e:before, +#powerTip.ne:after, #powerTip.ne:before, +#powerTip.se:after, #powerTip.se:before, +#powerTip.nw:after, #powerTip.nw:before, +#powerTip.sw:after, #powerTip.sw:before { + border: solid transparent; + content: " "; + height: 0; + width: 0; + position: absolute; +} + +#powerTip.n:after, #powerTip.s:after, +#powerTip.w:after, #powerTip.e:after, +#powerTip.nw:after, #powerTip.ne:after, +#powerTip.sw:after, #powerTip.se:after { + border-color: rgba(255, 255, 255, 0); +} + +#powerTip.n:before, #powerTip.s:before, +#powerTip.w:before, #powerTip.e:before, +#powerTip.nw:before, #powerTip.ne:before, +#powerTip.sw:before, #powerTip.se:before { + border-color: rgba(128, 128, 128, 0); +} + +#powerTip.n:after, #powerTip.n:before, +#powerTip.ne:after, #powerTip.ne:before, +#powerTip.nw:after, #powerTip.nw:before { + top: 100%; +} + +#powerTip.n:after, #powerTip.ne:after, #powerTip.nw:after { + border-top-color: #ffffff; + border-width: 10px; + margin: 0px -10px; +} +#powerTip.n:before { + border-top-color: #808080; + border-width: 11px; + margin: 0px -11px; +} +#powerTip.n:after, #powerTip.n:before { + left: 50%; +} + +#powerTip.nw:after, #powerTip.nw:before { + right: 14px; +} + +#powerTip.ne:after, #powerTip.ne:before { + left: 14px; +} + +#powerTip.s:after, #powerTip.s:before, +#powerTip.se:after, #powerTip.se:before, +#powerTip.sw:after, #powerTip.sw:before { + bottom: 100%; +} + +#powerTip.s:after, #powerTip.se:after, #powerTip.sw:after { + border-bottom-color: #ffffff; + border-width: 10px; + margin: 0px -10px; +} + +#powerTip.s:before, #powerTip.se:before, #powerTip.sw:before { + border-bottom-color: #808080; + border-width: 11px; + margin: 0px -11px; +} + +#powerTip.s:after, #powerTip.s:before { + left: 50%; +} + +#powerTip.sw:after, #powerTip.sw:before { + right: 14px; +} + +#powerTip.se:after, #powerTip.se:before { + left: 14px; +} + +#powerTip.e:after, #powerTip.e:before { + left: 100%; +} +#powerTip.e:after { + border-left-color: #ffffff; + border-width: 10px; + top: 50%; + margin-top: -10px; +} +#powerTip.e:before { + border-left-color: #808080; + border-width: 11px; + top: 50%; + margin-top: -11px; +} + +#powerTip.w:after, #powerTip.w:before { + right: 100%; +} +#powerTip.w:after { + border-right-color: #ffffff; + border-width: 10px; + top: 50%; + margin-top: -10px; +} +#powerTip.w:before { + border-right-color: #808080; + border-width: 11px; + top: 50%; + margin-top: -11px; +} + +@media print +{ + #top { display: none; } + #side-nav { display: none; } + #nav-path { display: none; } + body { overflow:visible; } + h1, h2, h3, h4, h5, h6 { page-break-after: avoid; } + .summary { display: none; } + .memitem { page-break-inside: avoid; } + #doc-content + { + margin-left:0 !important; + height:auto !important; + width:auto !important; + overflow:inherit; + display:inline; + } +} + +/* @group Markdown */ + +/* +table.markdownTable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.markdownTable td, table.markdownTable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.markdownTableHead tr { +} + +table.markdownTableBodyLeft td, table.markdownTable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +th.markdownTableHeadLeft th.markdownTableHeadRight th.markdownTableHeadCenter th.markdownTableHeadNone { + background-color: #374F7F; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +th.markdownTableHeadLeft { + text-align: left +} + +th.markdownTableHeadRight { + text-align: right +} + +th.markdownTableHeadCenter { + text-align: center +} +*/ + +table.markdownTable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.markdownTable td, table.markdownTable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.markdownTable tr { +} + +th.markdownTableHeadLeft, th.markdownTableHeadRight, th.markdownTableHeadCenter, th.markdownTableHeadNone { + background-color: #374F7F; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +th.markdownTableHeadLeft, td.markdownTableBodyLeft { + text-align: left +} + +th.markdownTableHeadRight, td.markdownTableBodyRight { + text-align: right +} + +th.markdownTableHeadCenter, td.markdownTableBodyCenter { + text-align: center +} + + +/* @end */ diff --git a/doxygen.png b/doxygen.png new file mode 100644 index 0000000..3ff17d8 Binary files /dev/null and b/doxygen.png differ diff --git a/epics_endian_8h.html b/epics_endian_8h.html new file mode 100644 index 0000000..5722978 --- /dev/null +++ b/epics_endian_8h.html @@ -0,0 +1,103 @@ + + + + + + + +devLib2: epicsEndian.h File Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+Macros
+
+
epicsEndian.h File Reference
+
+
+
#include "osdWireConfig.h"
+
+

Go to the source code of this file.

+ + + + + + +

+Macros

#define EPICS_ENDIAN_LITTLE   1234
 
#define EPICS_ENDIAN_BIG   4321
 
+

Macro Definition Documentation

+ +

◆ EPICS_ENDIAN_BIG

+ +
+
+ + + + +
#define EPICS_ENDIAN_BIG   4321
+
+ +

Definition at line 16 of file epicsEndian.h.

+ +
+
+ +

◆ EPICS_ENDIAN_LITTLE

+ +
+
+ + + + +
#define EPICS_ENDIAN_LITTLE   1234
+
+ +

Definition at line 15 of file epicsEndian.h.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/epics_endian_8h_source.html b/epics_endian_8h_source.html new file mode 100644 index 0000000..f7a6b3c --- /dev/null +++ b/epics_endian_8h_source.html @@ -0,0 +1,58 @@ + + + + + + + +devLib2: epicsEndian.h Source File + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+
epicsEndian.h
+
+
+Go to the documentation of this file.
1 /*************************************************************************\
2 * Copyright (c) 2007 UChicago Argonne LLC, as Operator of Argonne
3 * National Laboratory.
4 * Copyright (c) 2002 The Regents of the University of California, as
5 * Operator of Los Alamos National Laboratory.
6 * EPICS BASE is distributed subject to a Software License Agreement found
7 * in file LICENSE that is included with this distribution.
8 \*************************************************************************/
9 
10 #ifndef INC_epicsEndian_H
11 #define INC_epicsEndian_H
12 
13 /* This file must be usable from both C and C++ */
14 
15 #define EPICS_ENDIAN_LITTLE 1234
16 #define EPICS_ENDIAN_BIG 4321
17 
18 
19 /* The following OS Dependent file defines the macros
20  * EPICS_BYTE_ORDER and EPICS_FLOAT_WORD_ORDER to be
21  * one of the above EPICS_ENDIAN_ values.
22  */
23 
24 #include "osdWireConfig.h"
25 
26 #ifndef EPICS_BYTE_ORDER
27 #error osdWireConfig.h didnt define EPICS_BYTE_ORDER
28 #endif
29 
30 #ifndef EPICS_FLOAT_WORD_ORDER
31 #error osdWireConfig.h didnt define EPICS_FLOAT_WORD_ORDER
32 #endif
33 
34 #endif /* INC_epicsEndian_H */
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/epics_m_m_i_o_8h.html b/epics_m_m_i_o_8h.html new file mode 100644 index 0000000..5501003 --- /dev/null +++ b/epics_m_m_i_o_8h.html @@ -0,0 +1,60 @@ + + + + + + + +devLib2: epicsMMIO.h File Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+
epicsMMIO.h File Reference
+
+
+
#include "epicsMMIODef.h"
+
+

Go to the source code of this file.

+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/epics_m_m_i_o_8h_source.html b/epics_m_m_i_o_8h_source.html new file mode 100644 index 0000000..fae3707 --- /dev/null +++ b/epics_m_m_i_o_8h_source.html @@ -0,0 +1,58 @@ + + + + + + + +devLib2: epicsMMIO.h Source File + + + + + + +
+
+ + + + + + +
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epicsMMIO.h
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+Go to the documentation of this file.
1 
2 #include "epicsMMIODef.h"
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/epics_m_m_i_o_def_8h.html b/epics_m_m_i_o_def_8h.html new file mode 100644 index 0000000..5b05dc0 --- /dev/null +++ b/epics_m_m_i_o_def_8h.html @@ -0,0 +1,484 @@ + + + + + + + +devLib2: epicsMMIODef.h File Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+
epicsMMIODef.h File Reference
+
+
+
#include <epicsTypes.h>
+#include <epicsEndian.h>
+#include <shareLib.h>
+
+

Go to the source code of this file.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define rbarr()   do{}while(0)
 Explicit read memory barrier Prevents reordering of reads around it. More...
 
#define wbarr()   do{}while(0)
 Explicit write memory barrier Prevents reordering of writes around it. More...
 
#define rwbarr()   do{}while(0)
 Explicit read/write memory barrier Prevents reordering of reads or writes around it. More...
 
#define be_ioread16(A)   nat_ioread16(A)
 Read two byte in big endian order. More...
 
#define be_ioread32(A)   nat_ioread32(A)
 Read four byte in big endian order. More...
 
#define be_iowrite16(A, D)   nat_iowrite16(A,D)
 Write two byte in big endian order. More...
 
#define be_iowrite32(A, D)   nat_iowrite32(A,D)
 Write four byte in big endian order. More...
 
#define le_ioread16(A)   bswap16(nat_ioread16(A))
 Read two byte in little endian order. More...
 
#define le_ioread32(A)   bswap32(nat_ioread32(A))
 Read four byte in little endian order. More...
 
#define le_iowrite16(A, D)   nat_iowrite16(A,bswap16(D))
 Write two byte in little endian order. More...
 
#define le_iowrite32(A, D)   nat_iowrite32(A,bswap32(D))
 Write four byte in little endian order. More...
 
INLINE epicsUInt8 ioread8 (volatile void *addr)
 Read a single byte. More...
 
INLINE void iowrite8 (volatile void *addr, epicsUInt8 val)
 Write a single byte. More...
 
INLINE epicsUInt16 nat_ioread16 (volatile void *addr)
 Read two bytes in host order. Not byte swapping. More...
 
INLINE void nat_iowrite16 (volatile void *addr, epicsUInt16 val)
 Write two byte in host order. Not byte swapping. More...
 
INLINE epicsUInt32 nat_ioread32 (volatile void *addr)
 Read four bytes in host order. Not byte swapping. More...
 
INLINE void nat_iowrite32 (volatile void *addr, epicsUInt32 val)
 Write four byte in host order. Not byte swapping. More...
 
INLINE epicsUInt16 bswap16 (epicsUInt16 value)
 
INLINE epicsUInt32 bswap32 (epicsUInt32 value)
 
+

Macro Definition Documentation

+ +

◆ be_ioread16

+ +
+
+ + + + + + + + +
#define be_ioread16( A)   nat_ioread16(A)
+
+ +

Read two byte in big endian order.

+ +
+
+ +

◆ be_ioread32

+ +
+
+ + + + + + + + +
#define be_ioread32( A)   nat_ioread32(A)
+
+ +

Read four byte in big endian order.

+ +
+
+ +

◆ be_iowrite16

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define be_iowrite16( A,
 D 
)   nat_iowrite16(A,D)
+
+ +

Write two byte in big endian order.

+ +
+
+ +

◆ be_iowrite32

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define be_iowrite32( A,
 D 
)   nat_iowrite32(A,D)
+
+ +

Write four byte in big endian order.

+ +
+
+ +

◆ le_ioread16

+ +
+
+ + + + + + + + +
#define le_ioread16( A)   bswap16(nat_ioread16(A))
+
+ +

Read two byte in little endian order.

+ +
+
+ +

◆ le_ioread32

+ +
+
+ + + + + + + + +
#define le_ioread32( A)   bswap32(nat_ioread32(A))
+
+ +

Read four byte in little endian order.

+ +
+
+ +

◆ le_iowrite16

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define le_iowrite16( A,
 D 
)   nat_iowrite16(A,bswap16(D))
+
+ +

Write two byte in little endian order.

+ +
+
+ +

◆ le_iowrite32

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define le_iowrite32( A,
 D 
)   nat_iowrite32(A,bswap32(D))
+
+ +

Write four byte in little endian order.

+ +
+
+

Function Documentation

+ +

◆ bswap32()

+ +
+
+ + + + + + + + +
INLINE epicsUInt32 bswap32 (epicsUInt32 value)
+
+ +

Definition at line 102 of file epicsMMIODef.h.

+ +
+
+ +

◆ iowrite8()

+ +
+
+ + + + + + + + + + + + + + + + + + +
INLINE void iowrite8 (volatile void * addr,
epicsUInt8 val 
)
+
+ +

Write a single byte.

+ +

Definition at line 41 of file epicsMMIODef.h.

+ +
+
+ +

◆ nat_ioread16()

+ +
+
+ + + + + + + + +
INLINE epicsUInt16 nat_ioread16 (volatile void * addr)
+
+ +

Read two bytes in host order. Not byte swapping.

+ +

Definition at line 51 of file epicsMMIODef.h.

+ +
+
+ +

◆ nat_ioread32()

+ +
+
+ + + + + + + + +
INLINE epicsUInt32 nat_ioread32 (volatile void * addr)
+
+ +

Read four bytes in host order. Not byte swapping.

+ +

Definition at line 71 of file epicsMMIODef.h.

+ +
+
+ +

◆ nat_iowrite16()

+ +
+
+ + + + + + + + + + + + + + + + + + +
INLINE void nat_iowrite16 (volatile void * addr,
epicsUInt16 val 
)
+
+ +

Write two byte in host order. Not byte swapping.

+ +

Definition at line 61 of file epicsMMIODef.h.

+ +
+
+ +

◆ nat_iowrite32()

+ +
+
+ + + + + + + + + + + + + + + + + + +
INLINE void nat_iowrite32 (volatile void * addr,
epicsUInt32 val 
)
+
+ +

Write four byte in host order. Not byte swapping.

+ +

Definition at line 81 of file epicsMMIODef.h.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/epics_m_m_i_o_def_8h_source.html b/epics_m_m_i_o_def_8h_source.html new file mode 100644 index 0000000..9753deb --- /dev/null +++ b/epics_m_m_i_o_def_8h_source.html @@ -0,0 +1,66 @@ + + + + + + + +devLib2: epicsMMIODef.h Source File + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+
epicsMMIODef.h
+
+
+Go to the documentation of this file.
1 /*************************************************************************\
2 * Copyright (c) 2010 Brookhaven Science Associates, as Operator of
3 * Brookhaven National Laboratory.
4 * devLib2 is distributed subject to a Software License Agreement found
5 * in file LICENSE that is included with this distribution.
6 \*************************************************************************/
7 /*
8  * Author: Michael Davidsaver <mdavidsaver@gmail.com>
9  */
10 
11 #ifndef EPICSMMIODEF_H
12 #define EPICSMMIODEF_H
13 
14 #include <epicsTypes.h>
15 #include <epicsEndian.h>
16 #include <shareLib.h>
17 
18 #ifdef __cplusplus
19 # ifndef INLINE
20 # define INLINE inline
21 # endif
22 #endif
23 
30 INLINE
31 epicsUInt8
32 ioread8(volatile void* addr)
33 {
34  return *(volatile epicsUInt8*)(addr);
35 }
36 
39 INLINE
40 void
41 iowrite8(volatile void* addr, epicsUInt8 val)
42 {
43  *(volatile epicsUInt8*)(addr) = val;
44 }
45 
49 INLINE
50 epicsUInt16
51 nat_ioread16(volatile void* addr)
52 {
53  return *(volatile epicsUInt16*)(addr);
54 }
55 
59 INLINE
60 void
61 nat_iowrite16(volatile void* addr, epicsUInt16 val)
62 {
63  *(volatile epicsUInt16*)(addr) = val;
64 }
65 
69 INLINE
70 epicsUInt32
71 nat_ioread32(volatile void* addr)
72 {
73  return *(volatile epicsUInt32*)(addr);
74 }
75 
79 INLINE
80 void
81 nat_iowrite32(volatile void* addr, epicsUInt32 val)
82 {
83  *(volatile epicsUInt32*)(addr) = val;
84 }
85 
86 #if EPICS_BYTE_ORDER == EPICS_ENDIAN_BIG
87 
92 INLINE
93 epicsUInt16
94 bswap16(epicsUInt16 value)
95 {
96  return (((epicsUInt16)(value) & 0x00ff) << 8) |
97  (((epicsUInt16)(value) & 0xff00) >> 8);
98 }
99 
100 INLINE
101 epicsUInt32
102 bswap32(epicsUInt32 value)
103 {
104  return (((epicsUInt32)(value) & 0x000000ff) << 24) |
105  (((epicsUInt32)(value) & 0x0000ff00) << 8) |
106  (((epicsUInt32)(value) & 0x00ff0000) >> 8) |
107  (((epicsUInt32)(value) & 0xff000000) >> 24);
108 }
109 
110 # define be_ioread16(A) nat_ioread16(A)
111 # define be_ioread32(A) nat_ioread32(A)
112 # define be_iowrite16(A,D) nat_iowrite16(A,D)
113 # define be_iowrite32(A,D) nat_iowrite32(A,D)
114 
115 # define le_ioread16(A) bswap16(nat_ioread16(A))
116 # define le_ioread32(A) bswap32(nat_ioread32(A))
117 # define le_iowrite16(A,D) nat_iowrite16(A,bswap16(D))
118 # define le_iowrite32(A,D) nat_iowrite32(A,bswap32(D))
119 
122 #elif EPICS_BYTE_ORDER == EPICS_ENDIAN_LITTLE
123 
124 #include <arpa/inet.h>
125 #ifdef __rtems__
126  /* some rtems bsps (pc386) don't provide htonl correctly */
127 # include <rtems/endian.h>
128 #endif
129 
134 /* hton* is optimized or a builtin for most compilers
135  * so use it if possible
136  */
137 #define bswap16(v) htons(v)
138 #define bswap32(v) htonl(v)
139 
140 # define be_ioread16(A) bswap16(nat_ioread16(A))
141 # define be_ioread32(A) bswap32(nat_ioread32(A))
142 # define be_iowrite16(A,D) nat_iowrite16(A,bswap16(D))
143 # define be_iowrite32(A,D) nat_iowrite32(A,bswap32(D))
144 
145 # define le_ioread16(A) nat_ioread16(A)
146 # define le_ioread32(A) nat_ioread32(A)
147 # define le_iowrite16(A,D) nat_iowrite16(A,D)
148 # define le_iowrite32(A,D) nat_iowrite32(A,D)
149 
152 #else
153 # error Unable to determine native byte order
154 #endif
155 
194 #define rbarr() do{}while(0)
195 
198 #define wbarr() do{}while(0)
199 
202 #define rwbarr() do{}while(0)
203 
276 #endif /* EPICSMMIODEF_H */
nat_iowrite16
INLINE void nat_iowrite16(volatile void *addr, epicsUInt16 val)
Write two byte in host order. Not byte swapping.
Definition: epicsMMIODef.h:61
+
bswap32
INLINE epicsUInt32 bswap32(epicsUInt32 value)
Definition: epicsMMIODef.h:102
+
nat_ioread32
INLINE epicsUInt32 nat_ioread32(volatile void *addr)
Read four bytes in host order. Not byte swapping.
Definition: epicsMMIODef.h:71
+
bswap16
INLINE epicsUInt16 bswap16(epicsUInt16 value)
Definition: epicsMMIODef.h:94
+
nat_ioread16
INLINE epicsUInt16 nat_ioread16(volatile void *addr)
Read two bytes in host order. Not byte swapping.
Definition: epicsMMIODef.h:51
+
iowrite8
INLINE void iowrite8(volatile void *addr, epicsUInt8 val)
Write a single byte.
Definition: epicsMMIODef.h:41
+
ioread8
INLINE epicsUInt8 ioread8(volatile void *addr)
Read a single byte.
Definition: epicsMMIODef.h:32
+ +
nat_iowrite32
INLINE void nat_iowrite32(volatile void *addr, epicsUInt32 val)
Write four byte in host order. Not byte swapping.
Definition: epicsMMIODef.h:81
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/explore_8h.html b/explore_8h.html new file mode 100644 index 0000000..b416191 --- /dev/null +++ b/explore_8h.html @@ -0,0 +1,59 @@ + + + + + + + +devLib2: explore.h File Reference + + + + + + +
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+
explore.h File Reference
+
+
+ +

Go to the source code of this file.

+
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+ + diff --git a/explore_8h_source.html b/explore_8h_source.html new file mode 100644 index 0000000..5e7b32b --- /dev/null +++ b/explore_8h_source.html @@ -0,0 +1,57 @@ + + + + + + + +devLib2: explore.h Source File + + + + + + +
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explore.h
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+Go to the documentation of this file.
1 
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+ + diff --git a/exploreapp.html b/exploreapp.html new file mode 100644 index 0000000..2094790 --- /dev/null +++ b/exploreapp.html @@ -0,0 +1,107 @@ + + + + + + + +devLib2: PCI driver/hardware development tool + + + + + + +
+
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devLib2 +  2.11 +
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+ + + + + + +
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+
PCI driver/hardware development tool
+
+
+

+Purpose

+

The exploreApp support is intended as a tool to explore new PCI devices. This may be useful when preparing to write a dedicated driver and/or during development of PCI/PCIe device firmware. exploreApp allows a PCI register to be read and/or written an EPICS record. For example:

+
record(longout, "pcitestout") {
field(DTYP, "Explore Write32 LSB")
field(OUT , "@8:0.0 bar=0 offset=0xc")
}

The record pcitestout will be connected to the PCI device 8:0.0 (bus 8, device 0, function 0) with the first BAR. A single write of 4 bytes is made when the record is processed.

+

The following can be added to some xyzApp/src/Makefile to include exploreApp.

+
PROD_IOC += myioc
DBD += myioc.dbd
myioc_DBD += exploreSupport.dbd
myioc_LIBS += explorepci epicspci

+Options

+

INP/OUT link strings may contain the following components

+ +

For record types: longout, bo, mbbo, mbboDirect, ao allowed DTYP are:

+ +

For record types: longin, longout, bi, bo, mbbi, mbbo, mbbiDirect, mbboDirect, ai, ao

+ +

The ao record type also accepts

+ +

The ai record type also accepts

+ +

The waveform record type accepts both integer Read and Write DTYP. The step= link option may be applied to change how the address counter is incremented. The default step size is the read size (eg. 4 for Read32). A step size of 0 will read the base address NELM times.

+

+PCI Interrupt

+

Limited support of PCI interrupts is available on Linux only. A longin record with DTYP="Explore IRQ Count" and SCAN="I/O Intr" will be processed each time an interrupt occurs.

+

This requires that a UIO kernel module be installed.

+

+FRIB Specific

+

The DTYP="Explore FRIB Flash" support implements a FRIB specific protocol for accessing a SPI flash chip over PCI. The frib-flash.db file demonstrates use.

+
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 devcsr.c
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 devLibPCI.h
 devLibPCIImpl.h
 devLibPCIStrings.c
 devlibversion.h
 devLibVME.c
 devLibVME.h
 epicsEndian.h
 epicsMMIO.h
 epicsMMIODef.h
 explore.h
 iocreg.c
 linux.h
 mainpage.h
 osdPciShared.c
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 osdWireConfig.h
 pcish.c
 usage.h
 vmedefs.h
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+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + +
+
+  +
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/globals_v.html b/globals_v.html new file mode 100644 index 0000000..21c1172 --- /dev/null +++ b/globals_v.html @@ -0,0 +1,205 @@ + + + + + + + +devLib2: Globals + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + +
+
+
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
+ +

- v -

+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/globals_vars.html b/globals_vars.html new file mode 100644 index 0000000..0abeb47 --- /dev/null +++ b/globals_vars.html @@ -0,0 +1,68 @@ + + + + + + + +devLib2: Globals + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + +
+
+  +
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/globals_w.html b/globals_w.html new file mode 100644 index 0000000..b15003f --- /dev/null +++ b/globals_w.html @@ -0,0 +1,65 @@ + + + + + + + +devLib2: Globals + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + +
+
+
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
+ +

- w -

+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/group__mmio.html b/group__mmio.html new file mode 100644 index 0000000..f33ba27 --- /dev/null +++ b/group__mmio.html @@ -0,0 +1,202 @@ + + + + + + + +devLib2: Memory Mapped I/O + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + +
+
+
+
Memory Mapped I/O
+
+
+ + + + + + + + + + + + + + + +
INLINE epicsUInt8 ioread8 (volatile void *addr)
 Read a single byte. More...
 
INLINE epicsUInt16 bswap16 (epicsUInt16 value)
 
#define rbarr()   do{}while(0)
 Explicit read memory barrier Prevents reordering of reads around it. More...
 
#define wbarr()   do{}while(0)
 Explicit write memory barrier Prevents reordering of writes around it. More...
 
#define rwbarr()   do{}while(0)
 Explicit read/write memory barrier Prevents reordering of reads or writes around it. More...
 
+

Detailed Description

+

Safe operations on I/O memory.

+

This files defines a set of macros for access to Memory Mapped I/O

+

They are named T_ioread# and T_iowrite# where # can be 8, 16, or 32. 'T' can either be 'le', 'be', or 'nat' (except ioread8 and iowrite8).

+

The macros defined use OS specific extensions (when available) to ensure the following.

+ + +

PCI access should use either 'le_' or 'be_' as determined by the device byte order.

+

VME access should always use 'nat_'. If the device byte order is little endian then an explicit swap is required.

+

+Examples:

+

+Big endian device:

+

PCI

+
be_iowrite16(base+off, 14);
var = be_ioread16(base+off);

VME

+
nat_iowrite16(base+off, 14);
var = nat_ioread16(base+off);

+Little endian device

+

PCI

le_iowrite16(base+off, 14);
var = le_ioread16(base+off);

VME

nat_iowrite16(base+off, bswap16(14));
var = bswap16(nat_iowrite16(base+off));

This difference arises because VME bridges implement hardware byte swapping on little endian systems, while PCI bridges do not. Software accessing PCI devices must know if byte swapping is required. This conditional swap is implemented by the 'be_' and 'le_' macros.

+

This is a fundamental difference between PCI and VME.

+

Software accessing PCI must do conditional swapping.

+

Software accessing VME must not do conditional swapping.

+
Note
All read and write operations have an implicit read or write barrier.
+

Macro Definition Documentation

+ +

◆ rbarr

+ +
+
+ + + + + + + +
#define rbarr()   do{}while(0)
+
+ +

Explicit read memory barrier Prevents reordering of reads around it.

+ +

Definition at line 194 of file epicsMMIODef.h.

+ +
+
+ +

◆ rwbarr

+ +
+
+ + + + + + + +
#define rwbarr()   do{}while(0)
+
+ +

Explicit read/write memory barrier Prevents reordering of reads or writes around it.

+ +

Definition at line 202 of file epicsMMIODef.h.

+ +
+
+ +

◆ wbarr

+ +
+
+ + + + + + + +
#define wbarr()   do{}while(0)
+
+ +

Explicit write memory barrier Prevents reordering of writes around it.

+ +

Definition at line 198 of file epicsMMIODef.h.

+ +
+
+

Function Documentation

+ +

◆ bswap16()

+ +
+
+ + + + + + + + +
INLINE epicsUInt16 bswap16 (epicsUInt16 value)
+
+ +

Definition at line 94 of file epicsMMIODef.h.

+ +
+
+ +

◆ ioread8()

+ +
+
+ + + + + + + + +
INLINE epicsUInt8 ioread8 (volatile void * addr)
+
+ +

Read a single byte.

+ +

Definition at line 32 of file epicsMMIODef.h.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/group__pci.html b/group__pci.html new file mode 100644 index 0000000..7f6ec57 --- /dev/null +++ b/group__pci.html @@ -0,0 +1,1662 @@ + + + + + + + +devLib2: PCI Bus Access + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + +
+
+
+Data Structures | +Macros | +Typedefs | +Functions | +Variables
+
+
PCI Bus Access
+
+
+ + + + + + + + + + +

+Data Structures

struct  epicsPCIID
 PCI device identifier. More...
 
struct  PCIBar
 
struct  epicsPCIDevice
 Device token. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define DEVLIBPCI_MAJOR   1
 API major version. More...
 
#define DEVLIBPCI_MINOR   3
 API minor version. More...
 
#define DEVPCI_ANY_DEVICE   0x10000
 
#define DEVPCI_ANY_VENDOR   0x10000
 
#define DEVPCI_ANY_SUBDEVICE   0x10000
 
#define DEVPCI_ANY_SUBVENDOR   0x10000
 
#define DEVPCI_ANY_CLASS   0x1000000
 
#define DEVPCI_ANY_REVISION   0x100
 
#define DEVPCI_LAST_DEVICE   0xffff0000
 
#define DEVPCI_END   {DEVPCI_LAST_DEVICE,0,0,0,0,0}
 The last item in a list of PCI IDS. More...
 
#define DEVPCI_DEVICE_ANY()
 
#define DEVPCI_DEVICE_VENDOR(dev, vend)
 
#define DEVPCI_DEVICE_VENDOR_CLASS(dev, vend, pclass)
 
#define DEVPCI_SUBDEVICE_SUBVENDOR(dev, vend, sdev, svend)
 
#define DEVPCI_SUBDEVICE_SUBVENDOR_CLASS(dev, vend, sdev, svend, revision, pclass)
 
#define DEVPCI_NO_SLOT   NULL
 
#define PCIBARCOUNT   NELEMENTS( ((epicsPCIDevice*)0)->bar )
 The maximum number of base address registers (BARs). More...
 
#define DEVLIB_MAP_UIO1TO1   0
 
#define DEVLIB_MAP_UIOCOMPACT   0
 
+ + + + +

+Typedefs

typedef int(* devPCISearchFn) (void *ptr, const epicsPCIDevice *dev)
 PCI search callback prototype. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

epicsShareFunc int devPCIFindCB (const epicsPCIID *idlist, devPCISearchFn searchfn, void *arg, unsigned int opt)
 PCI bus search w/ callback. More...
 
epicsShareFunc int devPCIFindSpec (const epicsPCIID *idlist, const char *spec, const epicsPCIDevice **found, unsigned int opt)
 PCI bus search by specification string. More...
 
epicsShareFunc int devPCIFindDBDF (const epicsPCIID *idlist, unsigned int domain, unsigned int b, unsigned int d, unsigned int f, const epicsPCIDevice **found, unsigned int opt)
 PCI bus probe. More...
 
epicsShareFunc int devPCIFindBDF (const epicsPCIID *idlist, unsigned int b, unsigned int d, unsigned int f, const epicsPCIDevice **found, unsigned int opt)
 
epicsShareFunc int devPCIToLocalAddr (const epicsPCIDevice *id, unsigned int bar, volatile void **ppLocalAddr, unsigned int opt)
 Get pointer to PCI BAR. More...
 
epicsShareFunc int devPCIBarLen (const epicsPCIDevice *id, unsigned int bar, epicsUInt32 *len)
 Find the size of a BAR. More...
 
epicsShareFunc int devPCIConnectInterrupt (const epicsPCIDevice *id, void(*pFunction)(void *), void *parameter, unsigned int opt)
 Request interrupts for device. More...
 
epicsShareFunc int devPCIDisconnectInterrupt (const epicsPCIDevice *id, void(*pFunction)(void *), void *parameter)
 Stop receiving interrupts. More...
 
epicsShareFunc void devPCIShow (int lvl, int vendor, int device, int exact)
 
epicsShareFunc void devPCIShowMatch (int lvl, const char *spec, int vendor, int device)
 
epicsShareFunc void devPCIShowDevice (int lvl, const epicsPCIDevice *dev)
 
epicsShareFunc int devLibPCIUse (const char *name)
 Select driver implementation. Pick driver implementation by name, or NULL to use default. If no selection is made then the default will be used if available. More...
 
epicsShareFunc const char * devLibPCIDriverName ()
 
epicsShareFunc int devPCIConfigRead8 (const epicsPCIDevice *dev, unsigned offset, epicsUInt8 *pResult)
 Read byte from configuration space. More...
 
epicsShareFunc int devPCIConfigRead16 (const epicsPCIDevice *dev, unsigned offset, epicsUInt16 *pResult)
 Read (16-bit) word from configuration space. More...
 
epicsShareFunc int devPCIConfigRead32 (const epicsPCIDevice *dev, unsigned offset, epicsUInt32 *pResult)
 Read (32-bit) dword from configuration space. More...
 
epicsShareFunc int devPCIConfigWrite8 (const epicsPCIDevice *dev, unsigned offset, epicsUInt8 value)
 Write byte to configuration space. More...
 
epicsShareFunc int devPCIConfigWrite16 (const epicsPCIDevice *dev, unsigned offset, epicsUInt16 value)
 Write (16-bit) word from configuration space. More...
 
epicsShareFunc int devPCIConfigWrite32 (const epicsPCIDevice *dev, unsigned offset, epicsUInt32 value)
 Write (32-bit) dword from configuration space. More...
 
epicsShareFunc int devPCIEnableInterrupt (const epicsPCIDevice *dev)
 Enable interrupts at the device. More...
 
epicsShareFunc int devPCIDisableInterrupt (const epicsPCIDevice *dev)
 Enable interrupts at the device. More...
 
epicsShareFunc const char * devPCIDeviceClassToString (int classId)
 Translate class id to string. More...
 
+ + + +

+Variables

epicsShareExtern int devPCIDebug
 
+

Detailed Description

+

Library to support PCI bus access

+

Macro Definition Documentation

+ +

◆ DEVLIB_MAP_UIO1TO1

+ +
+
+ + + + +
#define DEVLIB_MAP_UIO1TO1   0
+
+ +

Definition at line 232 of file devLibPCI.h.

+ +
+
+ +

◆ DEVLIB_MAP_UIOCOMPACT

+ +
+
+ + + + +
#define DEVLIB_MAP_UIOCOMPACT   0
+
+ +

Definition at line 233 of file devLibPCI.h.

+ +
+
+ +

◆ DEVLIBPCI_MAJOR

+ +
+
+ + + + +
#define DEVLIBPCI_MAJOR   1
+
+ +

API major version.

+ +

Definition at line 30 of file devLibPCI.h.

+ +
+
+ +

◆ DEVLIBPCI_MINOR

+ +
+
+ + + + +
#define DEVLIBPCI_MINOR   3
+
+ +

API minor version.

+ +

Definition at line 31 of file devLibPCI.h.

+ +
+
+ +

◆ DEVPCI_ANY_CLASS

+ +
+
+ + + + +
#define DEVPCI_ANY_CLASS   0x1000000
+
+ +

Definition at line 66 of file devLibPCI.h.

+ +
+
+ +

◆ DEVPCI_ANY_DEVICE

+ +
+
+ + + + +
#define DEVPCI_ANY_DEVICE   0x10000
+
+ +

Definition at line 62 of file devLibPCI.h.

+ +
+
+ +

◆ DEVPCI_ANY_REVISION

+ +
+
+ + + + +
#define DEVPCI_ANY_REVISION   0x100
+
+ +

Definition at line 67 of file devLibPCI.h.

+ +
+
+ +

◆ DEVPCI_ANY_SUBDEVICE

+ +
+
+ + + + +
#define DEVPCI_ANY_SUBDEVICE   0x10000
+
+ +

Definition at line 64 of file devLibPCI.h.

+ +
+
+ +

◆ DEVPCI_ANY_SUBVENDOR

+ +
+
+ + + + +
#define DEVPCI_ANY_SUBVENDOR   0x10000
+
+ +

Definition at line 65 of file devLibPCI.h.

+ +
+
+ +

◆ DEVPCI_ANY_VENDOR

+ +
+
+ + + + +
#define DEVPCI_ANY_VENDOR   0x10000
+
+ +

Definition at line 63 of file devLibPCI.h.

+ +
+
+ +

◆ DEVPCI_DEVICE_ANY

+ +
+
+ + + + + + + +
#define DEVPCI_DEVICE_ANY()
+
+Value:
{ DEVPCI_ANY_DEVICE, DEVPCI_ANY_VENDOR, \
DEVPCI_ANY_SUBDEVICE, DEVPCI_ANY_SUBVENDOR, \
DEVPCI_ANY_CLASS, DEVPCI_ANY_REVISION }
DEVPCI_ANY_REVISION
#define DEVPCI_ANY_REVISION
Definition: devLibPCI.h:67
+
DEVPCI_ANY_SUBVENDOR
#define DEVPCI_ANY_SUBVENDOR
Definition: devLibPCI.h:65
+
DEVPCI_ANY_VENDOR
#define DEVPCI_ANY_VENDOR
Definition: devLibPCI.h:63
+
DEVPCI_ANY_DEVICE
#define DEVPCI_ANY_DEVICE
Definition: devLibPCI.h:62
+
+

Definition at line 74 of file devLibPCI.h.

+ +
+
+ +

◆ DEVPCI_DEVICE_VENDOR

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define DEVPCI_DEVICE_VENDOR( dev,
 vend 
)
+
+Value:
{ dev, vend, DEVPCI_ANY_SUBDEVICE, DEVPCI_ANY_SUBVENDOR, \
DEVPCI_ANY_CLASS, DEVPCI_ANY_REVISION }
DEVPCI_ANY_REVISION
#define DEVPCI_ANY_REVISION
Definition: devLibPCI.h:67
+
DEVPCI_ANY_SUBVENDOR
#define DEVPCI_ANY_SUBVENDOR
Definition: devLibPCI.h:65
+
DEVPCI_ANY_SUBDEVICE
#define DEVPCI_ANY_SUBDEVICE
Definition: devLibPCI.h:64
+
+

Definition at line 79 of file devLibPCI.h.

+ +
+
+ +

◆ DEVPCI_DEVICE_VENDOR_CLASS

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
#define DEVPCI_DEVICE_VENDOR_CLASS( dev,
 vend,
 pclass 
)
+
+Value:
{ dev, vend, DEVPCI_ANY_SUBDEVICE, DEVPCI_ANY_SUBVENDOR, \
pclass, DEVPCI_ANY_REVISION }
DEVPCI_ANY_REVISION
#define DEVPCI_ANY_REVISION
Definition: devLibPCI.h:67
+
DEVPCI_ANY_SUBVENDOR
#define DEVPCI_ANY_SUBVENDOR
Definition: devLibPCI.h:65
+
DEVPCI_ANY_SUBDEVICE
#define DEVPCI_ANY_SUBDEVICE
Definition: devLibPCI.h:64
+
+

Definition at line 83 of file devLibPCI.h.

+ +
+
+ +

◆ DEVPCI_END

+ +
+
+ + + + +
#define DEVPCI_END   {DEVPCI_LAST_DEVICE,0,0,0,0,0}
+
+ +

The last item in a list of PCI IDS.

+ +

Definition at line 72 of file devLibPCI.h.

+ +
+
+ +

◆ DEVPCI_LAST_DEVICE

+ +
+
+ + + + +
#define DEVPCI_LAST_DEVICE   0xffff0000
+
+ +

Definition at line 69 of file devLibPCI.h.

+ +
+
+ +

◆ DEVPCI_NO_SLOT

+ +
+
+ + + + +
#define DEVPCI_NO_SLOT   NULL
+
+ +

Definition at line 95 of file devLibPCI.h.

+ +
+
+ +

◆ DEVPCI_SUBDEVICE_SUBVENDOR

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
#define DEVPCI_SUBDEVICE_SUBVENDOR( dev,
 vend,
 sdev,
 svend 
)
+
+Value:
{ dev, vend, sdev, svend, \
DEVPCI_ANY_CLASS, DEVPCI_ANY_REVISION }
DEVPCI_ANY_REVISION
#define DEVPCI_ANY_REVISION
Definition: devLibPCI.h:67
+
+

Definition at line 87 of file devLibPCI.h.

+ +
+
+ +

◆ DEVPCI_SUBDEVICE_SUBVENDOR_CLASS

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
#define DEVPCI_SUBDEVICE_SUBVENDOR_CLASS( dev,
 vend,
 sdev,
 svend,
 revision,
 pclass 
)
+
+Value:
{ dev, vend, sdev, svend, \
pclass, revision }
VMECSRID::revision
epicsUInt32 revision
Definition: devcsr.h:59
+
+

Definition at line 91 of file devLibPCI.h.

+ +
+
+ +

◆ PCIBARCOUNT

+ +
+
+ + + + +
#define PCIBARCOUNT   NELEMENTS( ((epicsPCIDevice*)0)->bar )
+
+ +

The maximum number of base address registers (BARs).

+ +

Definition at line 126 of file devLibPCI.h.

+ +
+
+

Typedef Documentation

+ +

◆ devPCISearchFn

+ +
+
+ + + + +
typedef int(* devPCISearchFn) (void *ptr, const epicsPCIDevice *dev)
+
+ +

PCI search callback prototype.

+
Parameters
+ + + +
ptrUser pointer
devPCI device pointer
+
+
+
Returns
0 Continue search
+
+1 Abort search Ok (devPCIFindCB() returns 0)
+
+other Abort search failed (devPCIFindCB() returns this code)
+ +

Definition at line 136 of file devLibPCI.h.

+ +
+
+

Function Documentation

+ +

◆ devLibPCIDriverName()

+ +
+
+ + + + + + + +
epicsShareFunc const char* devLibPCIDriverName ()
+
+ +

Definition at line 138 of file devLibPCI.c.

+ +
+
+ +

◆ devLibPCIUse()

+ +
+
+ + + + + + + + +
epicsShareFunc int devLibPCIUse (const char * name)
+
+ +

Select driver implementation. Pick driver implementation by name, or NULL to use default. If no selection is made then the default will be used if available.

+
Parameters
+ + +
nameAn implementation name
+
+
+
Returns
0 on success or an EPICS error code on failure.
+ +

Definition at line 107 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIBarLen()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc int devPCIBarLen (const epicsPCIDevice * id,
unsigned int bar,
epicsUInt32 * len 
)
+
+ +

Find the size of a BAR.

+

Returns the size (in bytes) of the region visible through the given BAR.

+
Warning
On RTEMS and vxWorks this is a invasive operation. When calling it ensure that nothing is accessing the device. Don't call this on a device used by another driver.
+
Parameters
+ + + + +
idPCI device pointer
barBAR number
[out]lenBAR size in bytes
+
+
+
Returns
0 on success or an EPICS error code on failure.
+ +

Definition at line 449 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIConfigRead16()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc int devPCIConfigRead16 (const epicsPCIDevice * dev,
unsigned offset,
epicsUInt16 * pResult 
)
+
+ +

Read (16-bit) word from configuration space.

+
Parameters
+ + + + +
devA PCI device handle
offsetOffset into configuration space (must be 16-bit aligned)
pResultPointer to where result is to be written
+
+
+
Returns
0 on success or an EPICS error code on failure
+ +

Definition at line 609 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIConfigRead32()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc int devPCIConfigRead32 (const epicsPCIDevice * dev,
unsigned offset,
epicsUInt32 * pResult 
)
+
+ +

Read (32-bit) dword from configuration space.

+
Parameters
+ + + + +
devA PCI device handle
offsetOffset into configuration space (must be 32-bit aligned)
pResultPointer to where result is to be written
+
+
+
Returns
0 on success or an EPICS error code on failure
+ +

Definition at line 615 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIConfigRead8()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc int devPCIConfigRead8 (const epicsPCIDevice * dev,
unsigned offset,
epicsUInt8 * pResult 
)
+
+ +

Read byte from configuration space.

+
Parameters
+ + + + +
devA PCI device handle
offsetOffset into configuration space
pResultPointer to where result is to be written
+
+
+
Returns
0 on success or an EPICS error code on failure
+ +

Definition at line 603 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIConfigWrite16()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc int devPCIConfigWrite16 (const epicsPCIDevice * dev,
unsigned offset,
epicsUInt16 value 
)
+
+ +

Write (16-bit) word from configuration space.

+
Parameters
+ + + + +
devA PCI device handle
offsetOffset into configuration space (must be 16-bit aligned)
valueValue to be written
+
+
+
Returns
0 on success or an EPICS error code on failure
+ +

Definition at line 627 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIConfigWrite32()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc int devPCIConfigWrite32 (const epicsPCIDevice * dev,
unsigned offset,
epicsUInt32 value 
)
+
+ +

Write (32-bit) dword from configuration space.

+
Parameters
+ + + + +
devA PCI device handle
offsetOffset into configuration space (must be 32-bit aligned)
valueValue to be written
+
+
+
Returns
0 on success or an EPICS error code on failure
+ +

Definition at line 633 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIConfigWrite8()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc int devPCIConfigWrite8 (const epicsPCIDevice * dev,
unsigned offset,
epicsUInt8 value 
)
+
+ +

Write byte to configuration space.

+
Parameters
+ + + + +
devA PCI device handle
offsetOffset into configuration space
valueValue to be written
+
+
+
Returns
0 on success or an EPICS error code on failure
+ +

Definition at line 621 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIConnectInterrupt()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc int devPCIConnectInterrupt (const epicsPCIDevice * id,
void(*)(void *) pFunction,
void * parameter,
unsigned int opt 
)
+
+ +

Request interrupts for device.

+

Request that the provided callback be invoked whenever the device asserts an interrupt.

+
Note
Always connect the interrupt handler before enabling the device to send interrupts.
+
+All drivers should be prepared for their device to share an interrupt with other devices.
+
Parameters
+ + + + + +
idPCI device pointer
pFunctionUser ISR
parameterUser pointer
optModifiers. Currently unused
+
+
+
Returns
0 on success or an EPICS error code on failure.
+ +

Definition at line 463 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIDeviceClassToString()

+ +
+
+ + + + + + + + +
epicsShareFunc const char* devPCIDeviceClassToString (int classId)
+
+ +

Translate class id to string.

+
Parameters
+ + +
classIdPCI class Id
+
+
+
Returns
constant class name string
+ +

Definition at line 7 of file devLibPCIStrings.c.

+ +
+
+ +

◆ devPCIDisableInterrupt()

+ +
+
+ + + + + + + + +
epicsShareFunc int devPCIDisableInterrupt (const epicsPCIDevice * dev)
+
+ +

Enable interrupts at the device.

+
Parameters
+ + +
devA PCI device handle
+
+
+
Returns
0 on success or an EPICS error code on failure
+
Note
Implementation of this call for any OS is optional
+ +

Definition at line 649 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIDisconnectInterrupt()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc int devPCIDisconnectInterrupt (const epicsPCIDevice * id,
void(*)(void *) pFunction,
void * parameter 
)
+
+ +

Stop receiving interrupts.

+

Use the same arguments passed to devPCIConnectInterrupt()

Parameters
+ + + + +
idPCI device pointer
pFunctionUser ISR
parameterUser pointer
+
+
+
Returns
0 on success or an EPICS error code on failure.
+ +

Definition at line 476 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIEnableInterrupt()

+ +
+
+ + + + + + + + +
epicsShareFunc int devPCIEnableInterrupt (const epicsPCIDevice * dev)
+
+ +

Enable interrupts at the device.

+
Parameters
+ + +
devA PCI device handle
+
+
+
Returns
0 on success or an EPICS error code on failure
+
Note
Implementation of this call for any OS is optional
+ +

Definition at line 640 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIFindBDF()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc int devPCIFindBDF (const epicsPCIID * idlist,
unsigned int b,
unsigned int d,
unsigned int f,
const epicsPCIDevice ** found,
unsigned int opt 
)
+
+ +

Definition at line 418 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIFindCB()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc int devPCIFindCB (const epicsPCIID * idlist,
devPCISearchFn searchfn,
void * arg,
unsigned int opt 
)
+
+ +

PCI bus search w/ callback.

+

Iterate through all devices in the system and invoke the provided callback for those matching an entry in the provided ID list.

+

Iteration will stop when the callback returns a non-zero value. If the callback returns 1 this call will return 0. Any other value will be returned without modification.

+
Parameters
+ + + + + +
idlistList of PCI identifiers
searchfnUser callback
argUser pointer
optModifiers. Currently unused
+
+
+
Returns
0 on success or the error code returned by the callback.
+ +

Definition at line 214 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIFindDBDF()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc int devPCIFindDBDF (const epicsPCIID * idlist,
unsigned int domain,
unsigned int b,
unsigned int d,
unsigned int f,
const epicsPCIDevice ** found,
unsigned int opt 
)
+
+ +

PCI bus probe.

+

Probe and test a single address. If it matches, the corresponding epicsPCIDevice instance is stored in 'found'.

+

If no compatible device is present the call returns S_dev_noDevice.

+
Parameters
+ + + + + + + + +
idlistList of PCI identifiers
domaindomain
bbus
ddevice
ffunction
[out]foundOn success the result is stored here
optModifiers. Currently unused
+
+
+
Returns
0 on success or an EPICS error code on failure.
+ +

Definition at line 376 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIFindSpec()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc int devPCIFindSpec (const epicsPCIID * idlist,
const char * spec,
const epicsPCIDevice ** found,
unsigned int opt 
)
+
+ +

PCI bus search by specification string.

+

Search for a device on the bus matching the given specification string, which is a space seperated list of the following:

+

"<bus#>:<device#>[.<function#>]"

+

"<domain#>:<bus#>:<device#>[.<function#>]"

+

"slot=<slot#>"

+

"inst[ance]=<instance#>"

+

Some targets do not support some match types (eg. only Linux matches slot numbers).

+
Parameters
+ + + + + +
idlistList of PCI identifiers
specspecification string
[out]foundOn success the result is stored here
optModifiers. Currently unused
+
+
+
Returns
0 on success or an EPICS error code on failure.
+ +

Definition at line 267 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIShow()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc void devPCIShow (int lvl,
int vendor,
int device,
int exact 
)
+
+ +

Definition at line 504 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIShowDevice()

+ +
+
+ + + + + + + + + + + + + + + + + + +
epicsShareFunc void devPCIShowDevice (int lvl,
const epicsPCIDevice * dev 
)
+
+ +

Definition at line 541 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIShowMatch()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc void devPCIShowMatch (int lvl,
const char * spec,
int vendor,
int device 
)
+
+ +

Definition at line 522 of file devLibPCI.c.

+ +
+
+ +

◆ devPCIToLocalAddr()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc int devPCIToLocalAddr (const epicsPCIDevice * id,
unsigned int bar,
volatile void ** ppLocalAddr,
unsigned int opt 
)
+
+ +

Get pointer to PCI BAR.

+

Map a PCI BAR into the local process address space.

+

The opt argument is used to modify the mapping process. Currently only two (mutually exclusive) flags are supported which are only used by the Linux UIO bus implementation to control how requested BAR #s are mapped to UIO region numbers.

+
    +
  • DEVLIB_MAP_UIO1TO1 (the only choice in devLib2 versions < 2.4) passes BAR #s without modification.
    • +
  • DEVLIB_MAP_UIOCOMPACT Maps the requested BAR # to the index of the appropriate IOMEM region. This index skips I/O Port BARs and any other non-IOMEM regions.
    • +
+
Parameters
+ + + + + +
idPCI device pointer
barBAR number
[out]ppLocalAddrPointer to start of BAR
optModifiers. 0 or bitwise OR of one or more DEVLIB_MAP_* macros
+
+
+
Returns
0 on success or an EPICS error code on failure.
+ +

Definition at line 431 of file devLibPCI.c.

+ +
+
+

Variable Documentation

+ +

◆ devPCIDebug

+ +
+
+ + + + +
epicsShareExtern int devPCIDebug
+
+ +

Definition at line 354 of file devLibPCI.h.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/group__vmecsr.html b/group__vmecsr.html new file mode 100644 index 0000000..dd0d91e --- /dev/null +++ b/group__vmecsr.html @@ -0,0 +1,691 @@ + + + + + + + +devLib2: VME CSR + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + +
+
+
+Data Structures | +Macros | +Functions
+
+
VME CSR
+
+
+ + + + + +

+Data Structures

struct  VMECSRID
 ID info for a VME64(x) device This structure is used to hold identifying information for a VME64 compatible device. When used for searching each field can hold a specific value of the 'VMECSRANY' wildcard. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define DEVLIBVME_MAJOR   1
 API major version. More...
 
#define DEVLIBVME_MINOR   0
 API minor version. More...
 
#define VMECSR_END   {0,0,0}
 Must be the last entry in a device list. More...
 
#define VMECSRANY   0xFfffFfff
 Match any value. May be used in any field of VMECSRID. More...
 
#define VMECSRSLOTMAX   ((1<<5)-1)
 The highest slot number. More...
 
#define CSRSlotBase(slot)   ( (slot)<<19 )
 Derives the CSR space base address for a slot. More...
 
#define CSRADER(addr, mod)   ( ((addr)&0xFfffFf00) | ( ((mod)&0x3f)<<2 ) )
 Computes values for the VME64x address decode registers (ADER). More...
 
#define CSRRead8(addr)   ioread8(addr)
 
#define CSRRead16(addr)   ( CSRRead8(addr)<<8 | CSRRead8(addr+4) )
 
#define CSRRead24(addr)   ( CSRRead16(addr)<<8 | CSRRead8(addr+8) )
 
#define CSRRead32(addr)   ( CSRRead24(addr)<<8 | CSRRead8(addr+12) )
 
#define CSRWrite8(addr, val)   iowrite8(addr, val)
 
#define CSRWrite16(addr, val)   do{ CSRWrite8(addr,(val&0xff00)>>8); CSRWrite8(addr+4,val&0xff); }while(0)
 
#define CSRWrite24(addr, val)   do{ CSRWrite16(addr,(val&0xffff00)>>8); CSRWrite8(addr+8,val&0xff); }while(0)
 
#define CSRWrite32(addr, val)   do{ CSRWrite24(addr,(val&0xffffff00)>>8); CSRWrite8(addr+12,val&0xff); }while(0)
 
+ + + + + + + + + + + + + + + + +

+Functions

epicsShareFunc volatile unsigned char * devCSRProbeSlot (int slot)
 Get the CSR base address for a slot. More...
 
epicsShareFunc volatile unsigned char * devCSRTestSlot (const struct VMECSRID *devs, int slot, struct VMECSRID *info)
 Probe a VME slot then check its ID. More...
 
epicsShareExtern void vmecsrprint (int N, int verb)
 Decode contents of CSR/CR and print to screen. More...
 
epicsShareExtern void vmecsrdump (int verb)
 Decode contents of CSR/CR for all cards and print to screen. More...
 
INLINE void CSRSetBase (volatile void *base, epicsUInt8 N, epicsUInt32 addr, epicsUInt8 amod)
 Set base address for VME64x function N. More...
 
+

Detailed Description

+

Extensions to EPICS devLib to deal with the CSR address space defined by the VME64 standard and extended by the VME64x standard.

+

Macro Definition Documentation

+ +

◆ CSRADER

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define CSRADER( addr,
 mod 
)   ( ((addr)&0xFfffFf00) | ( ((mod)&0x3f)<<2 ) )
+
+ +

Computes values for the VME64x address decode registers (ADER).

+

The ADER register encodes the address modifier and base address on one address range.

+ +

Definition at line 137 of file devcsr.h.

+ +
+
+ +

◆ CSRRead16

+ +
+
+ + + + + + + + +
#define CSRRead16( addr)   ( CSRRead8(addr)<<8 | CSRRead8(addr+4) )
+
+ +

Definition at line 144 of file devcsr.h.

+ +
+
+ +

◆ CSRRead24

+ +
+
+ + + + + + + + +
#define CSRRead24( addr)   ( CSRRead16(addr)<<8 | CSRRead8(addr+8) )
+
+ +

Definition at line 146 of file devcsr.h.

+ +
+
+ +

◆ CSRRead32

+ +
+
+ + + + + + + + +
#define CSRRead32( addr)   ( CSRRead24(addr)<<8 | CSRRead8(addr+12) )
+
+ +

Definition at line 148 of file devcsr.h.

+ +
+
+ +

◆ CSRRead8

+ +
+
+ + + + + + + + +
#define CSRRead8( addr)   ioread8(addr)
+
+ +

Definition at line 142 of file devcsr.h.

+ +
+
+ +

◆ CSRSlotBase

+ +
+
+ + + + + + + + +
#define CSRSlotBase( slot)   ( (slot)<<19 )
+
+ +

Derives the CSR space base address for a slot.

+

The top 5 bits of the 24 bit CSR address are the slot number.

+

This macro gives the VME CSR base address for a slot. Give this address to devBusToLocalAddr() with type atVMECSR

+ +

Definition at line 130 of file devcsr.h.

+ +
+
+ +

◆ CSRWrite16

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define CSRWrite16( addr,
 val 
)   do{ CSRWrite8(addr,(val&0xff00)>>8); CSRWrite8(addr+4,val&0xff); }while(0)
+
+ +

Definition at line 152 of file devcsr.h.

+ +
+
+ +

◆ CSRWrite24

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define CSRWrite24( addr,
 val 
)   do{ CSRWrite16(addr,(val&0xffff00)>>8); CSRWrite8(addr+8,val&0xff); }while(0)
+
+ +

Definition at line 155 of file devcsr.h.

+ +
+
+ +

◆ CSRWrite32

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define CSRWrite32( addr,
 val 
)   do{ CSRWrite24(addr,(val&0xffffff00)>>8); CSRWrite8(addr+12,val&0xff); }while(0)
+
+ +

Definition at line 158 of file devcsr.h.

+ +
+
+ +

◆ CSRWrite8

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define CSRWrite8( addr,
 val 
)   iowrite8(addr, val)
+
+ +

Definition at line 150 of file devcsr.h.

+ +
+
+ +

◆ DEVLIBVME_MAJOR

+ +
+
+ + + + +
#define DEVLIBVME_MAJOR   1
+
+ +

API major version.

+ +

Definition at line 50 of file devcsr.h.

+ +
+
+ +

◆ DEVLIBVME_MINOR

+ +
+
+ + + + +
#define DEVLIBVME_MINOR   0
+
+ +

API minor version.

+ +

Definition at line 51 of file devcsr.h.

+ +
+
+ +

◆ VMECSR_END

+ +
+
+ + + + +
#define VMECSR_END   {0,0,0}
+
+ +

Must be the last entry in a device list.

+ +

Definition at line 63 of file devcsr.h.

+ +
+
+ +

◆ VMECSRANY

+ +
+
+ + + + +
#define VMECSRANY   0xFfffFfff
+
+ +

Match any value. May be used in any field of VMECSRID.

+ +

Definition at line 66 of file devcsr.h.

+ +
+
+ +

◆ VMECSRSLOTMAX

+ +
+
+ + + + +
#define VMECSRSLOTMAX   ((1<<5)-1)
+
+ +

The highest slot number.

+ +

Definition at line 69 of file devcsr.h.

+ +
+
+

Function Documentation

+ +

◆ CSRSetBase()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
INLINE void CSRSetBase (volatile void * base,
epicsUInt8 N,
epicsUInt32 addr,
epicsUInt8 amod 
)
+
+ +

Set base address for VME64x function N.

+
Parameters
+ + + + + +
baseThe CSR base address of a slot
NA ADER number (0-7)
addrBase address to set for given ADER
amodVME address modifier to use for the given ADER
+
+
+ +

Definition at line 335 of file devcsr.h.

+ +
+
+ +

◆ devCSRProbeSlot()

+ +
+
+ + + + + + + + +
epicsShareFunc volatile unsigned char* devCSRProbeSlot (int slot)
+
+ +

Get the CSR base address for a slot.

+

Test a single slot for the presense of VME64 complient module. Succeeds if a card is present and provides the standard registers.

+
Warning
Cards which do not provide the CR_ASCII_C and CR_ASCII_R registers with the correct values ('C' and 'R') will be ignored. This rejects cards which use the CSR address space for some other purpose and don't provide the standard registers.
+
Parameters
+ + +
slotThe VME slot number (0-31)
+
+
+
Return values
+ + + +
NULLOn all failures
!NULLA pointer to slot's CSR base address
+
+
+ +

Definition at line 18 of file devcsr.c.

+ +
+
+ +

◆ devCSRTestSlot()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
epicsShareFunc volatile unsigned char* devCSRTestSlot (const struct VMECSRID * devs,
int slot,
struct VMECSRID * info 
)
+
+ +

Probe a VME slot then check its ID.

+

Calls devCSRProbeSlot(). If a card is found the PCI ID fields are compared against the given VMECSRID list. The base address is returned if the card matches and NULL otherwise.

+

If info is non-NULL then the structure it points to will be filled with the ID information of the matching card.

+

An identifier list should be defined like:

static const struct VMECSRID vmedevices[] = {
{0x123456, 0x87654321, 0x15}
,{0x123456, 0x87654321, 0x16}
,{0x123456, 0x87655678, VMECSRANY}
,{0x214365, VMECSRANY, VMECSRANY}
,VMECSR_END
};
Parameters
+ + + + +
devsA list of PCI device IDs (wildcards optional).
slotVME slot number (0-31)
infoIf not NULL the exact ID of the matching device is copied here.
+
+
+
Return values
+ + + +
NULLIt no card is present, or the card does not match.
!NULLIf a card matching an entry in the device list is found.
+
+
+ +

Definition at line 83 of file devcsr.c.

+ +
+
+ +

◆ vmecsrdump()

+ +
+
+ + + + + + + + +
epicsShareExtern void vmecsrdump (int verb)
+
+ +

Decode contents of CSR/CR for all cards and print to screen.

+

Calls vmecsrprint() on all slots (0-21)

+
Parameters
+ + +
verbLevel of detail (0-2)
+
+
+ +

Definition at line 233 of file devcsr.c.

+ +
+
+ +

◆ vmecsrprint()

+ +
+
+ + + + + + + + + + + + + + + + + + +
epicsShareExtern void vmecsrprint (int N,
int verb 
)
+
+ +

Decode contents of CSR/CR and print to screen.

+
    +
  • v=0 - basic identification info (vendor/board id)
    • +
  • v=1 - config/capability info
    • +
  • v=2 - hex dump of start of CR
    • +
+
Parameters
+ + + +
NVME slot number (0-31)
verbLevel of detail (0-2)
+
+
+ +

Definition at line 119 of file devcsr.c.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/group__vmecsrregs.html b/group__vmecsrregs.html new file mode 100644 index 0000000..4aed143 --- /dev/null +++ b/group__vmecsrregs.html @@ -0,0 +1,1289 @@ + + + + + + + +devLib2: VME CSR Register Definitions + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + +
+
+
+Macros
+
+
VME CSR Register Definitions
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define CR_ROM_CHECKSUM   0x0003
 8-bit checksum of Configuration ROM space More...
 
#define CR_ROM_LENGTH   0x0007
 Number of bytes in Configuration ROM to checksum. More...
 
#define CR_DATA_ACCESS_WIDTH   0x0013
 Configuration ROM area (CR) data access method. More...
 
#define CSR_DATA_ACCESS_WIDTH   0x0017
 Control/Status Reg area (CSR) data access method. More...
 
#define CR_SPACE_ID   0x001B
 CR/CSR space ID (VME64, VME64X, etc). More...
 
#define CR_ASCII_C   0x001F
 ASCII "C" (identifies this as CR space) More...
 
#define CR_ASCII_R   0x0023
 ASCII "R" (identifies this as CR space) More...
 
#define CR_IEEE_OUI   0x0027
 IEEE Organizationally Unique Identifier (OUI) More...
 
#define CR_IEEE_OUI_BYTES   3
 Number of bytes in manufacturer's OUI. More...
 
#define CR_BOARD_ID   0x0033
 Manufacturer's board ID. More...
 
#define CR_BOARD_ID_BYTES   4
 Number of bytes in manufacturer's OUI. More...
 
#define CR_REVISION_ID   0x0043
 Manufacturer's board revision ID. More...
 
#define CR_REVISION_ID_BYTES   4
 Number of bytes in board revision ID. More...
 
#define CR_ASCII_STRING   0x0053
 Offset to ASCII string (manufacturer-specific) More...
 
#define CR_PROGRAM_ID   0x007F
 Program ID code for CR space. More...
 
#define CR_BEG_UCR   0x0083
 Offset to start of manufacturer-defined CR space. More...
 
#define CR_END_UCR   0x008F
 Offset to end of manufacturer-defined CR space. More...
 
#define CR_BEG_UCSR_BYTES   3
 Number of bytes in User CSR starting offset. More...
 
#define CR_BEG_CRAM   0x009B
 Offset to start of Configuration RAM (CRAM) space. More...
 
#define CR_END_CRAM   0x00A7
 Offset to end of Configuration RAM (CRAM) space. More...
 
#define CR_BEG_UCSR   0x00B3
 Offset to start of manufacturer-defined CSR space. More...
 
#define CR_END_UCSR   0x00BF
 Offset to end of manufacturer-defined CSR space. More...
 
#define CR_BEG_SN   0x00CB
 Offset to beginning of board serial number. More...
 
#define CR_END_SN   0x00DF
 Offset to end of board serial number. More...
 
#define CR_SLAVE_CHAR   0x00E3
 Board's slave-mode characteristics. More...
 
#define CR_UD_SLAVE_CHAR   0x00E7
 Manufacturer-defined slave-mode characteristics. More...
 
#define CR_MASTER_CHAR   0x00EB
 Board's master-mode characteristics. More...
 
#define CR_UD_MASTER_CHAR   0x00EF
 Manufacturer-defined master-mode characteristics. More...
 
#define CR_IRQ_HANDLER_CAP   0x00F3
 Interrupt levels board can respond to (handle) More...
 
#define CR_IRQ_CAP   0x00F7
 Interrupt levels board can assert. More...
 
#define CR_CRAM_WIDTH   0x00FF
 Configuration RAM (CRAM) data access method) More...
 
#define CR_FN_DAWPR(N)   ( 0x0103 + (N)*0x04 ) /* N = 0 -> 7 */
 Start of Data Access Width Parameter (DAWPR) regs. More...
 
#define CR_DAWPR_BYTES   1 /* Number of bytes in a DAWPR register */
 
#define CR_FN_AMCAP(N)   ( 0x0123 + (N)*0x20 ) /* N = 0 -> 7 */
 Start of Address Mode Capability (AMCAP) registers. More...
 
#define CR_AMCAP_BYTES   8 /* Number of bytes in an AMCAP register */
 
#define CR_FN_XAMCAP(N)   ( 0x0223 + (N)*0x80 ) /* N = 0 -> 7 */
 Start of Extended Address Mode Cap (XAMCAP) registers. More...
 
#define CR_XAMCAP_BYTES   32 /* Number of bytes in an XAMCAP register */
 
#define CR_FN_ADEM(N)   ( 0x0623 + (N)*0x10 ) /* N = 0 -> 7 */
 Start of Address Decoder Mask (ADEM) registers. More...
 
#define CR_ADEM_BYTES   4 /* Number of bytes in an ADEM register */
 
#define CR_MASTER_DAWPR   0x06AF
 Master Data Access Width Parameter. More...
 
#define CR_MASTER_AMCAP   0x06B3
 Master Address Mode Capabilities (8 entries) More...
 
#define CR_MASTER_XAMCAP   0x06D3
 Master Extended Address Mode Capabilities (8 entries) More...
 
#define CR_SIZE   0x0750
 Size of CR space (in total bytes) More...
 
#define CR_BYTES   (CR_SIZE>>2)
 Number of bytes in CR space. More...
 
#define CSR_BAR   0x7ffff
 Base Address Register (MSB of our CR/CSR address) More...
 
#define CSR_BIT_SET   0x7fffb
 Bit Set Register (writing a 1 sets the control bit) More...
 
#define CSR_BIT_CLEAR   0x7fff7
 Bit Clear Register (writing a 1 clears the control bit) More...
 
#define CSR_CRAM_OWNER   0x7fff3
 Configuration RAM Owner Register (0 = not owned) More...
 
#define CSR_UD_BIT_SET   0x7ffef
 User-Defined Bit Set Register (for user-defined fns) More...
 
#define CSR_UD_BIT_CLEAR   0x7ffeb
 User-Defined Bit Clear Register (for user-defined fns) More...
 
#define CSR_FN_ADER(N)   (0x7ff63 + (N)*0x10) /* N = 0 -> 7 */
 Function N Address Decoder Compare Register (1st byte) More...
 
#define CSR_ADER_BYTES   4 /* Number of bytes in an ADER register */
 
#define CSR_BITSET_RESET_MODE   0x80
 Module is in reset mode. More...
 
#define CSR_BITSET_SYSFAIL_ENA   0x40
 SYSFAIL driver is enabled. More...
 
#define CSR_BITSET_MODULE_FAIL   0x20
 Module has failed. More...
 
#define CSR_BITSET_MODULE_ENA   0x10
 Module is enabled. More...
 
#define CSR_BITSET_BERR   0x08
 Module has asserted a Bus Error. More...
 
#define CSR_BITSET_CRAM_OWNED   0x04
 CRAM is owned. More...
 
+

Detailed Description

+

Common defininitions for registers found in the Configuration Rom (CR) on VME64 and VME64x cards.

+

These registers are addressed with the CSR address space.

+

The CR is a little strange in that all values are single bytes (D8), but still have 4 byte spacing. For example the Organizationaly Unique Identifier (OUI) is 3 bytes long. The first byte is offset 0x27, the second is 0x2B, and the third is 0x2F.

+

The following definitions were originally taken from the mrfEventSystem IOC written by: Jukka Pietarinen (Micro-Research Finland, Oy) Till Straumann (SLAC) Eric Bjorklund (LANSCE)

+

Corrected against 'The VMEBus Handbook' (Ch 5.6) ISBN 1-885731-08-6

+

Macro Definition Documentation

+ +

◆ CR_ADEM_BYTES

+ +
+
+ + + + +
#define CR_ADEM_BYTES   4 /* Number of bytes in an ADEM register */
+
+ +

Definition at line 278 of file devcsr.h.

+ +
+
+ +

◆ CR_AMCAP_BYTES

+ +
+
+ + + + +
#define CR_AMCAP_BYTES   8 /* Number of bytes in an AMCAP register */
+
+ +

Definition at line 268 of file devcsr.h.

+ +
+
+ +

◆ CR_ASCII_C

+ +
+
+ + + + +
#define CR_ASCII_C   0x001F
+
+ +

ASCII "C" (identifies this as CR space)

+ +

Definition at line 222 of file devcsr.h.

+ +
+
+ +

◆ CR_ASCII_R

+ +
+
+ + + + +
#define CR_ASCII_R   0x0023
+
+ +

ASCII "R" (identifies this as CR space)

+ +

Definition at line 223 of file devcsr.h.

+ +
+
+ +

◆ CR_ASCII_STRING

+ +
+
+ + + + +
#define CR_ASCII_STRING   0x0053
+
+ +

Offset to ASCII string (manufacturer-specific)

+ +

Definition at line 231 of file devcsr.h.

+ +
+
+ +

◆ CR_BEG_CRAM

+ +
+
+ + + + +
#define CR_BEG_CRAM   0x009B
+
+ +

Offset to start of Configuration RAM (CRAM) space.

+ +

Definition at line 240 of file devcsr.h.

+ +
+
+ +

◆ CR_BEG_SN

+ +
+
+ + + + +
#define CR_BEG_SN   0x00CB
+
+ +

Offset to beginning of board serial number.

+ +

Definition at line 246 of file devcsr.h.

+ +
+
+ +

◆ CR_BEG_UCR

+ +
+
+ + + + +
#define CR_BEG_UCR   0x0083
+
+ +

Offset to start of manufacturer-defined CR space.

+ +

Definition at line 236 of file devcsr.h.

+ +
+
+ +

◆ CR_BEG_UCSR

+ +
+
+ + + + +
#define CR_BEG_UCSR   0x00B3
+
+ +

Offset to start of manufacturer-defined CSR space.

+ +

Definition at line 243 of file devcsr.h.

+ +
+
+ +

◆ CR_BEG_UCSR_BYTES

+ +
+
+ + + + +
#define CR_BEG_UCSR_BYTES   3
+
+ +

Number of bytes in User CSR starting offset.

+ +

Definition at line 238 of file devcsr.h.

+ +
+
+ +

◆ CR_BOARD_ID

+ +
+
+ + + + +
#define CR_BOARD_ID   0x0033
+
+ +

Manufacturer's board ID.

+ +

Definition at line 227 of file devcsr.h.

+ +
+
+ +

◆ CR_BOARD_ID_BYTES

+ +
+
+ + + + +
#define CR_BOARD_ID_BYTES   4
+
+ +

Number of bytes in manufacturer's OUI.

+ +

Definition at line 228 of file devcsr.h.

+ +
+
+ +

◆ CR_BYTES

+ +
+
+ + + + +
#define CR_BYTES   (CR_SIZE>>2)
+
+ +

Number of bytes in CR space.

+ +

Definition at line 288 of file devcsr.h.

+ +
+
+ +

◆ CR_CRAM_WIDTH

+ +
+
+ + + + +
#define CR_CRAM_WIDTH   0x00FF
+
+ +

Configuration RAM (CRAM) data access method)

+ +

Definition at line 258 of file devcsr.h.

+ +
+
+ +

◆ CR_DATA_ACCESS_WIDTH

+ +
+
+ + + + +
#define CR_DATA_ACCESS_WIDTH   0x0013
+
+ +

Configuration ROM area (CR) data access method.

+ +

Definition at line 218 of file devcsr.h.

+ +
+
+ +

◆ CR_DAWPR_BYTES

+ +
+
+ + + + +
#define CR_DAWPR_BYTES   1 /* Number of bytes in a DAWPR register */
+
+ +

Definition at line 263 of file devcsr.h.

+ +
+
+ +

◆ CR_END_CRAM

+ +
+
+ + + + +
#define CR_END_CRAM   0x00A7
+
+ +

Offset to end of Configuration RAM (CRAM) space.

+ +

Definition at line 241 of file devcsr.h.

+ +
+
+ +

◆ CR_END_SN

+ +
+
+ + + + +
#define CR_END_SN   0x00DF
+
+ +

Offset to end of board serial number.

+ +

Definition at line 247 of file devcsr.h.

+ +
+
+ +

◆ CR_END_UCR

+ +
+
+ + + + +
#define CR_END_UCR   0x008F
+
+ +

Offset to end of manufacturer-defined CR space.

+ +

Definition at line 237 of file devcsr.h.

+ +
+
+ +

◆ CR_END_UCSR

+ +
+
+ + + + +
#define CR_END_UCSR   0x00BF
+
+ +

Offset to end of manufacturer-defined CSR space.

+ +

Definition at line 244 of file devcsr.h.

+ +
+
+ +

◆ CR_FN_ADEM

+ +
+
+ + + + + + + + +
#define CR_FN_ADEM( N)   ( 0x0623 + (N)*0x10 ) /* N = 0 -> 7 */
+
+ +

Start of Address Decoder Mask (ADEM) registers.

+ +

Definition at line 275 of file devcsr.h.

+ +
+
+ +

◆ CR_FN_AMCAP

+ +
+
+ + + + + + + + +
#define CR_FN_AMCAP( N)   ( 0x0123 + (N)*0x20 ) /* N = 0 -> 7 */
+
+ +

Start of Address Mode Capability (AMCAP) registers.

+ +

Definition at line 265 of file devcsr.h.

+ +
+
+ +

◆ CR_FN_DAWPR

+ +
+
+ + + + + + + + +
#define CR_FN_DAWPR( N)   ( 0x0103 + (N)*0x04 ) /* N = 0 -> 7 */
+
+ +

Start of Data Access Width Parameter (DAWPR) regs.

+ +

Definition at line 260 of file devcsr.h.

+ +
+
+ +

◆ CR_FN_XAMCAP

+ +
+
+ + + + + + + + +
#define CR_FN_XAMCAP( N)   ( 0x0223 + (N)*0x80 ) /* N = 0 -> 7 */
+
+ +

Start of Extended Address Mode Cap (XAMCAP) registers.

+ +

Definition at line 270 of file devcsr.h.

+ +
+
+ +

◆ CR_IEEE_OUI

+ +
+
+ + + + +
#define CR_IEEE_OUI   0x0027
+
+ +

IEEE Organizationally Unique Identifier (OUI)

+ +

Definition at line 225 of file devcsr.h.

+ +
+
+ +

◆ CR_IEEE_OUI_BYTES

+ +
+
+ + + + +
#define CR_IEEE_OUI_BYTES   3
+
+ +

Number of bytes in manufacturer's OUI.

+ +

Definition at line 226 of file devcsr.h.

+ +
+
+ +

◆ CR_IRQ_CAP

+ +
+
+ + + + +
#define CR_IRQ_CAP   0x00F7
+
+ +

Interrupt levels board can assert.

+ +

Definition at line 256 of file devcsr.h.

+ +
+
+ +

◆ CR_IRQ_HANDLER_CAP

+ +
+
+ + + + +
#define CR_IRQ_HANDLER_CAP   0x00F3
+
+ +

Interrupt levels board can respond to (handle)

+ +

Definition at line 255 of file devcsr.h.

+ +
+
+ +

◆ CR_MASTER_AMCAP

+ +
+
+ + + + +
#define CR_MASTER_AMCAP   0x06B3
+
+ +

Master Address Mode Capabilities (8 entries)

+ +

Definition at line 281 of file devcsr.h.

+ +
+
+ +

◆ CR_MASTER_CHAR

+ +
+
+ + + + +
#define CR_MASTER_CHAR   0x00EB
+
+ +

Board's master-mode characteristics.

+ +

Definition at line 252 of file devcsr.h.

+ +
+
+ +

◆ CR_MASTER_DAWPR

+ +
+
+ + + + +
#define CR_MASTER_DAWPR   0x06AF
+
+ +

Master Data Access Width Parameter.

+ +

Definition at line 280 of file devcsr.h.

+ +
+
+ +

◆ CR_MASTER_XAMCAP

+ +
+
+ + + + +
#define CR_MASTER_XAMCAP   0x06D3
+
+ +

Master Extended Address Mode Capabilities (8 entries)

+ +

Definition at line 282 of file devcsr.h.

+ +
+
+ +

◆ CR_PROGRAM_ID

+ +
+
+ + + + +
#define CR_PROGRAM_ID   0x007F
+
+ +

Program ID code for CR space.

+ +

Definition at line 232 of file devcsr.h.

+ +
+
+ +

◆ CR_REVISION_ID

+ +
+
+ + + + +
#define CR_REVISION_ID   0x0043
+
+ +

Manufacturer's board revision ID.

+ +

Definition at line 229 of file devcsr.h.

+ +
+
+ +

◆ CR_REVISION_ID_BYTES

+ +
+
+ + + + +
#define CR_REVISION_ID_BYTES   4
+
+ +

Number of bytes in board revision ID.

+ +

Definition at line 230 of file devcsr.h.

+ +
+
+ +

◆ CR_ROM_CHECKSUM

+ +
+
+ + + + +
#define CR_ROM_CHECKSUM   0x0003
+
+ +

8-bit checksum of Configuration ROM space

+ +

Definition at line 216 of file devcsr.h.

+ +
+
+ +

◆ CR_ROM_LENGTH

+ +
+
+ + + + +
#define CR_ROM_LENGTH   0x0007
+
+ +

Number of bytes in Configuration ROM to checksum.

+ +

Definition at line 217 of file devcsr.h.

+ +
+
+ +

◆ CR_SIZE

+ +
+
+ + + + +
#define CR_SIZE   0x0750
+
+ +

Size of CR space (in total bytes)

+ +

Definition at line 287 of file devcsr.h.

+ +
+
+ +

◆ CR_SLAVE_CHAR

+ +
+
+ + + + +
#define CR_SLAVE_CHAR   0x00E3
+
+ +

Board's slave-mode characteristics.

+ +

Definition at line 249 of file devcsr.h.

+ +
+
+ +

◆ CR_SPACE_ID

+ +
+
+ + + + +
#define CR_SPACE_ID   0x001B
+
+ +

CR/CSR space ID (VME64, VME64X, etc).

+ +

Definition at line 220 of file devcsr.h.

+ +
+
+ +

◆ CR_UD_MASTER_CHAR

+ +
+
+ + + + +
#define CR_UD_MASTER_CHAR   0x00EF
+
+ +

Manufacturer-defined master-mode characteristics.

+ +

Definition at line 253 of file devcsr.h.

+ +
+
+ +

◆ CR_UD_SLAVE_CHAR

+ +
+
+ + + + +
#define CR_UD_SLAVE_CHAR   0x00E7
+
+ +

Manufacturer-defined slave-mode characteristics.

+ +

Definition at line 250 of file devcsr.h.

+ +
+
+ +

◆ CR_XAMCAP_BYTES

+ +
+
+ + + + +
#define CR_XAMCAP_BYTES   32 /* Number of bytes in an XAMCAP register */
+
+ +

Definition at line 273 of file devcsr.h.

+ +
+
+ +

◆ CSR_ADER_BYTES

+ +
+
+ + + + +
#define CSR_ADER_BYTES   4 /* Number of bytes in an ADER register */
+
+ +

Definition at line 308 of file devcsr.h.

+ +
+
+ +

◆ CSR_BAR

+ +
+
+ + + + +
#define CSR_BAR   0x7ffff
+
+ +

Base Address Register (MSB of our CR/CSR address)

+ +

Definition at line 296 of file devcsr.h.

+ +
+
+ +

◆ CSR_BIT_CLEAR

+ +
+
+ + + + +
#define CSR_BIT_CLEAR   0x7fff7
+
+ +

Bit Clear Register (writing a 1 clears the control bit)

+ +

Definition at line 298 of file devcsr.h.

+ +
+
+ +

◆ CSR_BIT_SET

+ +
+
+ + + + +
#define CSR_BIT_SET   0x7fffb
+
+ +

Bit Set Register (writing a 1 sets the control bit)

+ +

Definition at line 297 of file devcsr.h.

+ +
+
+ +

◆ CSR_BITSET_BERR

+ +
+
+ + + + +
#define CSR_BITSET_BERR   0x08
+
+ +

Module has asserted a Bus Error.

+ +

Definition at line 317 of file devcsr.h.

+ +
+
+ +

◆ CSR_BITSET_CRAM_OWNED

+ +
+
+ + + + +
#define CSR_BITSET_CRAM_OWNED   0x04
+
+ +

CRAM is owned.

+ +

Definition at line 318 of file devcsr.h.

+ +
+
+ +

◆ CSR_BITSET_MODULE_ENA

+ +
+
+ + + + +
#define CSR_BITSET_MODULE_ENA   0x10
+
+ +

Module is enabled.

+ +

Definition at line 316 of file devcsr.h.

+ +
+
+ +

◆ CSR_BITSET_MODULE_FAIL

+ +
+
+ + + + +
#define CSR_BITSET_MODULE_FAIL   0x20
+
+ +

Module has failed.

+ +

Definition at line 315 of file devcsr.h.

+ +
+
+ +

◆ CSR_BITSET_RESET_MODE

+ +
+
+ + + + +
#define CSR_BITSET_RESET_MODE   0x80
+
+ +

Module is in reset mode.

+ +

Definition at line 313 of file devcsr.h.

+ +
+
+ +

◆ CSR_BITSET_SYSFAIL_ENA

+ +
+
+ + + + +
#define CSR_BITSET_SYSFAIL_ENA   0x40
+
+ +

SYSFAIL driver is enabled.

+ +

Definition at line 314 of file devcsr.h.

+ +
+
+ +

◆ CSR_CRAM_OWNER

+ +
+
+ + + + +
#define CSR_CRAM_OWNER   0x7fff3
+
+ +

Configuration RAM Owner Register (0 = not owned)

+ +

Definition at line 302 of file devcsr.h.

+ +
+
+ +

◆ CSR_DATA_ACCESS_WIDTH

+ +
+
+ + + + +
#define CSR_DATA_ACCESS_WIDTH   0x0017
+
+ +

Control/Status Reg area (CSR) data access method.

+ +

Definition at line 219 of file devcsr.h.

+ +
+
+ +

◆ CSR_FN_ADER

+ +
+
+ + + + + + + + +
#define CSR_FN_ADER( N)   (0x7ff63 + (N)*0x10) /* N = 0 -> 7 */
+
+ +

Function N Address Decoder Compare Register (1st byte)

+ +

Definition at line 305 of file devcsr.h.

+ +
+
+ +

◆ CSR_UD_BIT_CLEAR

+ +
+
+ + + + +
#define CSR_UD_BIT_CLEAR   0x7ffeb
+
+ +

User-Defined Bit Clear Register (for user-defined fns)

+ +

Definition at line 304 of file devcsr.h.

+ +
+
+ +

◆ CSR_UD_BIT_SET

+ +
+
+ + + + +
#define CSR_UD_BIT_SET   0x7ffef
+
+ +

User-Defined Bit Set Register (for user-defined fns)

+ +

Definition at line 303 of file devcsr.h.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/index.html b/index.html new file mode 100644 index 0000000..a8d19a6 --- /dev/null +++ b/index.html @@ -0,0 +1,250 @@ + + + + + + + +devLib2: devLib2 MMIO Bus Access Library + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + +
+
+
+
devLib2 MMIO Bus Access Library
+
+
+

+What is it?

+

devLib2 is an extension to the EPICS OS independent VME bus access library found in the EPICS Base. The MMIO API is included in EPICS Base >=3.15.0.2

+

+Source

+

Releases can be found at http://sourceforge.net/projects/epics/files/devlib2/

+

VCS source browser https://github.com/epics-modules/devlib2

+

Or checked out with

+

git clone https://github.com/epics-modules/devlib2.git

+

The canonical version of this page is http://epics.sourceforge.net/devlib2/

+

+Requires

+

EPICS Base >= 3.14.8.2

+

http://www.aps.anl.gov/epics/

+

+Features

+

devLib2 adds features in several areas: PCI bus access, VME64x CSR/CSR, and memory mapped I/O (MMIO) operations.

+

+PCI Bus

+

The PCI bus access interface is entirely new. It is currently implemented for RTEMS, vxWorks, and Linux (with some limitations). The PCI interface provides functions for: searching the bus, mapping devices into process memory, and (dis)connecting interrupts.

+

Runtime selection of implementations is also supported. This allows code using this interface to compile and link for all target, even those which lack an implementation.

+ + + + +

+Generic PCI driver

+

The exploreApp PCI driver/hardware development tool is a generic EPICS driver intended to support development of custom PCI/PCIe devices. It provides a set of records which read/write to individual registers. Basic support for interrupts is also available (Linux only).

+

+VME CSR

+

The VME64x library provides several functions for accessing the CSR/CR address space defined by VME64 and extended by VME64x. This includes: probing by slot number and matching by identifier registers, definitions of standard registers, and functions to access them.

+ + + + +

+MMIO

+

The MMIO library provides an OS and CPU architecture independent way to safely access memory mapped I/O devices. Makes guarantees of the width and order of accesses.

+ +

+Changelog

+

+2.12 (UNRELEASED)

+ +

+2.11 (Apr 2020)

+ +

+2.10 (Nov 2018)

+ +

+2.9 (July 2017)

+ +

+2.8 (Sept. 2016)

+ +

+2.7 (Jan. 2016)

+ +

+2.6 (May 2015)

+ +

Work by Andrew Johnson

+ +

Work by Till Straumann

+ +

Work by Dirk Zimoch

+ +

Work by Michael Davidsaver

+ +

+2.5 (May 2014)

+ +

+2.4 (Oct. 2012)

+ +

+2.3 (Apr. 2012)

+ +

+2.2 (Sept. 2011)

+ +

+2.1 (Jan. 2011)

+ +

+2.0 (Sept. 2010)

+ +
Author
Michael Davidsaver mdavi.nosp@m.dsav.nosp@m.er@gm.nosp@m.ail..nosp@m.com
+
+Till Straumann strau.nosp@m.man@.nosp@m.slac..nosp@m.stan.nosp@m.ford..nosp@m.edu
+
+Dirk Zimoch dirk..nosp@m.zimo.nosp@m.ch@ps.nosp@m.i.ch
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/iocreg_8c.html b/iocreg_8c.html new file mode 100644 index 0000000..fed790e --- /dev/null +++ b/iocreg_8c.html @@ -0,0 +1,89 @@ + + + + + + + +devLib2: iocreg.c File Reference + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+Functions
+
+
iocreg.c File Reference
+
+
+
#include <iocsh.h>
+#include <epicsExport.h>
+#include "devcsr.h"
+
+

Go to the source code of this file.

+ + + + +

+Functions

 epicsExportRegistrar (vmecsr)
 
+

Function Documentation

+ +

◆ epicsExportRegistrar()

+ +
+
+ + + + + + + + +
epicsExportRegistrar (vmecsr )
+
+ +
+
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/iocreg_8c_source.html b/iocreg_8c_source.html new file mode 100644 index 0000000..05ac9f7 --- /dev/null +++ b/iocreg_8c_source.html @@ -0,0 +1,61 @@ + + + + + + + +devLib2: iocreg.c Source File + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + + +
+
+
+
iocreg.c
+
+
+Go to the documentation of this file.
1 
2 #include <iocsh.h>
3 #include <epicsExport.h>
4 
5 #include "devcsr.h"
6 
7 /* vmecsrprint */
8 static const iocshArg vmecsrprintArg0 = { "slot (1-31)",iocshArgInt};
9 static const iocshArg vmecsrprintArg1 = { "verbosity (>=0)",iocshArgInt};
10 static const iocshArg * const vmecsrprintArgs[2] =
11  {&vmecsrprintArg0,&vmecsrprintArg1};
12 static const iocshFuncDef vmecsrprintFuncDef =
13  {"vmecsrprint",2,vmecsrprintArgs};
14 
15 static
16 void vmecsrprintCall(const iocshArgBuf *arg)
17 {
18  vmecsrprint(arg[0].ival,arg[1].ival);
19 }
20 
21 /* vmecsrdump */
22 static const iocshArg vmecsrdumpArg0 = { "verbosity (>=0)",iocshArgInt};
23 static const iocshArg * const vmecsrdumpArgs[1] =
24  {&vmecsrdumpArg0};
25 static const iocshFuncDef vmecsrdumpFuncDef =
26  {"vmecsrdump",1,vmecsrdumpArgs};
27 
28 static
29 void vmecsrdumpCall(const iocshArgBuf *arg)
30 {
31  vmecsrdump(arg[0].ival);
32 }
33 
34 static
35 void vmecsr(void)
36 {
37  iocshRegister(&vmecsrprintFuncDef,vmecsrprintCall);
38  iocshRegister(&vmecsrdumpFuncDef,vmecsrdumpCall);
39 }
40 epicsExportRegistrar(vmecsr);
+
vmecsrprint
void vmecsrprint(int N, int v)
Decode contents of CSR/CR and print to screen.
Definition: devcsr.c:119
+
epicsExportRegistrar
epicsExportRegistrar(vmecsr)
+
vmecsrdump
void vmecsrdump(int v)
Decode contents of CSR/CR for all cards and print to screen.
Definition: devcsr.c:233
+
+ +
+Generated by   +doxygen + 1.8.13 +
+ + diff --git a/iocsh.html b/iocsh.html new file mode 100644 index 0000000..d23b74c --- /dev/null +++ b/iocsh.html @@ -0,0 +1,73 @@ + + + + + + + +devLib2: IOC shell functions + + + + + + +
+
+ + + + + + +
+
devLib2 +  2.11 +
+
+
+ + + + + + +
+
+
+
IOC shell functions
+
+
+

Several IOC shell functions are provided to access PCI and VME devices

+

+IOCsh functions for PCI devices

+ +

To use, begin by calling pcidiagset() to select the device and BAR that subsequent read/write calls will operate on.

+

+IOCsh functions for VME devices

+ +
+ +
+Generated by   +doxygen + 1.8.13 +
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0},disableSelection:function(){return this.bind((a.support.selectstart?"selectstart":"mousedown")+".ui-disableSelection",function(e){e.preventDefault()})},enableSelection:function(){return this.unbind(".ui-disableSelection")}});a.each(["Width","Height"],function(g,e){var f=e==="Width"?["Left","Right"]:["Top","Bottom"],h=e.toLowerCase(),k={innerWidth:a.fn.innerWidth,innerHeight:a.fn.innerHeight,outerWidth:a.fn.outerWidth,outerHeight:a.fn.outerHeight};function j(m,l,i,n){a.each(f,function(){l-=parseFloat(a.curCSS(m,"padding"+this,true))||0;if(i){l-=parseFloat(a.curCSS(m,"border"+this+"Width",true))||0}if(n){l-=parseFloat(a.curCSS(m,"margin"+this,true))||0}});return l}a.fn["inner"+e]=function(i){if(i===d){return k["inner"+e].call(this)}return this.each(function(){a(this).css(h,j(this,i)+"px")})};a.fn["outer"+e]=function(i,l){if(typeof i!=="number"){return k["outer"+e].call(this,i)}return this.each(function(){a(this).css(h,j(this,i,true,l)+"px")})}});function c(g,e){var j=g.nodeName.toLowerCase();if("area"===j){var i=g.parentNode,h=i.name,f;if(!g.href||!h||i.nodeName.toLowerCase()!=="map"){return false}f=a("img[usemap=#"+h+"]")[0];return !!f&&b(f)}return(/input|select|textarea|button|object/.test(j)?!g.disabled:"a"==j?g.href||e:e)&&b(g)}function b(e){return !a(e).parents().andSelf().filter(function(){return a.curCSS(this,"visibility")==="hidden"||a.expr.filters.hidden(this)}).length}a.extend(a.expr[":"],{data:function(g,f,e){return !!a.data(g,e[3])},focusable:function(e){return c(e,!isNaN(a.attr(e,"tabindex")))},tabbable:function(g){var e=a.attr(g,"tabindex"),f=isNaN(e);return(f||e>=0)&&c(g,!f)}});a(function(){var e=document.body,f=e.appendChild(f=document.createElement("div"));f.offsetHeight;a.extend(f.style,{minHeight:"100px",height:"auto",padding:0,borderWidth:0});a.support.minHeight=f.offsetHeight===100;a.support.selectstart="onselectstart" in f;e.removeChild(f).style.display="none"});a.extend(a.ui,{plugin:{add:function(f,g,j){var h=a.ui[f].prototype;for(var e in j){h.plugins[e]=h.plugins[e]||[];h.plugins[e].push([g,j[e]])}},call:function(e,g,f){var j=e.plugins[g];if(!j||!e.element[0].parentNode){return}for(var h=0;h0){return true}h[e]=1;g=(h[e]>0);h[e]=0;return g},isOverAxis:function(f,e,g){return(f>e)&&(f<(e+g))},isOver:function(j,f,i,h,e,g){return a.ui.isOverAxis(j,i,e)&&a.ui.isOverAxis(f,h,g)}})})(jQuery);/*! + * jQuery UI Widget 1.8.18 + * + * Copyright 2011, AUTHORS.txt (http://jqueryui.com/about) + * Dual licensed under the MIT or GPL Version 2 licenses. + * http://jquery.org/license + * + * http://docs.jquery.com/UI/Widget + */ +(function(b,d){if(b.cleanData){var c=b.cleanData;b.cleanData=function(f){for(var g=0,h;(h=f[g])!=null;g++){try{b(h).triggerHandler("remove")}catch(j){}}c(f)}}else{var a=b.fn.remove;b.fn.remove=function(e,f){return this.each(function(){if(!f){if(!e||b.filter(e,[this]).length){b("*",this).add([this]).each(function(){try{b(this).triggerHandler("remove")}catch(g){}})}}return a.call(b(this),e,f)})}}b.widget=function(f,h,e){var g=f.split(".")[0],j;f=f.split(".")[1];j=g+"-"+f;if(!e){e=h;h=b.Widget}b.expr[":"][j]=function(k){return !!b.data(k,f)};b[g]=b[g]||{};b[g][f]=function(k,l){if(arguments.length){this._createWidget(k,l)}};var i=new h();i.options=b.extend(true,{},i.options);b[g][f].prototype=b.extend(true,i,{namespace:g,widgetName:f,widgetEventPrefix:b[g][f].prototype.widgetEventPrefix||f,widgetBaseClass:j},e);b.widget.bridge(f,b[g][f])};b.widget.bridge=function(f,e){b.fn[f]=function(i){var g=typeof i==="string",h=Array.prototype.slice.call(arguments,1),j=this;i=!g&&h.length?b.extend.apply(null,[true,i].concat(h)):i;if(g&&i.charAt(0)==="_"){return j}if(g){this.each(function(){var k=b.data(this,f),l=k&&b.isFunction(k[i])?k[i].apply(k,h):k;if(l!==k&&l!==d){j=l;return false}})}else{this.each(function(){var k=b.data(this,f);if(k){k.option(i||{})._init()}else{b.data(this,f,new e(i,this))}})}return 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http://jquery.org/license + * + * http://docs.jquery.com/UI/Mouse + * + * Depends: + * jquery.ui.widget.js + */ +(function(b,c){var a=false;b(document).mouseup(function(d){a=false});b.widget("ui.mouse",{options:{cancel:":input,option",distance:1,delay:0},_mouseInit:function(){var d=this;this.element.bind("mousedown."+this.widgetName,function(e){return d._mouseDown(e)}).bind("click."+this.widgetName,function(e){if(true===b.data(e.target,d.widgetName+".preventClickEvent")){b.removeData(e.target,d.widgetName+".preventClickEvent");e.stopImmediatePropagation();return false}});this.started=false},_mouseDestroy:function(){this.element.unbind("."+this.widgetName)},_mouseDown:function(f){if(a){return}(this._mouseStarted&&this._mouseUp(f));this._mouseDownEvent=f;var e=this,g=(f.which==1),d=(typeof this.options.cancel=="string"&&f.target.nodeName?b(f.target).closest(this.options.cancel).length:false);if(!g||d||!this._mouseCapture(f)){return true}this.mouseDelayMet=!this.options.delay;if(!this.mouseDelayMet){this._mouseDelayTimer=setTimeout(function(){e.mouseDelayMet=true},this.options.delay)}if(this._mouseDistanceMet(f)&&this._mouseDelayMet(f)){this._mouseStarted=(this._mouseStart(f)!==false);if(!this._mouseStarted){f.preventDefault();return true}}if(true===b.data(f.target,this.widgetName+".preventClickEvent")){b.removeData(f.target,this.widgetName+".preventClickEvent")}this._mouseMoveDelegate=function(h){return e._mouseMove(h)};this._mouseUpDelegate=function(h){return e._mouseUp(h)};b(document).bind("mousemove."+this.widgetName,this._mouseMoveDelegate).bind("mouseup."+this.widgetName,this._mouseUpDelegate);f.preventDefault();a=true;return true},_mouseMove:function(d){if(b.browser.msie&&!(document.documentMode>=9)&&!d.button){return this._mouseUp(d)}if(this._mouseStarted){this._mouseDrag(d);return d.preventDefault()}if(this._mouseDistanceMet(d)&&this._mouseDelayMet(d)){this._mouseStarted=(this._mouseStart(this._mouseDownEvent,d)!==false);(this._mouseStarted?this._mouseDrag(d):this._mouseUp(d))}return !this._mouseStarted},_mouseUp:function(d){b(document).unbind("mousemove."+this.widgetName,this._mouseMoveDelegate).unbind("mouseup."+this.widgetName,this._mouseUpDelegate);if(this._mouseStarted){this._mouseStarted=false;if(d.target==this._mouseDownEvent.target){b.data(d.target,this.widgetName+".preventClickEvent",true)}this._mouseStop(d)}return false},_mouseDistanceMet:function(d){return(Math.max(Math.abs(this._mouseDownEvent.pageX-d.pageX),Math.abs(this._mouseDownEvent.pageY-d.pageY))>=this.options.distance)},_mouseDelayMet:function(d){return this.mouseDelayMet},_mouseStart:function(d){},_mouseDrag:function(d){},_mouseStop:function(d){},_mouseCapture:function(d){return true}})})(jQuery);(function(c,d){c.widget("ui.resizable",c.ui.mouse,{widgetEventPrefix:"resize",options:{alsoResize:false,animate:false,animateDuration:"slow",animateEasing:"swing",aspectRatio:false,autoHide:false,containment:false,ghost:false,grid:false,handles:"e,s,se",helper:false,maxHeight:null,maxWidth:null,minHeight:10,minWidth:10,zIndex:1000},_create:function(){var f=this,k=this.options;this.element.addClass("ui-resizable");c.extend(this,{_aspectRatio:!!(k.aspectRatio),aspectRatio:k.aspectRatio,originalElement:this.element,_proportionallyResizeElements:[],_helper:k.helper||k.ghost||k.animate?k.helper||"ui-resizable-helper":null});if(this.element[0].nodeName.match(/canvas|textarea|input|select|button|img/i)){this.element.wrap(c('
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');if(/sw|se|ne|nw/.test(j)){h.css({zIndex:++k.zIndex})}if("se"==j){h.addClass("ui-icon ui-icon-gripsmall-diagonal-se")}this.handles[j]=".ui-resizable-"+j;this.element.append(h)}}this._renderAxis=function(q){q=q||this.element;for(var n in this.handles){if(this.handles[n].constructor==String){this.handles[n]=c(this.handles[n],this.element).show()}if(this.elementIsWrapper&&this.originalElement[0].nodeName.match(/textarea|input|select|button/i)){var o=c(this.handles[n],this.element),p=0;p=/sw|ne|nw|se|n|s/.test(n)?o.outerHeight():o.outerWidth();var m=["padding",/ne|nw|n/.test(n)?"Top":/se|sw|s/.test(n)?"Bottom":/^e$/.test(n)?"Right":"Left"].join("");q.css(m,p);this._proportionallyResize()}if(!c(this.handles[n]).length){continue}}};this._renderAxis(this.element);this._handles=c(".ui-resizable-handle",this.element).disableSelection();this._handles.mouseover(function(){if(!f.resizing){if(this.className){var i=this.className.match(/ui-resizable-(se|sw|ne|nw|n|e|s|w)/i)}f.axis=i&&i[1]?i[1]:"se"}});if(k.autoHide){this._handles.hide();c(this.element).addClass("ui-resizable-autohide").hover(function(){if(k.disabled){return}c(this).removeClass("ui-resizable-autohide");f._handles.show()},function(){if(k.disabled){return}if(!f.resizing){c(this).addClass("ui-resizable-autohide");f._handles.hide()}})}this._mouseInit()},destroy:function(){this._mouseDestroy();var e=function(g){c(g).removeClass("ui-resizable ui-resizable-disabled ui-resizable-resizing").removeData("resizable").unbind(".resizable").find(".ui-resizable-handle").remove()};if(this.elementIsWrapper){e(this.element);var f=this.element;f.after(this.originalElement.css({position:f.css("position"),width:f.outerWidth(),height:f.outerHeight(),top:f.css("top"),left:f.css("left")})).remove()}this.originalElement.css("resize",this.originalResizeStyle);e(this.originalElement);return this},_mouseCapture:function(f){var g=false;for(var e in this.handles){if(c(this.handles[e])[0]==f.target){g=true}}return !this.options.disabled&&g},_mouseStart:function(g){var j=this.options,f=this.element.position(),e=this.element;this.resizing=true;this.documentScroll={top:c(document).scrollTop(),left:c(document).scrollLeft()};if(e.is(".ui-draggable")||(/absolute/).test(e.css("position"))){e.css({position:"absolute",top:f.top,left:f.left})}this._renderProxy();var k=b(this.helper.css("left")),h=b(this.helper.css("top"));if(j.containment){k+=c(j.containment).scrollLeft()||0;h+=c(j.containment).scrollTop()||0}this.offset=this.helper.offset();this.position={left:k,top:h};this.size=this._helper?{width:e.outerWidth(),height:e.outerHeight()}:{width:e.width(),height:e.height()};this.originalSize=this._helper?{width:e.outerWidth(),height:e.outerHeight()}:{width:e.width(),height:e.height()};this.originalPosition={left:k,top:h};this.sizeDiff={width:e.outerWidth()-e.width(),height:e.outerHeight()-e.height()};this.originalMousePosition={left:g.pageX,top:g.pageY};this.aspectRatio=(typeof j.aspectRatio=="number")?j.aspectRatio:((this.originalSize.width/this.originalSize.height)||1);var i=c(".ui-resizable-"+this.axis).css("cursor");c("body").css("cursor",i=="auto"?this.axis+"-resize":i);e.addClass("ui-resizable-resizing");this._propagate("start",g);return true},_mouseDrag:function(e){var h=this.helper,g=this.options,m={},q=this,j=this.originalMousePosition,n=this.axis;var r=(e.pageX-j.left)||0,p=(e.pageY-j.top)||0;var i=this._change[n];if(!i){return false}var l=i.apply(this,[e,r,p]),k=c.browser.msie&&c.browser.version<7,f=this.sizeDiff;this._updateVirtualBoundaries(e.shiftKey);if(this._aspectRatio||e.shiftKey){l=this._updateRatio(l,e)}l=this._respectSize(l,e);this._propagate("resize",e);h.css({top:this.position.top+"px",left:this.position.left+"px",width:this.size.width+"px",height:this.size.height+"px"});if(!this._helper&&this._proportionallyResizeElements.length){this._proportionallyResize()}this._updateCache(l);this._trigger("resize",e,this.ui());return false},_mouseStop:function(h){this.resizing=false;var i=this.options,m=this;if(this._helper){var g=this._proportionallyResizeElements,e=g.length&&(/textarea/i).test(g[0].nodeName),f=e&&c.ui.hasScroll(g[0],"left")?0:m.sizeDiff.height,k=e?0:m.sizeDiff.width;var n={width:(m.helper.width()-k),height:(m.helper.height()-f)},j=(parseInt(m.element.css("left"),10)+(m.position.left-m.originalPosition.left))||null,l=(parseInt(m.element.css("top"),10)+(m.position.top-m.originalPosition.top))||null;if(!i.animate){this.element.css(c.extend(n,{top:l,left:j}))}m.helper.height(m.size.height);m.helper.width(m.size.width);if(this._helper&&!i.animate){this._proportionallyResize()}}c("body").css("cursor","auto");this.element.removeClass("ui-resizable-resizing");this._propagate("stop",h);if(this._helper){this.helper.remove()}return false},_updateVirtualBoundaries:function(g){var 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t=(r[u]||0)+(k[u]||0);if(t&&t>=0){p[u]=t||null}});q.css(p)})};if(typeof(j.alsoResize)=="object"&&!j.alsoResize.nodeType){c.each(j.alsoResize,function(m,n){e(m,n)})}else{e(j.alsoResize)}},stop:function(e,f){c(this).removeData("resizable-alsoresize")}});c.ui.plugin.add("resizable","animate",{stop:function(i,n){var p=c(this).data("resizable"),j=p.options;var h=p._proportionallyResizeElements,e=h.length&&(/textarea/i).test(h[0].nodeName),f=e&&c.ui.hasScroll(h[0],"left")?0:p.sizeDiff.height,l=e?0:p.sizeDiff.width;var g={width:(p.size.width-l),height:(p.size.height-f)},k=(parseInt(p.element.css("left"),10)+(p.position.left-p.originalPosition.left))||null,m=(parseInt(p.element.css("top"),10)+(p.position.top-p.originalPosition.top))||null;p.element.animate(c.extend(g,m&&k?{top:m,left:k}:{}),{duration:j.animateDuration,easing:j.animateEasing,step:function(){var o={width:parseInt(p.element.css("width"),10),height:parseInt(p.element.css("height"),10),top:parseInt(p.element.css("top"),10),left:parseInt(p.element.css("left"),10)};if(h&&h.length){c(h[0]).css({width:o.width,height:o.height})}p._updateCache(o);p._propagate("resize",i)}})}});c.ui.plugin.add("resizable","containment",{start:function(f,r){var t=c(this).data("resizable"),j=t.options,l=t.element;var g=j.containment,k=(g instanceof c)?g.get(0):(/parent/.test(g))?l.parent().get(0):g;if(!k){return}t.containerElement=c(k);if(/document/.test(g)||g==document){t.containerOffset={left:0,top:0};t.containerPosition={left:0,top:0};t.parentData={element:c(document),left:0,top:0,width:c(document).width(),height:c(document).height()||document.body.parentNode.scrollHeight}}else{var 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t=c(this).data("resizable"),i=t.options,f=t.containerSize,p=t.containerOffset,m=t.size,n=t.position,r=t._aspectRatio||g.shiftKey,e={top:0,left:0},h=t.containerElement;if(h[0]!=document&&(/static/).test(h.css("position"))){e=p}if(n.left<(t._helper?p.left:0)){t.size.width=t.size.width+(t._helper?(t.position.left-p.left):(t.position.left-e.left));if(r){t.size.height=t.size.width/i.aspectRatio}t.position.left=i.helper?p.left:0}if(n.top<(t._helper?p.top:0)){t.size.height=t.size.height+(t._helper?(t.position.top-p.top):t.position.top);if(r){t.size.width=t.size.height*i.aspectRatio}t.position.top=t._helper?p.top:0}t.offset.left=t.parentData.left+t.position.left;t.offset.top=t.parentData.top+t.position.top;var l=Math.abs((t._helper?t.offset.left-e.left:(t.offset.left-e.left))+t.sizeDiff.width),s=Math.abs((t._helper?t.offset.top-e.top:(t.offset.top-p.top))+t.sizeDiff.height);var k=t.containerElement.get(0)==t.element.parent().get(0),j=/relative|absolute/.test(t.containerElement.css("position"));if(k&&j){l-=t.parentData.left}if(l+t.size.width>=t.parentData.width){t.size.width=t.parentData.width-l;if(r){t.size.height=t.size.width/t.aspectRatio}}if(s+t.size.height>=t.parentData.height){t.size.height=t.parentData.height-s;if(r){t.size.width=t.size.height*t.aspectRatio}}},stop:function(f,n){var q=c(this).data("resizable"),g=q.options,l=q.position,m=q.containerOffset,e=q.containerPosition,i=q.containerElement;var j=c(q.helper),r=j.offset(),p=j.outerWidth()-q.sizeDiff.width,k=j.outerHeight()-q.sizeDiff.height;if(q._helper&&!g.animate&&(/relative/).test(i.css("position"))){c(this).css({left:r.left-e.left-m.left,width:p,height:k})}if(q._helper&&!g.animate&&(/static/).test(i.css("position"))){c(this).css({left:r.left-e.left-m.left,width:p,height:k})}}});c.ui.plugin.add("resizable","ghost",{start:function(g,h){var e=c(this).data("resizable"),i=e.options,f=e.size;e.ghost=e.originalElement.clone();e.ghost.css({opacity:0.25,display:"block",position:"relative",height:f.height,width:f.width,margin:0,left:0,top:0}).addClass("ui-resizable-ghost").addClass(typeof i.ghost=="string"?i.ghost:"");e.ghost.appendTo(e.helper)},resize:function(f,g){var e=c(this).data("resizable"),h=e.options;if(e.ghost){e.ghost.css({position:"relative",height:e.size.height,width:e.size.width})}},stop:function(f,g){var e=c(this).data("resizable"),h=e.options;if(e.ghost&&e.helper){e.helper.get(0).removeChild(e.ghost.get(0))}}});c.ui.plugin.add("resizable","grid",{resize:function(e,m){var p=c(this).data("resizable"),h=p.options,k=p.size,i=p.originalSize,j=p.originalPosition,n=p.axis,l=h._aspectRatio||e.shiftKey;h.grid=typeof h.grid=="number"?[h.grid,h.grid]:h.grid;var g=Math.round((k.width-i.width)/(h.grid[0]||1))*(h.grid[0]||1),f=Math.round((k.height-i.height)/(h.grid[1]||1))*(h.grid[1]||1);if(/^(se|s|e)$/.test(n)){p.size.width=i.width+g;p.size.height=i.height+f}else{if(/^(ne)$/.test(n)){p.size.width=i.width+g;p.size.height=i.height+f;p.position.top=j.top-f}else{if(/^(sw)$/.test(n)){p.size.width=i.width+g;p.size.height=i.height+f;p.position.left=j.left-g}else{p.size.width=i.width+g;p.size.height=i.height+f;p.position.top=j.top-f;p.position.left=j.left-g}}}}});var b=function(e){return parseInt(e,10)||0};var a=function(e){return !isNaN(parseInt(e,10))}})(jQuery);/*! + * jQuery hashchange event - v1.3 - 7/21/2010 + * http://benalman.com/projects/jquery-hashchange-plugin/ + * + * Copyright (c) 2010 "Cowboy" Ben Alman + * Dual licensed under the MIT and GPL licenses. + * http://benalman.com/about/license/ + */ +(function($,e,b){var c="hashchange",h=document,f,g=$.event.special,i=h.documentMode,d="on"+c in e&&(i===b||i>7);function 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