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Division Sign Calculation Bug #2

@kamran-yousafzai

Description

@kamran-yousafzai

https://github.com/Featherweight-IP/fwrisc/blob/5c742c60ba620944ba19741c02782fb6b45d514e/rtl/fwrisc_mul_div_shift.sv#L129

While working on FWRISC, I came accross the file in RTL named fwrisc_mul_div_shift.sv, where the sign of division is not evaluated correctly, then I tested the mul_div_shift.sv independently and if both the operands have opposite sign given the division OP, the answer evaluated is positive. According to my understanding, the mentioned line of code should be evaluating the Quotient's sign. Kindly do let me know if I understood the RTL wrong.

Currently, the line when executed, in every case, will hold a constant value of "0" as it checks if the sign bit of op_a is not equal to sign bit of op_a, which will always be false.

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