schedule.md

Day One -- November 13th

Keynote: Jonathan Bachrach 9:00-9:30am

Talk Session 1 -- Architecture 9:30-10:50am

Session Chair: Colin Schmidt

A Memory-Based, Runtime-Reconfigurable, Mixed-Radix Hardware FFT Generator in Chisel

Author: Angie Wang - UC Berkeley

Silensor: Implementing Tensorflow Models in Silicon

Author: Tom Alcorn

AES and SHA Cryptography Library for Chisel

Author: Sergiu Mosanu - University of Virginia

Experiences Building Edge TPU with Chisel

Author: Derek Lockhart, Stephen Twigg, Doug Hogberg, George Huang, Ravi Narayanaswami,Jeremy Coriell, Uday Dasari, Richard Ho, Doug Hogberg, George Huang, Anand Kane, Chintan Kaur, Tao Liu, Adriana Maggiore, Kevin Townsend, Emre Tuncer -- Google Break

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Talk Session 2 -- Productivity 11:25-12:30pm

Session Chair: Paul Rigge

Spatial: A Language and Compiler for Application Accelerators

Author: Matthew Feldman, Raghu Prabhakar, Matthew Vilim, Kunle Olukotun - Stanford University

Rapid Accelerator Design with Chisel

Author: Andrey Ayupov, Steve Burns – Intel Corporation

Raising the Level of Abstraction with Chisel and FIRRTL

Author: Jack Koenig, Henry Cook - SiFive

Fast Prototyping for Computer Architecture Research with Chisel

Author: Martin Schoeberl - TUD

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Talk Session 3 -- Tools 1:45-2:30 PM

Session Chair: Jack Koenig

Annotations and Hardware Construction Languages

Author: Schuyler Eldridge, Adam Izraelevitz, Jack Koenig, Chick Markley - UC Berkeley

FIRRTL Pass for Area and Timing

Author: Steven Burns - Intel

MIDAS: Automatically Generating FPGA-accelerated Simulators of Chisel-generated RTL

Author: David Biancolin -- UC Berkeley Break 30 minutes Talk Session 4 -- Verification 3:00-4:00pm Session Chair: Kevin Laeufer

Parameterizable Block-Level Formal Verification Using Chisel

Author: Bipul Talukdar - Sifive Inc

Improving Chisel Testing: Reusability Across Space and Time

Author: Richard Lin, Bjoern Hartmann, Elad Alon - University of California, Berkeley

Agile FEV with Chisel

Author: Abhijit Davare, Steve Burns, Desmond Kirkpatrick - Intel

A Model-Checker Backend for FIRRTL

Author: Albert Forte Magyar, David Thomas Biancolin, Jack Andrew Koenig - UC Berkeley

Poster Previews 4:30pm

Generating Timing Constraints with Chisel

Author: Gokul Prasath Nallasami - UC Santa Barbara

Implementing Machine Learning Algorithms using Chisel

Author: Gokul Prasath Nallasami - UC Santa Barbara

Chisel Learning Journey: Lessons from startup using Chisel and Rocket Chip for high performance low power Big Data accelerator.

Author: Sean Halle - Intensivate

Implementing Guarded Atomic Actions on Top of Chisel

Author: Kevin Laeufer - UC Berkeley

Enabling Standardized Testing: Reusable Debug and Testing Infrastructure using Generators

Author: Richard Lin, Bjoern Hartmann, Elad Alon

Chisel on the Oregon Trail: iCE40-based Active Battery Balancing in Solar Vehicle Racing

Author: Derek Chou, Richard Lin, Jean-Ètienne Tremblay - UC Berkeley

RISC-V mini: an intermediate example of Chisel

Author: Donggyu Kim - UC Berkeley

Intervals - A New Chisel Data Type

Author: Adam Izraelevitz, Angie Wang, Chick Markley, Paul Rigge - UC Berkeley

Integrating Cycle-Accurate Chisel Models with gem5’s System Simulation

Author: Nima Ganjehloo, Venkatesh Akell, Jason Lowe-Power - UC Davis

A Case Study of Re-using and Adapting a Chisel Generator for a GFSK Modulator

Author: Rachel Zoll, Edward Wang - UC Berkeley

A Methodology for Generator Education via a Tapeout Class

Author: Edward Wang, Kristofer Pister - UC Berkeley

Extending the Hardware Generation Chain

Author: Edward Wang - UC Berkeley

Strong and Safe Enumerations for Chisel

Author: Hasan Genc - UC Berkeley Poster Session 5:00pm Hors D’oeuvres will be served

Lubricated Discussion 6:30 - 7:30pm Drinks will be available for purchase

Day Two -- November 14th

Intensives Session 1 -- 9:00-10:15am

Beginner Track: Introduction to Chisel (Edward Wang)

Architecture Track: RocketChip & Co. (Henry Cook)

Developer Track: Chisel Breakdown (Jack Koenig)

Intensives Session 2 -- 10:45-12pm

Beginner Track: Best Chisel Practices (Chick Markley)

Architecture Track: BOOM (Chris Celio, Abraham Gonzalez, Ben Korpan, Jerry Zhao)

Developer Track: FIRRTL Breakdown (Adam Izraelevitz)

Intensives Session 3 -- 1:00-2:15pm

Beginner Track: Testing in Chisel (Richard Lin)

Architecture Track: FireSim (Sagar Karandikar, David Biancolin, Alon Amid)

Developer Track: Chisel Libraries Breakdown (Schuyler Eldridge)

Break 30 minutes

Birds Of A Feather -- 2:45-4:30pm

Freeform group discussions about a list of topics, TBA.

Closing Remarks -- 4:30-5:00pm

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