diff --git a/src/arch/aarch64/kernel/interrupts.rs b/src/arch/aarch64/kernel/interrupts.rs
index ae71423ea7..13fa36e3ca 100644
--- a/src/arch/aarch64/kernel/interrupts.rs
+++ b/src/arch/aarch64/kernel/interrupts.rs
@@ -33,8 +33,8 @@ type InterruptHandlerQueue = VecDeque<Box<dyn Fn() + core::marker::Send>>;
 /// Number of the timer interrupt
 static mut TIMER_INTERRUPT: u32 = 0;
 /// Possible interrupt handlers
-static INTERRUPT_HANDLERS: InterruptSpinMutex<BTreeMap<u8, InterruptHandlerQueue>> =
-	InterruptSpinMutex::new(BTreeMap::new());
+static INTERRUPT_HANDLERS: InterruptSpinMutex<HashMap<u8, InterruptHandlerQueue, RandomState>> =
+	InterruptSpinMutex::new(HashMap::with_hasher(RandomState::with_seeds(0, 0, 0, 0)));
 /// Driver for the Arm Generic Interrupt Controller version 3 (or 4).
 pub(crate) static mut GIC: OnceCell<GicV3> = OnceCell::new();
 
diff --git a/src/arch/riscv64/kernel/interrupts.rs b/src/arch/riscv64/kernel/interrupts.rs
index fa72b95cae..099197c3cc 100644
--- a/src/arch/riscv64/kernel/interrupts.rs
+++ b/src/arch/riscv64/kernel/interrupts.rs
@@ -1,7 +1,9 @@
 use alloc::boxed::Box;
-use alloc::collections::{BTreeMap, VecDeque};
+use alloc::collections::VecDeque;
 use alloc::vec::Vec;
 
+use ahash::RandomState;
+use hashbrown::HashMap;
 use hermit_sync::{InterruptSpinMutex, SpinMutex};
 use riscv::asm::wfi;
 use riscv::register::{scause, sie, sip, sstatus, stval};
@@ -19,8 +21,8 @@ static PLIC_CONTEXT: SpinMutex<u16> = SpinMutex::new(0x0);
 static CURRENT_INTERRUPTS: SpinMutex<Vec<u32>> = SpinMutex::new(Vec::new());
 
 type InterruptHandlerQueue = VecDeque<Box<dyn Fn() + core::marker::Send>>;
-static INTERRUPT_HANDLERS: InterruptSpinMutex<BTreeMap<u8, InterruptHandlerQueue>> =
-	InterruptSpinMutex::new(BTreeMap::new());
+static INTERRUPT_HANDLERS: InterruptSpinMutex<HashMap<u8, InterruptHandlerQueue, RandomState>> =
+	InterruptSpinMutex::new(HashMap::with_hasher(RandomState::with_seeds(0, 0, 0, 0)));
 
 /// Init Interrupts
 pub fn install() {
diff --git a/src/arch/x86_64/kernel/interrupts.rs b/src/arch/x86_64/kernel/interrupts.rs
index cd881c20e4..bd7fc17e11 100644
--- a/src/arch/x86_64/kernel/interrupts.rs
+++ b/src/arch/x86_64/kernel/interrupts.rs
@@ -20,8 +20,10 @@ use crate::arch::x86_64::swapgs;
 use crate::scheduler::{self, CoreId};
 
 type InterruptHandlerQueue = VecDeque<Box<dyn Fn() + core::marker::Send>>;
-static IRQ_HANDLERS: InterruptSpinMutex<BTreeMap<u8, InterruptHandlerQueue>> =
-	InterruptSpinMutex::new(BTreeMap::new());
+static IRQ_HANDLERS: InterruptSpinMutex<HashMap<u8, InterruptHandlerQueue, RandomState>> =
+	InterruptSpinMutex::new(HashMap::with_hasher(RandomState::with_seeds(0, 0, 0, 0)));
+static IRQ_NAMES: InterruptTicketMutex<HashMap<u8, &'static str, RandomState>> =
+	InterruptTicketMutex::new(HashMap::with_hasher(RandomState::with_seeds(0, 0, 0, 0)));
 
 pub(crate) const IST_ENTRIES: usize = 4;
 pub(crate) const IST_SIZE: usize = 8 * BasePageSize::SIZE as usize;
@@ -346,9 +348,6 @@ extern "x86-interrupt" fn virtualization_exception(stack_frame: ExceptionStackFr
 	scheduler::abort();
 }
 
-static IRQ_NAMES: InterruptTicketMutex<HashMap<u8, &'static str, RandomState>> =
-	InterruptTicketMutex::new(HashMap::with_hasher(RandomState::with_seeds(0, 0, 0, 0)));
-
 pub(crate) fn add_irq_name(irq_number: u8, name: &'static str) {
 	debug!("Register name \"{}\"  for interrupt {}", name, irq_number);
 	IRQ_NAMES.lock().insert(32 + irq_number, name);