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@@ -147,11 +147,14 @@ <h3>Book Chapters</h3>
         </ul>
 	<h3>Conference and Journal Publications</h3>
         <ul>
+	    <li>
+		<b><u>Harideep Nair</u></b>, William Leyman, Agastya Sampath, Quinn Jacobson, and John Paul Shen. "NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors", Accepted In <i>Proceedings of the 2024 Annual Neuro-Inspired Computational Elements Conference (NICE)</i>, 2024.
+	    </li>
 	    <li>
 		<b><u>Harideep Nair</u></b>, David Barajas-Jasso, Quinn Jacobson, and John Paul Shen. "TNN-CIM: An In-SRAM CMOS Implementation of TNN-Based Synaptic Arrays with STDP Learning", Accepted In <i>2024 IEEE 6th International Conference on Artificial Intelligence Circuits and Systems (AICAS)</i>, IEEE, 2024.
 	    </li>
             <li>
-                Prabhu Vellaisamy*, <b><u>Harideep Nair</u></b>*, Vamsikrishna Ratnakaram, Dhruv Gupta, and John Paul Shen. "TNNGen: Automated Design of Neuromorphic Sensory Processing Units for Time-Series Clustering", Accepted In <i>2024 IEEE International Symposium on Circuits and Systems (ISCAS)</i>, IEEE, 2024.
+                Prabhu Vellaisamy*, <b><u>Harideep Nair</u></b>*, Vamsikrishna Ratnakaram, Dhruv Gupta, and John Paul Shen. "TNNGen: Automated Design of Neuromorphic Sensory Processing Units for Time-Series Clustering", Accepted In <i>2024 IEEE International Symposium on Circuits and Systems (ISCAS)</i> and Invited for Publication In <i>IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II)</i>, IEEE, 2024.
 	    </li>
 	    <li>
                 Prabhu Vellaisamy, <b><u>Harideep Nair</u></b>, Joseph Finn, Manav Trivedi, Albert Chen, Anna Li, Tsung-Han Lin, Perry Wang, Shawn Blanton, and John Paul Shen. <a href="https://ieeexplore.ieee.org/abstract/document/10238524">"tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit"</a>, In <i>2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)</i>, pp. 1-6. IEEE, 2023.