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@@ -138,37 +138,59 @@ <h4>Semester Exchange Program in Electrical and Computer Engineering</h4>
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<h2class="heading">Publications and Talks</h2>
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<h3>Book Chapters</h3>
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Prabhu Vellaisamy, <b><u>Harideep Nair</u></b>, Joseph Finn, Albert Chen, Manav Trivedi, Anna Li, Tsung-Han Lin, Perry Wang, Shawn Blanton, and John Paul Shen. "tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit". <i>Accepted at ISVLSI 2023</i>.
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John Paul Shen and <b><u>Harideep Nair</u></b>. <ahref="https://www.intechopen.com/chapters/86375">"Cortical Columns Computing Systems: Microarchitecture Model, Functional Building Blocks, and Design Tools"</a>, <i>Neuromorphic Computing</i>, Ch. 8, IntechOpen, 15 Nov. 2023. Crossref, doi:10.5772/intechopen.110252.
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<h3>Conference and Journal Publications</h3>
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<b><u>Harideep Nair</u></b>, David Barajas-Jasso, Quinn Jacobson, and John Paul Shen. "TNN-CIM: An In-SRAM CMOS Implementation of TNN-Based Synaptic Arrays with STDP Learning", Accepted In <i>2024 IEEE 6th International Conference on Artificial Intelligence Circuits and Systems (AICAS)</i>, IEEE, 2024.
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<b><u>Harideep Nair</u></b>, Prabhu Vellaisamy, Albert Chen, Joseph Finn, Anna Li, Manav Trivedi, and John Paul Shen. "tuGEMM: Area-Power-Efficient Temporal Unary GEMM Architecture for Low Resolution Edge AI". <i>Accepted at ISCAS 2023</i>.
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Prabhu Vellaisamy*, <b><u>Harideep Nair</u></b>*, Vamsikrishna Ratnakaram, Dhruv Gupta, and John Paul Shen. "TNNGen: Automated Design of Neuromorphic Sensory Processing Units for Time-Series Clustering", Accepted In <i>2024 IEEE International Symposium on Circuits and Systems (ISCAS)</i>, IEEE, 2024.
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Prabhu Vellaisamy, <b><u>Harideep Nair</u></b>, Joseph Finn, Manav Trivedi, Albert Chen, Anna Li, Tsung-Han Lin, Perry Wang, Shawn Blanton, and John Paul Shen. <ahref="https://ieeexplore.ieee.org/abstract/document/10238524">"tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit"</a>, In <i>2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)</i>, pp. 1-6. IEEE, 2023.
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<b><u>Harideep Nair</u></b>, Prabhu Vellaisamy, Albert Chen, Joseph Finn, Anna Li, Manav Trivedi, and John Paul Shen. <ahref="https://ieeexplore.ieee.org/abstract/document/10181357">"tuGEMM: Area-Power-Efficient Temporal Unary GEMM Architecture for Low-Precision Edge AI"</a>, In <i>2023 IEEE International Symposium on Circuits and Systems (ISCAS)</i>, pp. 1-5. IEEE, 2023.
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<b><u>Harideep Nair</u></b>, Prabhu Vellaisamy, Santha Bhasuthkar, and John Paul Shen. <ahref="https://arxiv.org/pdf/2205.07410.pdf">"TNN7: A Custom Macro Suite for Implementing Highly Optimized Designs of Neuromorphic TNNs"</a>. <i>2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)</i>, 2022, pp. 152-157, doi: 10.1109/ISVLSI54635.2022.00039
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<b><u>Harideep Nair</u></b>, Prabhu Vellaisamy, Santha Bhasuthkar, and John Paul Shen. <ahref="https://ieeexplore.ieee.org/abstract/document/9912089">"TNN7: A Custom Macro Suite for Implementing Highly Optimized Designs of Neuromorphic TNNs"</a>, In <i>2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)</i>, pp. 152-157. IEEE, 2022.
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<b><u>Harideep Nair</u></b>, Prabhu Vellaisamy, Santha Bhasuthkar, and John Paul Shen. "Custom Macro Cells for Design Optimization of Direct CMOS Implementations of Neuromorphic TNNs".<i>Design Automation Conference (DAC) Work-In-Progress Poster</i>, 2022.
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<b><u>Harideep Nair</u></b>, Prabhu Vellaisamy, Santha Bhasuthkar, and John Paul Shen. "Custom Macro Cells for Design Optimization of Direct CMOS Implementations of Neuromorphic TNNs",<i>Design Automation Conference (DAC) Work-In-Progress Poster</i>, 2022.
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Shanmuga Venkatachalam, <b><u>Harideep Nair</u></b>, Ming Zeng, Cathy Shunwen Tan, Ole J. Mengshoel, and John Paul Shen. <ahref="https://www.frontiersin.org/articles/10.3389/fdata.2022.879389/full?&utm_source=Email_to_authors_&utm_medium=Email&utm_content=T1_11.5e1_author&utm_campaign=Email_publication&field=&journalName=Frontiers_in_Big_Data&id=879389">"SemNet: Learning Semantic Attributes for Human Activity Recognition with Deep Belief Networks"</a>.<i>Frontiers in Big Data</i>, 2022, doi: 10.3389/fdata.2022.879389.
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Shanmuga Venkatachalam, <b><u>Harideep Nair</u></b>, Ming Zeng, Cathy Tan, Ole Mengshoel, and John Paul Shen. <ahref="https://www.frontiersin.org/articles/10.3389/fdata.2022.879389/full">"SemNet: Learning Semantic Attributes for Human Activity Recognition with Deep Belief Networks"</a>,<i>Frontiers in Big Data</i>, Vol. 5, 2022. doi: 10.3389/fdata.2022.879389.
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<b><u>Harideep Nair</u></b>, John Paul Shen, and James E. Smith. <ahref="https://ieeexplore.ieee.org/document/9516717">"A Microarchitecture Implementation Framework for Online Learning with Temporal Neural Networks"</a>. <i>2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)</i>, 2021, pp. 266-271, doi: 10.1109/ISVLSI51109.2021.00056.
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<b><u>Harideep Nair</u></b>, John Paul Shen, and James E. Smith. <ahref="https://ieeexplore.ieee.org/document/9516717">"A Microarchitecture Implementation Framework for Online Learning with Temporal Neural Networks"</a>, In <i>2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)</i>, pp. 266-271. IEEE, 2021.
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Shreyas Chaudhari, <b><u>Harideep Nair</u></b>, José M.F. Moura, and John Paul Shen. <ahref="https://ieeexplore.ieee.org/document/9414882">"Unsupervised Clustering of Time Series Signals using Neuromorphic Energy-Efficient Temporal Neural Networks"</a>. <i>ICASSP 2021 - 2021 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)</i>, 2021, pp. 7873-7877, doi: 10.1109/ICASSP39728.2021.9414882.
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Shreyas Chaudhari, <b><u>Harideep Nair</u></b>, José M.F. Moura, and John Paul Shen. <ahref="https://ieeexplore.ieee.org/document/9414882">"Unsupervised Clustering of Time Series Signals using Neuromorphic Energy-Efficient Temporal Neural Networks"</a>, In <i>2021 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)</i>, pp. 7873-7877. IEEE, 2021.
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<b><u>Harideep Nair</u></b>, Cathy Tan, Ming Zeng, Ole J. Mengshoel, and John Paul Shen. <ahref="https://dl.acm.org/doi/abs/10.1145/3341162.3345600">"AttriNet: Learning mid-level features for human activity recognition with deep belief networks"</a>. In:<i>Proceedings of the 2019 ACM International Joint Conference on Pervasive and Ubiquitous Computing and Proceedings of the 2019 ACM International Symposium on Wearable Computers. ACM, 2019</i>.
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<b><u>Harideep Nair</u></b>, Cathy Tan, Ming Zeng, Ole J. Mengshoel, and John Paul Shen. <ahref="https://dl.acm.org/doi/abs/10.1145/3341162.3345600">"AttriNet: Learning Mid-Level Features for Human Activity Recognition with Deep Belief Networks"</a>, In <i>Adjunct Proceedings of the 2019 ACM International Joint Conference on Pervasive and Ubiquitous Computing (UbiComp) and Proceedings of the 2019 ACM International Symposium on Wearable Computers (ISWC)</i>, pp. 510-517. 2019.
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Raj Kumar Choudhary, Newton Singh, <b><u>Harideep Nair</u></b>, Rishabh Rawat, and Virendra Singh. <ahref="https://ieeexplore.ieee.org/abstract/document/8988675">"Freeflow Core: Enhancing Performance of In-order Cores with Energy Efficiency"</a>. In <i>37th IEEE International Conference on Computer Design (ICCD) , Abu Dhabi, UAE, Nov 17-20, 2019</i>.
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Raj Kumar Choudhary, Newton Singh, <b><u>Harideep Nair</u></b>, Rishabh Rawat, and Virendra Singh. <ahref="https://ieeexplore.ieee.org/abstract/document/8988675">"Freeflow Core: Enhancing Performance of In-order Cores with Energy Efficiency"</a>, In <i>2019 IEEE 37th International Conference on Computer Design (ICCD)</i>, pp. 702-705. IEEE, 2019.
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<h3>Invited Talks</h3>
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<b><u>Harideep Nair</u></b>. "Building a Silicon Neocortex in CMOS", National Institute of Standards and Technology, <ahref="https://www.nist.gov/pml/nanoscale-device-characterization-division/alternative-computing-group">Alternative Computing Group</a>, December 2020 [Invited Talk].
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"Introduction to Neuromorphic Computing", <ahref="https://z4ziad.github.io/mbed_dl/mbed_dl/">Embedded Deep Learning Course (18-848)</a>, Carnegie Mellon University, Pittsburgh, PA. <i>Dec. 2023</i>.
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"Neuromorphic Cortical Column-Based Edge-AI Sensory Processors for Beam Prediction", <ahref="https://www.ericsson.com/en/ai">AI Research Team, Ericsson, Inc.</a>, Santa Clara, CA. <i>Aug. 2023</i>.
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"Building a Silicon Neocortex in CMOS", <ahref="https://www.nist.gov/pml/nanoscale-device-characterization-division/alternative-computing-group">Alternative Computing Group</a>, <ahref="https://www.nist.gov">National Institute of Standards and Technology (NIST)</a>, Gaithersburg, MD. <i>Dec. 2020</i>.
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