@@ -9747,6 +9747,53 @@ void OffloadBundler::ConstructJobMultipleOutputs(
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// Begin OffloadWrapper
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+ static void addRunTimeWrapperOpts (Compilation &C,
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+ Action::OffloadKind DeviceOffloadKind,
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+ const llvm::opt::ArgList &TCArgs,
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+ ArgStringList &CmdArgs,
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+ const ToolChain &TC,
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+ const JobAction &JA) {
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+ // Grab any Target specific options that need to be added to the wrapper
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+ // information.
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+ ArgStringList BuildArgs;
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+ auto createArgString = [&](const char *Opt) {
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+ if (BuildArgs.empty ())
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+ return ;
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+ SmallString<128 > AL;
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+ for (const char *A : BuildArgs) {
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+ if (AL.empty ()) {
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+ AL = A;
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+ continue ;
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+ }
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+ AL += " " ;
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+ AL += A;
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+ }
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+ CmdArgs.push_back (C.getArgs ().MakeArgString (Twine (Opt) + AL));
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+ };
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+ const toolchains::SYCLToolChain &SYCLTC =
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+ static_cast <const toolchains::SYCLToolChain &>(TC);
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+ llvm::Triple TT = SYCLTC.getTriple ();
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+ // TODO: Consider separating the mechanisms for:
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+ // - passing standard-defined options to AOT/JIT compilation steps;
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+ // - passing AOT-compiler specific options.
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+ // This would allow retaining standard language options in the
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+ // image descriptor, while excluding tool-specific options that
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+ // have been known to confuse RT implementations.
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+ if (TT.getSubArch () == llvm::Triple::NoSubArch) {
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+ // Only store compile/link opts in the image descriptor for the SPIR-V
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+ // target; AOT compilation has already been performed otherwise.
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+ const ArgList &Args = C.getArgsForToolChain (nullptr , StringRef (),
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+ DeviceOffloadKind);
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+ const ToolChain *HostTC = C.getSingleOffloadToolChain <Action::OFK_Host>();
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+ SYCLTC.AddImpliedTargetArgs (TT, Args, BuildArgs, JA, *HostTC);
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+ SYCLTC.TranslateBackendTargetArgs (TT, Args, BuildArgs);
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+ createArgString (" -compile-opts=" );
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+ BuildArgs.clear ();
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+ SYCLTC.TranslateLinkerTargetArgs (TT, Args, BuildArgs);
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+ createArgString (" -link-opts=" );
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+ }
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+ }
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+
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void OffloadWrapper::ConstructJob (Compilation &C, const JobAction &JA,
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const InputInfo &Output,
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const InputInfoList &Inputs,
@@ -9792,6 +9839,9 @@ void OffloadWrapper::ConstructJob(Compilation &C, const JobAction &JA,
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if (A->getValue () == StringRef (" image" ))
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WrapperArgs.push_back (C.getArgs ().MakeArgString (" --emit-reg-funcs=0" ));
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}
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+ addRunTimeWrapperOpts (C, OffloadingKind, TCArgs, WrapperArgs,
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+ getToolChain (), JA);
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+
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// When wrapping an FPGA device binary, we need to be sure to apply the
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// appropriate triple that corresponds (fpga_aocr-intel-<os>)
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// to the target triple setting.
@@ -9807,42 +9857,8 @@ void OffloadWrapper::ConstructJob(Compilation &C, const JobAction &JA,
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TT.setVendorName (" intel" );
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TargetTripleOpt = TT.str ();
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}
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- // Grab any Target specific options that need to be added to the wrapper
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- // information.
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- ArgStringList BuildArgs;
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- auto createArgString = [&](const char *Opt) {
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- if (BuildArgs.empty ())
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- return ;
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- SmallString<128 > AL;
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- for (const char *A : BuildArgs) {
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- if (AL.empty ()) {
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- AL = A;
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- continue ;
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- }
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- AL += " " ;
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- AL += A;
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- }
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- WrapperArgs.push_back (C.getArgs ().MakeArgString (Twine (Opt) + AL));
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- };
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const toolchains::SYCLToolChain &TC =
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static_cast <const toolchains::SYCLToolChain &>(getToolChain ());
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- // TODO: Consider separating the mechanisms for:
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- // - passing standard-defined options to AOT/JIT compilation steps;
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- // - passing AOT-compiler specific options.
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- // This would allow retaining standard language options in the
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- // image descriptor, while excluding tool-specific options that
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- // have been known to confuse RT implementations.
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- if (TC.getTriple ().getSubArch () == llvm::Triple::NoSubArch) {
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- // Only store compile/link opts in the image descriptor for the SPIR-V
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- // target; AOT compilation has already been performed otherwise.
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- const ToolChain *HostTC = C.getSingleOffloadToolChain <Action::OFK_Host>();
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- TC.AddImpliedTargetArgs (TT, TCArgs, BuildArgs, JA, *HostTC);
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- TC.TranslateBackendTargetArgs (TT, TCArgs, BuildArgs);
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- createArgString (" -compile-opts=" );
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- BuildArgs.clear ();
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- TC.TranslateLinkerTargetArgs (TT, TCArgs, BuildArgs);
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- createArgString (" -link-opts=" );
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- }
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bool IsEmbeddedIR = cast<OffloadWrapperJobAction>(JA).isEmbeddedIR ();
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if (IsEmbeddedIR) {
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// When the offload-wrapper is called to embed LLVM IR, add a prefix to
@@ -9984,8 +10000,18 @@ void OffloadWrapper::ConstructJob(Compilation &C, const JobAction &JA,
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// And add it to the offload targets.
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CmdArgs.push_back (C.getArgs ().MakeArgString (
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Twine (" -kind=" ) + Action::GetOffloadKindName (DeviceKind)));
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- CmdArgs.push_back (TCArgs.MakeArgString (Twine (" -target=" ) +
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- DeviceTC->getTriple ().normalize ()));
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+ std::string TargetTripleOpt = DeviceTC->getTriple ().normalize ();
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+ // SYCL toolchain target only uses the arch name.
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+ if (DeviceKind == Action::OFK_SYCL)
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+ TargetTripleOpt = DeviceTC->getTriple ().getArchName ();
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+ CmdArgs.push_back (
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+ TCArgs.MakeArgString (Twine (" -target=" ) + TargetTripleOpt));
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+ addRunTimeWrapperOpts (C, DeviceKind, TCArgs, CmdArgs, *DeviceTC, JA);
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+
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+ if (Inputs[I].getType () == types::TY_Tempfiletable ||
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+ Inputs[I].getType () == types::TY_Tempfilelist)
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+ // wrapper actual input files are passed via the batch job file table:
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+ CmdArgs.push_back (C.getArgs ().MakeArgString (" -batch" ));
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// Add input.
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assert (Inputs[I].isFilename () && " Invalid input." );
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