add MTL support

address #713

Change-Id: I12c01aafe88c545c3202b0db4d87c19643e24283

Author: rdementi

src/cpucounters.cpp

@@ -697,6 +697,7 @@ void PCM::initCStateSupportTables()
         case DENVERTON:
         case ADL:
         case RPL:
+        case MTL:
         case SNOWRIDGE:
             PCM_CSTATE_ARRAY(pkgCStateMsr, PCM_PARAM_PROTECT({0, 0, 0x3F8, 0, 0x3F9, 0, 0x3FA, 0, 0, 0, 0 }) );
         case NEHALEM_EP:
@@ -769,6 +770,7 @@ void PCM::initCStateSupportTables()
         PCM_SKL_PATH_CASES
         case ADL:
         case RPL:
+        case MTL:
         case SNOWRIDGE:
         case ICX:
         case SPR:
@@ -1595,6 +1597,7 @@ bool PCM::detectNominalFrequency()
                || cpu_model == KNL
                || cpu_model == ADL
                || cpu_model == RPL
+               || cpu_model == MTL
                || cpu_model == SKX
                || cpu_model == ICX
                || cpu_model == SPR
@@ -1853,7 +1856,8 @@ void PCM::initUncoreObjects()
            {
            case TGL:
            case ADL: // TGLClientBW works fine for ADL
-           case RPL: // TGLClientBW works fine for ADL
+           case RPL: // TGLClientBW works fine for RPL
+           case MTL: // TGLClientBW works fine for MTL
                clientBW = std::make_shared<TGLClientBW>();
                break;
 /*         Disabled since ADLClientBW requires 2x multiplier for BW on top
@@ -2976,6 +2980,7 @@ bool PCM::isCPUModelSupported(const int model_)
             || model_ == TGL
             || model_ == ADL
             || model_ == RPL
+            || model_ == MTL
             || model_ == SKX
             || model_ == ICX
             || model_ == SPR
@@ -3146,7 +3151,7 @@ PCM::ErrorCode PCM::program(const PCM::ProgramMode mode_, const void * parameter
         canUsePerf = false;
         if (!silent) std::cerr << "Installed Linux kernel perf does not support hardware top-down level-1 counters. Using direct PMU programming instead.\n";
     }
-    if (canUsePerf && (cpu_model == ADL || cpu_model == RPL))
+    if (canUsePerf && (cpu_model == ADL || cpu_model == RPL || cpu_model == MTL))
     {
         canUsePerf = false;
         if (!silent) std::cerr << "Linux kernel perf rejects an architectural event on your platform. Using direct PMU programming instead.\n";
@@ -3232,6 +3237,7 @@ PCM::ErrorCode PCM::program(const PCM::ProgramMode mode_, const void * parameter
         switch ( cpu_model ) {
             case ADL:
             case RPL:
+            case MTL:
                 LLCArchEventInit(hybridAtomEventDesc);
                 hybridAtomEventDesc[2].event_number = SKL_MEM_LOAD_RETIRED_L2_MISS_EVTNR;
                 hybridAtomEventDesc[2].umask_value = SKL_MEM_LOAD_RETIRED_L2_MISS_UMASK;
@@ -4544,6 +4550,8 @@ const char * PCM::getUArchCodename(const int32 cpu_model_param) const
             return "Alder Lake";
         case RPL:
             return "Raptor Lake";
+        case MTL:
+            return "Meteor Lake";
         case SKX:
             if (cpu_model_param >= 0)
             {

src/cpucounters.h

@@ -1554,6 +1554,7 @@ class PCM_API PCM
             {
             case ADL:
             case RPL:
+            case MTL:
                 if (topology[coreID].core_type == TopologyEntry::Atom)
                 {
                     return std::make_pair(OFFCORE_RESPONSE_0_EVTNR, event + 1);
@@ -1568,6 +1569,7 @@ class PCM_API PCM
        case EMR:
        case ADL: // ADL big core (GLC)
        case RPL:
+       case MTL:
            useGLCOCREvent = true;
            break;
        }
@@ -1792,6 +1794,7 @@ class PCM_API PCM
         RPL_1 = 0xba,
         RPL_2 = 0xbf,
         RPL_3 = 0xbe,
+        MTL = 0xAA,
         BDX = 79,
         KNL = 87,
         SKL = 94,
@@ -2005,6 +2008,7 @@ class PCM_API PCM
         {
         case ADL:
         case RPL:
+        case MTL:
             return 6;
         case SNOWRIDGE:
             return 4;
@@ -2342,6 +2346,7 @@ class PCM_API PCM
                  || cpu_model == PCM::ICX
                  || cpu_model == PCM::ADL
                  || cpu_model == PCM::RPL
+                 || cpu_model == PCM::MTL
                  || cpu_model == PCM::SPR
                  || cpu_model == PCM::EMR
                );
@@ -2613,6 +2618,7 @@ class PCM_API PCM
             || cpu_model == BROADWELL
             || cpu_model == ADL
             || cpu_model == RPL
+            || cpu_model == MTL
             || useSKLPath()
             ;
     }
@@ -4015,7 +4021,12 @@ uint64 getL2CacheMisses(const CounterStateType & before, const CounterStateType
     auto pcm = PCM::getInstance();
     if (pcm->isL2CacheMissesAvailable() == false) return 0ULL;
     const auto cpu_model = pcm->getCPUModel();
-    if (pcm->useSkylakeEvents() || cpu_model == PCM::SNOWRIDGE || cpu_model == PCM::ADL || cpu_model == PCM::RPL) {
+    if (pcm->useSkylakeEvents()
+        || cpu_model == PCM::SNOWRIDGE
+        || cpu_model == PCM::ADL
+        || cpu_model == PCM::RPL
+        || cpu_model == PCM::MTL
+        ) {
         return after.Event[BasicCounterState::SKLL2MissPos] - before.Event[BasicCounterState::SKLL2MissPos];
     }
     else if (pcm->isAtom() || cpu_model == PCM::KNL)
@@ -4121,7 +4132,11 @@ uint64 getL3CacheHitsSnoop(const CounterStateType & before, const CounterStateTy
     auto pcm = PCM::getInstance();
     if (!pcm->isL3CacheHitsSnoopAvailable()) return 0;
     const auto cpu_model = pcm->getCPUModel();
-    if (cpu_model == PCM::SNOWRIDGE || cpu_model == PCM::ADL || cpu_model == PCM::RPL)
+    if (cpu_model == PCM::SNOWRIDGE
+        || cpu_model == PCM::ADL
+        || cpu_model == PCM::RPL
+        || cpu_model == PCM::MTL
+        )
     {
         const int64 misses = getL3CacheMisses(before, after);
         const int64 refs = after.Event[BasicCounterState::ArchLLCRefPos] - before.Event[BasicCounterState::ArchLLCRefPos];