arm.vcd

$date
	Tue Nov 24 17:32:47 2020
$end
$version
	Icarus Verilog
$end
$timescale
	1s
$end
$scope module testbench $end
$var wire 32 ! WriteData [31:0] $end
$var wire 1 " MemWrite $end
$var wire 32 # DataAdr [31:0] $end
$var reg 1 $ clk $end
$var reg 1 % reset $end
$scope module dut $end
$var wire 1 $ clk $end
$var wire 1 % reset $end
$var wire 32 & WriteData [31:0] $end
$var wire 32 ' ReadData [31:0] $end
$var wire 32 ( PC [31:0] $end
$var wire 1 " MemWrite $end
$var wire 32 ) Instr [31:0] $end
$var wire 32 * DataAdr [31:0] $end
$scope module arm $end
$var wire 1 $ clk $end
$var wire 1 % reset $end
$var wire 32 + WriteData [31:0] $end
$var wire 1 , RegWrite $end
$var wire 2 - RegSrc [1:0] $end
$var wire 1 . RegByte $end
$var wire 32 / ReadData [31:0] $end
$var wire 1 0 PCSrc $end
$var wire 32 1 PC [31:0] $end
$var wire 1 2 MemtoReg $end
$var wire 1 " MemWrite $end
$var wire 32 3 Instr [31:0] $end
$var wire 2 4 ImmSrc [1:0] $end
$var wire 1 5 ALUSrc $end
$var wire 32 6 ALUResult [31:0] $end
$var wire 4 7 ALUFlags [3:0] $end
$var wire 3 8 ALUControl [2:0] $end
$scope module c $end
$var wire 20 9 Instr [31:12] $end
$var wire 1 $ clk $end
$var wire 1 % reset $end
$var wire 1 , RegWrite $end
$var wire 1 : RegW $end
$var wire 2 ; RegSrc [1:0] $end
$var wire 1 . RegByte $end
$var wire 1 0 PCSrc $end
$var wire 1 < PCS $end
$var wire 1 2 MemtoReg $end
$var wire 1 " MemWrite $end
$var wire 1 = MemW $end
$var wire 2 > ImmSrc [1:0] $end
$var wire 2 ? FlagW [1:0] $end
$var wire 1 5 ALUSrc $end
$var wire 4 @ ALUFlags [3:0] $end
$var wire 3 A ALUControl [2:0] $end
$scope module cl $end
$var wire 4 B Cond [3:0] $end
$var wire 2 C FlagWrite [1:0] $end
$var wire 1 " MemWrite $end
$var wire 1 0 PCSrc $end
$var wire 1 , RegWrite $end
$var wire 1 $ clk $end
$var wire 1 % reset $end
$var wire 1 : RegW $end
$var wire 1 < PCS $end
$var wire 1 = MemW $end
$var wire 4 D Flags [3:0] $end
$var wire 2 E FlagW [1:0] $end
$var wire 1 F CondEx $end
$var wire 4 G ALUFlags [3:0] $end
$scope module cc $end
$var wire 4 H Cond [3:0] $end
$var wire 4 I Flags [3:0] $end
$var wire 1 J ge $end
$var wire 1 K zero $end
$var wire 1 L overflow $end
$var wire 1 M neg $end
$var wire 1 N carry $end
$var reg 1 F CondEx $end
$upscope $end
$scope module flagreg0 $end
$var wire 1 $ clk $end
$var wire 2 O d [1:0] $end
$var wire 1 P en $end
$var wire 1 % reset $end
$var reg 2 Q q [1:0] $end
$upscope $end
$scope module flagreg1 $end
$var wire 1 $ clk $end
$var wire 2 R d [1:0] $end
$var wire 1 S en $end
$var wire 1 % reset $end
$var reg 2 T q [1:0] $end
$upscope $end
$upscope $end
$scope module dec $end
$var wire 6 U Funct [5:0] $end
$var wire 2 V Op [1:0] $end
$var wire 1 < PCS $end
$var wire 4 W Rd [3:0] $end
$var wire 1 : RegW $end
$var wire 2 X RegSrc [1:0] $end
$var wire 1 . RegByte $end
$var wire 1 2 MemtoReg $end
$var wire 1 = MemW $end
$var wire 2 Y ImmSrc [1:0] $end
$var wire 1 Z Branch $end
$var wire 1 5 ALUSrc $end
$var wire 1 [ ALUOp $end
$var reg 3 \ ALUControl [2:0] $end
$var reg 2 ] FlagW [1:0] $end
$var reg 11 ^ controls [10:0] $end
$upscope $end
$upscope $end
$scope module dp $end
$var wire 3 _ ALUControl [2:0] $end
$var wire 1 5 ALUSrc $end
$var wire 2 ` ImmSrc [1:0] $end
$var wire 1 2 MemtoReg $end
$var wire 1 0 PCSrc $end
$var wire 1 . RegByte $end
$var wire 2 a RegSrc [1:0] $end
$var wire 1 , RegWrite $end
$var wire 1 $ clk $end
$var wire 1 % reset $end
$var wire 8 b byteResult [7:0] $end
$var wire 32 c WriteData [31:0] $end
$var wire 32 d SrcB [31:0] $end
$var wire 32 e SrcA [31:0] $end
$var wire 32 f Result [31:0] $end
$var wire 32 g ReadData [31:0] $end
$var wire 4 h RA2 [3:0] $end
$var wire 4 i RA1 [3:0] $end
$var wire 32 j PCPlus8 [31:0] $end
$var wire 32 k PCPlus4 [31:0] $end
$var wire 32 l PCNext [31:0] $end
$var wire 32 m PC [31:0] $end
$var wire 32 n MenResult [31:0] $end
$var wire 32 o Instr [31:0] $end
$var wire 32 p ExtImm [31:0] $end
$var wire 32 q ALUResult [31:0] $end
$var wire 4 r ALUFlags [3:0] $end
$scope module alu $end
$var wire 3 s ALUControl [2:0] $end
$var wire 1 t carry $end
$var wire 1 u overflow $end
$var wire 1 v zero $end
$var wire 33 w sum [32:0] $end
$var wire 1 x negative $end
$var wire 32 y b [31:0] $end
$var wire 32 z a [31:0] $end
$var wire 4 { ALUFlags [3:0] $end
$var reg 32 | Result [31:0] $end
$upscope $end
$scope module ext $end
$var wire 2 } ImmSrc [1:0] $end
$var wire 24 ~ Instr [23:0] $end
$var reg 32 !" ExtImm [31:0] $end
$upscope $end
$scope module muxlbr $end
$var wire 8 "" d0 [7:0] $end
$var wire 8 #" d1 [7:0] $end
$var wire 8 $" d2 [7:0] $end
$var wire 8 %" d3 [7:0] $end
$var wire 2 &" s [1:0] $end
$var wire 8 '" y [7:0] $end
$upscope $end
$scope module pcadd1 $end
$var wire 32 (" b [31:0] $end
$var wire 32 )" y [31:0] $end
$var wire 32 *" a [31:0] $end
$upscope $end
$scope module pcadd2 $end
$var wire 32 +" a [31:0] $end
$var wire 32 ," b [31:0] $end
$var wire 32 -" y [31:0] $end
$upscope $end
$scope module pcmux $end
$var wire 32 ." d0 [31:0] $end
$var wire 1 0 s $end
$var wire 32 /" y [31:0] $end
$var wire 32 0" d1 [31:0] $end
$upscope $end
$scope module pcreg $end
$var wire 1 $ clk $end
$var wire 32 1" d [31:0] $end
$var wire 1 % reset $end
$var reg 32 2" q [31:0] $end
$upscope $end
$scope module prevmux $end
$var wire 32 3" d0 [31:0] $end
$var wire 1 2 s $end
$var wire 32 4" y [31:0] $end
$var wire 32 5" d1 [31:0] $end
$upscope $end
$scope module ra1mux $end
$var wire 4 6" d0 [3:0] $end
$var wire 4 7" d1 [3:0] $end
$var wire 1 8" s $end
$var wire 4 9" y [3:0] $end
$upscope $end
$scope module ra2mux $end
$var wire 4 :" d0 [3:0] $end
$var wire 4 ;" d1 [3:0] $end
$var wire 1 <" s $end
$var wire 4 =" y [3:0] $end
$upscope $end
$scope module resmux $end
$var wire 32 >" d0 [31:0] $end
$var wire 32 ?" d1 [31:0] $end
$var wire 1 . s $end
$var wire 32 @" y [31:0] $end
$upscope $end
$scope module rf $end
$var wire 1 $ clk $end
$var wire 32 A" r15 [31:0] $end
$var wire 4 B" ra1 [3:0] $end
$var wire 4 C" ra2 [3:0] $end
$var wire 4 D" wa3 [3:0] $end
$var wire 32 E" wd3 [31:0] $end
$var wire 1 , we3 $end
$var wire 32 F" rd2 [31:0] $end
$var wire 32 G" rd1 [31:0] $end
$upscope $end
$scope module srcbmux $end
$var wire 32 H" d0 [31:0] $end
$var wire 32 I" d1 [31:0] $end
$var wire 1 5 s $end
$var wire 32 J" y [31:0] $end
$upscope $end
$upscope $end
$upscope $end
$scope module dmem $end
$var wire 32 K" a [31:0] $end
$var wire 1 $ clk $end
$var wire 32 L" rd [31:0] $end
$var wire 32 M" wd [31:0] $end
$var wire 1 " we $end
$upscope $end
$scope module imem $end
$var wire 32 N" a [31:0] $end
$var wire 32 O" rd [31:0] $end
$upscope $end
$upscope $end
$upscope $end
$enddefinitions $end
#0
$dumpvars
b11100000010011110000000000001111 O"
b0 N"
b1000 M"
bx L"
b0 K"
b1000 J"
b1111 I"
b1000 H"
b1000 G"
b1000 F"
b0 E"
b0 D"
b1111 C"
b1111 B"
b1000 A"
b0 @"
b0xxxxxxxx ?"
b0 >"
b1111 ="
0<"
b0 ;"
b1111 :"
b1111 9"
08"
b1111 7"
b1111 6"
bx 5"
b0 4"
b0 3"
b0 2"
b100 1"
b0 0"
b100 /"
b100 ."
b1000 -"
b100 ,"
b100 +"
b0 *"
b100 )"
b100 ("
bx '"
b0 &"
bx %"
bx $"
bx #"
bx ""
b1111 !"
b10011110000000000001111 ~
b0 }
b0 |
b110 {
b1000 z
b1000 y
0x
b100000000000000000000000000000000 w
1v
0u
1t
b1 s
b110 r
b0 q
b1111 p
b11100000010011110000000000001111 o
b0 n
b0 m
b100 l
b100 k
b1000 j
b1111 i
b1111 h
bx g
b0 f
b1000 e
b1000 d
b1000 c
bx b
b0 a
b0 `
b1 _
b10010 ^
b0 ]
b1 \
1[
0Z
b0 Y
b0 X
b0 W
b0 V
b100 U
b0 T
0S
b1 R
b0 Q
0P
b10 O
0N
0M
0L
0K
1J
b0 I
b1110 H
b110 G
1F
b0 E
b0 D
b0 C
b1110 B
b1 A
b110 @
b0 ?
b0 >
0=
0<
b0 ;
1:
b11100000010011110000 9
b1 8
b110 7
b0 6
05
b0 4
b11100000010011110000000000001111 3
02
b0 1
00
bx /
0.
b0 -
1,
b1000 +
b0 *
b11100000010011110000000000001111 )
b0 (
bx '
b1000 &
1%
1$
b0 #
0"
b1000 !
$end
#5
0$
#10
1$
#15
0$
#20
1$
#22
0%
#25
0$
#30
b0 O
b11 &"
0t
0x
15
b0 8
b0 A
b0 \
b0 _
b0 s
b1010010 ^
b11111111 f
b11111111 0"
b11111111 @"
b11111111 E"
b11111111 p
b11111111 !"
b11111111 I"
b0 i
b0 9"
b0 B"
b101000 U
b1 W
b0 R
b11111111 n
b11111111 4"
b11111111 >"
b100000000001000011111111 ~
b1 D"
b1 ;"
b0 6"
b11100010100000000001 9
b0 7
b0 @
b0 G
b0 r
b0 {
0v
b11111111 #
b11111111 *
b11111111 6
b11111111 q
b11111111 |
b11111111 3"
b11111111 K"
b11111111 d
b11111111 y
b11111111 J"
b11100010100000000001000011111111 )
b11100010100000000001000011111111 3
b11100010100000000001000011111111 o
b11100010100000000001000011111111 O"
b11111111 w
b0 e
b0 z
b0 G"
b1100 !
b1100 &
b1100 +
b1100 c
b1100 F"
b1100 H"
b1100 M"
b1000 l
b1000 /"
b1000 1"
b1100 j
b1100 -"
b1100 A"
b1000 k
b1000 )"
b1000 +"
b1000 ."
b100 (
b100 1
b100 m
b100 *"
b100 2"
b100 N"
1$
#35
0$
#40
b111111110 f
b111111110 0"
b111111110 @"
b111111110 E"
b111111110 n
b111111110 4"
b111111110 >"
b10 &"
b111111110 #
b111111110 *
b111111110 6
b111111110 q
b111111110 |
b111111110 3"
b111111110 K"
05
b11111111 d
b11111111 y
b11111111 J"
b111111110 w
b11111111 e
b11111111 z
b11111111 G"
b10010 ^
b1 p
b1 !"
b1 I"
b1 h
b1 ="
b1 C"
b1 i
b1 9"
b1 B"
b1000 U
b10 W
b100000010010000000000001 ~
b10 D"
b10 ;"
b1 :"
b1 6"
b11100000100000010010 9
b11100000100000010010000000000001 )
b11100000100000010010000000000001 3
b11100000100000010010000000000001 o
b11100000100000010010000000000001 O"
b11111111 !
b11111111 &
b11111111 +
b11111111 c
b11111111 F"
b11111111 H"
b11111111 M"
b1100 l
b1100 /"
b1100 1"
b10000 j
b10000 -"
b10000 A"
b1100 k
b1100 )"
b1100 +"
b1100 ."
b1000 (
b1000 1
b1000 m
b1000 *"
b1000 2"
b1000 N"
1$
#45
0$
#50
b0 O
0u
b0 R
b0 7
b0 @
b0 G
b0 r
b0 {
0x
bx f
bx 0"
bx @"
bx E"
b0 &"
1<"
bx n
bx 4"
bx >"
0,
1"
b11000100 d
b11000100 y
b11000100 J"
b11000100 #
b11000100 *
b11000100 6
b11000100 q
b11000100 |
b11000100 3"
b11000100 K"
b10 -
b10 ;
b10 X
b10 a
b1 4
b1 >
b1 Y
b1 `
b1 }
15
12
0:
1=
0[
b111111110 !
b111111110 &
b111111110 +
b111111110 c
b111111110 F"
b111111110 H"
b111111110 M"
b11000100 w
b0 e
b0 z
b0 G"
b0 8
b0 A
b0 \
b0 _
b0 s
b10011101000 ^
b11000100 p
b11000100 !"
b11000100 I"
b10 h
b10 ="
b10 C"
b0 i
b0 9"
b0 B"
b1 V
b11000 U
b100000000010000011000100 ~
b100 :"
b0 6"
b11100101100000000010 9
b11100101100000000010000011000100 )
b11100101100000000010000011000100 3
b11100101100000000010000011000100 o
b11100101100000000010000011000100 O"
b10000 l
b10000 /"
b10000 1"
b10100 j
b10100 -"
b10100 A"
b10000 k
b10000 )"
b10000 +"
b10000 ."
b1100 (
b1100 1
b1100 m
b1100 *"
b1100 2"
b1100 N"
1$
#55
0$
#60
b10 &"
0<"
1,
0"
b110 8
b110 A
b110 \
b110 _
b110 s
b10110010 #
b10110010 *
b10110010 6
b10110010 q
b10110010 |
b10110010 3"
b10110010 K"
b0 -
b0 ;
b0 X
b0 a
b0 4
b0 >
b0 Y
b0 `
b0 }
02
1:
0=
1[
b1001101 d
b1001101 y
b1001101 J"
bx !
bx &
bx +
bx c
bx F"
bx H"
bx M"
b101001100 w
b11111111 e
b11111111 z
b11111111 G"
b1010010 ^
b1001101 p
b1001101 !"
b1001101 I"
b1101 h
b1101 ="
b1101 C"
b1 i
b1 9"
b1 B"
b0 V
b100010 U
b11 W
b0xxxxxxxx ?"
bx b
bx '"
b1000010011000001001101 ~
b11 D"
b11 ;"
b1101 :"
b1 6"
b11100010001000010011 9
b10110010 f
b10110010 0"
b10110010 @"
b10110010 E"
b11100010001000010011000001001101 )
b11100010001000010011000001001101 3
b11100010001000010011000001001101 o
b11100010001000010011000001001101 O"
b10100 l
b10100 /"
b10100 1"
b10110010 n
b10110010 4"
b10110010 >"
bx %"
bx $"
bx #"
bx ""
b11000 j
b11000 -"
b11000 A"
b10100 k
b10100 )"
b10100 +"
b10100 ."
b10000 (
b10000 1
b10000 m
b10000 *"
b10000 2"
b10000 N"
bx '
bx /
bx g
bx 5"
bx L"
1$
#65
0$
#70
b10010 f
b10010 0"
b10010 @"
b10010 E"
b10010 n
b10010 4"
b10010 >"
b10010 #
b10010 *
b10010 6
b10010 q
b10010 |
b10010 3"
b10010 K"
b11111 d
b11111 y
b11111 J"
b11100 !
b11100 &
b11100 +
b11100 c
b11100 F"
b11100 H"
b11100 M"
b11010001 w
b10110010 e
b10110010 z
b10110010 G"
b10 8
b10 A
b10 \
b10 _
b10 s
b11111 p
b11111 !"
b11111 I"
b1111 h
b1111 ="
b1111 C"
b11 i
b11 9"
b11 B"
b100000 U
b100 W
b110100000000011111 ~
b100 D"
b100 ;"
b1111 :"
b11 6"
b11100010000000110100 9
b11100010000000110100000000011111 )
b11100010000000110100000000011111 3
b11100010000000110100000000011111 o
b11100010000000110100000000011111 O"
b11000 l
b11000 /"
b11000 1"
b11100 j
b11100 -"
b11100 A"
b11000 k
b11000 )"
b11000 +"
b11000 ."
b10100 (
b10100 1
b10100 m
b10100 *"
b10100 2"
b10100 N"
1$
#75
0$
#80
b11111110 ?"
b11111110 b
b11111110 '"
b0 %"
b0 $"
b1 #"
b11111110 ""
b111111110 '
b111111110 /
b111111110 g
b111111110 5"
b111111110 L"
b11000100 f
b11000100 0"
b11000100 @"
b11000100 E"
b11000100 n
b11000100 4"
b11000100 >"
b0 &"
b11000100 w
b11000100 #
b11000100 *
b11000100 6
b11000100 q
b11000100 |
b11000100 3"
b11000100 K"
05
b10010 d
b10010 y
b10010 J"
b0 8
b0 A
b0 \
b0 _
b0 s
b10010 ^
b100 p
b100 !"
b100 I"
b100 h
b100 ="
b100 C"
b1000 U
b101 W
b100000110101000000000100 ~
b101 D"
b101 ;"
b100 :"
b11100000100000110101 9
b11100000100000110101000000000100 )
b11100000100000110101000000000100 3
b11100000100000110101000000000100 o
b11100000100000110101000000000100 O"
b10010 !
b10010 &
b10010 +
b10010 c
b10010 F"
b10010 H"
b10010 M"
b11100 l
b11100 /"
b11100 1"
b100000 j
b100000 -"
b100000 A"
b11100 k
b11100 )"
b11100 +"
b11100 ."
b11000 (
b11000 1
b11000 m
b11000 *"
b11000 2"
b11000 N"
1$
#85
0$
#90
b11111110 ?"
b11111110 b
b11111110 '"
b0 O
0u
b0 %"
b0 $"
b1 #"
b11111110 ""
0t
0S
0P
0x
b0 R
b111111110 '
b111111110 /
b111111110 g
b111111110 5"
b111111110 L"
b0 &"
b111111110 n
b111111110 4"
b111111110 >"
b11111110 f
b11111110 0"
b11111110 @"
b11111110 E"
b0 d
b0 y
b0 J"
b0 C
b0 7
b0 @
b0 G
b0 r
b0 {
0v
b11000100 #
b11000100 *
b11000100 6
b11000100 q
b11000100 |
b11000100 3"
b11000100 K"
b1 4
b1 >
b1 Y
b1 `
b1 }
15
12
0[
1.
b0 !
b0 &
b0 +
b0 c
b0 F"
b0 H"
b0 M"
b11000100 w
b11000100 e
b11000100 z
b11000100 G"
b0 ?
b0 E
b0 ]
b0 8
b0 A
b0 \
b0 _
b0 s
b11110001 ^
b0 p
b0 !"
b0 I"
b0 h
b0 ="
b0 C"
b101 i
b101 9"
b101 B"
b1 V
b11101 U
b110 W
b110101010110000000000000 ~
b110 D"
b110 ;"
b0 :"
b101 6"
b11100101110101010110 9
b11100101110101010110000000000000 )
b11100101110101010110000000000000 3
b11100101110101010110000000000000 o
b11100101110101010110000000000000 O"
b100000 l
b100000 /"
b100000 1"
b100100 j
b100100 -"
b100100 A"
b100000 k
b100000 )"
b100000 +"
b100000 ."
b11100 (
b11100 1
b11100 m
b11100 *"
b11100 2"
b11100 N"
1$
#95
0$
#100
b1 f
b1 0"
b1 @"
b1 E"
b1 ?"
b1 b
b1 '"
b1 &"
b11000101 #
b11000101 *
b11000101 6
b11000101 q
b11000101 |
b11000101 3"
b11000101 K"
b11000101 w
b1 d
b1 y
b1 J"
b11111111 !
b11111111 &
b11111111 +
b11111111 c
b11111111 F"
b11111111 H"
b11111111 M"
b1 p
b1 !"
b1 I"
b1 h
b1 ="
b1 C"
b111 W
b110101010111000000000001 ~
b111 D"
b111 ;"
b1 :"
b11100101110101010111 9
b11100101110101010111000000000001 )
b11100101110101010111000000000001 3
b11100101110101010111000000000001 o
b11100101110101010111000000000001 O"
b100100 l
b100100 /"
b100100 1"
b101000 j
b101000 -"
b101000 A"
b100100 k
b100100 )"
b100100 +"
b100100 ."
b100000 (
b100000 1
b100000 m
b100000 *"
b100000 2"
b100000 N"
1$
#105
0$
#110
b10 O
b10 7
b10 @
b10 G
b10 r
b10 {
1t
b0xxxxxxxx ?"
bx b
bx '"
1S
1P
bx %"
bx $"
bx #"
bx ""
b11 C
bx '
bx /
bx g
bx 5"
bx L"
b1 &"
b11111101 n
b11111101 4"
b11111101 >"
b11 ?
b11 E
b11 ]
b1 8
b1 A
b1 \
b1 _
b1 s
b11111101 f
b11111101 0"
b11111101 @"
b11111101 E"
b11111101 #
b11111101 *
b11111101 6
b11111101 q
b11111101 |
b11111101 3"
b11111101 K"
b0 4
b0 >
b0 Y
b0 `
b0 }
05
02
1[
0.
b1 d
b1 y
b1 J"
b1 !
b1 &
b1 +
b1 c
b1 F"
b1 H"
b1 M"
b100000000000000000000000011111101 w
b11111110 e
b11111110 z
b11111110 G"
b10010 ^
b111 p
b111 !"
b111 I"
b111 h
b111 ="
b111 C"
b110 i
b110 9"
b110 B"
b0 V
b101 U
b0 W
b10101100000000000000111 ~
b0 D"
b0 ;"
b111 :"
b110 6"
b11100000010101100000 9
b11100000010101100000000000000111 )
b11100000010101100000000000000111 3
b11100000010101100000000000000111 o
b11100000010101100000000000000111 O"
b101000 l
b101000 /"
b101000 1"
b101100 j
b101100 -"
b101100 A"
b101000 k
b101000 )"
b101000 +"
b101000 ."
b100100 (
b100100 1
b100100 m
b100100 *"
b100100 2"
b100100 N"
1$
#115
0$
#120
b10 O
0u
b0 f
b0 0"
b0 @"
b0 E"
1t
0x
b1 R
b0 n
b0 4"
b0 >"
b0 &"
18"
0S
0P
b11111111111111111111111111010000 d
b11111111111111111111111111010000 y
b11111111111111111111111111010000 J"
b110 7
b110 @
b110 G
b110 r
b110 {
1v
b0 #
b0 *
b0 6
b0 q
b0 |
b0 3"
b0 K"
b1 -
b1 ;
b1 X
b1 a
b10 4
b10 >
b10 Y
b10 `
b10 }
15
0:
1Z
0[
1<
b0 C
0,
b10010 !
b10010 &
b10010 +
b10010 c
b10010 F"
b10010 H"
b10010 M"
b100000000000000000000000000000000 w
b110000 e
b110000 z
b110000 G"
b0 ?
b0 E
b0 ]
b0 8
b0 A
b0 \
b0 _
b0 s
b1101000100 ^
0F
b11111111111111111111111111010000 p
b11111111111111111111111111010000 !"
b11111111111111111111111111010000 I"
b100 h
b100 ="
b100 C"
b1111 i
b1111 9"
b1111 B"
b10 V
b101111 U
b1111 W
b1011 B
b1011 H
b111111111111111111110100 ~
b1111 D"
b1111 ;"
b100 :"
b1111 6"
b10111010111111111111 9
1N
b10111010111111111111111111110100 )
b10111010111111111111111111110100 3
b10111010111111111111111111110100 o
b10111010111111111111111111110100 O"
b101100 l
b101100 /"
b101100 1"
b10 D
b10 I
b10 Q
b110000 j
b110000 -"
b110000 A"
b101100 k
b101100 )"
b101100 +"
b101100 ."
b101000 (
b101000 1
b101000 m
b101000 *"
b101000 2"
b101000 N"
1$
#125
0$
#130
b0 O
0t
10
b100 d
b100 y
b100 J"
b11111111 !
b11111111 &
b11111111 +
b11111111 c
b11111111 F"
b11111111 H"
b11111111 M"
1F
b111000 f
b111000 0"
b111000 @"
b111000 E"
b100 p
b100 !"
b100 I"
b1 h
b1 ="
b1 C"
b100000 U
b0 W
b1100 B
b1100 H
b0 R
b111000 n
b111000 4"
b111000 >"
b1 ~
b0 D"
b0 ;"
b1 :"
b0 6"
b11001010000000000000 9
b0 7
b0 @
b0 G
b0 r
b0 {
0v
b111000 #
b111000 *
b111000 6
b111000 q
b111000 |
b111000 3"
b111000 K"
b11001010000000000000000000000001 )
b11001010000000000000000000000001 3
b11001010000000000000000000000001 o
b11001010000000000000000000000001 O"
b111000 w
b110100 e
b110100 z
b110100 G"
b111000 l
b111000 /"
b111000 1"
b110100 j
b110100 -"
b110100 A"
b110000 k
b110000 )"
b110000 +"
b110000 ."
b101100 (
b101100 1
b101100 m
b101100 *"
b101100 2"
b101100 N"
1$
#135
0$
#140
b0 O
0u
b0 R
b0 7
b0 @
b0 G
b0 r
b0 {
0x
b100 i
b100 9"
b100 B"
00
08"
1<"
1"
0<
b10 -
b10 ;
b10 X
b10 a
b1 4
b1 >
b1 Y
b1 `
b1 }
12
1=
0Z
b111100 l
b111100 /"
b111100 1"
b1101110 d
b1101110 y
b1101110 J"
b11111110 !
b11111110 &
b11111110 +
b11111110 c
b11111110 F"
b11111110 H"
b11111110 M"
b10011101000 ^
bx f
bx 0"
bx @"
bx E"
b1101110 p
b1101110 !"
b1101110 I"
b110 h
b110 ="
b110 C"
b1 V
b11000 U
b110 W
b1110 B
b1110 H
bx n
bx 4"
bx >"
b100001000110000001101110 ~
b110 D"
b110 ;"
b1110 :"
b100 6"
b11100101100001000110 9
b10000000 #
b10000000 *
b10000000 6
b10000000 q
b10000000 |
b10000000 3"
b10000000 K"
b11100101100001000110000001101110 )
b11100101100001000110000001101110 3
b11100101100001000110000001101110 o
b11100101100001000110000001101110 O"
b10000000 w
b10010 e
b10010 z
b10010 G"
b1000000 j
b1000000 -"
b1000000 A"
b111100 k
b111100 )"
b111100 +"
b111100 ."
b111000 (
b111000 1
b111000 m
b111000 *"
b111000 2"
b111000 N"
1$
#145
0$