about pci_bar_address

[hh81478072]

Hello knuto,

I found that in pci_bar_address, it will get value from PF/VF's command register. But in PCIe spec, "I/O Space Enable" and "Memory Space Enable" are hardwired to 0b for VFs. So the "cmd" variable will always be 0 in bit 0 and bit 1 and pci_bar_address will always return "PCI_BAR_UNMAPPED" when getting VF's bar address. I think it's strange or I just misunderstand in this part? Thanks!

Best Regards,
hh81478072

[knuto]

I assume you are talking about the SR/IOV patch.
I think you are onto something here - the patch currently simply does not enforce pci config COMMAND (0x4)
bit 0 and 1 to be hardwared to 0 for VFs, so the mem bit gets set to 1 and that causes the 'normal' path of the code to be followed, unless the device implementation itself had made the bit unwritable.

Thanks for pointing it out, I'll see if I can come up with a fix, in the meantime it should all hopefully
work fine if you leave bit 1 writable :-)