[Python][#61] Support OUTI instruction.

Author: kosarev

tests/testsuite.py

@@ -14,6 +14,7 @@ def runTest(self):
             (b'\xdd\xe5', 'push ix'),
             (b'\xfd\xe1', 'pop iy'),
             (b'\xed\x50', 'in d, (c)'),
+            (b'\xed\xa3', 'outi'),
             )
 
         builder = z80.Z80InstrBuilder()

z80/__init__.py

@@ -12,7 +12,8 @@
 from ._instr import (ADD, ADC, AND, CP, OR, SBC, SUB, XOR, BIT, CALL, CCF, CPL,
                      DAA, DEC, DI, DJNZ, EI, EX, EXX, HALT, IM, INC, IN, JP,
                      JR, LD, LDDR, LDIR, NEG, NOP, RLC, RL, RR, RRC, SLA, SRA,
-                     SRL, OUT, POP, PUSH, RES, RET, RLA, RLCA, RLD, RRA, RRCA,
+                     SRL, OUT, OUTI, POP, PUSH, RES, RET,
+                     RLA, RLCA, RLD, RRA, RRCA,
                      RST, SCF, SET, A, AF, AF2, CF, M, NC, NZ, PO, P, Z, DE,
                      BC, HL, IReg, IY, IX, SP, B, C, D, E, H, L, UnknownInstr,
                      JumpInstr, CallInstr, RetInstr, At, IndexReg, Add)

z80/_disasm.py

@@ -16,7 +16,8 @@
 from ._instr import (ADD, ADC, AND, CP, OR, SBC, SUB, XOR, BIT, CALL, CCF, CPL,
                      DAA, DEC, DI, DJNZ, EI, EX, EXX, HALT, IM, INC, IN, JP,
                      JR, LD, LDDR, LDIR, NEG, NOP, RLC, RL, RR, RRC, SLA, SRA,
-                     SRL, OUT, POP, PUSH, RES, RET, RLA, RLCA, RLD, RRA, RRCA,
+                     SRL, OUT, OUTI, POP, PUSH, RES, RET,
+                     RLA, RLCA, RLD, RRA, RRCA,
                      RST, SCF, SET, A, AF, AF2, CF, M, NC, NZ, PO, P, Z, DE,
                      BC, HL, IReg, IY, IX, SP, B, C, D, E, H, L, UnknownInstr,
                      JumpInstr, CallInstr, RetInstr, At, IndexReg, Add)
@@ -183,6 +184,7 @@ class Z80InstrBuilder(object):
         'sbc': SBC,
         'scf': SCF,
         'set': SET,
+        'Touti': OUTI,
     }
 
     __OPS = {

z80/_instr.py

@@ -328,6 +328,10 @@ class OUT(Instr):
     pass
 
 
+class OUTI(Instr):
+    pass
+
+
 class POP(Instr):
     pass