{"payload":{"header_redesign_enabled":false,"results":[{"id":"91334737","archived":false,"color":"#b2b7f8","followers":4,"has_funding_file":false,"hl_name":"laiudm/ZAP","hl_trunc_description":"ZAP is a pipelined ARMv4T architecture compatible processor with cache and MMU.","language":"Verilog","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":91334737,"name":"ZAP","owner_id":15702695,"owner_login":"laiudm","updated_at":"2017-05-15T06:49:56.996Z","has_issues":false}},"sponsorable":false,"topics":[],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":104,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Alaiudm%252FZAP%2B%2Blanguage%253AVerilog","metadata":null,"warn_limited_results":false,"csrf_tokens":{"/laiudm/ZAP/star":{"post":"xQlufWwrRK1n49NTzjO4ddg7a-zlCELuN3JYEnCW_yeKw51w1_J1ZgAWSIYwcmo_Us8sScTgMXOy4hubcTmrRA"},"/laiudm/ZAP/unstar":{"post":"7D2QW2BODUhETb-5dLsv3d1_jq2VXuxVF8EMZ0GfNuRgLP6ynSBpQ1ttF_7dQ358ZV_pbWsqvO2iJJRe93RoUA"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"VRt_e1hNKPt_fXeFnTMbPvFPDG6-qSIjhz2nsXpR0T_1W1Lfj4rzkSjsNGR1Uuycl7QiellWi5triyxq0Wbh1A"}}},"title":"Repository search results"}