diff --git a/Doxyfile b/Doxyfile index 21a87bd..fb9b7ac 100644 --- a/Doxyfile +++ b/Doxyfile @@ -1,4 +1,4 @@ -# Doxyfile 1.9.1 +# Doxyfile 1.9.8 # This file describes the settings to be used by the documentation system # doxygen (www.doxygen.org) for a project. @@ -12,6 +12,16 @@ # For lists, items can also be appended using: # TAG += value [value, ...] # Values that contain spaces should be placed between quotes (\" \"). +# +# Note: +# +# Use doxygen to compare the used configuration file with the template +# configuration file: +# doxygen -x [configFile] +# Use doxygen to compare the used configuration file with the template +# configuration file without replacing the environment variables or CMake type +# replacement variables: +# doxygen -x_noenv [configFile] #--------------------------------------------------------------------------- # Project related configuration options @@ -60,16 +70,28 @@ PROJECT_LOGO = doc/image/doxygen.png OUTPUT_DIRECTORY = doc -# If the CREATE_SUBDIRS tag is set to YES then doxygen will create 4096 sub- -# directories (in 2 levels) under the output directory of each output format and -# will distribute the generated files over these directories. Enabling this +# If the CREATE_SUBDIRS tag is set to YES then doxygen will create up to 4096 +# sub-directories (in 2 levels) under the output directory of each output format +# and will distribute the generated files over these directories. Enabling this # option can be useful when feeding doxygen a huge amount of source files, where # putting all generated files in the same directory would otherwise causes -# performance problems for the file system. +# performance problems for the file system. Adapt CREATE_SUBDIRS_LEVEL to +# control the number of sub-directories. # The default value is: NO. CREATE_SUBDIRS = NO +# Controls the number of sub-directories that will be created when +# CREATE_SUBDIRS tag is set to YES. Level 0 represents 16 directories, and every +# level increment doubles the number of directories, resulting in 4096 +# directories at level 8 which is the default and also the maximum value. The +# sub-directories are organized in 2 levels, the first level always has a fixed +# number of 16 directories. +# Minimum value: 0, maximum value: 8, default value: 8. +# This tag requires that the tag CREATE_SUBDIRS is set to YES. + +CREATE_SUBDIRS_LEVEL = 8 + # If the ALLOW_UNICODE_NAMES tag is set to YES, doxygen will allow non-ASCII # characters to appear in the names of generated files. If set to NO, non-ASCII # characters will be escaped, for example _xE3_x81_x84 will be used for Unicode @@ -81,26 +103,18 @@ ALLOW_UNICODE_NAMES = NO # The OUTPUT_LANGUAGE tag is used to specify the language in which all # documentation generated by doxygen is written. Doxygen will use this # information to generate all constant output in the proper language. -# Possible values are: Afrikaans, Arabic, Armenian, Brazilian, Catalan, Chinese, -# Chinese-Traditional, Croatian, Czech, Danish, Dutch, English (United States), -# Esperanto, Farsi (Persian), Finnish, French, German, Greek, Hungarian, -# Indonesian, Italian, Japanese, Japanese-en (Japanese with English messages), -# Korean, Korean-en (Korean with English messages), Latvian, Lithuanian, -# Macedonian, Norwegian, Persian (Farsi), Polish, Portuguese, Romanian, Russian, -# Serbian, Serbian-Cyrillic, Slovak, Slovene, Spanish, Swedish, Turkish, -# Ukrainian and Vietnamese. +# Possible values are: Afrikaans, Arabic, Armenian, Brazilian, Bulgarian, +# Catalan, Chinese, Chinese-Traditional, Croatian, Czech, Danish, Dutch, English +# (United States), Esperanto, Farsi (Persian), Finnish, French, German, Greek, +# Hindi, Hungarian, Indonesian, Italian, Japanese, Japanese-en (Japanese with +# English messages), Korean, Korean-en (Korean with English messages), Latvian, +# Lithuanian, Macedonian, Norwegian, Persian (Farsi), Polish, Portuguese, +# Romanian, Russian, Serbian, Serbian-Cyrillic, Slovak, Slovene, Spanish, +# Swedish, Turkish, Ukrainian and Vietnamese. # The default value is: English. OUTPUT_LANGUAGE = English -# The OUTPUT_TEXT_DIRECTION tag is used to specify the direction in which all -# documentation generated by doxygen is written. Doxygen will use this -# information to generate all generated output in the proper direction. -# Possible values are: None, LTR, RTL and Context. -# The default value is: None. - -OUTPUT_TEXT_DIRECTION = None - # If the BRIEF_MEMBER_DESC tag is set to YES, doxygen will include brief member # descriptions after the members that are listed in the file and class # documentation (similar to Javadoc). Set to NO to disable this. @@ -258,16 +272,16 @@ TAB_SIZE = 4 # the documentation. An alias has the form: # name=value # For example adding -# "sideeffect=@par Side Effects:\n" +# "sideeffect=@par Side Effects:^^" # will allow you to put the command \sideeffect (or @sideeffect) in the # documentation, which will result in a user-defined paragraph with heading -# "Side Effects:". You can put \n's in the value part of an alias to insert -# newlines (in the resulting output). You can put ^^ in the value part of an -# alias to insert a newline as if a physical newline was in the original file. -# When you need a literal { or } or , in the value part of an alias you have to -# escape them by means of a backslash (\), this can lead to conflicts with the -# commands \{ and \} for these it is advised to use the version @{ and @} or use -# a double escape (\\{ and \\}) +# "Side Effects:". Note that you cannot put \n's in the value part of an alias +# to insert newlines (in the resulting output). You can put ^^ in the value part +# of an alias to insert a newline as if a physical newline was in the original +# file. When you need a literal { or } or , in the value part of an alias you +# have to escape them by means of a backslash (\), this can lead to conflicts +# with the commands \{ and \} for these it is advised to use the version @{ and +# @} or use a double escape (\\{ and \\}) ALIASES = @@ -312,8 +326,8 @@ OPTIMIZE_OUTPUT_SLICE = NO # extension. Doxygen has a built-in mapping, but you can override or extend it # using this tag. The format is ext=language, where ext is a file extension, and # language is one of the parsers supported by doxygen: IDL, Java, JavaScript, -# Csharp (C#), C, C++, D, PHP, md (Markdown), Objective-C, Python, Slice, VHDL, -# Fortran (fixed format Fortran: FortranFixed, free formatted Fortran: +# Csharp (C#), C, C++, Lex, D, PHP, md (Markdown), Objective-C, Python, Slice, +# VHDL, Fortran (fixed format Fortran: FortranFixed, free formatted Fortran: # FortranFree, unknown formatted Fortran: Fortran. In the later case the parser # tries to guess whether the code is fixed or free formatted code, this is the # default for Fortran type files). For instance to make doxygen treat .inc files @@ -349,6 +363,17 @@ MARKDOWN_SUPPORT = YES TOC_INCLUDE_HEADINGS = 5 +# The MARKDOWN_ID_STYLE tag can be used to specify the algorithm used to +# generate identifiers for the Markdown headings. Note: Every identifier is +# unique. +# Possible values are: DOXYGEN use a fixed 'autotoc_md' string followed by a +# sequence number starting at 0 and GITHUB use the lower case version of title +# with any whitespace replaced by '-' and punctuation characters removed. +# The default value is: DOXYGEN. +# This tag requires that the tag MARKDOWN_SUPPORT is set to YES. + +MARKDOWN_ID_STYLE = DOXYGEN + # When enabled doxygen tries to link words that correspond to documented # classes, or namespaces to their corresponding documentation. Such a link can # be prevented in individual cases by putting a % sign in front of the word or @@ -460,19 +485,27 @@ TYPEDEF_HIDES_STRUCT = NO LOOKUP_CACHE_SIZE = 0 -# The NUM_PROC_THREADS specifies the number threads doxygen is allowed to use +# The NUM_PROC_THREADS specifies the number of threads doxygen is allowed to use # during processing. When set to 0 doxygen will based this on the number of # cores available in the system. You can set it explicitly to a value larger # than 0 to get more control over the balance between CPU load and processing # speed. At this moment only the input processing can be done using multiple # threads. Since this is still an experimental feature the default is set to 1, -# which efficively disables parallel processing. Please report any issues you +# which effectively disables parallel processing. Please report any issues you # encounter. Generating dot graphs in parallel is controlled by the # DOT_NUM_THREADS setting. # Minimum value: 0, maximum value: 32, default value: 1. NUM_PROC_THREADS = 1 +# If the TIMESTAMP tag is set different from NO then each generated page will +# contain the date or date and time when the page was generated. Setting this to +# NO can help when comparing the output of multiple runs. +# Possible values are: YES, NO, DATETIME and DATE. +# The default value is: NO. + +TIMESTAMP = NO + #--------------------------------------------------------------------------- # Build related configuration options #--------------------------------------------------------------------------- @@ -554,7 +587,8 @@ HIDE_UNDOC_MEMBERS = NO # If the HIDE_UNDOC_CLASSES tag is set to YES, doxygen will hide all # undocumented classes that are normally visible in the class hierarchy. If set # to NO, these classes will be included in the various overviews. This option -# has no effect if EXTRACT_ALL is enabled. +# will also hide undocumented C++ concepts if enabled. This option has no effect +# if EXTRACT_ALL is enabled. # The default value is: NO. HIDE_UNDOC_CLASSES = NO @@ -585,14 +619,15 @@ INTERNAL_DOCS = NO # filesystem is case sensitive (i.e. it supports files in the same directory # whose names only differ in casing), the option must be set to YES to properly # deal with such files in case they appear in the input. For filesystems that -# are not case sensitive the option should be be set to NO to properly deal with +# are not case sensitive the option should be set to NO to properly deal with # output files written for symbols that only differ in casing, such as for two # classes, one named CLASS and the other named Class, and to also support # references to files without having to specify the exact matching casing. On # Windows (including Cygwin) and MacOS, users should typically set this option # to NO, whereas on Linux or other Unix flavors it should typically be set to # YES. -# The default value is: system dependent. +# Possible values are: SYSTEM, NO and YES. +# The default value is: SYSTEM. CASE_SENSE_NAMES = NO @@ -610,6 +645,12 @@ HIDE_SCOPE_NAMES = YES HIDE_COMPOUND_REFERENCE= NO +# If the SHOW_HEADERFILE tag is set to YES then the documentation for a class +# will show which file needs to be included to use the class. +# The default value is: YES. + +SHOW_HEADERFILE = YES + # If the SHOW_INCLUDE_FILES tag is set to YES then doxygen will put a list of # the files that are included by a file in the documentation of that file. # The default value is: YES. @@ -767,7 +808,8 @@ FILE_VERSION_FILTER = # output files in an output format independent way. To create the layout file # that represents doxygen's defaults, run doxygen with the -l option. You can # optionally specify a file name after the option, if omitted DoxygenLayout.xml -# will be used as the name of the layout file. +# will be used as the name of the layout file. See also section "Changing the +# layout of pages" for information. # # Note that if you run doxygen from a directory containing a file called # DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE @@ -813,27 +855,50 @@ WARNINGS = YES WARN_IF_UNDOCUMENTED = YES # If the WARN_IF_DOC_ERROR tag is set to YES, doxygen will generate warnings for -# potential errors in the documentation, such as not documenting some parameters -# in a documented function, or documenting parameters that don't exist or using -# markup commands wrongly. +# potential errors in the documentation, such as documenting some parameters in +# a documented function twice, or documenting parameters that don't exist or +# using markup commands wrongly. # The default value is: YES. WARN_IF_DOC_ERROR = YES +# If WARN_IF_INCOMPLETE_DOC is set to YES, doxygen will warn about incomplete +# function parameter documentation. If set to NO, doxygen will accept that some +# parameters have no documentation without warning. +# The default value is: YES. + +WARN_IF_INCOMPLETE_DOC = YES + # This WARN_NO_PARAMDOC option can be enabled to get warnings for functions that # are documented, but have no documentation for their parameters or return -# value. If set to NO, doxygen will only warn about wrong or incomplete -# parameter documentation, but not about the absence of documentation. If -# EXTRACT_ALL is set to YES then this flag will automatically be disabled. +# value. If set to NO, doxygen will only warn about wrong parameter +# documentation, but not about the absence of documentation. If EXTRACT_ALL is +# set to YES then this flag will automatically be disabled. See also +# WARN_IF_INCOMPLETE_DOC # The default value is: NO. WARN_NO_PARAMDOC = NO +# If WARN_IF_UNDOC_ENUM_VAL option is set to YES, doxygen will warn about +# undocumented enumeration values. If set to NO, doxygen will accept +# undocumented enumeration values. If EXTRACT_ALL is set to YES then this flag +# will automatically be disabled. +# The default value is: NO. + +WARN_IF_UNDOC_ENUM_VAL = NO + # If the WARN_AS_ERROR tag is set to YES then doxygen will immediately stop when # a warning is encountered. If the WARN_AS_ERROR tag is set to FAIL_ON_WARNINGS # then doxygen will continue running as if WARN_AS_ERROR tag is set to NO, but # at the end of the doxygen process doxygen will return with a non-zero status. -# Possible values are: NO, YES and FAIL_ON_WARNINGS. +# If the WARN_AS_ERROR tag is set to FAIL_ON_WARNINGS_PRINT then doxygen behaves +# like FAIL_ON_WARNINGS but in case no WARN_LOGFILE is defined doxygen will not +# write the warning messages in between other messages but write them at the end +# of a run, in case a WARN_LOGFILE is defined the warning messages will be +# besides being in the defined file also be shown at the end of a run, unless +# the WARN_LOGFILE is defined as - i.e. standard output (stdout) in that case +# the behavior will remain as with the setting FAIL_ON_WARNINGS. +# Possible values are: NO, YES, FAIL_ON_WARNINGS and FAIL_ON_WARNINGS_PRINT. # The default value is: NO. WARN_AS_ERROR = NO @@ -844,13 +909,27 @@ WARN_AS_ERROR = NO # and the warning text. Optionally the format may contain $version, which will # be replaced by the version of the file (if it could be obtained via # FILE_VERSION_FILTER) +# See also: WARN_LINE_FORMAT # The default value is: $file:$line: $text. WARN_FORMAT = "$file:$line: $text" +# In the $text part of the WARN_FORMAT command it is possible that a reference +# to a more specific place is given. To make it easier to jump to this place +# (outside of doxygen) the user can define a custom "cut" / "paste" string. +# Example: +# WARN_LINE_FORMAT = "'vi $file +$line'" +# See also: WARN_FORMAT +# The default value is: at line $line of file $file. + +WARN_LINE_FORMAT = "at line $line of file $file" + # The WARN_LOGFILE tag can be used to specify a file to which warning and error # messages should be written. If left blank the output is written to standard -# error (stderr). +# error (stderr). In case the file specified cannot be opened for writing the +# warning and error messages are written to standard error. When as file - is +# specified the warning and error messages are written to standard output +# (stdout). WARN_LOGFILE = @@ -875,10 +954,21 @@ INPUT = src \ # libiconv (or the iconv built into libc) for the transcoding. See the libiconv # documentation (see: # https://www.gnu.org/software/libiconv/) for the list of possible encodings. +# See also: INPUT_FILE_ENCODING # The default value is: UTF-8. INPUT_ENCODING = UTF-8 +# This tag can be used to specify the character encoding of the source files +# that doxygen parses The INPUT_FILE_ENCODING tag can be used to specify +# character encoding on a per file pattern basis. Doxygen will compare the file +# name with each pattern and apply the encoding instead of the default +# INPUT_ENCODING) if there is a match. The character encodings are a list of the +# form: pattern=encoding (like *.php=ISO-8859-1). See cfg_input_encoding +# "INPUT_ENCODING" for further information on supported encodings. + +INPUT_FILE_ENCODING = + # If the value of the INPUT tag contains directories, you can use the # FILE_PATTERNS tag to specify one or more wildcard patterns (like *.cpp and # *.h) to filter out the source-files in the directories. @@ -890,12 +980,12 @@ INPUT_ENCODING = UTF-8 # Note the list of default checked file patterns might differ from the list of # default file extension mappings. # -# If left blank the following patterns are tested:*.c, *.cc, *.cxx, *.cpp, -# *.c++, *.java, *.ii, *.ixx, *.ipp, *.i++, *.inl, *.idl, *.ddl, *.odl, *.h, -# *.hh, *.hxx, *.hpp, *.h++, *.cs, *.d, *.php, *.php4, *.php5, *.phtml, *.inc, -# *.m, *.markdown, *.md, *.mm, *.dox (to be provided as doxygen C comment), -# *.py, *.pyw, *.f90, *.f95, *.f03, *.f08, *.f18, *.f, *.for, *.vhd, *.vhdl, -# *.ucf, *.qsf and *.ice. +# If left blank the following patterns are tested:*.c, *.cc, *.cxx, *.cxxm, +# *.cpp, *.cppm, *.c++, *.c++m, *.java, *.ii, *.ixx, *.ipp, *.i++, *.inl, *.idl, +# *.ddl, *.odl, *.h, *.hh, *.hxx, *.hpp, *.h++, *.ixx, *.l, *.cs, *.d, *.php, +# *.php4, *.php5, *.phtml, *.inc, *.m, *.markdown, *.md, *.mm, *.dox (to be +# provided as doxygen C comment), *.py, *.pyw, *.f90, *.f95, *.f03, *.f08, +# *.f18, *.f, *.for, *.vhd, *.vhdl, *.ucf, *.qsf and *.ice. FILE_PATTERNS = *.c \ *.cc \ @@ -978,10 +1068,7 @@ EXCLUDE_PATTERNS = # (namespaces, classes, functions, etc.) that should be excluded from the # output. The symbol name can be a fully qualified name, a word, or if the # wildcard * is used, a substring. Examples: ANamespace, AClass, -# AClass::ANamespace, ANamespace::*Test -# -# Note that the wildcards are matched against the file with absolute path, so to -# exclude all test directories use the pattern */test/* +# ANamespace::AClass, ANamespace::*Test EXCLUDE_SYMBOLS = @@ -1026,6 +1113,11 @@ IMAGE_PATH = # code is scanned, but not when the output code is generated. If lines are added # or removed, the anchors will not be placed correctly. # +# Note that doxygen will use the data processed and written to standard output +# for further processing, therefore nothing else, like debug statements or used +# commands (so in case of a Windows batch file always use @echo OFF), should be +# written to standard output. +# # Note that for custom extensions or not directly supported extensions you also # need to set EXTENSION_MAPPING for the extension otherwise the files are not # properly processed by doxygen. @@ -1067,6 +1159,15 @@ FILTER_SOURCE_PATTERNS = USE_MDFILE_AS_MAINPAGE = +# The Fortran standard specifies that for fixed formatted Fortran code all +# characters from position 72 are to be considered as comment. A common +# extension is to allow longer lines before the automatic comment starts. The +# setting FORTRAN_COMMENT_AFTER will also make it possible that longer lines can +# be processed before the automatic comment starts. +# Minimum value: 7, maximum value: 10000, default value: 72. + +FORTRAN_COMMENT_AFTER = 72 + #--------------------------------------------------------------------------- # Configuration options related to source browsing #--------------------------------------------------------------------------- @@ -1164,9 +1265,11 @@ VERBATIM_HEADERS = YES CLANG_ASSISTED_PARSING = NO -# If clang assisted parsing is enabled and the CLANG_ADD_INC_PATHS tag is set to -# YES then doxygen will add the directory of each input to the include path. +# If the CLANG_ASSISTED_PARSING tag is set to YES and the CLANG_ADD_INC_PATHS +# tag is set to YES then doxygen will add the directory of each input to the +# include path. # The default value is: YES. +# This tag requires that the tag CLANG_ASSISTED_PARSING is set to YES. CLANG_ADD_INC_PATHS = YES @@ -1202,10 +1305,11 @@ CLANG_DATABASE_PATH = ALPHABETICAL_INDEX = YES -# In case all classes in a project start with a common prefix, all classes will -# be put under the same header in the alphabetical index. The IGNORE_PREFIX tag -# can be used to specify a prefix (or a list of prefixes) that should be ignored -# while generating the index headers. +# The IGNORE_PREFIX tag can be used to specify a prefix (or a list of prefixes) +# that should be ignored while generating the index headers. The IGNORE_PREFIX +# tag works for classes, function and member names. The entity will be placed in +# the alphabetical list under the first letter of the entity name that remains +# after removing the prefix. # This tag requires that the tag ALPHABETICAL_INDEX is set to YES. IGNORE_PREFIX = @@ -1284,7 +1388,12 @@ HTML_STYLESHEET = # Doxygen will copy the style sheet files to the output directory. # Note: The order of the extra style sheet files is of importance (e.g. the last # style sheet in the list overrules the setting of the previous ones in the -# list). For an example see the documentation. +# list). +# Note: Since the styling of scrollbars can currently not be overruled in +# Webkit/Chromium, the styling will be left out of the default doxygen.css if +# one or more extra stylesheets have been specified. So if scrollbar +# customization is desired it has to be added explicitly. For an example see the +# documentation. # This tag requires that the tag GENERATE_HTML is set to YES. HTML_EXTRA_STYLESHEET = @@ -1299,9 +1408,22 @@ HTML_EXTRA_STYLESHEET = HTML_EXTRA_FILES = +# The HTML_COLORSTYLE tag can be used to specify if the generated HTML output +# should be rendered with a dark or light theme. +# Possible values are: LIGHT always generate light mode output, DARK always +# generate dark mode output, AUTO_LIGHT automatically set the mode according to +# the user preference, use light mode if no preference is set (the default), +# AUTO_DARK automatically set the mode according to the user preference, use +# dark mode if no preference is set and TOGGLE allow to user to switch between +# light and dark mode via a button. +# The default value is: AUTO_LIGHT. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE = AUTO_LIGHT + # The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen # will adjust the colors in the style sheet and background images according to -# this color. Hue is specified as an angle on a colorwheel, see +# this color. Hue is specified as an angle on a color-wheel, see # https://en.wikipedia.org/wiki/Hue for more information. For instance the value # 0 represents red, 60 is yellow, 120 is green, 180 is cyan, 240 is blue, 300 # purple, and 360 is red again. @@ -1311,7 +1433,7 @@ HTML_EXTRA_FILES = HTML_COLORSTYLE_HUE = 220 # The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of the colors -# in the HTML output. For a value of 0 the output will use grayscales only. A +# in the HTML output. For a value of 0 the output will use gray-scales only. A # value of 255 will produce the most vivid colors. # Minimum value: 0, maximum value: 255, default value: 100. # This tag requires that the tag GENERATE_HTML is set to YES. @@ -1329,15 +1451,6 @@ HTML_COLORSTYLE_SAT = 100 HTML_COLORSTYLE_GAMMA = 80 -# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML -# page will contain the date and time when the page was generated. Setting this -# to YES can help to show when doxygen was last run and thus if the -# documentation is up to date. -# The default value is: NO. -# This tag requires that the tag GENERATE_HTML is set to YES. - -HTML_TIMESTAMP = NO - # If the HTML_DYNAMIC_MENUS tag is set to YES then the generated HTML # documentation will contain a main index with vertical navigation menus that # are dynamically created via JavaScript. If disabled, the navigation index will @@ -1357,6 +1470,13 @@ HTML_DYNAMIC_MENUS = YES HTML_DYNAMIC_SECTIONS = NO +# If the HTML_CODE_FOLDING tag is set to YES then classes and functions can be +# dynamically folded and expanded in the generated HTML source code. +# The default value is: YES. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_CODE_FOLDING = YES + # With HTML_INDEX_NUM_ENTRIES one can control the preferred number of entries # shown in the various tree structured indices initially; the user can expand # and collapse entries dynamically later on. Doxygen will expand the tree to @@ -1393,6 +1513,13 @@ GENERATE_DOCSET = NO DOCSET_FEEDNAME = "Doxygen generated docs" +# This tag determines the URL of the docset feed. A documentation feed provides +# an umbrella under which multiple documentation sets from a single provider +# (such as a company or product suite) can be grouped. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_FEEDURL = + # This tag specifies a string that should uniquely identify the documentation # set bundle. This should be a reverse domain-name style string, e.g. # com.mycompany.MyDocSet. Doxygen will append .docset to the name. @@ -1418,8 +1545,12 @@ DOCSET_PUBLISHER_NAME = Publisher # If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three # additional HTML index files: index.hhp, index.hhc, and index.hhk. The # index.hhp is a project file that can be read by Microsoft's HTML Help Workshop -# (see: -# https://www.microsoft.com/en-us/download/details.aspx?id=21138) on Windows. +# on Windows. In the beginning of 2021 Microsoft took the original page, with +# a.o. the download links, offline the HTML help workshop was already many years +# in maintenance mode). You can download the HTML help workshop from the web +# archives at Installation executable (see: +# http://web.archive.org/web/20160201063255/http://download.microsoft.com/downlo +# ad/0/A/9/0A939EF6-E31C-430F-A3DF-DFAE7960D564/htmlhelp.exe). # # The HTML Help Workshop contains a compiler that can convert all HTML output # generated by doxygen into a single compiled HTML file (.chm). Compiled HTML @@ -1476,6 +1607,16 @@ BINARY_TOC = NO TOC_EXPAND = NO +# The SITEMAP_URL tag is used to specify the full URL of the place where the +# generated documentation will be placed on the server by the user during the +# deployment of the documentation. The generated sitemap is called sitemap.xml +# and placed on the directory specified by HTML_OUTPUT. In case no SITEMAP_URL +# is specified no sitemap is generated. For information about the sitemap +# protocol see https://www.sitemaps.org +# This tag requires that the tag GENERATE_HTML is set to YES. + +SITEMAP_URL = + # If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and # QHP_VIRTUAL_FOLDER are set, an additional index file will be generated that # can be used as input for Qt's qhelpgenerator to generate a Qt Compressed Help @@ -1578,16 +1719,28 @@ DISABLE_INDEX = NO # to work a browser that supports JavaScript, DHTML, CSS and frames is required # (i.e. any modern browser). Windows users are probably better off using the # HTML help feature. Via custom style sheets (see HTML_EXTRA_STYLESHEET) one can -# further fine-tune the look of the index. As an example, the default style -# sheet generated by doxygen has an example that shows how to put an image at -# the root of the tree instead of the PROJECT_NAME. Since the tree basically has -# the same information as the tab index, you could consider setting -# DISABLE_INDEX to YES when enabling this option. +# further fine tune the look of the index (see "Fine-tuning the output"). As an +# example, the default style sheet generated by doxygen has an example that +# shows how to put an image at the root of the tree instead of the PROJECT_NAME. +# Since the tree basically has the same information as the tab index, you could +# consider setting DISABLE_INDEX to YES when enabling this option. # The default value is: NO. # This tag requires that the tag GENERATE_HTML is set to YES. GENERATE_TREEVIEW = YES +# When both GENERATE_TREEVIEW and DISABLE_INDEX are set to YES, then the +# FULL_SIDEBAR option determines if the side bar is limited to only the treeview +# area (value NO) or if it should extend to the full height of the window (value +# YES). Setting this to YES gives a layout similar to +# https://docs.readthedocs.io with more room for contents, but less room for the +# project logo, title, and description. If either GENERATE_TREEVIEW or +# DISABLE_INDEX is set to NO, this option has no effect. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +FULL_SIDEBAR = NO + # The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that # doxygen will group on one line in the generated HTML documentation. # @@ -1612,6 +1765,13 @@ TREEVIEW_WIDTH = 250 EXT_LINKS_IN_WINDOW = NO +# If the OBFUSCATE_EMAILS tag is set to YES, doxygen will obfuscate email +# addresses. +# The default value is: YES. +# This tag requires that the tag GENERATE_HTML is set to YES. + +OBFUSCATE_EMAILS = YES + # If the HTML_FORMULA_FORMAT option is set to svg, doxygen will use the pdf2svg # tool (see https://github.com/dawbarton/pdf2svg) or inkscape (see # https://inkscape.org) to generate formulas as SVG images instead of PNGs for @@ -1632,17 +1792,6 @@ HTML_FORMULA_FORMAT = png FORMULA_FONTSIZE = 10 -# Use the FORMULA_TRANSPARENT tag to determine whether or not the images -# generated for formulas are transparent PNGs. Transparent PNGs are not -# supported properly for IE 6.0, but are supported on all modern browsers. -# -# Note that when changing this option you need to delete any form_*.png files in -# the HTML output directory before the changes have effect. -# The default value is: YES. -# This tag requires that the tag GENERATE_HTML is set to YES. - -FORMULA_TRANSPARENT = YES - # The FORMULA_MACROFILE can contain LaTeX \newcommand and \renewcommand commands # to create new LaTeX commands to be used in formulas as building blocks. See # the section "Including formulas" for details. @@ -1660,11 +1809,29 @@ FORMULA_MACROFILE = USE_MATHJAX = NO +# With MATHJAX_VERSION it is possible to specify the MathJax version to be used. +# Note that the different versions of MathJax have different requirements with +# regards to the different settings, so it is possible that also other MathJax +# settings have to be changed when switching between the different MathJax +# versions. +# Possible values are: MathJax_2 and MathJax_3. +# The default value is: MathJax_2. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_VERSION = MathJax_2 + # When MathJax is enabled you can set the default output format to be used for -# the MathJax output. See the MathJax site (see: -# http://docs.mathjax.org/en/v2.7-latest/output.html) for more details. +# the MathJax output. For more details about the output format see MathJax +# version 2 (see: +# http://docs.mathjax.org/en/v2.7-latest/output.html) and MathJax version 3 +# (see: +# http://docs.mathjax.org/en/latest/web/components/output.html). # Possible values are: HTML-CSS (which is slower, but has the best -# compatibility), NativeMML (i.e. MathML) and SVG. +# compatibility. This is the name for Mathjax version 2, for MathJax version 3 +# this will be translated into chtml), NativeMML (i.e. MathML. Only supported +# for NathJax 2. For MathJax version 3 chtml will be used instead.), chtml (This +# is the name for Mathjax version 3, for MathJax version 2 this will be +# translated into HTML-CSS) and SVG. # The default value is: HTML-CSS. # This tag requires that the tag USE_MATHJAX is set to YES. @@ -1677,15 +1844,21 @@ MATHJAX_FORMAT = HTML-CSS # MATHJAX_RELPATH should be ../mathjax. The default value points to the MathJax # Content Delivery Network so you can quickly see the result without installing # MathJax. However, it is strongly recommended to install a local copy of -# MathJax from https://www.mathjax.org before deployment. -# The default value is: https://cdn.jsdelivr.net/npm/mathjax@2. +# MathJax from https://www.mathjax.org before deployment. The default value is: +# - in case of MathJax version 2: https://cdn.jsdelivr.net/npm/mathjax@2 +# - in case of MathJax version 3: https://cdn.jsdelivr.net/npm/mathjax@3 # This tag requires that the tag USE_MATHJAX is set to YES. MATHJAX_RELPATH = https://cdn.jsdelivr.net/npm/mathjax@2 # The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax # extension names that should be enabled during MathJax rendering. For example +# for MathJax version 2 (see +# https://docs.mathjax.org/en/v2.7-latest/tex.html#tex-and-latex-extensions): # MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols +# For example for MathJax version 3 (see +# http://docs.mathjax.org/en/latest/input/tex/extensions/index.html): +# MATHJAX_EXTENSIONS = ams # This tag requires that the tag USE_MATHJAX is set to YES. MATHJAX_EXTENSIONS = @@ -1865,29 +2038,31 @@ PAPER_TYPE = a4 EXTRA_PACKAGES = -# The LATEX_HEADER tag can be used to specify a personal LaTeX header for the -# generated LaTeX document. The header should contain everything until the first -# chapter. If it is left blank doxygen will generate a standard header. See -# section "Doxygen usage" for information on how to let doxygen write the -# default header to a separate file. +# The LATEX_HEADER tag can be used to specify a user-defined LaTeX header for +# the generated LaTeX document. The header should contain everything until the +# first chapter. If it is left blank doxygen will generate a standard header. It +# is highly recommended to start with a default header using +# doxygen -w latex new_header.tex new_footer.tex new_stylesheet.sty +# and then modify the file new_header.tex. See also section "Doxygen usage" for +# information on how to generate the default header that doxygen normally uses. # -# Note: Only use a user-defined header if you know what you are doing! The -# following commands have a special meaning inside the header: $title, -# $datetime, $date, $doxygenversion, $projectname, $projectnumber, -# $projectbrief, $projectlogo. Doxygen will replace $title with the empty -# string, for the replacement values of the other commands the user is referred -# to HTML_HEADER. +# Note: Only use a user-defined header if you know what you are doing! +# Note: The header is subject to change so you typically have to regenerate the +# default header when upgrading to a newer version of doxygen. The following +# commands have a special meaning inside the header (and footer): For a +# description of the possible markers and block names see the documentation. # This tag requires that the tag GENERATE_LATEX is set to YES. LATEX_HEADER = -# The LATEX_FOOTER tag can be used to specify a personal LaTeX footer for the -# generated LaTeX document. The footer should contain everything after the last -# chapter. If it is left blank doxygen will generate a standard footer. See +# The LATEX_FOOTER tag can be used to specify a user-defined LaTeX footer for +# the generated LaTeX document. The footer should contain everything after the +# last chapter. If it is left blank doxygen will generate a standard footer. See # LATEX_HEADER for more information on how to generate a default footer and what -# special commands can be used inside the footer. -# -# Note: Only use a user-defined footer if you know what you are doing! +# special commands can be used inside the footer. See also section "Doxygen +# usage" for information on how to generate the default footer that doxygen +# normally uses. Note: Only use a user-defined footer if you know what you are +# doing! # This tag requires that the tag GENERATE_LATEX is set to YES. LATEX_FOOTER = @@ -1930,10 +2105,16 @@ PDF_HYPERLINKS = YES USE_PDFLATEX = YES -# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \batchmode -# command to the generated LaTeX files. This will instruct LaTeX to keep running -# if errors occur, instead of asking the user for help. This option is also used -# when generating formulas in HTML. +# The LATEX_BATCHMODE tag signals the behavior of LaTeX in case of an error. +# Possible values are: NO same as ERROR_STOP, YES same as BATCH, BATCH In batch +# mode nothing is printed on the terminal, errors are scrolled as if is +# hit at every error; missing files that TeX tries to input or request from +# keyboard input (\read on a not open input stream) cause the job to abort, +# NON_STOP In nonstop mode the diagnostic message will appear on the terminal, +# but there is no possibility of user interaction just like in batch mode, +# SCROLL In scroll mode, TeX will stop only for missing files to input or if +# keyboard input is necessary and ERROR_STOP In errorstop mode, TeX will stop at +# each error, asking for user intervention. # The default value is: NO. # This tag requires that the tag GENERATE_LATEX is set to YES. @@ -1946,16 +2127,6 @@ LATEX_BATCHMODE = NO LATEX_HIDE_INDICES = NO -# If the LATEX_SOURCE_CODE tag is set to YES then doxygen will include source -# code with syntax highlighting in the LaTeX output. -# -# Note that which sources are shown also depends on other settings such as -# SOURCE_BROWSER. -# The default value is: NO. -# This tag requires that the tag GENERATE_LATEX is set to YES. - -LATEX_SOURCE_CODE = NO - # The LATEX_BIB_STYLE tag can be used to specify the style to use for the # bibliography, e.g. plainnat, or ieeetr. See # https://en.wikipedia.org/wiki/BibTeX and \cite for more info. @@ -1964,14 +2135,6 @@ LATEX_SOURCE_CODE = NO LATEX_BIB_STYLE = plain -# If the LATEX_TIMESTAMP tag is set to YES then the footer of each generated -# page will contain the date and time when the page was generated. Setting this -# to NO can help when comparing the output of multiple runs. -# The default value is: NO. -# This tag requires that the tag GENERATE_LATEX is set to YES. - -LATEX_TIMESTAMP = NO - # The LATEX_EMOJI_DIRECTORY tag is used to specify the (relative or absolute) # path from which the emoji images will be read. If a relative path is entered, # it will be relative to the LATEX_OUTPUT directory. If left blank the @@ -2036,16 +2199,6 @@ RTF_STYLESHEET_FILE = RTF_EXTENSIONS_FILE = -# If the RTF_SOURCE_CODE tag is set to YES then doxygen will include source code -# with syntax highlighting in the RTF output. -# -# Note that which sources are shown also depends on other settings such as -# SOURCE_BROWSER. -# The default value is: NO. -# This tag requires that the tag GENERATE_RTF is set to YES. - -RTF_SOURCE_CODE = NO - #--------------------------------------------------------------------------- # Configuration options related to the man page output #--------------------------------------------------------------------------- @@ -2142,21 +2295,12 @@ GENERATE_DOCBOOK = NO DOCBOOK_OUTPUT = docbook -# If the DOCBOOK_PROGRAMLISTING tag is set to YES, doxygen will include the -# program listings (including syntax highlighting and cross-referencing -# information) to the DOCBOOK output. Note that enabling this will significantly -# increase the size of the DOCBOOK output. -# The default value is: NO. -# This tag requires that the tag GENERATE_DOCBOOK is set to YES. - -DOCBOOK_PROGRAMLISTING = NO - #--------------------------------------------------------------------------- # Configuration options for the AutoGen Definitions output #--------------------------------------------------------------------------- # If the GENERATE_AUTOGEN_DEF tag is set to YES, doxygen will generate an -# AutoGen Definitions (see http://autogen.sourceforge.net/) file that captures +# AutoGen Definitions (see https://autogen.sourceforge.net/) file that captures # the structure of the code including all documentation. Note that this feature # is still experimental and incomplete at the moment. # The default value is: NO. @@ -2167,6 +2311,28 @@ GENERATE_AUTOGEN_DEF = NO # Configuration options related to Sqlite3 output #--------------------------------------------------------------------------- +# If the GENERATE_SQLITE3 tag is set to YES doxygen will generate a Sqlite3 +# database with symbols found by doxygen stored in tables. +# The default value is: NO. + +GENERATE_SQLITE3 = NO + +# The SQLITE3_OUTPUT tag is used to specify where the Sqlite3 database will be +# put. If a relative path is entered the value of OUTPUT_DIRECTORY will be put +# in front of it. +# The default directory is: sqlite3. +# This tag requires that the tag GENERATE_SQLITE3 is set to YES. + +SQLITE3_OUTPUT = sqlite3 + +# The SQLITE3_OVERWRITE_DB tag is set to YES, the existing doxygen_sqlite3.db +# database file will be recreated with each doxygen run. If set to NO, doxygen +# will warn if an a database file is already found and not modify it. +# The default value is: YES. +# This tag requires that the tag GENERATE_SQLITE3 is set to YES. + +SQLITE3_RECREATE_DB = YES + #--------------------------------------------------------------------------- # Configuration options related to the Perl module output #--------------------------------------------------------------------------- @@ -2241,7 +2407,8 @@ SEARCH_INCLUDES = YES # The INCLUDE_PATH tag can be used to specify one or more directories that # contain include files that are not input files but should be processed by the -# preprocessor. +# preprocessor. Note that the INCLUDE_PATH is not recursive, so the setting of +# RECURSIVE has no effect here. # This tag requires that the tag SEARCH_INCLUDES is set to YES. INCLUDE_PATH = @@ -2306,17 +2473,17 @@ TAGFILES = # tag file that is based on the input files it reads. See section "Linking to # external documentation" for more information about the usage of tag files. -GENERATE_TAGFILE = +GENERATE_TAGFILE = doc/tagfile -# If the ALLEXTERNALS tag is set to YES, all external class will be listed in -# the class index. If set to NO, only the inherited external classes will be -# listed. +# If the ALLEXTERNALS tag is set to YES, all external classes and namespaces +# will be listed in the class and namespace index. If set to NO, only the +# inherited external classes will be listed. # The default value is: NO. ALLEXTERNALS = NO # If the EXTERNAL_GROUPS tag is set to YES, all external groups will be listed -# in the modules index. If set to NO, only the current project's groups will be +# in the topic index. If set to NO, only the current project's groups will be # listed. # The default value is: YES. @@ -2330,25 +2497,9 @@ EXTERNAL_GROUPS = YES EXTERNAL_PAGES = YES #--------------------------------------------------------------------------- -# Configuration options related to the dot tool +# Configuration options related to diagram generator tools #--------------------------------------------------------------------------- -# If the CLASS_DIAGRAMS tag is set to YES, doxygen will generate a class diagram -# (in HTML and LaTeX) for classes with base or super classes. Setting the tag to -# NO turns the diagrams off. Note that this option also works with HAVE_DOT -# disabled, but it is recommended to install and use dot, since it yields more -# powerful graphs. -# The default value is: YES. - -CLASS_DIAGRAMS = YES - -# You can include diagrams made with dia in doxygen documentation. Doxygen will -# then run dia to produce the diagram and insert it in the documentation. The -# DIA_PATH tag allows you to specify the directory where the dia binary resides. -# If left empty dia is assumed to be found in the default search path. - -DIA_PATH = - # If set to YES the inheritance and collaboration graphs will hide inheritance # and usage relations if the target is undocumented or is not a class. # The default value is: YES. @@ -2357,7 +2508,7 @@ HIDE_UNDOC_RELATIONS = YES # If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is # available from the path. This tool is part of Graphviz (see: -# http://www.graphviz.org/), a graph visualization toolkit from AT&T and Lucent +# https://www.graphviz.org/), a graph visualization toolkit from AT&T and Lucent # Bell Labs. The other options in this section have no effect if this option is # set to NO # The default value is: NO. @@ -2374,49 +2525,73 @@ HAVE_DOT = NO DOT_NUM_THREADS = 0 -# When you want a differently looking font in the dot files that doxygen -# generates you can specify the font name using DOT_FONTNAME. You need to make -# sure dot is able to find the font, which can be done by putting it in a -# standard location or by setting the DOTFONTPATH environment variable or by -# setting DOT_FONTPATH to the directory containing the font. -# The default value is: Helvetica. +# DOT_COMMON_ATTR is common attributes for nodes, edges and labels of +# subgraphs. When you want a differently looking font in the dot files that +# doxygen generates you can specify fontname, fontcolor and fontsize attributes. +# For details please see Node, +# Edge and Graph Attributes specification You need to make sure dot is able +# to find the font, which can be done by putting it in a standard location or by +# setting the DOTFONTPATH environment variable or by setting DOT_FONTPATH to the +# directory containing the font. Default graphviz fontsize is 14. +# The default value is: fontname=Helvetica,fontsize=10. # This tag requires that the tag HAVE_DOT is set to YES. -DOT_FONTNAME = Helvetica +DOT_COMMON_ATTR = "fontname=Helvetica,fontsize=10" -# The DOT_FONTSIZE tag can be used to set the size (in points) of the font of -# dot graphs. -# Minimum value: 4, maximum value: 24, default value: 10. +# DOT_EDGE_ATTR is concatenated with DOT_COMMON_ATTR. For elegant style you can +# add 'arrowhead=open, arrowtail=open, arrowsize=0.5'. Complete documentation about +# arrows shapes. +# The default value is: labelfontname=Helvetica,labelfontsize=10. # This tag requires that the tag HAVE_DOT is set to YES. -DOT_FONTSIZE = 10 +DOT_EDGE_ATTR = "labelfontname=Helvetica,labelfontsize=10" -# By default doxygen will tell dot to use the default font as specified with -# DOT_FONTNAME. If you specify a different font using DOT_FONTNAME you can set -# the path where dot can find it using this tag. +# DOT_NODE_ATTR is concatenated with DOT_COMMON_ATTR. For view without boxes +# around nodes set 'shape=plain' or 'shape=plaintext' Shapes specification +# The default value is: shape=box,height=0.2,width=0.4. +# This tag requires that the tag HAVE_DOT is set to YES. + +DOT_NODE_ATTR = "shape=box,height=0.2,width=0.4" + +# You can set the path where dot can find font specified with fontname in +# DOT_COMMON_ATTR and others dot attributes. # This tag requires that the tag HAVE_DOT is set to YES. DOT_FONTPATH = -# If the CLASS_GRAPH tag is set to YES then doxygen will generate a graph for -# each documented class showing the direct and indirect inheritance relations. -# Setting this tag to YES will force the CLASS_DIAGRAMS tag to NO. +# If the CLASS_GRAPH tag is set to YES or GRAPH or BUILTIN then doxygen will +# generate a graph for each documented class showing the direct and indirect +# inheritance relations. In case the CLASS_GRAPH tag is set to YES or GRAPH and +# HAVE_DOT is enabled as well, then dot will be used to draw the graph. In case +# the CLASS_GRAPH tag is set to YES and HAVE_DOT is disabled or if the +# CLASS_GRAPH tag is set to BUILTIN, then the built-in generator will be used. +# If the CLASS_GRAPH tag is set to TEXT the direct and indirect inheritance +# relations will be shown as texts / links. +# Possible values are: NO, YES, TEXT, GRAPH and BUILTIN. # The default value is: YES. -# This tag requires that the tag HAVE_DOT is set to YES. CLASS_GRAPH = YES # If the COLLABORATION_GRAPH tag is set to YES then doxygen will generate a # graph for each documented class showing the direct and indirect implementation # dependencies (inheritance, containment, and class references variables) of the -# class with other documented classes. +# class with other documented classes. Explicit enabling a collaboration graph, +# when COLLABORATION_GRAPH is set to NO, can be accomplished by means of the +# command \collaborationgraph. Disabling a collaboration graph can be +# accomplished by means of the command \hidecollaborationgraph. # The default value is: YES. # This tag requires that the tag HAVE_DOT is set to YES. COLLABORATION_GRAPH = YES # If the GROUP_GRAPHS tag is set to YES then doxygen will generate a graph for -# groups, showing the direct groups dependencies. +# groups, showing the direct groups dependencies. Explicit enabling a group +# dependency graph, when GROUP_GRAPHS is set to NO, can be accomplished by means +# of the command \groupgraph. Disabling a directory graph can be accomplished by +# means of the command \hidegroupgraph. See also the chapter Grouping in the +# manual. # The default value is: YES. # This tag requires that the tag HAVE_DOT is set to YES. @@ -2476,7 +2651,9 @@ TEMPLATE_RELATIONS = NO # If the INCLUDE_GRAPH, ENABLE_PREPROCESSING and SEARCH_INCLUDES tags are set to # YES then doxygen will generate a graph for each documented file showing the # direct and indirect include dependencies of the file with other documented -# files. +# files. Explicit enabling an include graph, when INCLUDE_GRAPH is is set to NO, +# can be accomplished by means of the command \includegraph. Disabling an +# include graph can be accomplished by means of the command \hideincludegraph. # The default value is: YES. # This tag requires that the tag HAVE_DOT is set to YES. @@ -2485,7 +2662,10 @@ INCLUDE_GRAPH = YES # If the INCLUDED_BY_GRAPH, ENABLE_PREPROCESSING and SEARCH_INCLUDES tags are # set to YES then doxygen will generate a graph for each documented file showing # the direct and indirect include dependencies of the file with other documented -# files. +# files. Explicit enabling an included by graph, when INCLUDED_BY_GRAPH is set +# to NO, can be accomplished by means of the command \includedbygraph. Disabling +# an included by graph can be accomplished by means of the command +# \hideincludedbygraph. # The default value is: YES. # This tag requires that the tag HAVE_DOT is set to YES. @@ -2525,16 +2705,26 @@ GRAPHICAL_HIERARCHY = YES # If the DIRECTORY_GRAPH tag is set to YES then doxygen will show the # dependencies a directory has on other directories in a graphical way. The # dependency relations are determined by the #include relations between the -# files in the directories. +# files in the directories. Explicit enabling a directory graph, when +# DIRECTORY_GRAPH is set to NO, can be accomplished by means of the command +# \directorygraph. Disabling a directory graph can be accomplished by means of +# the command \hidedirectorygraph. # The default value is: YES. # This tag requires that the tag HAVE_DOT is set to YES. DIRECTORY_GRAPH = YES +# The DIR_GRAPH_MAX_DEPTH tag can be used to limit the maximum number of levels +# of child directories generated in directory dependency graphs by dot. +# Minimum value: 1, maximum value: 25, default value: 1. +# This tag requires that the tag DIRECTORY_GRAPH is set to YES. + +DIR_GRAPH_MAX_DEPTH = 1 + # The DOT_IMAGE_FORMAT tag can be used to set the image format of the images # generated by dot. For an explanation of the image formats see the section # output formats in the documentation of the dot tool (Graphviz (see: -# http://www.graphviz.org/)). +# https://www.graphviz.org/)). # Note: If you choose svg you need to set HTML_FILE_EXTENSION to xhtml in order # to make the SVG files visible in IE 9+ (other browsers do not have this # requirement). @@ -2571,11 +2761,12 @@ DOT_PATH = DOTFILE_DIRS = -# The MSCFILE_DIRS tag can be used to specify one or more directories that -# contain msc files that are included in the documentation (see the \mscfile -# command). +# You can include diagrams made with dia in doxygen documentation. Doxygen will +# then run dia to produce the diagram and insert it in the documentation. The +# DIA_PATH tag allows you to specify the directory where the dia binary resides. +# If left empty dia is assumed to be found in the default search path. -MSCFILE_DIRS = +DIA_PATH = # The DIAFILE_DIRS tag can be used to specify one or more directories that # contain dia files that are included in the documentation (see the \diafile @@ -2584,10 +2775,10 @@ MSCFILE_DIRS = DIAFILE_DIRS = # When using plantuml, the PLANTUML_JAR_PATH tag should be used to specify the -# path where java can find the plantuml.jar file. If left blank, it is assumed -# PlantUML is not used or called during a preprocessing step. Doxygen will -# generate a warning when it encounters a \startuml command in this case and -# will not generate output for the diagram. +# path where java can find the plantuml.jar file or to the filename of jar file +# to be used. If left blank, it is assumed PlantUML is not used or called during +# a preprocessing step. Doxygen will generate a warning when it encounters a +# \startuml command in this case and will not generate output for the diagram. PLANTUML_JAR_PATH = @@ -2625,18 +2816,6 @@ DOT_GRAPH_MAX_NODES = 50 MAX_DOT_GRAPH_DEPTH = 0 -# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent -# background. This is disabled by default, because dot on Windows does not seem -# to support this out of the box. -# -# Warning: Depending on the platform used, enabling this option may lead to -# badly anti-aliased labels on the edges of a graph (i.e. they become hard to -# read). -# The default value is: NO. -# This tag requires that the tag HAVE_DOT is set to YES. - -DOT_TRANSPARENT = NO - # Set the DOT_MULTI_TARGETS tag to YES to allow dot to generate multiple output # files in one run (i.e. multiple -o and -T options on the command line). This # makes dot run faster, but since only newer versions of dot (>1.8.10) support @@ -2649,6 +2828,8 @@ DOT_MULTI_TARGETS = NO # If the GENERATE_LEGEND tag is set to YES doxygen will generate a legend page # explaining the meaning of the various boxes and arrows in the dot generated # graphs. +# Note: This tag requires that UML_LOOK isn't set, i.e. the doxygen internal +# graphical representation for inheritance and collaboration diagrams is used. # The default value is: YES. # This tag requires that the tag HAVE_DOT is set to YES. @@ -2657,8 +2838,24 @@ GENERATE_LEGEND = YES # If the DOT_CLEANUP tag is set to YES, doxygen will remove the intermediate # files that are used to generate the various graphs. # -# Note: This setting is not only used for dot files but also for msc and -# plantuml temporary files. +# Note: This setting is not only used for dot files but also for msc temporary +# files. # The default value is: YES. DOT_CLEANUP = YES + +# You can define message sequence charts within doxygen comments using the \msc +# command. If the MSCGEN_TOOL tag is left empty (the default), then doxygen will +# use a built-in version of mscgen tool to produce the charts. Alternatively, +# the MSCGEN_TOOL tag can also specify the name an external tool. For instance, +# specifying prog as the value, doxygen will call the tool as prog -T +# -o . The external tool should support +# output file formats "png", "eps", "svg", and "ismap". + +MSCGEN_TOOL = + +# The MSCFILE_DIRS tag can be used to specify one or more directories that +# contain msc files that are included in the documentation (see the \mscfile +# command). + +MSCFILE_DIRS = diff --git a/doc/html/annotated.html b/doc/html/annotated.html index 1875790..d05b399 100644 --- a/doc/html/annotated.html +++ b/doc/html/annotated.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: Data Structures @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@
@@ -78,20 +78,26 @@
- +
+
+
+
+
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+
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+
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+
+
+
-
-
Data Structures
+
Data Structures
Here are the data structures with brief descriptions:
- +
 Cw25qxx_handle_sW25qxx handle structure definition
 Cw25qxx_info_sW25qxx information structure definition
 Cw25qxx_info_sW25qxx information structure definition
@@ -99,7 +105,7 @@ diff --git a/doc/html/bc_sd.png b/doc/html/bc_sd.png new file mode 100644 index 0000000..31ca888 Binary files /dev/null and b/doc/html/bc_sd.png differ diff --git a/doc/html/classes.html b/doc/html/classes.html index e143019..21766dd 100644 --- a/doc/html/classes.html +++ b/doc/html/classes.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: Data Structure Index @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@
@@ -78,20 +78,26 @@
- +
+
+
+
+
Loading...
+
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+
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+
-
-
Data Structure Index
+
Data Structure Index
W
-
W
+
W
w25qxx_handle_s
w25qxx_info_s
@@ -99,7 +105,7 @@ diff --git a/doc/html/dir_11ec664f88f5f079ad4de1adb8458c37.html b/doc/html/dir_11ec664f88f5f079ad4de1adb8458c37.html index db9458f..18a6609 100644 --- a/doc/html/dir_11ec664f88f5f079ad4de1adb8458c37.html +++ b/doc/html/dir_11ec664f88f5f079ad4de1adb8458c37.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: doc/mainpage Directory Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
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mainpage Directory Reference
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mainpage Directory Reference
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Files

file  mainpage.h [code]
 mainpage.h
 
@@ -100,7 +106,7 @@ diff --git a/doc/html/dir_13e138d54eb8818da29c3992edef070a.html b/doc/html/dir_13e138d54eb8818da29c3992edef070a.html index 011a399..1f5868e 100644 --- a/doc/html/dir_13e138d54eb8818da29c3992edef070a.html +++ b/doc/html/dir_13e138d54eb8818da29c3992edef070a.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: test Directory Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@
@@ -78,29 +78,35 @@
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Loading...
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test Directory Reference
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test Directory Reference
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Files

file  driver_w25qxx_read_test.c [code]
 driver_w25qxx_read_test.c
 driver w25qxx read test source file
 
file  driver_w25qxx_read_test.h [code]
 driver_w25qxx_read_test.h
 driver w25qxx read test header file
 
file  driver_w25qxx_register_test.c [code]
 driver_w25qxx_register_test.c
 driver w25qxx register test source file
 
file  driver_w25qxx_register_test.h [code]
 driver_w25qxx_register_test.h
 driver w25qxx register test header file
 
@@ -110,7 +116,7 @@ diff --git a/doc/html/dir_68267d1309a1af8e8297ef4c3efbcdba.html b/doc/html/dir_68267d1309a1af8e8297ef4c3efbcdba.html index b4f7360..e70f99d 100644 --- a/doc/html/dir_68267d1309a1af8e8297ef4c3efbcdba.html +++ b/doc/html/dir_68267d1309a1af8e8297ef4c3efbcdba.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: src Directory Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@
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src Directory Reference
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src Directory Reference
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+

Files

file  driver_w25qxx.c [code]
 driver_w25qxx.c
 driver w25qxx source file
 
file  driver_w25qxx.h [code]
 driver_w25qxx.h
 driver w25qxx header file
 
@@ -104,7 +110,7 @@ diff --git a/doc/html/dir_b31d54d5631803016a26f28213a41162.html b/doc/html/dir_b31d54d5631803016a26f28213a41162.html index 3d8b222..bfb6f07 100644 --- a/doc/html/dir_b31d54d5631803016a26f28213a41162.html +++ b/doc/html/dir_b31d54d5631803016a26f28213a41162.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: interface Directory Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@
@@ -78,23 +78,29 @@
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Loading...
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interface Directory Reference
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interface Directory Reference
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+

Files

file  driver_w25qxx_interface.h [code]
 driver_w25qxx_interface.h
 driver w25qxx interface header file
 
file  driver_w25qxx_interface_template.c [code]
 driver_w25qxx_interface_template.c
 driver w25qxx interface template source file
 
@@ -104,7 +110,7 @@ diff --git a/doc/html/dir_cfafba98a580ce4b62f8a6fa96d7cbb0.html b/doc/html/dir_cfafba98a580ce4b62f8a6fa96d7cbb0.html index 9569eb1..3b8354f 100644 --- a/doc/html/dir_cfafba98a580ce4b62f8a6fa96d7cbb0.html +++ b/doc/html/dir_cfafba98a580ce4b62f8a6fa96d7cbb0.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: example Directory Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@
@@ -78,29 +78,35 @@
- +
+
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Loading...
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Searching...
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example Directory Reference
+
example Directory Reference
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+

Files

file  driver_w25qxx_advance.c [code]
 driver_w25qxx_advance.c
 driver w25qxx advance source file
 
file  driver_w25qxx_advance.h [code]
 driver_w25qxx_advance.h
 driver w25qxx advance header file
 
file  driver_w25qxx_basic.c [code]
 driver_w25qxx_basic.c
 driver w25qxx basic source file
 
file  driver_w25qxx_basic.h [code]
 driver_w25qxx_basic.h
 driver w25qxx basic header file
 
@@ -110,7 +116,7 @@ diff --git a/doc/html/dir_e68e8157741866f444e17edd764ebbae.html b/doc/html/dir_e68e8157741866f444e17edd764ebbae.html index f00b4f2..23cb193 100644 --- a/doc/html/dir_e68e8157741866f444e17edd764ebbae.html +++ b/doc/html/dir_e68e8157741866f444e17edd764ebbae.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: doc Directory Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@
@@ -78,20 +78,26 @@
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+
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Loading...
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Searching...
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doc Directory Reference
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doc Directory Reference
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+

Directories

directory  mainpage
 mainpage
 
@@ -100,7 +106,7 @@ diff --git a/doc/html/doc.svg b/doc/html/doc.svg new file mode 100644 index 0000000..0b928a5 --- /dev/null +++ b/doc/html/doc.svg @@ -0,0 +1,12 @@ + + + + + + + + + + + diff --git a/doc/html/docd.svg b/doc/html/docd.svg new file mode 100644 index 0000000..ac18b27 --- /dev/null +++ b/doc/html/docd.svg @@ -0,0 +1,12 @@ + + + + + + + + + + + diff --git a/doc/html/doxygen.css b/doc/html/doxygen.css index ffbff02..009a9b5 100644 --- a/doc/html/doxygen.css +++ b/doc/html/doxygen.css @@ -1,29 +1,378 @@ -/* The standard CSS for doxygen 1.9.1 */ - -body, table, div, p, dl { - font: 400 14px/22px Roboto,sans-serif; +/* The standard CSS for doxygen 1.9.8*/ + +html { +/* page base colors */ +--page-background-color: white; +--page-foreground-color: black; +--page-link-color: #3D578C; +--page-visited-link-color: #4665A2; + +/* index */ +--index-odd-item-bg-color: #F8F9FC; +--index-even-item-bg-color: white; +--index-header-color: black; +--index-separator-color: #A0A0A0; + +/* header */ +--header-background-color: #F9FAFC; +--header-separator-color: #C4CFE5; +--header-gradient-image: url('nav_h.png'); +--group-header-separator-color: #879ECB; +--group-header-color: #354C7B; +--inherit-header-color: gray; + +--footer-foreground-color: #2A3D61; +--footer-logo-width: 104px; +--citation-label-color: #334975; +--glow-color: cyan; + +--title-background-color: white; +--title-separator-color: #5373B4; +--directory-separator-color: #9CAFD4; +--separator-color: #4A6AAA; + +--blockquote-background-color: #F7F8FB; +--blockquote-border-color: #9CAFD4; + +--scrollbar-thumb-color: #9CAFD4; +--scrollbar-background-color: #F9FAFC; + +--icon-background-color: #728DC1; +--icon-foreground-color: white; +--icon-doc-image: url('doc.svg'); +--icon-folder-open-image: url('folderopen.svg'); +--icon-folder-closed-image: url('folderclosed.svg'); + +/* brief member declaration list */ +--memdecl-background-color: #F9FAFC; +--memdecl-separator-color: #DEE4F0; +--memdecl-foreground-color: #555; +--memdecl-template-color: #4665A2; + +/* detailed member list */ +--memdef-border-color: #A8B8D9; +--memdef-title-background-color: #E2E8F2; +--memdef-title-gradient-image: url('nav_f.png'); +--memdef-proto-background-color: #DFE5F1; +--memdef-proto-text-color: #253555; +--memdef-proto-text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); +--memdef-doc-background-color: white; +--memdef-param-name-color: #602020; +--memdef-template-color: #4665A2; + +/* tables */ +--table-cell-border-color: #2D4068; +--table-header-background-color: #374F7F; +--table-header-foreground-color: #FFFFFF; + +/* labels */ +--label-background-color: #728DC1; +--label-left-top-border-color: #5373B4; +--label-right-bottom-border-color: #C4CFE5; +--label-foreground-color: white; + +/** navigation bar/tree/menu */ +--nav-background-color: #F9FAFC; +--nav-foreground-color: #364D7C; +--nav-gradient-image: url('tab_b.png'); +--nav-gradient-hover-image: url('tab_h.png'); +--nav-gradient-active-image: url('tab_a.png'); +--nav-gradient-active-image-parent: url("../tab_a.png"); +--nav-separator-image: url('tab_s.png'); +--nav-breadcrumb-image: url('bc_s.png'); +--nav-breadcrumb-border-color: #C2CDE4; +--nav-splitbar-image: url('splitbar.png'); +--nav-font-size-level1: 13px; +--nav-font-size-level2: 10px; +--nav-font-size-level3: 9px; +--nav-text-normal-color: #283A5D; +--nav-text-hover-color: white; +--nav-text-active-color: white; +--nav-text-normal-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); +--nav-text-hover-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0); +--nav-text-active-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0); +--nav-menu-button-color: #364D7C; +--nav-menu-background-color: white; +--nav-menu-foreground-color: #555555; +--nav-menu-toggle-color: rgba(255, 255, 255, 0.5); +--nav-arrow-color: #9CAFD4; +--nav-arrow-selected-color: #9CAFD4; + +/* table of contents */ +--toc-background-color: #F4F6FA; +--toc-border-color: #D8DFEE; +--toc-header-color: #4665A2; +--toc-down-arrow-image: url("data:image/svg+xml;utf8,&%238595;"); + +/** search field */ +--search-background-color: white; +--search-foreground-color: #909090; +--search-magnification-image: url('mag.svg'); +--search-magnification-select-image: url('mag_sel.svg'); +--search-active-color: black; +--search-filter-background-color: #F9FAFC; +--search-filter-foreground-color: black; +--search-filter-border-color: #90A5CE; +--search-filter-highlight-text-color: white; +--search-filter-highlight-bg-color: #3D578C; +--search-results-foreground-color: #425E97; +--search-results-background-color: #EEF1F7; +--search-results-border-color: black; +--search-box-shadow: inset 0.5px 0.5px 3px 0px #555; + +/** code fragments */ +--code-keyword-color: #008000; +--code-type-keyword-color: #604020; +--code-flow-keyword-color: #E08000; +--code-comment-color: #800000; +--code-preprocessor-color: #806020; +--code-string-literal-color: #002080; +--code-char-literal-color: #008080; +--code-xml-cdata-color: black; +--code-vhdl-digit-color: #FF00FF; +--code-vhdl-char-color: #000000; +--code-vhdl-keyword-color: #700070; +--code-vhdl-logic-color: #FF0000; +--code-link-color: #4665A2; +--code-external-link-color: #4665A2; +--fragment-foreground-color: black; +--fragment-background-color: #FBFCFD; +--fragment-border-color: #C4CFE5; +--fragment-lineno-border-color: #00FF00; +--fragment-lineno-background-color: #E8E8E8; +--fragment-lineno-foreground-color: black; +--fragment-lineno-link-fg-color: #4665A2; +--fragment-lineno-link-bg-color: #D8D8D8; +--fragment-lineno-link-hover-fg-color: #4665A2; +--fragment-lineno-link-hover-bg-color: #C8C8C8; +--tooltip-foreground-color: black; +--tooltip-background-color: white; +--tooltip-border-color: gray; +--tooltip-doc-color: grey; +--tooltip-declaration-color: #006318; +--tooltip-link-color: #4665A2; +--tooltip-shadow: 1px 1px 7px gray; +--fold-line-color: #808080; +--fold-minus-image: url('minus.svg'); +--fold-plus-image: url('plus.svg'); +--fold-minus-image-relpath: url('../../minus.svg'); +--fold-plus-image-relpath: url('../../plus.svg'); + +/** font-family */ +--font-family-normal: Roboto,sans-serif; +--font-family-monospace: 'JetBrains Mono',Consolas,Monaco,'Andale Mono','Ubuntu Mono',monospace,fixed; +--font-family-nav: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif; +--font-family-title: Tahoma,Arial,sans-serif; +--font-family-toc: Verdana,'DejaVu Sans',Geneva,sans-serif; +--font-family-search: Arial,Verdana,sans-serif; +--font-family-icon: Arial,Helvetica; +--font-family-tooltip: Roboto,sans-serif; + +} + +@media (prefers-color-scheme: dark) { + html:not(.dark-mode) { + color-scheme: dark; + +/* page base colors */ +--page-background-color: black; +--page-foreground-color: #C9D1D9; +--page-link-color: #90A5CE; +--page-visited-link-color: #A3B4D7; + +/* index */ +--index-odd-item-bg-color: #0B101A; +--index-even-item-bg-color: black; +--index-header-color: #C4CFE5; +--index-separator-color: #334975; + +/* header */ +--header-background-color: #070B11; +--header-separator-color: #141C2E; +--header-gradient-image: url('nav_hd.png'); +--group-header-separator-color: #283A5D; +--group-header-color: #90A5CE; +--inherit-header-color: #A0A0A0; + +--footer-foreground-color: #5B7AB7; +--footer-logo-width: 60px; +--citation-label-color: #90A5CE; +--glow-color: cyan; + +--title-background-color: #090D16; +--title-separator-color: #354C79; +--directory-separator-color: #283A5D; +--separator-color: #283A5D; + +--blockquote-background-color: #101826; +--blockquote-border-color: #283A5D; + +--scrollbar-thumb-color: #283A5D; +--scrollbar-background-color: #070B11; + +--icon-background-color: #334975; +--icon-foreground-color: #C4CFE5; +--icon-doc-image: url('docd.svg'); +--icon-folder-open-image: url('folderopend.svg'); +--icon-folder-closed-image: url('folderclosedd.svg'); + +/* brief member declaration list */ +--memdecl-background-color: #0B101A; +--memdecl-separator-color: #2C3F65; +--memdecl-foreground-color: #BBB; +--memdecl-template-color: #7C95C6; + +/* detailed member list */ +--memdef-border-color: #233250; +--memdef-title-background-color: #1B2840; +--memdef-title-gradient-image: url('nav_fd.png'); +--memdef-proto-background-color: #19243A; +--memdef-proto-text-color: #9DB0D4; +--memdef-proto-text-shadow: 0px 1px 1px rgba(0, 0, 0, 0.9); +--memdef-doc-background-color: black; +--memdef-param-name-color: #D28757; +--memdef-template-color: #7C95C6; + +/* tables */ +--table-cell-border-color: #283A5D; +--table-header-background-color: #283A5D; +--table-header-foreground-color: #C4CFE5; + +/* labels */ +--label-background-color: #354C7B; +--label-left-top-border-color: #4665A2; +--label-right-bottom-border-color: #283A5D; +--label-foreground-color: #CCCCCC; + +/** navigation bar/tree/menu */ +--nav-background-color: #101826; +--nav-foreground-color: #364D7C; +--nav-gradient-image: url('tab_bd.png'); +--nav-gradient-hover-image: url('tab_hd.png'); +--nav-gradient-active-image: url('tab_ad.png'); +--nav-gradient-active-image-parent: url("../tab_ad.png"); +--nav-separator-image: url('tab_sd.png'); +--nav-breadcrumb-image: url('bc_sd.png'); +--nav-breadcrumb-border-color: #2A3D61; +--nav-splitbar-image: url('splitbard.png'); +--nav-font-size-level1: 13px; +--nav-font-size-level2: 10px; +--nav-font-size-level3: 9px; +--nav-text-normal-color: #B6C4DF; +--nav-text-hover-color: #DCE2EF; +--nav-text-active-color: #DCE2EF; +--nav-text-normal-shadow: 0px 1px 1px black; +--nav-text-hover-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0); +--nav-text-active-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0); +--nav-menu-button-color: #B6C4DF; +--nav-menu-background-color: #05070C; +--nav-menu-foreground-color: #BBBBBB; +--nav-menu-toggle-color: rgba(255, 255, 255, 0.2); +--nav-arrow-color: #334975; +--nav-arrow-selected-color: #90A5CE; + +/* table of contents */ +--toc-background-color: #151E30; +--toc-border-color: #202E4A; +--toc-header-color: #A3B4D7; +--toc-down-arrow-image: url("data:image/svg+xml;utf8,&%238595;"); + +/** search field */ +--search-background-color: black; +--search-foreground-color: #C5C5C5; +--search-magnification-image: url('mag_d.svg'); +--search-magnification-select-image: url('mag_seld.svg'); +--search-active-color: #C5C5C5; +--search-filter-background-color: #101826; +--search-filter-foreground-color: #90A5CE; +--search-filter-border-color: #7C95C6; +--search-filter-highlight-text-color: #BCC9E2; +--search-filter-highlight-bg-color: #283A5D; +--search-results-background-color: #101826; +--search-results-foreground-color: #90A5CE; +--search-results-border-color: #7C95C6; +--search-box-shadow: inset 0.5px 0.5px 3px 0px #2F436C; + +/** code fragments */ +--code-keyword-color: #CC99CD; +--code-type-keyword-color: #AB99CD; +--code-flow-keyword-color: #E08000; +--code-comment-color: #717790; +--code-preprocessor-color: #65CABE; +--code-string-literal-color: #7EC699; +--code-char-literal-color: #00E0F0; +--code-xml-cdata-color: #C9D1D9; +--code-vhdl-digit-color: #FF00FF; +--code-vhdl-char-color: #C0C0C0; +--code-vhdl-keyword-color: #CF53C9; +--code-vhdl-logic-color: #FF0000; +--code-link-color: #79C0FF; +--code-external-link-color: #79C0FF; +--fragment-foreground-color: #C9D1D9; +--fragment-background-color: black; +--fragment-border-color: #30363D; +--fragment-lineno-border-color: #30363D; +--fragment-lineno-background-color: black; +--fragment-lineno-foreground-color: #6E7681; +--fragment-lineno-link-fg-color: #6E7681; +--fragment-lineno-link-bg-color: #303030; +--fragment-lineno-link-hover-fg-color: #8E96A1; +--fragment-lineno-link-hover-bg-color: #505050; +--tooltip-foreground-color: #C9D1D9; +--tooltip-background-color: #202020; +--tooltip-border-color: #C9D1D9; +--tooltip-doc-color: #D9E1E9; +--tooltip-declaration-color: #20C348; +--tooltip-link-color: #79C0FF; +--tooltip-shadow: none; +--fold-line-color: #808080; +--fold-minus-image: url('minusd.svg'); +--fold-plus-image: url('plusd.svg'); +--fold-minus-image-relpath: url('../../minusd.svg'); +--fold-plus-image-relpath: url('../../plusd.svg'); + +/** font-family */ +--font-family-normal: Roboto,sans-serif; +--font-family-monospace: 'JetBrains Mono',Consolas,Monaco,'Andale Mono','Ubuntu Mono',monospace,fixed; +--font-family-nav: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif; +--font-family-title: Tahoma,Arial,sans-serif; +--font-family-toc: Verdana,'DejaVu Sans',Geneva,sans-serif; +--font-family-search: Arial,Verdana,sans-serif; +--font-family-icon: Arial,Helvetica; +--font-family-tooltip: Roboto,sans-serif; + +}} +body { + background-color: var(--page-background-color); + color: var(--page-foreground-color); } -p.reference, p.definition { - font: 400 14px/22px Roboto,sans-serif; +body, table, div, p, dl { + font-weight: 400; + font-size: 14px; + font-family: var(--font-family-normal); + line-height: 22px; } /* @group Heading Levels */ -h1.groupheader { - font-size: 150%; -} - .title { - font: 400 14px/28px Roboto,sans-serif; + font-weight: 400; + font-size: 14px; + font-family: var(--font-family-normal); + line-height: 28px; font-size: 150%; font-weight: bold; margin: 10px 2px; } +h1.groupheader { + font-size: 150%; +} + h2.groupheader { - border-bottom: 1px solid #879ECB; - color: #354C7B; + border-bottom: 1px solid var(--group-header-separator-color); + color: var(--group-header-color); font-size: 150%; font-weight: normal; margin-top: 1.75em; @@ -46,22 +395,13 @@ h1, h2, h3, h4, h5, h6 { } h1.glow, h2.glow, h3.glow, h4.glow, h5.glow, h6.glow { - text-shadow: 0 0 15px cyan; + text-shadow: 0 0 15px var(--glow-color); } dt { font-weight: bold; } -ul.multicol { - -moz-column-gap: 1em; - -webkit-column-gap: 1em; - column-gap: 1em; - -moz-column-count: 3; - -webkit-column-count: 3; - column-count: 3; -} - p.startli, p.startdd { margin-top: 2px; } @@ -113,7 +453,6 @@ h3.version { } div.navtab { - border-right: 1px solid #A3B4D7; padding-right: 15px; text-align: right; line-height: 110%; @@ -127,16 +466,17 @@ td.navtab { padding-right: 6px; padding-left: 6px; } + td.navtabHL { - background-image: url('tab_a.png'); + background-image: var(--nav-gradient-active-image); background-repeat:repeat-x; padding-right: 6px; padding-left: 6px; } td.navtabHL a, td.navtabHL a:visited { - color: #fff; - text-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0); + color: var(--nav-text-hover-color); + text-shadow: var(--nav-text-hover-shadow); } a.navtab { @@ -148,7 +488,13 @@ div.qindex{ width: 100%; line-height: 140%; font-size: 130%; - color: #A0A0A0; + color: var(--index-separator-color); +} + +#main-menu a:focus { + outline: auto; + z-index: 10; + position: relative; } dt.alphachar{ @@ -157,7 +503,7 @@ dt.alphachar{ } .alphachar a{ - color: black; + color: var(--index-header-color); } .alphachar a:hover, .alphachar a:visited{ @@ -176,8 +522,12 @@ dt.alphachar{ line-height: 1.15em; } +.classindex dl.even { + background-color: var(--index-even-item-bg-color); +} + .classindex dl.odd { - background-color: #F8F9FC; + background-color: var(--index-odd-item-bg-color); } @media(min-width: 1120px) { @@ -196,23 +546,19 @@ dt.alphachar{ /* @group Link Styling */ a { - color: #3D578C; + color: var(--page-link-color); font-weight: normal; text-decoration: none; } .contents a:visited { - color: #4665A2; + color: var(--page-visited-link-color); } a:hover { text-decoration: underline; } -.contents a.qindexHL:visited { - color: #FFFFFF; -} - a.el { font-weight: bold; } @@ -221,12 +567,39 @@ a.elRef { } a.code, a.code:visited, a.line, a.line:visited { - color: #4665A2; + color: var(--code-link-color); } a.codeRef, a.codeRef:visited, a.lineRef, a.lineRef:visited { - color: #4665A2; -} + color: var(--code-external-link-color); +} + +a.code.hl_class { /* style for links to class names in code snippets */ } +a.code.hl_struct { /* style for links to struct names in code snippets */ } +a.code.hl_union { /* style for links to union names in code snippets */ } +a.code.hl_interface { /* style for links to interface names in code snippets */ } +a.code.hl_protocol { /* style for links to protocol names in code snippets */ } +a.code.hl_category { /* style for links to category names in code snippets */ } +a.code.hl_exception { /* style for links to exception names in code snippets */ } +a.code.hl_service { /* style for links to service names in code snippets */ } +a.code.hl_singleton { /* style for links to singleton names in code snippets */ } +a.code.hl_concept { /* style for links to concept names in code snippets */ } +a.code.hl_namespace { /* style for links to namespace names in code snippets */ } +a.code.hl_package { /* style for links to package names in code snippets */ } +a.code.hl_define { /* style for links to macro names in code snippets */ } +a.code.hl_function { /* style for links to function names in code snippets */ } +a.code.hl_variable { /* style for links to variable names in code snippets */ } +a.code.hl_typedef { /* style for links to typedef names in code snippets */ } +a.code.hl_enumvalue { /* style for links to enum value names in code snippets */ } +a.code.hl_enumeration { /* style for links to enumeration names in code snippets */ } +a.code.hl_signal { /* style for links to Qt signal names in code snippets */ } +a.code.hl_slot { /* style for links to Qt slot names in code snippets */ } +a.code.hl_friend { /* style for links to friend names in code snippets */ } +a.code.hl_dcop { /* style for links to KDE3 DCOP names in code snippets */ } +a.code.hl_property { /* style for links to property names in code snippets */ } +a.code.hl_event { /* style for links to event names in code snippets */ } +a.code.hl_sequence { /* style for links to sequence names in code snippets */ } +a.code.hl_dictionary { /* style for links to dictionary names in code snippets */ } /* @end */ @@ -235,7 +608,17 @@ dl.el { } ul { - overflow: hidden; /*Fixed: list item bullets overlap floating elements*/ + overflow: visible; +} + +ul.multicol { + -moz-column-gap: 1em; + -webkit-column-gap: 1em; + column-gap: 1em; + -moz-column-count: 3; + -webkit-column-count: 3; + column-count: 3; + list-style-type: none; } #side-nav ul { @@ -254,30 +637,32 @@ ul { } pre.fragment { - border: 1px solid #C4CFE5; - background-color: #FBFCFD; + border: 1px solid var(--fragment-border-color); + background-color: var(--fragment-background-color); + color: var(--fragment-foreground-color); padding: 4px 6px; margin: 4px 8px 4px 2px; overflow: auto; word-wrap: break-word; font-size: 9pt; line-height: 125%; - font-family: monospace, fixed; + font-family: var(--font-family-monospace); font-size: 105%; } div.fragment { - padding: 0 0 1px 0; /*Fixed: last line underline overlap border*/ - margin: 4px 8px 4px 2px; - background-color: #FBFCFD; - border: 1px solid #C4CFE5; + padding: 0 0 1px 0; /*Fixed: last line underline overlap border*/ + margin: 4px 8px 4px 2px; + color: var(--fragment-foreground-color); + background-color: var(--fragment-background-color); + border: 1px solid var(--fragment-border-color); } div.line { - font-family: monospace, fixed; + font-family: var(--font-family-monospace); font-size: 13px; min-height: 13px; - line-height: 1.0; + line-height: 1.2; text-wrap: unrestricted; white-space: -moz-pre-wrap; /* Moz */ white-space: -pre-wrap; /* Opera 4-6 */ @@ -306,24 +691,40 @@ div.line:after { } div.line.glow { - background-color: cyan; - box-shadow: 0 0 10px cyan; + background-color: var(--glow-color); + box-shadow: 0 0 10px var(--glow-color); } +span.fold { + margin-left: 5px; + margin-right: 1px; + margin-top: 0px; + margin-bottom: 0px; + padding: 0px; + display: inline-block; + width: 12px; + height: 12px; + background-repeat:no-repeat; + background-position:center; +} span.lineno { padding-right: 4px; + margin-right: 9px; text-align: right; - border-right: 2px solid #0F0; - background-color: #E8E8E8; + border-right: 2px solid var(--fragment-lineno-border-color); + color: var(--fragment-lineno-foreground-color); + background-color: var(--fragment-lineno-background-color); white-space: pre; } -span.lineno a { - background-color: #D8D8D8; +span.lineno a, span.lineno a:visited { + color: var(--fragment-lineno-link-fg-color); + background-color: var(--fragment-lineno-link-bg-color); } span.lineno a:hover { - background-color: #C8C8C8; + color: var(--fragment-lineno-link-hover-fg-color); + background-color: var(--fragment-lineno-link-hover-bg-color); } .lineno { @@ -335,24 +736,6 @@ span.lineno a:hover { user-select: none; } -div.ah, span.ah { - background-color: black; - font-weight: bold; - color: #FFFFFF; - margin-bottom: 3px; - margin-top: 3px; - padding: 0.2em; - border: solid thin #333; - border-radius: 0.5em; - -webkit-border-radius: .5em; - -moz-border-radius: .5em; - box-shadow: 2px 2px 3px #999; - -webkit-box-shadow: 2px 2px 3px #999; - -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; - background-image: -webkit-gradient(linear, left top, left bottom, from(#eee), to(#000),color-stop(0.3, #444)); - background-image: -moz-linear-gradient(center top, #eee 0%, #444 40%, #000 110%); -} - div.classindex ul { list-style: none; padding-left: 0; @@ -374,8 +757,7 @@ div.groupText { } body { - background-color: white; - color: black; + color: var(--page-foreground-color); margin: 0; } @@ -385,29 +767,15 @@ div.contents { margin-right: 8px; } -td.indexkey { - background-color: #EBEFF6; - font-weight: bold; - border: 1px solid #C4CFE5; - margin: 2px 0px 2px 0; - padding: 2px 10px; - white-space: nowrap; - vertical-align: top; -} - -td.indexvalue { - background-color: #EBEFF6; - border: 1px solid #C4CFE5; - padding: 2px 10px; - margin: 2px 0px; +p.formulaDsp { + text-align: center; } -tr.memlist { - background-color: #EEF1F7; +img.dark-mode-visible { + display: none; } - -p.formulaDsp { - text-align: center; +img.light-mode-visible { + display: none; } img.formulaDsp { @@ -437,89 +805,74 @@ address.footer { img.footer { border: 0px; vertical-align: middle; + width: var(--footer-logo-width); +} + +.compoundTemplParams { + color: var(--memdecl-template-color); + font-size: 80%; + line-height: 120%; } /* @group Code Colorization */ span.keyword { - color: #008000 + color: var(--code-keyword-color); } span.keywordtype { - color: #604020 + color: var(--code-type-keyword-color); } span.keywordflow { - color: #e08000 + color: var(--code-flow-keyword-color); } span.comment { - color: #800000 + color: var(--code-comment-color); } span.preprocessor { - color: #806020 + color: var(--code-preprocessor-color); } span.stringliteral { - color: #002080 + color: var(--code-string-literal-color); } span.charliteral { - color: #008080 + color: var(--code-char-literal-color); +} + +span.xmlcdata { + color: var(--code-xml-cdata-color); } span.vhdldigit { - color: #ff00ff + color: var(--code-vhdl-digit-color); } span.vhdlchar { - color: #000000 + color: var(--code-vhdl-char-color); } span.vhdlkeyword { - color: #700070 + color: var(--code-vhdl-keyword-color); } span.vhdllogic { - color: #ff0000 + color: var(--code-vhdl-logic-color); } blockquote { - background-color: #F7F8FB; - border-left: 2px solid #9CAFD4; + background-color: var(--blockquote-background-color); + border-left: 2px solid var(--blockquote-border-color); margin: 0 24px 0 4px; padding: 0 12px 0 16px; } -blockquote.DocNodeRTL { - border-left: 0; - border-right: 2px solid #9CAFD4; - margin: 0 4px 0 24px; - padding: 0 16px 0 12px; -} - /* @end */ -/* -.search { - color: #003399; - font-weight: bold; -} - -form.search { - margin-bottom: 0px; - margin-top: 0px; -} - -input.search { - font-size: 75%; - color: #000080; - font-weight: normal; - background-color: #e8eef2; -} -*/ - td.tiny { font-size: 75%; } @@ -527,18 +880,19 @@ td.tiny { .dirtab { padding: 4px; border-collapse: collapse; - border: 1px solid #A3B4D7; + border: 1px solid var(--table-cell-border-color); } th.dirtab { - background: #EBEFF6; + background-color: var(--table-header-background-color); + color: var(--table-header-foreground-color); font-weight: bold; } hr { height: 0px; border: none; - border-top: 1px solid #4A6AAA; + border-top: 1px solid var(--separator-color); } hr.footer { @@ -566,14 +920,14 @@ table.memberdecls { } .memberdecls td.glow, .fieldtable tr.glow { - background-color: cyan; - box-shadow: 0 0 15px cyan; + background-color: var(--glow-color); + box-shadow: 0 0 15px var(--glow-color); } .mdescLeft, .mdescRight, .memItemLeft, .memItemRight, .memTemplItemLeft, .memTemplItemRight, .memTemplParams { - background-color: #F9FAFC; + background-color: var(--memdecl-background-color); border: none; margin: 4px; padding: 1px 0 0 8px; @@ -581,11 +935,11 @@ table.memberdecls { .mdescLeft, .mdescRight { padding: 0px 8px 4px 8px; - color: #555; + color: var(--memdecl-foreground-color); } .memSeparator { - border-bottom: 1px solid #DEE4F0; + border-bottom: 1px solid var(--memdecl-separator-color); line-height: 1px; margin: 0px; padding: 0px; @@ -600,7 +954,7 @@ table.memberdecls { } .memTemplParams { - color: #4665A2; + color: var(--memdecl-template-color); white-space: nowrap; font-size: 80%; } @@ -613,15 +967,15 @@ table.memberdecls { .memtitle { padding: 8px; - border-top: 1px solid #A8B8D9; - border-left: 1px solid #A8B8D9; - border-right: 1px solid #A8B8D9; + border-top: 1px solid var(--memdef-border-color); + border-left: 1px solid var(--memdef-border-color); + border-right: 1px solid var(--memdef-border-color); border-top-right-radius: 4px; border-top-left-radius: 4px; margin-bottom: -1px; - background-image: url('nav_f.png'); + background-image: var(--memdef-title-gradient-image); background-repeat: repeat-x; - background-color: #E2E8F2; + background-color: var(--memdef-title-background-color); line-height: 1.25; font-weight: 300; float:left; @@ -636,20 +990,11 @@ table.memberdecls { .memtemplate { font-size: 80%; - color: #4665A2; + color: var(--memdef-template-color); font-weight: normal; margin-left: 9px; } -.memnav { - background-color: #EBEFF6; - border: 1px solid #A3B4D7; - text-align: center; - margin: 2px; - margin-right: 15px; - padding: 2px; -} - .mempage { width: 100%; } @@ -668,7 +1013,7 @@ table.memberdecls { } .memitem.glow { - box-shadow: 0 0 15px cyan; + box-shadow: 0 0 15px var(--glow-color); } .memname { @@ -681,41 +1026,32 @@ table.memberdecls { } .memproto, dl.reflist dt { - border-top: 1px solid #A8B8D9; - border-left: 1px solid #A8B8D9; - border-right: 1px solid #A8B8D9; + border-top: 1px solid var(--memdef-border-color); + border-left: 1px solid var(--memdef-border-color); + border-right: 1px solid var(--memdef-border-color); padding: 6px 0px 6px 0px; - color: #253555; + color: var(--memdef-proto-text-color); font-weight: bold; - text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); - background-color: #DFE5F1; - /* opera specific markup */ + text-shadow: var(--memdef-proto-text-shadow); + background-color: var(--memdef-proto-background-color); box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); border-top-right-radius: 4px; - /* firefox specific markup */ - -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; - -moz-border-radius-topright: 4px; - /* webkit specific markup */ - -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); - -webkit-border-top-right-radius: 4px; - } .overload { - font-family: "courier new",courier,monospace; + font-family: var(--font-family-monospace); font-size: 65%; } .memdoc, dl.reflist dd { - border-bottom: 1px solid #A8B8D9; - border-left: 1px solid #A8B8D9; - border-right: 1px solid #A8B8D9; + border-bottom: 1px solid var(--memdef-border-color); + border-left: 1px solid var(--memdef-border-color); + border-right: 1px solid var(--memdef-border-color); padding: 6px 10px 2px 10px; - background-color: #FBFCFD; border-top-width: 0; background-image:url('nav_g.png'); background-repeat:repeat-x; - background-color: #FFFFFF; + background-color: var(--memdef-doc-background-color); /* opera specific markup */ border-bottom-left-radius: 4px; border-bottom-right-radius: 4px; @@ -748,7 +1084,7 @@ dl.reflist dd { } .paramname { - color: #602020; + color: var(--memdef-param-name-color); white-space: nowrap; } .paramname em { @@ -761,20 +1097,20 @@ dl.reflist dd { .params, .retval, .exception, .tparams { margin-left: 0px; padding-left: 0px; -} +} .params .paramname, .retval .paramname, .tparams .paramname, .exception .paramname { font-weight: bold; vertical-align: top; } - + .params .paramtype, .tparams .paramtype { font-style: italic; vertical-align: top; -} - +} + .params .paramdir, .tparams .paramdir { - font-family: "courier new",courier,monospace; + font-family: var(--font-family-monospace); vertical-align: top; } @@ -798,13 +1134,13 @@ span.mlabels { } span.mlabel { - background-color: #728DC1; - border-top:1px solid #5373B4; - border-left:1px solid #5373B4; - border-right:1px solid #C4CFE5; - border-bottom:1px solid #C4CFE5; + background-color: var(--label-background-color); + border-top:1px solid var(--label-left-top-border-color); + border-left:1px solid var(--label-left-top-border-color); + border-right:1px solid var(--label-right-bottom-border-color); + border-bottom:1px solid var(--label-right-bottom-border-color); text-shadow: none; - color: white; + color: var(--label-foreground-color); margin-right: 4px; padding: 2px 3px; border-radius: 3px; @@ -821,8 +1157,8 @@ span.mlabel { div.directory { margin: 10px 0px; - border-top: 1px solid #9CAFD4; - border-bottom: 1px solid #9CAFD4; + border-top: 1px solid var(--directory-separator-color); + border-bottom: 1px solid var(--directory-separator-color); width: 100%; } @@ -858,9 +1194,14 @@ div.directory { border-left: 1px solid rgba(0,0,0,0.05); } +.directory tr.odd { + padding-left: 6px; + background-color: var(--index-odd-item-bg-color); +} + .directory tr.even { padding-left: 6px; - background-color: #F7F8FB; + background-color: var(--index-even-item-bg-color); } .directory img { @@ -878,11 +1219,11 @@ div.directory { cursor: pointer; padding-left: 2px; padding-right: 2px; - color: #3D578C; + color: var(--page-link-color); } .arrow { - color: #9CAFD4; + color: var(--nav-arrow-color); -webkit-user-select: none; -khtml-user-select: none; -moz-user-select: none; @@ -896,14 +1237,15 @@ div.directory { } .icon { - font-family: Arial, Helvetica; + font-family: var(--font-family-icon); + line-height: normal; font-weight: bold; font-size: 12px; height: 14px; width: 16px; display: inline-block; - background-color: #728DC1; - color: white; + background-color: var(--icon-background-color); + color: var(--icon-foreground-color); text-align: center; border-radius: 4px; margin-left: 2px; @@ -920,8 +1262,7 @@ div.directory { width: 24px; height: 18px; margin-bottom: 4px; - background-image:url('folderopen.png'); - background-position: 0px -4px; + background-image:var(--icon-folder-open-image); background-repeat: repeat-y; vertical-align:top; display: inline-block; @@ -931,8 +1272,7 @@ div.directory { width: 24px; height: 18px; margin-bottom: 4px; - background-image:url('folderclosed.png'); - background-position: 0px -4px; + background-image:var(--icon-folder-closed-image); background-repeat: repeat-y; vertical-align:top; display: inline-block; @@ -942,17 +1282,13 @@ div.directory { width: 24px; height: 18px; margin-bottom: 4px; - background-image:url('doc.png'); + background-image:var(--icon-doc-image); background-position: 0px -4px; background-repeat: repeat-y; vertical-align:top; display: inline-block; } -table.directory { - font: 400 14px Roboto,sans-serif; -} - /* @end */ div.dynheader { @@ -967,7 +1303,7 @@ div.dynheader { address { font-style: normal; - color: #2A3D61; + color: var(--footer-foreground-color); } table.doxtable caption { @@ -981,28 +1317,23 @@ table.doxtable { } table.doxtable td, table.doxtable th { - border: 1px solid #2D4068; + border: 1px solid var(--table-cell-border-color); padding: 3px 7px 2px; } table.doxtable th { - background-color: #374F7F; - color: #FFFFFF; + background-color: var(--table-header-background-color); + color: var(--table-header-foreground-color); font-size: 110%; padding-bottom: 4px; padding-top: 5px; } table.fieldtable { - /*width: 100%;*/ margin-bottom: 10px; - border: 1px solid #A8B8D9; + border: 1px solid var(--memdef-border-color); border-spacing: 0px; - -moz-border-radius: 4px; - -webkit-border-radius: 4px; border-radius: 4px; - -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; - -webkit-box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); } @@ -1012,8 +1343,8 @@ table.fieldtable { .fieldtable td.fieldtype, .fieldtable td.fieldname { white-space: nowrap; - border-right: 1px solid #A8B8D9; - border-bottom: 1px solid #A8B8D9; + border-right: 1px solid var(--memdef-border-color); + border-bottom: 1px solid var(--memdef-border-color); vertical-align: top; } @@ -1022,14 +1353,13 @@ table.fieldtable { } .fieldtable td.fielddoc { - border-bottom: 1px solid #A8B8D9; - /*width: 100%;*/ + border-bottom: 1px solid var(--memdef-border-color); } .fieldtable td.fielddoc p:first-child { margin-top: 0px; -} - +} + .fieldtable td.fielddoc p:last-child { margin-bottom: 2px; } @@ -1039,22 +1369,18 @@ table.fieldtable { } .fieldtable th { - background-image:url('nav_f.png'); + background-image: var(--memdef-title-gradient-image); background-repeat:repeat-x; - background-color: #E2E8F2; + background-color: var(--memdef-title-background-color); font-size: 90%; - color: #253555; + color: var(--memdef-proto-text-color); padding-bottom: 4px; padding-top: 5px; text-align:left; font-weight: 400; - -moz-border-radius-topleft: 4px; - -moz-border-radius-topright: 4px; - -webkit-border-top-left-radius: 4px; - -webkit-border-top-right-radius: 4px; border-top-left-radius: 4px; border-top-right-radius: 4px; - border-bottom: 1px solid #A8B8D9; + border-bottom: 1px solid var(--memdef-border-color); } @@ -1062,7 +1388,7 @@ table.fieldtable { top: 0px; left: 10px; height: 36px; - background-image: url('tab_b.png'); + background-image: var(--nav-gradient-image); z-index: 101; overflow: hidden; font-size: 13px; @@ -1071,13 +1397,13 @@ table.fieldtable { .navpath ul { font-size: 11px; - background-image:url('tab_b.png'); + background-image: var(--nav-gradient-image); background-repeat:repeat-x; background-position: 0 -5px; height:30px; line-height:30px; - color:#8AA0CC; - border:solid 1px #C2CDE4; + color:var(--nav-text-normal-color); + border:solid 1px var(--nav-breadcrumb-border-color); overflow:hidden; margin:0px; padding:0px; @@ -1089,10 +1415,10 @@ table.fieldtable { float:left; padding-left:10px; padding-right:15px; - background-image:url('bc_s.png'); + background-image:var(--nav-breadcrumb-image); background-repeat:no-repeat; background-position:right; - color:#364D7C; + color: var(--nav-foreground-color); } .navpath li.navelem a @@ -1101,15 +1427,16 @@ table.fieldtable { display:block; text-decoration: none; outline: none; - color: #283A5D; - font-family: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif; - text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); - text-decoration: none; + color: var(--nav-text-normal-color); + font-family: var(--font-family-nav); + text-shadow: var(--nav-text-normal-shadow); + text-decoration: none; } .navpath li.navelem a:hover { - color:#6884BD; + color: var(--nav-text-hover-color); + text-shadow: var(--nav-text-hover-shadow); } .navpath li.footer @@ -1121,7 +1448,7 @@ table.fieldtable { background-image:none; background-repeat:no-repeat; background-position:right; - color:#364D7C; + color: var(--footer-foreground-color); font-size: 8pt; } @@ -1133,7 +1460,7 @@ div.summary padding-right: 5px; width: 50%; text-align: right; -} +} div.summary a { @@ -1148,7 +1475,7 @@ table.classindex margin-right: 3%; width: 94%; border: 0; - border-spacing: 0; + border-spacing: 0; padding: 0; } @@ -1166,11 +1493,11 @@ div.ingroups a div.header { - background-image:url('nav_h.png'); + background-image: var(--header-gradient-image); background-repeat:repeat-x; - background-color: #F9FAFC; + background-color: var(--header-background-color); margin: 0px; - border-bottom: 1px solid #C4CFE5; + border-bottom: 1px solid var(--header-separator-color); } div.headertitle @@ -1193,11 +1520,6 @@ dl.section { padding-left: 0px; } -dl.section.DocNodeRTL { - margin-right: 0px; - padding-right: 0px; -} - dl.note { margin-left: -7px; padding-left: 3px; @@ -1205,16 +1527,6 @@ dl.note { border-color: #D0C000; } -dl.note.DocNodeRTL { - margin-left: 0; - padding-left: 0; - border-left: 0; - margin-right: -7px; - padding-right: 3px; - border-right: 4px solid; - border-color: #D0C000; -} - dl.warning, dl.attention { margin-left: -7px; padding-left: 3px; @@ -1222,16 +1534,6 @@ dl.warning, dl.attention { border-color: #FF0000; } -dl.warning.DocNodeRTL, dl.attention.DocNodeRTL { - margin-left: 0; - padding-left: 0; - border-left: 0; - margin-right: -7px; - padding-right: 3px; - border-right: 4px solid; - border-color: #FF0000; -} - dl.pre, dl.post, dl.invariant { margin-left: -7px; padding-left: 3px; @@ -1239,16 +1541,6 @@ dl.pre, dl.post, dl.invariant { border-color: #00D000; } -dl.pre.DocNodeRTL, dl.post.DocNodeRTL, dl.invariant.DocNodeRTL { - margin-left: 0; - padding-left: 0; - border-left: 0; - margin-right: -7px; - padding-right: 3px; - border-right: 4px solid; - border-color: #00D000; -} - dl.deprecated { margin-left: -7px; padding-left: 3px; @@ -1256,16 +1548,6 @@ dl.deprecated { border-color: #505050; } -dl.deprecated.DocNodeRTL { - margin-left: 0; - padding-left: 0; - border-left: 0; - margin-right: -7px; - padding-right: 3px; - border-right: 4px solid; - border-color: #505050; -} - dl.todo { margin-left: -7px; padding-left: 3px; @@ -1273,16 +1555,6 @@ dl.todo { border-color: #00C0E0; } -dl.todo.DocNodeRTL { - margin-left: 0; - padding-left: 0; - border-left: 0; - margin-right: -7px; - padding-right: 3px; - border-right: 4px solid; - border-color: #00C0E0; -} - dl.test { margin-left: -7px; padding-left: 3px; @@ -1290,16 +1562,6 @@ dl.test { border-color: #3030E0; } -dl.test.DocNodeRTL { - margin-left: 0; - padding-left: 0; - border-left: 0; - margin-right: -7px; - padding-right: 3px; - border-right: 4px solid; - border-color: #3030E0; -} - dl.bug { margin-left: -7px; padding-left: 3px; @@ -1307,21 +1569,16 @@ dl.bug { border-color: #C08050; } -dl.bug.DocNodeRTL { - margin-left: 0; - padding-left: 0; - border-left: 0; - margin-right: -7px; - padding-right: 3px; - border-right: 4px solid; - border-color: #C08050; -} - dl.section dd { margin-bottom: 6px; } +#projectrow +{ + height: 56px; +} + #projectlogo { text-align: center; @@ -1337,25 +1594,29 @@ dl.section dd { #projectalign { vertical-align: middle; + padding-left: 0.5em; } #projectname { - font: 300% Tahoma, Arial,sans-serif; + font-size: 200%; + font-family: var(--font-family-title); margin: 0px; padding: 2px 0px; } - + #projectbrief { - font: 120% Tahoma, Arial,sans-serif; + font-size: 90%; + font-family: var(--font-family-title); margin: 0px; padding: 0px; } #projectnumber { - font: 50% Tahoma, Arial,sans-serif; + font-size: 50%; + font-family: 50% var(--font-family-title); margin: 0px; padding: 0px; } @@ -1365,7 +1626,8 @@ dl.section dd { padding: 0px; margin: 0px; width: 100%; - border-bottom: 1px solid #5373B4; + border-bottom: 1px solid var(--title-separator-color); + background-color: var(--title-background-color); } .image @@ -1398,17 +1660,12 @@ dl.section dd { font-weight: bold; } -div.zoom -{ - border: 1px solid #90A5CE; -} - dl.citelist { margin-bottom:50px; } dl.citelist dt { - color:#334975; + color:var(--citation-label-color); float:left; font-weight:bold; margin-right:10px; @@ -1424,8 +1681,8 @@ dl.citelist dd { div.toc { padding: 14px 25px; - background-color: #F4F6FA; - border: 1px solid #D8DFEE; + background-color: var(--toc-background-color); + border: 1px solid var(--toc-border-color); border-radius: 7px 7px 7px 7px; float: right; height: auto; @@ -1433,28 +1690,17 @@ div.toc { width: 200px; } -.PageDocRTL-title div.toc { - float: left !important; - text-align: right; -} - div.toc li { - background: url("bdwn.png") no-repeat scroll 0 5px transparent; - font: 10px/1.2 Verdana,DejaVu Sans,Geneva,sans-serif; + background: var(--toc-down-arrow-image) no-repeat scroll 0 5px transparent; + font: 10px/1.2 var(--font-family-toc); margin-top: 5px; padding-left: 10px; padding-top: 2px; } -.PageDocRTL-title div.toc li { - background-position-x: right !important; - padding-left: 0 !important; - padding-right: 10px; -} - div.toc h3 { - font: bold 12px/1.2 Arial,FreeSans,sans-serif; - color: #4665A2; + font: bold 12px/1.2 var(--font-family-toc); + color: var(--toc-header-color); border-bottom: 0 none; margin: 0; } @@ -1463,7 +1709,7 @@ div.toc ul { list-style: none outside none; border: medium none; padding: 0px; -} +} div.toc li.level1 { margin-left: 0px; @@ -1474,11 +1720,11 @@ div.toc li.level2 { } div.toc li.level3 { - margin-left: 30px; + margin-left: 15px; } div.toc li.level4 { - margin-left: 45px; + margin-left: 15px; } span.emoji { @@ -1487,29 +1733,13 @@ span.emoji { */ } -.PageDocRTL-title div.toc li.level1 { - margin-left: 0 !important; - margin-right: 0; -} - -.PageDocRTL-title div.toc li.level2 { - margin-left: 0 !important; - margin-right: 15px; -} - -.PageDocRTL-title div.toc li.level3 { - margin-left: 0 !important; - margin-right: 30px; -} - -.PageDocRTL-title div.toc li.level4 { - margin-left: 0 !important; - margin-right: 45px; +span.obfuscator { + display: none; } .inherit_header { font-weight: bold; - color: gray; + color: var(--inherit-header-color); cursor: pointer; -webkit-touch-callout: none; -webkit-user-select: none; @@ -1541,11 +1771,12 @@ tr.heading h2 { #powerTip { cursor: default; - white-space: nowrap; - background-color: white; - border: 1px solid gray; + /*white-space: nowrap;*/ + color: var(--tooltip-foreground-color); + background-color: var(--tooltip-background-color); + border: 1px solid var(--tooltip-border-color); border-radius: 4px 4px 4px 4px; - box-shadow: 1px 1px 7px gray; + box-shadow: var(--tooltip-shadow); display: none; font-size: smaller; max-width: 80%; @@ -1556,7 +1787,7 @@ tr.heading h2 { } #powerTip div.ttdoc { - color: grey; + color: var(--tooltip-doc-color); font-style: italic; } @@ -1564,18 +1795,24 @@ tr.heading h2 { font-weight: bold; } +#powerTip a { + color: var(--tooltip-link-color); +} + #powerTip div.ttname { font-weight: bold; } #powerTip div.ttdeci { - color: #006318; + color: var(--tooltip-declaration-color); } #powerTip div { margin: 0px; padding: 0px; - font: 12px/16px Roboto,sans-serif; + font-size: 12px; + font-family: var(--font-family-tooltip); + line-height: 16px; } #powerTip:before, #powerTip:after { @@ -1620,12 +1857,12 @@ tr.heading h2 { } #powerTip.n:after, #powerTip.ne:after, #powerTip.nw:after { - border-top-color: #FFFFFF; + border-top-color: var(--tooltip-background-color); border-width: 10px; margin: 0px -10px; } -#powerTip.n:before { - border-top-color: #808080; +#powerTip.n:before, #powerTip.ne:before, #powerTip.nw:before { + border-top-color: var(--tooltip-border-color); border-width: 11px; margin: 0px -11px; } @@ -1648,13 +1885,13 @@ tr.heading h2 { } #powerTip.s:after, #powerTip.se:after, #powerTip.sw:after { - border-bottom-color: #FFFFFF; + border-bottom-color: var(--tooltip-background-color); border-width: 10px; margin: 0px -10px; } #powerTip.s:before, #powerTip.se:before, #powerTip.sw:before { - border-bottom-color: #808080; + border-bottom-color: var(--tooltip-border-color); border-width: 11px; margin: 0px -11px; } @@ -1675,13 +1912,13 @@ tr.heading h2 { left: 100%; } #powerTip.e:after { - border-left-color: #FFFFFF; + border-left-color: var(--tooltip-border-color); border-width: 10px; top: 50%; margin-top: -10px; } #powerTip.e:before { - border-left-color: #808080; + border-left-color: var(--tooltip-border-color); border-width: 11px; top: 50%; margin-top: -11px; @@ -1691,13 +1928,13 @@ tr.heading h2 { right: 100%; } #powerTip.w:after { - border-right-color: #FFFFFF; + border-right-color: var(--tooltip-border-color); border-width: 10px; top: 50%; margin-top: -10px; } #powerTip.w:before { - border-right-color: #808080; + border-right-color: var(--tooltip-border-color); border-width: 11px; top: 50%; margin-top: -11px; @@ -1731,7 +1968,7 @@ table.markdownTable { } table.markdownTable td, table.markdownTable th { - border: 1px solid #2D4068; + border: 1px solid var(--table-cell-border-color); padding: 3px 7px 2px; } @@ -1739,8 +1976,8 @@ table.markdownTable tr { } th.markdownTableHeadLeft, th.markdownTableHeadRight, th.markdownTableHeadCenter, th.markdownTableHeadNone { - background-color: #374F7F; - color: #FFFFFF; + background-color: var(--table-header-background-color); + color: var(--table-header-foreground-color); font-size: 110%; padding-bottom: 4px; padding-top: 5px; @@ -1758,36 +1995,51 @@ th.markdownTableHeadCenter, td.markdownTableBodyCenter { text-align: center } -.DocNodeRTL { - text-align: right; - direction: rtl; +tt, code, kbd, samp +{ + display: inline-block; } +/* @end */ -.DocNodeLTR { - text-align: left; - direction: ltr; +u { + text-decoration: underline; } -table.DocNodeRTL { - width: auto; - margin-right: 0; - margin-left: auto; +details>summary { + list-style-type: none; } -table.DocNodeLTR { - width: auto; - margin-right: auto; - margin-left: 0; +details > summary::-webkit-details-marker { + display: none; } -tt, code, kbd, samp -{ - display: inline-block; - direction:ltr; +details>summary::before { + content: "\25ba"; + padding-right:4px; + font-size: 80%; } -/* @end */ -u { - text-decoration: underline; +details[open]>summary::before { + content: "\25bc"; + padding-right:4px; + font-size: 80%; +} + +body { + scrollbar-color: var(--scrollbar-thumb-color) var(--scrollbar-background-color); +} + +::-webkit-scrollbar { + background-color: var(--scrollbar-background-color); + height: 12px; + width: 12px; +} +::-webkit-scrollbar-thumb { + border-radius: 6px; + box-shadow: inset 0 0 12px 12px var(--scrollbar-thumb-color); + border: solid 2px transparent; +} +::-webkit-scrollbar-corner { + background-color: var(--scrollbar-background-color); } diff --git a/doc/html/doxygen.svg b/doc/html/doxygen.svg index d42dad5..79a7635 100644 --- a/doc/html/doxygen.svg +++ b/doc/html/doxygen.svg @@ -1,4 +1,6 @@ + @@ -17,7 +19,7 @@ - + diff --git a/doc/html/driver__w25qxx_8c.html b/doc/html/driver__w25qxx_8c.html index c8e1abb..1efaba9 100644 --- a/doc/html/driver__w25qxx_8c.html +++ b/doc/html/driver__w25qxx_8c.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: src/driver_w25qxx.c File Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@
@@ -78,17 +78,23 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
Macros | Functions
-
-
driver_w25qxx.c File Reference
+
driver_w25qxx.c File Reference
@@ -98,301 +104,301 @@

Go to the source code of this file.

- - - + + - + - + - + - + - + - + - + - - + + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - +

+

Macros

#define CHIP_NAME   "Winbond W25QXX"
 chip information definition More...
#define CHIP_NAME   "Winbond W25QXX"
 chip information definition
 
#define MANUFACTURER_NAME   "Winbond"
#define MANUFACTURER_NAME   "Winbond"
 
#define SUPPLY_VOLTAGE_MIN   2.7f
#define SUPPLY_VOLTAGE_MIN   2.7f
 
#define SUPPLY_VOLTAGE_MAX   3.6f
#define SUPPLY_VOLTAGE_MAX   3.6f
 
#define MAX_CURRENT   25.0f
#define MAX_CURRENT   25.0f
 
#define TEMPERATURE_MIN   -40.0f
#define TEMPERATURE_MIN   -40.0f
 
#define TEMPERATURE_MAX   85.0f
#define TEMPERATURE_MAX   85.0f
 
#define DRIVER_VERSION   1000
#define DRIVER_VERSION   1000
 
#define W25QXX_COMMAND_WRITE_ENABLE   0x06
 chip command definition More...
#define W25QXX_COMMAND_WRITE_ENABLE   0x06
 chip command definition
 
#define W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE   0x50
#define W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE   0x50
 
#define W25QXX_COMMAND_WRITE_DISABLE   0x04
#define W25QXX_COMMAND_WRITE_DISABLE   0x04
 
#define W25QXX_COMMAND_READ_STATUS_REG1   0x05
#define W25QXX_COMMAND_READ_STATUS_REG1   0x05
 
#define W25QXX_COMMAND_READ_STATUS_REG2   0x35
#define W25QXX_COMMAND_READ_STATUS_REG2   0x35
 
#define W25QXX_COMMAND_READ_STATUS_REG3   0x15
#define W25QXX_COMMAND_READ_STATUS_REG3   0x15
 
#define W25QXX_COMMAND_WRITE_STATUS_REG1   0x01
#define W25QXX_COMMAND_WRITE_STATUS_REG1   0x01
 
#define W25QXX_COMMAND_WRITE_STATUS_REG2   0x31
#define W25QXX_COMMAND_WRITE_STATUS_REG2   0x31
 
#define W25QXX_COMMAND_WRITE_STATUS_REG3   0x11
#define W25QXX_COMMAND_WRITE_STATUS_REG3   0x11
 
#define W25QXX_COMMAND_CHIP_ERASE   0xC7
#define W25QXX_COMMAND_CHIP_ERASE   0xC7
 
#define W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND   0x75
#define W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND   0x75
 
#define W25QXX_COMMAND_ERASE_PROGRAM_RESUME   0x7A
#define W25QXX_COMMAND_ERASE_PROGRAM_RESUME   0x7A
 
#define W25QXX_COMMAND_POWER_DOWN   0xB9
#define W25QXX_COMMAND_POWER_DOWN   0xB9
 
#define W25QXX_COMMAND_RELEASE_POWER_DOWN   0xAB
#define W25QXX_COMMAND_RELEASE_POWER_DOWN   0xAB
 
#define W25QXX_COMMAND_READ_MANUFACTURER   0x90
#define W25QXX_COMMAND_READ_MANUFACTURER   0x90
 
#define W25QXX_COMMAND_JEDEC_ID   0x9F
#define W25QXX_COMMAND_JEDEC_ID   0x9F
 
#define W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK   0x7E
#define W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK   0x7E
 
#define W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK   0x98
#define W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK   0x98
 
#define W25QXX_COMMAND_ENTER_QSPI_MODE   0x38
#define W25QXX_COMMAND_ENTER_QSPI_MODE   0x38
 
#define W25QXX_COMMAND_ENABLE_RESET   0x66
#define W25QXX_COMMAND_ENABLE_RESET   0x66
 
#define W25QXX_COMMAND_RESET_DEVICE   0x99
#define W25QXX_COMMAND_RESET_DEVICE   0x99
 
#define W25QXX_COMMAND_READ_UNIQUE_ID   0x4B
#define W25QXX_COMMAND_READ_UNIQUE_ID   0x4B
 
#define W25QXX_COMMAND_PAGE_PROGRAM   0x02
#define W25QXX_COMMAND_PAGE_PROGRAM   0x02
 
#define W25QXX_COMMAND_QUAD_PAGE_PROGRAM   0x32
#define W25QXX_COMMAND_QUAD_PAGE_PROGRAM   0x32
 
#define W25QXX_COMMAND_SECTOR_ERASE_4K   0x20
#define W25QXX_COMMAND_SECTOR_ERASE_4K   0x20
 
#define W25QXX_COMMAND_BLOCK_ERASE_32K   0x52
#define W25QXX_COMMAND_BLOCK_ERASE_32K   0x52
 
#define W25QXX_COMMAND_BLOCK_ERASE_64K   0xD8
#define W25QXX_COMMAND_BLOCK_ERASE_64K   0xD8
 
#define W25QXX_COMMAND_READ_DATA   0x03
#define W25QXX_COMMAND_READ_DATA   0x03
 
#define W25QXX_COMMAND_FAST_READ   0x0B
#define W25QXX_COMMAND_FAST_READ   0x0B
 
#define W25QXX_COMMAND_FAST_READ_DUAL_OUTPUT   0x3B
#define W25QXX_COMMAND_FAST_READ_DUAL_OUTPUT   0x3B
 
#define W25QXX_COMMAND_FAST_READ_QUAD_OUTPUT   0x6B
#define W25QXX_COMMAND_FAST_READ_QUAD_OUTPUT   0x6B
 
#define W25QXX_COMMAND_READ_SFDP_REGISTER   0x5A
#define W25QXX_COMMAND_READ_SFDP_REGISTER   0x5A
 
#define W25QXX_COMMAND_ERASE_SECURITY_REGISTER   0x44
#define W25QXX_COMMAND_ERASE_SECURITY_REGISTER   0x44
 
#define W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER   0x42
#define W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER   0x42
 
#define W25QXX_COMMAND_READ_SECURITY_REGISTER   0x48
#define W25QXX_COMMAND_READ_SECURITY_REGISTER   0x48
 
#define W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK   0x36
#define W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK   0x36
 
#define W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK   0x39
#define W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK   0x39
 
#define W25QXX_COMMAND_READ_BLOCK_LOCK   0x3D
#define W25QXX_COMMAND_READ_BLOCK_LOCK   0x3D
 
#define W25QXX_COMMAND_FAST_READ_DUAL_IO   0xBB
#define W25QXX_COMMAND_FAST_READ_DUAL_IO   0xBB
 
#define W25QXX_COMMAND_DEVICE_ID_DUAL_IO   0x92
#define W25QXX_COMMAND_DEVICE_ID_DUAL_IO   0x92
 
#define W25QXX_COMMAND_SET_BURST_WITH_WRAP   0x77
#define W25QXX_COMMAND_SET_BURST_WITH_WRAP   0x77
 
#define W25QXX_COMMAND_FAST_READ_QUAD_IO   0xEB
#define W25QXX_COMMAND_FAST_READ_QUAD_IO   0xEB
 
#define W25QXX_COMMAND_WORD_READ_QUAD_IO   0xE7
#define W25QXX_COMMAND_WORD_READ_QUAD_IO   0xE7
 
#define W25QXX_COMMAND_OCTAL_WORD_READ_QUAD_IO   0xE3
#define W25QXX_COMMAND_OCTAL_WORD_READ_QUAD_IO   0xE3
 
#define W25QXX_COMMAND_DEVICE_ID_QUAD_IO   0x94
#define W25QXX_COMMAND_DEVICE_ID_QUAD_IO   0x94
 
- - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + +

+

Functions

uint8_t w25qxx_set_dual_quad_spi (w25qxx_handle_t *handle, w25qxx_bool_t enable)
 enable or disable the dual quad spi More...
uint8_t w25qxx_set_dual_quad_spi (w25qxx_handle_t *handle, w25qxx_bool_t enable)
 enable or disable the dual quad spi
 
uint8_t w25qxx_get_dual_quad_spi (w25qxx_handle_t *handle, w25qxx_bool_t *enable)
 get the dual quad spi status More...
uint8_t w25qxx_get_dual_quad_spi (w25qxx_handle_t *handle, w25qxx_bool_t *enable)
 get the dual quad spi status
 
uint8_t w25qxx_set_type (w25qxx_handle_t *handle, w25qxx_type_t type)
 set the chip type More...
uint8_t w25qxx_set_type (w25qxx_handle_t *handle, w25qxx_type_t type)
 set the chip type
 
uint8_t w25qxx_get_type (w25qxx_handle_t *handle, w25qxx_type_t *type)
 get the chip type More...
uint8_t w25qxx_get_type (w25qxx_handle_t *handle, w25qxx_type_t *type)
 get the chip type
 
uint8_t w25qxx_set_interface (w25qxx_handle_t *handle, w25qxx_interface_t interface)
 set the chip interface More...
uint8_t w25qxx_set_interface (w25qxx_handle_t *handle, w25qxx_interface_t interface)
 set the chip interface
 
uint8_t w25qxx_get_interface (w25qxx_handle_t *handle, w25qxx_interface_t *interface)
 get the chip interface More...
uint8_t w25qxx_get_interface (w25qxx_handle_t *handle, w25qxx_interface_t *interface)
 get the chip interface
 
uint8_t w25qxx_set_address_mode (w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
 set the chip address mode More...
uint8_t w25qxx_set_address_mode (w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
 set the chip address mode
 
uint8_t w25qxx_get_address_mode (w25qxx_handle_t *handle, w25qxx_address_mode_t *mode)
 get the chip address mode More...
uint8_t w25qxx_get_address_mode (w25qxx_handle_t *handle, w25qxx_address_mode_t *mode)
 get the chip address mode
 
uint8_t w25qxx_enable_write (w25qxx_handle_t *handle)
 enable writing More...
uint8_t w25qxx_enable_write (w25qxx_handle_t *handle)
 enable writing
 
uint8_t w25qxx_enable_volatile_sr_write (w25qxx_handle_t *handle)
 enable volatile sr writing More...
uint8_t w25qxx_enable_volatile_sr_write (w25qxx_handle_t *handle)
 enable volatile sr writing
 
uint8_t w25qxx_disable_write (w25qxx_handle_t *handle)
 disable writing More...
uint8_t w25qxx_disable_write (w25qxx_handle_t *handle)
 disable writing
 
uint8_t w25qxx_get_status1 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 1 More...
uint8_t w25qxx_get_status1 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 1
 
uint8_t w25qxx_get_status2 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 2 More...
uint8_t w25qxx_get_status2 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 2
 
uint8_t w25qxx_get_status3 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 3 More...
uint8_t w25qxx_get_status3 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 3
 
uint8_t w25qxx_set_status1 (w25qxx_handle_t *handle, uint8_t status)
 set the status 1 More...
uint8_t w25qxx_set_status1 (w25qxx_handle_t *handle, uint8_t status)
 set the status 1
 
uint8_t w25qxx_set_status2 (w25qxx_handle_t *handle, uint8_t status)
 set the status 2 More...
uint8_t w25qxx_set_status2 (w25qxx_handle_t *handle, uint8_t status)
 set the status 2
 
uint8_t w25qxx_set_status3 (w25qxx_handle_t *handle, uint8_t status)
 set the status 3 More...
uint8_t w25qxx_set_status3 (w25qxx_handle_t *handle, uint8_t status)
 set the status 3
 
uint8_t w25qxx_chip_erase (w25qxx_handle_t *handle)
 erase the chip More...
uint8_t w25qxx_chip_erase (w25qxx_handle_t *handle)
 erase the chip
 
uint8_t w25qxx_erase_program_suspend (w25qxx_handle_t *handle)
 suspend erase or program More...
uint8_t w25qxx_erase_program_suspend (w25qxx_handle_t *handle)
 suspend erase or program
 
uint8_t w25qxx_erase_program_resume (w25qxx_handle_t *handle)
 resume erase or program More...
uint8_t w25qxx_erase_program_resume (w25qxx_handle_t *handle)
 resume erase or program
 
uint8_t w25qxx_power_down (w25qxx_handle_t *handle)
 power down More...
uint8_t w25qxx_power_down (w25qxx_handle_t *handle)
 power down
 
uint8_t w25qxx_release_power_down (w25qxx_handle_t *handle)
 release power down More...
uint8_t w25qxx_release_power_down (w25qxx_handle_t *handle)
 release power down
 
uint8_t w25qxx_get_manufacturer_device_id (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information More...
uint8_t w25qxx_get_manufacturer_device_id (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information
 
uint8_t w25qxx_get_manufacturer_device_id_dual_io (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information with dual io More...
uint8_t w25qxx_get_manufacturer_device_id_dual_io (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information with dual io
 
uint8_t w25qxx_get_manufacturer_device_id_quad_io (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information with quad io More...
uint8_t w25qxx_get_manufacturer_device_id_quad_io (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information with quad io
 
uint8_t w25qxx_get_jedec_id (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
 get the jedec id information More...
uint8_t w25qxx_get_jedec_id (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
 get the jedec id information
 
uint8_t w25qxx_global_block_lock (w25qxx_handle_t *handle)
 lock the whole block More...
uint8_t w25qxx_global_block_lock (w25qxx_handle_t *handle)
 lock the whole block
 
uint8_t w25qxx_global_block_unlock (w25qxx_handle_t *handle)
 unlock the whole block More...
uint8_t w25qxx_global_block_unlock (w25qxx_handle_t *handle)
 unlock the whole block
 
uint8_t w25qxx_set_read_parameters (w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
 set the read parameters More...
uint8_t w25qxx_set_read_parameters (w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
 set the read parameters
 
uint8_t w25qxx_enter_qspi_mode (w25qxx_handle_t *handle)
 enter the qspi mode More...
uint8_t w25qxx_enter_qspi_mode (w25qxx_handle_t *handle)
 enter the qspi mode
 
uint8_t w25qxx_exit_qspi_mode (w25qxx_handle_t *handle)
 exit the qspi mode More...
uint8_t w25qxx_exit_qspi_mode (w25qxx_handle_t *handle)
 exit the qspi mode
 
uint8_t w25qxx_enable_reset (w25qxx_handle_t *handle)
 enable the reset More...
uint8_t w25qxx_enable_reset (w25qxx_handle_t *handle)
 enable the reset
 
uint8_t w25qxx_reset_device (w25qxx_handle_t *handle)
 reset the device More...
uint8_t w25qxx_reset_device (w25qxx_handle_t *handle)
 reset the device
 
uint8_t w25qxx_get_unique_id (w25qxx_handle_t *handle, uint8_t id[8])
 get the unique id More...
uint8_t w25qxx_get_unique_id (w25qxx_handle_t *handle, uint8_t id[8])
 get the unique id
 
uint8_t w25qxx_get_sfdp (w25qxx_handle_t *handle, uint8_t sfdp[256])
 get the sfdp More...
uint8_t w25qxx_get_sfdp (w25qxx_handle_t *handle, uint8_t sfdp[256])
 get the sfdp
 
uint8_t w25qxx_erase_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num)
 erase the security register More...
uint8_t w25qxx_erase_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num)
 erase the security register
 
uint8_t w25qxx_program_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
 program the security register More...
uint8_t w25qxx_program_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
 program the security register
 
uint8_t w25qxx_read_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
 read the security register More...
uint8_t w25qxx_read_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
 read the security register
 
uint8_t w25qxx_only_spi_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read only in the spi interface More...
uint8_t w25qxx_only_spi_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read only in the spi interface
 
uint8_t w25qxx_fast_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read in the fast mode More...
uint8_t w25qxx_fast_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read in the fast mode
 
uint8_t w25qxx_fast_read_dual_output (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with dual output in the fast mode More...
uint8_t w25qxx_fast_read_dual_output (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with dual output in the fast mode
 
uint8_t w25qxx_fast_read_quad_output (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with quad output in the fast mode More...
uint8_t w25qxx_fast_read_quad_output (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with quad output in the fast mode
 
uint8_t w25qxx_fast_read_dual_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with dual io in the fast mode More...
uint8_t w25qxx_fast_read_dual_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with dual io in the fast mode
 
uint8_t w25qxx_fast_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with quad io in the fast mode More...
uint8_t w25qxx_fast_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with quad io in the fast mode
 
uint8_t w25qxx_word_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 word read with quad io More...
uint8_t w25qxx_word_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 word read with quad io
 
uint8_t w25qxx_octal_word_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 octal word read with quad io More...
uint8_t w25qxx_octal_word_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 octal word read with quad io
 
uint8_t w25qxx_page_program (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
 page program More...
uint8_t w25qxx_page_program (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
 page program
 
uint8_t w25qxx_page_program_quad_input (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
 quad page program with quad input More...
uint8_t w25qxx_page_program_quad_input (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
 quad page program with quad input
 
uint8_t w25qxx_sector_erase_4k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 4k sector More...
uint8_t w25qxx_sector_erase_4k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 4k sector
 
uint8_t w25qxx_block_erase_32k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 32k block More...
uint8_t w25qxx_block_erase_32k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 32k block
 
uint8_t w25qxx_block_erase_64k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 64k block More...
uint8_t w25qxx_block_erase_64k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 64k block
 
uint8_t w25qxx_individual_block_lock (w25qxx_handle_t *handle, uint32_t addr)
 lock the individual block More...
uint8_t w25qxx_individual_block_lock (w25qxx_handle_t *handle, uint32_t addr)
 lock the individual block
 
uint8_t w25qxx_individual_block_unlock (w25qxx_handle_t *handle, uint32_t addr)
 unlock the individual block More...
uint8_t w25qxx_individual_block_unlock (w25qxx_handle_t *handle, uint32_t addr)
 unlock the individual block
 
uint8_t w25qxx_read_block_lock (w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
 read the block lock More...
uint8_t w25qxx_read_block_lock (w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
 read the block lock
 
uint8_t w25qxx_set_burst_with_wrap (w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
 set the burst with wrap More...
uint8_t w25qxx_set_burst_with_wrap (w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
 set the burst with wrap
 
uint8_t w25qxx_init (w25qxx_handle_t *handle)
 initialize the chip More...
uint8_t w25qxx_init (w25qxx_handle_t *handle)
 initialize the chip
 
uint8_t w25qxx_deinit (w25qxx_handle_t *handle)
 close the chip More...
uint8_t w25qxx_deinit (w25qxx_handle_t *handle)
 close the chip
 
uint8_t w25qxx_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read data More...
uint8_t w25qxx_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read data
 
uint8_t w25qxx_write (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 write data More...
uint8_t w25qxx_write (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 write data
 
uint8_t w25qxx_write_read_reg (w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
 write and read register More...
uint8_t w25qxx_write_read_reg (w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
 write and read register
 
uint8_t w25qxx_info (w25qxx_info_t *info)
 get chip's information More...
uint8_t w25qxx_info (w25qxx_info_t *info)
 get chip's information
 

Detailed Description

@@ -415,8 +421,8 @@

history

Definition in file driver_w25qxx.c.

Macro Definition Documentation

- -

◆ CHIP_NAME

+ +

◆ CHIP_NAME

@@ -434,8 +440,8 @@

-

◆ DRIVER_VERSION

+ +

◆ DRIVER_VERSION

@@ -451,8 +457,8 @@

-

◆ MANUFACTURER_NAME

+ +

◆ MANUFACTURER_NAME

@@ -468,8 +474,8 @@

-

◆ MAX_CURRENT

+ +

◆ MAX_CURRENT

@@ -485,8 +491,8 @@

-

◆ SUPPLY_VOLTAGE_MAX

+ +

◆ SUPPLY_VOLTAGE_MAX

@@ -502,8 +508,8 @@

-

◆ SUPPLY_VOLTAGE_MIN

+ +

◆ SUPPLY_VOLTAGE_MIN

@@ -519,8 +525,8 @@

-

◆ TEMPERATURE_MAX

+ +

◆ TEMPERATURE_MAX

@@ -536,8 +542,8 @@

-

◆ TEMPERATURE_MIN

+ +

◆ TEMPERATURE_MIN

@@ -553,8 +559,8 @@

-

◆ W25QXX_COMMAND_BLOCK_ERASE_32K

+ +

◆ W25QXX_COMMAND_BLOCK_ERASE_32K

@@ -570,8 +576,8 @@

-

◆ W25QXX_COMMAND_BLOCK_ERASE_64K

+ +

◆ W25QXX_COMMAND_BLOCK_ERASE_64K

@@ -587,8 +593,8 @@

-

◆ W25QXX_COMMAND_CHIP_ERASE

+ +

◆ W25QXX_COMMAND_CHIP_ERASE

@@ -604,8 +610,8 @@

-

◆ W25QXX_COMMAND_DEVICE_ID_DUAL_IO

+ +

◆ W25QXX_COMMAND_DEVICE_ID_DUAL_IO

@@ -621,8 +627,8 @@

-

◆ W25QXX_COMMAND_DEVICE_ID_QUAD_IO

+ +

◆ W25QXX_COMMAND_DEVICE_ID_QUAD_IO

@@ -638,8 +644,8 @@

-

◆ W25QXX_COMMAND_ENABLE_RESET

+ +

◆ W25QXX_COMMAND_ENABLE_RESET

@@ -655,8 +661,8 @@

-

◆ W25QXX_COMMAND_ENTER_QSPI_MODE

+ +

◆ W25QXX_COMMAND_ENTER_QSPI_MODE

@@ -672,8 +678,8 @@

-

◆ W25QXX_COMMAND_ERASE_PROGRAM_RESUME

+ +

◆ W25QXX_COMMAND_ERASE_PROGRAM_RESUME

@@ -689,8 +695,8 @@

-

◆ W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND

+ +

◆ W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND

@@ -706,8 +712,8 @@

-

◆ W25QXX_COMMAND_ERASE_SECURITY_REGISTER

+ +

◆ W25QXX_COMMAND_ERASE_SECURITY_REGISTER

@@ -723,8 +729,8 @@

-

◆ W25QXX_COMMAND_FAST_READ

+ +

◆ W25QXX_COMMAND_FAST_READ

@@ -740,8 +746,8 @@

-

◆ W25QXX_COMMAND_FAST_READ_DUAL_IO

+ +

◆ W25QXX_COMMAND_FAST_READ_DUAL_IO

@@ -757,8 +763,8 @@

-

◆ W25QXX_COMMAND_FAST_READ_DUAL_OUTPUT

+ +

◆ W25QXX_COMMAND_FAST_READ_DUAL_OUTPUT

@@ -774,8 +780,8 @@

-

◆ W25QXX_COMMAND_FAST_READ_QUAD_IO

+ +

◆ W25QXX_COMMAND_FAST_READ_QUAD_IO

@@ -791,8 +797,8 @@

-

◆ W25QXX_COMMAND_FAST_READ_QUAD_OUTPUT

+ +

◆ W25QXX_COMMAND_FAST_READ_QUAD_OUTPUT

@@ -808,8 +814,8 @@

-

◆ W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK

+ +

◆ W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK

@@ -825,8 +831,8 @@

-

◆ W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK

+ +

◆ W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK

@@ -842,8 +848,8 @@

-

◆ W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK

+ +

◆ W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK

@@ -859,8 +865,8 @@

-

◆ W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK

+ +

◆ W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK

@@ -876,8 +882,8 @@

-

◆ W25QXX_COMMAND_JEDEC_ID

+ +

◆ W25QXX_COMMAND_JEDEC_ID

@@ -893,8 +899,8 @@

-

◆ W25QXX_COMMAND_OCTAL_WORD_READ_QUAD_IO

+ +

◆ W25QXX_COMMAND_OCTAL_WORD_READ_QUAD_IO

@@ -910,8 +916,8 @@

-

◆ W25QXX_COMMAND_PAGE_PROGRAM

+ +

◆ W25QXX_COMMAND_PAGE_PROGRAM

@@ -927,8 +933,8 @@

-

◆ W25QXX_COMMAND_POWER_DOWN

+ +

◆ W25QXX_COMMAND_POWER_DOWN

@@ -944,8 +950,8 @@

-

◆ W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER

+ +

◆ W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER

@@ -961,8 +967,8 @@

-

◆ W25QXX_COMMAND_QUAD_PAGE_PROGRAM

+ +

◆ W25QXX_COMMAND_QUAD_PAGE_PROGRAM

@@ -978,8 +984,8 @@

-

◆ W25QXX_COMMAND_READ_BLOCK_LOCK

+ +

◆ W25QXX_COMMAND_READ_BLOCK_LOCK

@@ -995,8 +1001,8 @@

-

◆ W25QXX_COMMAND_READ_DATA

+ +

◆ W25QXX_COMMAND_READ_DATA

@@ -1012,8 +1018,8 @@

-

◆ W25QXX_COMMAND_READ_MANUFACTURER

+ +

◆ W25QXX_COMMAND_READ_MANUFACTURER

@@ -1029,8 +1035,8 @@

-

◆ W25QXX_COMMAND_READ_SECURITY_REGISTER

+ +

◆ W25QXX_COMMAND_READ_SECURITY_REGISTER

@@ -1046,8 +1052,8 @@

-

◆ W25QXX_COMMAND_READ_SFDP_REGISTER

+ +

◆ W25QXX_COMMAND_READ_SFDP_REGISTER

@@ -1063,8 +1069,8 @@

-

◆ W25QXX_COMMAND_READ_STATUS_REG1

+ +

◆ W25QXX_COMMAND_READ_STATUS_REG1

@@ -1080,8 +1086,8 @@

-

◆ W25QXX_COMMAND_READ_STATUS_REG2

+ +

◆ W25QXX_COMMAND_READ_STATUS_REG2

@@ -1097,8 +1103,8 @@

-

◆ W25QXX_COMMAND_READ_STATUS_REG3

+ +

◆ W25QXX_COMMAND_READ_STATUS_REG3

@@ -1114,8 +1120,8 @@

-

◆ W25QXX_COMMAND_READ_UNIQUE_ID

+ +

◆ W25QXX_COMMAND_READ_UNIQUE_ID

@@ -1131,8 +1137,8 @@

-

◆ W25QXX_COMMAND_RELEASE_POWER_DOWN

+ +

◆ W25QXX_COMMAND_RELEASE_POWER_DOWN

@@ -1148,8 +1154,8 @@

-

◆ W25QXX_COMMAND_RESET_DEVICE

+ +

◆ W25QXX_COMMAND_RESET_DEVICE

@@ -1165,8 +1171,8 @@

-

◆ W25QXX_COMMAND_SECTOR_ERASE_4K

+ +

◆ W25QXX_COMMAND_SECTOR_ERASE_4K

@@ -1182,8 +1188,8 @@

-

◆ W25QXX_COMMAND_SET_BURST_WITH_WRAP

+ +

◆ W25QXX_COMMAND_SET_BURST_WITH_WRAP

@@ -1199,8 +1205,8 @@

-

◆ W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE

+ +

◆ W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE

@@ -1216,8 +1222,8 @@

-

◆ W25QXX_COMMAND_WORD_READ_QUAD_IO

+ +

◆ W25QXX_COMMAND_WORD_READ_QUAD_IO

@@ -1233,8 +1239,8 @@

-

◆ W25QXX_COMMAND_WRITE_DISABLE

+ +

◆ W25QXX_COMMAND_WRITE_DISABLE

@@ -1250,8 +1256,8 @@

-

◆ W25QXX_COMMAND_WRITE_ENABLE

+ +

◆ W25QXX_COMMAND_WRITE_ENABLE

@@ -1269,8 +1275,8 @@

-

◆ W25QXX_COMMAND_WRITE_STATUS_REG1

+ +

◆ W25QXX_COMMAND_WRITE_STATUS_REG1

@@ -1286,8 +1292,8 @@

-

◆ W25QXX_COMMAND_WRITE_STATUS_REG2

+ +

◆ W25QXX_COMMAND_WRITE_STATUS_REG2

@@ -1303,8 +1309,8 @@

-

◆ W25QXX_COMMAND_WRITE_STATUS_REG3

+ +

◆ W25QXX_COMMAND_WRITE_STATUS_REG3

@@ -1326,7 +1332,7 @@

diff --git a/doc/html/driver__w25qxx_8c_source.html b/doc/html/driver__w25qxx_8c_source.html index d367725..cb79739 100644 --- a/doc/html/driver__w25qxx_8c_source.html +++ b/doc/html/driver__w25qxx_8c_source.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: src/driver_w25qxx.c Source File @@ -23,11 +23,10 @@
- + - @@ -36,22 +35,28 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ + +
@@ -78,7859 +83,7987 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
-
-
driver_w25qxx.c
+
driver_w25qxx.c
-Go to the documentation of this file.
1 
-
37 #include "driver_w25qxx.h"
-
38 
-
42 #define CHIP_NAME "Winbond W25QXX"
-
43 #define MANUFACTURER_NAME "Winbond"
-
44 #define SUPPLY_VOLTAGE_MIN 2.7f
-
45 #define SUPPLY_VOLTAGE_MAX 3.6f
-
46 #define MAX_CURRENT 25.0f
-
47 #define TEMPERATURE_MIN -40.0f
-
48 #define TEMPERATURE_MAX 85.0f
-
49 #define DRIVER_VERSION 1000
-
54 #define W25QXX_COMMAND_WRITE_ENABLE 0x06
-
55 #define W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE 0x50
-
56 #define W25QXX_COMMAND_WRITE_DISABLE 0x04
-
57 #define W25QXX_COMMAND_READ_STATUS_REG1 0x05
-
58 #define W25QXX_COMMAND_READ_STATUS_REG2 0x35
-
59 #define W25QXX_COMMAND_READ_STATUS_REG3 0x15
-
60 #define W25QXX_COMMAND_WRITE_STATUS_REG1 0x01
-
61 #define W25QXX_COMMAND_WRITE_STATUS_REG2 0x31
-
62 #define W25QXX_COMMAND_WRITE_STATUS_REG3 0x11
-
63 #define W25QXX_COMMAND_CHIP_ERASE 0xC7
-
64 #define W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND 0x75
-
65 #define W25QXX_COMMAND_ERASE_PROGRAM_RESUME 0x7A
-
66 #define W25QXX_COMMAND_POWER_DOWN 0xB9
-
67 #define W25QXX_COMMAND_RELEASE_POWER_DOWN 0xAB
-
68 #define W25QXX_COMMAND_READ_MANUFACTURER 0x90
-
69 #define W25QXX_COMMAND_JEDEC_ID 0x9F
-
70 #define W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK 0x7E
-
71 #define W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK 0x98
-
72 #define W25QXX_COMMAND_ENTER_QSPI_MODE 0x38
-
73 #define W25QXX_COMMAND_ENABLE_RESET 0x66
-
74 #define W25QXX_COMMAND_RESET_DEVICE 0x99
-
75 #define W25QXX_COMMAND_READ_UNIQUE_ID 0x4B
-
76 #define W25QXX_COMMAND_PAGE_PROGRAM 0x02
-
77 #define W25QXX_COMMAND_QUAD_PAGE_PROGRAM 0x32
-
78 #define W25QXX_COMMAND_SECTOR_ERASE_4K 0x20
-
79 #define W25QXX_COMMAND_BLOCK_ERASE_32K 0x52
-
80 #define W25QXX_COMMAND_BLOCK_ERASE_64K 0xD8
-
81 #define W25QXX_COMMAND_READ_DATA 0x03
-
82 #define W25QXX_COMMAND_FAST_READ 0x0B
-
83 #define W25QXX_COMMAND_FAST_READ_DUAL_OUTPUT 0x3B
-
84 #define W25QXX_COMMAND_FAST_READ_QUAD_OUTPUT 0x6B
-
85 #define W25QXX_COMMAND_READ_SFDP_REGISTER 0x5A
-
86 #define W25QXX_COMMAND_ERASE_SECURITY_REGISTER 0x44
-
87 #define W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER 0x42
-
88 #define W25QXX_COMMAND_READ_SECURITY_REGISTER 0x48
-
89 #define W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK 0x36
-
90 #define W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK 0x39
-
91 #define W25QXX_COMMAND_READ_BLOCK_LOCK 0x3D
-
92 #define W25QXX_COMMAND_FAST_READ_DUAL_IO 0xBB
-
93 #define W25QXX_COMMAND_DEVICE_ID_DUAL_IO 0x92
-
94 #define W25QXX_COMMAND_SET_BURST_WITH_WRAP 0x77
-
95 #define W25QXX_COMMAND_FAST_READ_QUAD_IO 0xEB
-
96 #define W25QXX_COMMAND_WORD_READ_QUAD_IO 0xE7
-
97 #define W25QXX_COMMAND_OCTAL_WORD_READ_QUAD_IO 0xE3
-
98 #define W25QXX_COMMAND_DEVICE_ID_QUAD_IO 0x94
-
112 static uint8_t a_w25qxx_spi_write_read(w25qxx_handle_t *handle, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len)
-
113 {
-
114  if (handle->spi_qspi_write_read(0x00, 0x00, 0x00000000, 0x00, 0x00, /* write read data */
-
115  0x00000000, 0x00, 0x00,
-
116  0x00, in_buf, in_len, out_buf, out_len, 1) != 0)
-
117  {
-
118  return 1; /* return error */
-
119  }
-
120  else
-
121  {
-
122  return 0; /* success return 0 */
-
123  }
-
124 }
-
125 
-
148 static uint8_t a_w25qxx_qspi_write_read(w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line,
-
149  uint32_t address, uint8_t address_line, uint8_t address_len,
-
150  uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len,
-
151  uint8_t dummy, uint8_t *in_buf, uint32_t in_len,
-
152  uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
-
153 {
-
154  if (handle->spi_qspi_write_read(instruction, instruction_line, address, address_line, address_len, /* write read data */
-
155  alternate, alternate_line, alternate_len,
-
156  dummy, in_buf, in_len, out_buf, out_len, data_line) != 0)
-
157  {
-
158  return 1; /* return error */
-
159  }
-
160  else
-
161  {
-
162  return 0; /* success return 0 */
-
163  }
-
164 }
-
165 
-
175 uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable)
-
176 {
-
177  if (handle == NULL) /* check handle */
-
178  {
-
179  return 2; /* return error */
-
180  }
-
181 
-
182  handle->dual_quad_spi_enable = (uint8_t)enable; /* set enable */
-
183 
-
184  return 0; /* success return 0 */
-
185 }
-
186 
-
196 uint8_t w25qxx_get_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t *enable)
-
197 {
-
198  if (handle == NULL) /* check handle */
-
199  {
-
200  return 2; /* return error */
-
201  }
-
202 
-
203  *enable = (w25qxx_bool_t)(handle->dual_quad_spi_enable); /* get enable */
-
204 
-
205  return 0; /* success return 0 */
-
206 }
-
207 
-
217 uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type)
-
218 {
-
219  if (handle == NULL) /* check handle */
-
220  {
-
221  return 2; /* return error */
-
222  }
-
223 
-
224  handle->type = (uint16_t)type; /* set type */
-
225 
-
226  return 0; /* success return 0 */
-
227 }
-
228 
-
238 uint8_t w25qxx_get_type(w25qxx_handle_t *handle, w25qxx_type_t *type)
-
239 {
-
240  if (handle == NULL) /* check handle */
-
241  {
-
242  return 2; /* return error */
-
243  }
-
244 
-
245  *type = (w25qxx_type_t)(handle->type); /* get type */
-
246 
-
247  return 0; /* success return 0 */
-
248 }
-
249 
-
259 uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface)
-
260 {
-
261  if (handle == NULL) /* check handle */
-
262  {
-
263  return 2; /* return error */
-
264  }
-
265 
-
266  handle->spi_qspi = (uint8_t)interface; /* set interface */
-
267 
-
268  return 0; /* success return 0 */
-
269 }
-
270 
-
280 uint8_t w25qxx_get_interface(w25qxx_handle_t *handle, w25qxx_interface_t *interface)
-
281 {
-
282  if (handle == NULL) /* check handle */
-
283  {
-
284  return 2; /* return error */
-
285  }
-
286 
-
287  *interface = (w25qxx_interface_t)(handle->spi_qspi); /* get interface */
-
288 
-
289  return 0; /* success return 0 */
-
290 }
-
291 
-
304 uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
-
305 {
-
306  uint8_t res;
-
307  uint8_t buf[1];
-
308 
-
309  if (handle == NULL) /* check handle */
-
310  {
-
311  return 2; /* return error */
-
312  }
-
313  if (handle->inited != 1) /* check handle initialization */
-
314  {
-
315  return 3; /* return error */
-
316  }
-
317  if (handle->type < W25Q256) /* check type */
-
318  {
-
319  handle->debug_print("w25qxx: current type can't use this function.\n"); /* current type can't use this function */
-
320 
-
321  return 4; /* return error */
-
322  }
-
323 
-
324  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
325  {
-
326  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
327  {
-
328  if (mode == W25QXX_ADDRESS_MODE_3_BYTE) /* address 3 mode byte */
-
329  {
-
330  buf[0] = 0xE9; /* 3 byte mode */
-
331  }
-
332  else /* address 4 mode byte */
-
333  {
-
334  buf[0] = 0xB7; /* 4 byte mode */
-
335  }
-
336  res = a_w25qxx_qspi_write_read(handle, buf[0], 1,
-
337  0x00000000, 0x00, 0x00,
-
338  0x00000000, 0x00, 0x00,
-
339  0x00, NULL, 0x00,
-
340  NULL, 0x00, 0x00); /* qspi write read */
-
341  if (res != 0) /* check result */
-
342  {
-
343  handle->debug_print("w25qxx: set address mode failed.\n"); /* set address mode failed */
-
344 
-
345  return 1; /* return error */
-
346  }
-
347  }
-
348  else /* single spi */
-
349  {
-
350  if (mode == W25QXX_ADDRESS_MODE_3_BYTE) /* address 3 mode byte */
-
351  {
-
352  buf[0] = 0xE9; /* 3 byte mode */
-
353  }
-
354  else /* address 4 mode byte */
-
355  {
-
356  buf[0] = 0xB7; /* 4 byte mode */
-
357  }
-
358  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
359  if (res != 0) /* check result */
-
360  {
-
361  handle->debug_print("w25qxx: set address mode failed.\n"); /* set address mode failed */
-
362 
-
363  return 1; /* return error */
-
364  }
-
365  }
-
366  }
-
367  else /* qspi interface */
-
368  {
-
369  if (mode == W25QXX_ADDRESS_MODE_3_BYTE) /* address 3 mode byte */
-
370  {
-
371  buf[0] = 0xE9; /* 3 byte mode */
-
372  }
-
373  else /* address 4 mode byte */
-
374  {
-
375  buf[0] = 0xB7; /* 4 byte mode */
-
376  }
-
377  res = a_w25qxx_qspi_write_read(handle, buf[0], 4,
-
378  0x00000000, 0x00, 0x00,
-
379  0x00000000, 0x00, 0x00,
-
380  0x00, NULL, 0x00,
-
381  NULL, 0x00, 0x00); /* qspi write read */
-
382  if (res != 0) /* check result */
-
383  {
-
384  handle->debug_print("w25qxx: set address mode failed.\n"); /* set address mode failed */
-
385 
-
386  return 1; /* return error */
-
387  }
-
388  }
-
389 
-
390  handle->address_mode = (uint8_t)mode; /* set address mode */
-
391 
-
392  return 0; /* success return 0 */
-
393 }
-
394 
-
405 uint8_t w25qxx_get_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t *mode)
-
406 {
-
407  if (handle == NULL) /* check handle */
-
408  {
-
409  return 2; /* return error */
-
410  }
-
411  if (handle->inited != 1) /* check handle initialization */
-
412  {
-
413  return 3; /* return error */
-
414  }
-
415 
-
416  *mode = (w25qxx_address_mode_t)(handle->address_mode); /* get address mode */
-
417 
-
418  return 0; /* success return 0 */
-
419 }
-
420 
-
431 uint8_t w25qxx_enable_write(w25qxx_handle_t *handle)
-
432 {
-
433  uint8_t res;
-
434  uint8_t buf[1];
-
435 
-
436  if (handle == NULL) /* check handle */
-
437  {
-
438  return 2; /* return error */
-
439  }
-
440  if (handle->inited != 1) /* check handle initialization */
-
441  {
-
442  return 3; /* return error */
-
443  }
-
444 
-
445  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
446  {
-
447  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
448  {
-
449  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
450  0x00000000, 0x00, 0x00,
-
451  0x00000000, 0x00, 0x00,
-
452  0x00, NULL, 0x00,
-
453  NULL, 0x00, 0x00); /* qspi write read */
-
454  if (res != 0) /* check result */
-
455  {
-
456  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
457 
-
458  return 1; /* return error */
-
459  }
-
460  }
-
461  else /* single spi */
-
462  {
-
463  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
464  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
465  if (res != 0) /* check result */
-
466  {
-
467  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
468 
-
469  return 1; /* return error */
-
470  }
-
471  }
-
472  }
-
473  else /* qspi interface */
-
474  {
-
475  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
476  0x00000000, 0x00, 0x00,
-
477  0x00000000, 0x00, 0x00,
-
478  0x00, NULL, 0x00,
-
479  NULL, 0x00, 0x00); /* qspi write read */
-
480  if (res != 0) /* check result */
-
481  {
-
482  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
483 
-
484  return 1; /* return error */
-
485  }
-
486  }
-
487 
-
488  return 0; /* success return 0 */
-
489 }
-
490 
-
501 uint8_t w25qxx_enable_volatile_sr_write(w25qxx_handle_t *handle)
-
502 {
-
503  uint8_t res;
-
504  uint8_t buf[1];
-
505 
-
506  if (handle == NULL) /* check handle */
-
507  {
-
508  return 2; /* return error */
-
509  }
-
510  if (handle->inited != 1) /* check handle initialization */
-
511  {
-
512  return 3; /* return error */
-
513  }
-
514 
-
515  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
516  {
-
517  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
518  {
-
519  res = a_w25qxx_qspi_write_read(handle,
-
520  W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 1,
-
521  0x00000000, 0x00, 0x00,
-
522  0x00000000, 0x00, 0x00,
-
523  0x00, NULL, 0x00,
-
524  NULL, 0x00, 0x00); /* qspi write read */
-
525  if (res != 0) /* check result */
-
526  {
-
527  handle->debug_print("w25qxx: sr write enable failed.\n"); /* sr write enable failed */
-
528 
-
529  return 1; /* return error */
-
530  }
-
531  }
-
532  else /* single spi */
-
533  {
-
534  buf[0] = W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE; /* sr write enable command */
-
535  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
536  if (res != 0) /* check result */
-
537  {
-
538  handle->debug_print("w25qxx: sr write enable failed.\n"); /* sr write enable failed */
-
539 
-
540  return 1; /* return error */
-
541  }
-
542  }
-
543  }
-
544  else /* qspi interface */
-
545  {
-
546  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 4,
-
547  0x00000000, 0x00, 0x00,
-
548  0x00000000, 0x00, 0x00,
-
549  0x00, NULL, 0x00,
-
550  NULL, 0x00, 0x00); /* qspi write read */
-
551  if (res != 0) /* check result */
-
552  {
-
553  handle->debug_print("w25qxx: sr write enable failed.\n"); /* sr write enable failed */
-
554 
-
555  return 1; /* return error */
-
556  }
-
557  }
-
558 
-
559  return 0; /* success return 0 */
-
560 }
-
561 
-
572 uint8_t w25qxx_disable_write(w25qxx_handle_t *handle)
-
573 {
-
574  uint8_t res;
-
575  uint8_t buf[1];
-
576 
-
577  if (handle == NULL) /* check handle */
-
578  {
-
579  return 2; /* return error */
-
580  }
-
581  if (handle->inited != 1) /* check handle initialization */
-
582  {
-
583  return 3; /* return error */
-
584  }
-
585 
-
586  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
587  {
-
588  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
589  {
-
590  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_DISABLE, 1,
-
591  0x00000000, 0x00, 0x00,
-
592  0x00000000, 0x00, 0x00,
-
593  0x00, NULL, 0x00,
-
594  NULL, 0x00, 0x00); /* qspi write read */
-
595  if (res != 0) /* check result */
-
596  {
-
597  handle->debug_print("w25qxx: write disable failed.\n"); /* write disable failed */
-
598 
-
599  return 1; /* return error */
-
600  }
-
601  }
-
602  else /* single spi */
-
603  {
-
604  buf[0] = W25QXX_COMMAND_WRITE_DISABLE; /* write disable command */
-
605  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi qspi write read */
-
606  if (res != 0) /* check result */
-
607  {
-
608  handle->debug_print("w25qxx: write disable failed.\n"); /* write disable failed */
-
609 
-
610  return 1; /* return error */
-
611  }
-
612  }
-
613  }
-
614  else /* qspi interface */
-
615  {
-
616  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_DISABLE, 4,
-
617  0x00000000, 0x00, 0x00,
-
618  0x00000000, 0x00, 0x00,
-
619  0x00, NULL, 0x00,
-
620  NULL, 0x00, 0x00); /* qspi write read */
-
621  if (res != 0) /* check result */
-
622  {
-
623  handle->debug_print("w25qxx: write disable failed.\n"); /* write disable failed */
-
624 
-
625  return 1; /* return error */
-
626  }
-
627  }
-
628 
-
629  return 0; /* success return 0 */
-
630 }
-
631 
-
643 uint8_t w25qxx_get_status1(w25qxx_handle_t *handle, uint8_t *status)
-
644 {
-
645  uint8_t res;
-
646  uint8_t buf[1];
-
647 
-
648  if (handle == NULL) /* check handle */
-
649  {
-
650  return 2; /* return error */
-
651  }
-
652  if (handle->inited != 1) /* check handle initialization */
-
653  {
-
654  return 3; /* return error */
-
655  }
-
656 
-
657  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
658  {
-
659  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
660  {
-
661  res = a_w25qxx_qspi_write_read(handle,
-
662  W25QXX_COMMAND_READ_STATUS_REG1, 1,
-
663  0x00000000, 0x00, 0x00,
-
664  0x00000000, 0x00, 0x00,
-
665  0x00, NULL, 0x00,
-
666  status, 1, 1); /* qspi write read */
-
667  if (res != 0) /* check result */
-
668  {
-
669  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
670 
-
671  return 1; /* return error */
-
672  }
-
673  }
-
674  else /* single spi */
-
675  {
-
676  buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
-
677  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf,
-
678  1, status, 1); /* spi write read */
-
679  if (res != 0) /* check result */
-
680  {
-
681  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
682 
-
683  return 1; /* return error */
-
684  }
-
685  }
-
686  }
-
687  else /* qspi interface */
-
688  {
-
689  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
-
690  0x00000000, 0x00, 0x00,
-
691  0x00000000, 0x00, 0x00,
-
692  0x00, NULL, 0x00,
-
693  status, 1, 4); /* qspi write read */
-
694  if (res != 0) /* check result */
-
695  {
-
696  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
697 
-
698  return 1; /* return error */
-
699  }
-
700  }
-
701 
-
702  return 0; /* success return 0 */
-
703 }
-
704 
-
716 uint8_t w25qxx_get_status2(w25qxx_handle_t *handle, uint8_t *status)
-
717 {
-
718  uint8_t res;
-
719  uint8_t buf[1];
-
720 
-
721  if (handle == NULL) /* check handle */
-
722  {
-
723  return 2; /* return error */
-
724  }
-
725  if (handle->inited != 1) /* check handle initialization */
-
726  {
-
727  return 3; /* return error */
-
728  }
-
729 
-
730  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
731  {
-
732  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
733  {
-
734  res = a_w25qxx_qspi_write_read(handle,
-
735  W25QXX_COMMAND_READ_STATUS_REG2, 1,
-
736  0x00000000, 0x00, 0x00,
-
737  0x00000000, 0x00, 0x00,
-
738  0x00, NULL, 0x00,
-
739  status, 1, 1); /* qspi write read */
-
740  if (res != 0) /* check result */
-
741  {
-
742  handle->debug_print("w25qxx: get status2 failed.\n"); /* get status2 failed */
-
743 
-
744  return 1; /* return error */
-
745  }
-
746  }
-
747  else /* single spi */
-
748  {
-
749  buf[0] = W25QXX_COMMAND_READ_STATUS_REG2; /* read status2 command */
-
750  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf,
-
751  1, status, 1); /* spi write read */
-
752  if (res != 0) /* check result */
-
753  {
-
754  handle->debug_print("w25qxx: get status2 failed.\n"); /* get status2 failed */
-
755 
-
756  return 1; /* return error */
-
757  }
-
758  }
-
759  }
-
760  else /* qspi interface */
-
761  {
-
762  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG2, 4,
-
763  0x00000000, 0x00, 0x00,
-
764  0x00000000, 0x00, 0x00,
-
765  0x00, NULL, 0x00,
-
766  status, 1, 4); /* qspi write read */
-
767  if (res != 0) /* check result */
-
768  {
-
769  handle->debug_print("w25qxx: get status2 failed.\n"); /* get status2 failed */
-
770 
-
771  return 1; /* return error */
-
772  }
-
773  }
-
774 
-
775  return 0; /* success return 0 */
-
776 }
-
777 
-
789 uint8_t w25qxx_get_status3(w25qxx_handle_t *handle, uint8_t *status)
-
790 {
-
791  uint8_t res;
-
792  uint8_t buf[1];
-
793 
-
794  if (handle == NULL) /* check handle */
-
795  {
-
796  return 2; /* return error */
-
797  }
-
798  if (handle->inited != 1) /* check handle initialization */
-
799  {
-
800  return 3; /* return error */
-
801  }
-
802 
-
803  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
804  {
-
805  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
806  {
-
807  res = a_w25qxx_qspi_write_read(handle,
-
808  W25QXX_COMMAND_READ_STATUS_REG3, 1,
-
809  0x00000000, 0x00, 0x00,
-
810  0x00000000, 0x00, 0x00,
-
811  0x00, NULL, 0x00,
-
812  status, 1, 1); /* qspi write read */
-
813  if (res != 0) /* check result */
-
814  {
-
815  handle->debug_print("w25qxx: get status3 failed.\n"); /* get status3 failed */
-
816 
-
817  return 1; /* return error */
-
818  }
-
819  }
-
820  else /* single spi */
-
821  {
-
822  buf[0] = W25QXX_COMMAND_READ_STATUS_REG3; /* read status3 command */
-
823  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1,
-
824  status, 1); /* spi write read */
-
825  if (res != 0) /* check result */
-
826  {
-
827  handle->debug_print("w25qxx: get status3 failed.\n"); /* get status3 failed */
-
828 
-
829  return 1; /* return error */
-
830  }
-
831  }
-
832  }
-
833  else /* qspi interface */
-
834  {
-
835  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG3, 4,
-
836  0x00000000, 0x00, 0x00,
-
837  0x00000000, 0x00, 0x00,
-
838  0x00, NULL, 0x00,
-
839  status, 1, 4); /* qspi write read */
-
840  if (res != 0) /* check result */
-
841  {
-
842  handle->debug_print("w25qxx: get status3 failed.\n"); /* get status3 failed */
-
843 
-
844  return 1; /* return error */
-
845  }
-
846  }
-
847 
-
848  return 0; /* success return 0 */
-
849 }
-
850 
-
863 uint8_t w25qxx_set_status1(w25qxx_handle_t *handle, uint8_t status)
-
864 {
-
865  uint8_t res;
-
866  uint8_t buf[2];
-
867  uint32_t timeout;
-
868  uint8_t status_check;
-
869 
-
870  if (handle == NULL) /* check handle */
-
871  {
-
872  return 2; /* return error */
-
873  }
-
874  if (handle->inited != 1) /* check handle initialization */
-
875  {
-
876  return 3; /* return error */
-
877  }
-
878 
-
879  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
880  {
-
881  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
882  {
-
883  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 1,
-
884  0x00000000, 0x00, 0x00,
-
885  0x00000000, 0x00, 0x00,
-
886  0x00, NULL, 0x00,
-
887  NULL, 0x00, 0x00); /* qspi write read */
-
888  if (res != 0) /* check result */
-
889  {
-
890  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
891 
-
892  return 1; /* return error */
-
893  }
-
894  buf[0] = status; /* set status */
-
895  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_STATUS_REG1, 1,
-
896  0x00000000, 0x00, 0x00,
-
897  0x00000000, 0x00, 0x00,
-
898  0x00, (uint8_t *)buf, 1,
-
899  NULL, 0x00, 1); /* qspi write read */
-
900  if (res != 0) /* check result */
-
901  {
-
902  handle->debug_print("w25qxx: set status1 failed.\n"); /* set status1 failed */
-
903 
-
904  return 1; /* return error */
-
905  }
-
906 
-
907  timeout = 1000; /* max 1000 ms */
-
908  while (timeout != 0) /* check timeout */
-
909  {
-
910  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
-
911  0x00000000, 0x00, 0x00,
-
912  0x00000000, 0x00, 0x00,
-
913  0x00, NULL, 0x00,
-
914  (uint8_t *)&status_check, 1, 1); /* qspi write read */
-
915  if (res != 0) /* check result */
-
916  {
-
917  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
918 
-
919  return 1; /* return error */
-
920  }
-
921  if ((status_check & 0x01) == 0x00) /* check status */
-
922  {
-
923  break; /* break */
-
924  }
-
925  timeout--; /* timeout-- */
-
926  handle->delay_ms(1); /* delay 1 ms */
-
927  }
-
928  if (timeout == 0) /* check timeout */
-
929  {
-
930  handle->debug_print("w25qxx: write status 1 timeout.\n"); /* write status 1 timeout */
-
931 
-
932  return 4; /* return error */
-
933  }
-
934  else
-
935  {
-
936  return 0; /* success return 0 */
-
937  }
-
938  }
-
939  else /* single spi */
-
940  {
-
941  buf[0] = W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE; /* sr write enable command */
-
942  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
943  if (res != 0) /* check result */
-
944  {
-
945  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
946 
-
947  return 1; /* return error */
-
948  }
-
949  buf[0] = W25QXX_COMMAND_WRITE_STATUS_REG1; /* write status1 command */
-
950  buf[1] = status; /* set status */
-
951  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
-
952  if (res != 0) /* check result */
-
953  {
-
954  handle->debug_print("w25qxx: set status1 failed.\n"); /* set status1 failed */
-
955 
-
956  return 1; /* return error */
-
957  }
-
958 
-
959  timeout = 1000; /* max 1000 ms */
-
960  while (timeout != 0) /* check timeout */
-
961  {
-
962  buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
-
963  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1,
-
964  (uint8_t *)&status_check, 1); /* spi write read */
-
965  if (res != 0) /* check result */
-
966  {
-
967  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
968 
-
969  return 1; /* return error */
-
970  }
-
971  if ((status_check & 0x01) == 0x00) /* check status */
-
972  {
-
973  break; /* break */
-
974  }
-
975  timeout--; /* timeout-- */
-
976  handle->delay_ms(1); /* delay 1 ms */
-
977  }
-
978  if (timeout == 0) /* check timeout */
-
979  {
-
980  handle->debug_print("w25qxx: write status 1 timeout.\n"); /* write status 1 timeout */
-
981 
-
982  return 4; /* return error */
-
983  }
-
984  else
-
985  {
-
986  return 0; /* success return 0 */
-
987  }
-
988  }
-
989  }
-
990  else /* qspi interface */
-
991  {
-
992  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 4,
-
993  0x00000000, 0x00, 0x00,
-
994  0x00000000, 0x00, 0x00,
-
995  0x00, NULL, 0x00,
-
996  NULL, 0x00, 0x00); /* qspi write read */
-
997  if (res != 0) /* check result */
-
998  {
-
999  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
1000 
-
1001  return 1; /* return error */
-
1002  }
-
1003  buf[0] = status; /* set status */
-
1004  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_STATUS_REG1, 4,
-
1005  0x00000000, 0x00, 0x00,
-
1006  0x00000000, 0x00, 0x00,
-
1007  0x00, (uint8_t *)buf, 1,
-
1008  NULL, 0x00, 4); /* qspi write read */
-
1009  if (res != 0) /* check result */
-
1010  {
-
1011  handle->debug_print("w25qxx: set status1 failed.\n"); /* set status1 failed */
-
1012 
-
1013  return 1; /* return error */
-
1014  }
-
1015 
-
1016  timeout = 1000; /* max 1000 ms */
-
1017  while (timeout != 0) /* check timeout */
-
1018  {
-
1019  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
-
1020  0x00000000, 0x00, 0x00,
-
1021  0x00000000, 0x00, 0x00,
-
1022  0x00, NULL, 0x00,
-
1023  (uint8_t *)&status_check, 1, 4); /* qspi write read */
-
1024  if (res != 0) /* check result */
-
1025  {
-
1026  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
1027 
-
1028  return 1; /* return error */
-
1029  }
-
1030  if ((status_check & 0x01) == 0x00) /* check status */
-
1031  {
-
1032  break; /* break */
-
1033  }
-
1034  timeout--; /* timeout-- */
-
1035  handle->delay_ms(1); /* delay 1 ms */
-
1036  }
-
1037  if (timeout == 0) /* check timeout */
-
1038  {
-
1039  handle->debug_print("w25qxx: write status 1 timeout.\n"); /* write status 1 timeout */
-
1040 
-
1041  return 4; /* return error */
-
1042  }
-
1043  else
-
1044  {
-
1045  return 0; /* success return 0 */
-
1046  }
-
1047  }
-
1048 }
-
1049 
-
1062 uint8_t w25qxx_set_status2(w25qxx_handle_t *handle, uint8_t status)
-
1063 {
-
1064  uint8_t res;
-
1065  uint8_t buf[2];
-
1066  uint32_t timeout;
-
1067  uint8_t status_check;
-
1068 
-
1069  if (handle == NULL) /* check handle */
-
1070  {
-
1071  return 2; /* return error */
-
1072  }
-
1073  if (handle->inited != 1) /* check handle initialization */
-
1074  {
-
1075  return 3; /* return error */
-
1076  }
-
1077 
-
1078  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
1079  {
-
1080  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
1081  {
-
1082  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 1,
-
1083  0x00000000, 0x00, 0x00,
-
1084  0x00000000, 0x00, 0x00,
-
1085  0x00, NULL, 0x00,
-
1086  NULL, 0x00, 0x00); /* qspi write read */
-
1087  if (res != 0) /* check result */
-
1088  {
-
1089  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
1090 
-
1091  return 1; /* return error */
-
1092  }
-
1093  buf[0] = status; /* set status */
-
1094  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_STATUS_REG2, 1,
-
1095  0x00000000, 0x00, 0x00,
-
1096  0x00000000, 0x00, 0x00,
-
1097  0x00, (uint8_t *)buf, 1,
-
1098  NULL, 0x00, 1); /* qspi write read */
-
1099  if (res != 0) /* check result */
-
1100  {
-
1101  handle->debug_print("w25qxx: set status2 failed.\n"); /* set status2 failed */
-
1102 
-
1103  return 1; /* return error */
-
1104  }
-
1105 
-
1106  timeout = 1000; /* max 1000 ms */
-
1107  while (timeout != 0) /* check timeout */
-
1108  {
-
1109  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
-
1110  0x00000000, 0x00, 0x00,
-
1111  0x00000000, 0x00, 0x00,
-
1112  0x00, NULL, 0x00,
-
1113  (uint8_t *)&status_check, 1, 1); /* qspi write read */
-
1114  if (res != 0) /* check result */
-
1115  {
-
1116  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
1117 
-
1118  return 1; /* return error */
-
1119  }
-
1120  if ((status_check & 0x01) == 0x00) /* check status */
-
1121  {
-
1122  break; /* break */
-
1123  }
-
1124  timeout--; /* timeout-- */
-
1125  handle->delay_ms(1); /* delay 1 ms */
-
1126  }
-
1127  if (timeout == 0) /* check timeout */
-
1128  {
-
1129  handle->debug_print("w25qxx: write status 2 timeout.\n"); /* write status 2 timeout */
-
1130 
-
1131  return 4; /* return error */
-
1132  }
-
1133  else
-
1134  {
-
1135  return 0; /* success return 0 */
-
1136  }
-
1137  }
-
1138  else /* single spi */
-
1139  {
-
1140  buf[0] = W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE; /* sr write enable command */
-
1141  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
1142  if (res != 0) /* check result */
-
1143  {
-
1144  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
1145 
-
1146  return 1; /* return error */
-
1147  }
-
1148  buf[0] = W25QXX_COMMAND_WRITE_STATUS_REG2; /* write status2 command */
-
1149  buf[1] = status; /* set status */
-
1150  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
-
1151  if (res != 0) /* check result */
-
1152  {
-
1153  handle->debug_print("w25qxx: set status2 failed.\n"); /* set status2 failed */
-
1154 
-
1155  return 1; /* return error */
-
1156  }
-
1157 
-
1158  timeout = 1000; /* max 1000 ms */
-
1159  while (timeout != 0) /* check timeout */
-
1160  {
-
1161  buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
-
1162  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1,
-
1163  (uint8_t *)&status_check, 1); /* spi write read */
-
1164  if (res != 0) /* check result */
-
1165  {
-
1166  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
1167 
-
1168  return 1; /* return error */
-
1169  }
-
1170  if ((status_check & 0x01) == 0x00) /* check status */
-
1171  {
-
1172  break; /* break */
-
1173  }
-
1174  timeout--; /* timeout-- */
-
1175  handle->delay_ms(1); /* delay 1 ms */
-
1176  }
-
1177  if (timeout == 0) /* check timeout */
-
1178  {
-
1179  handle->debug_print("w25qxx: write status 2 timeout.\n"); /* write status 2 timeout */
-
1180 
-
1181  return 4; /* return error */
-
1182  }
-
1183  else
-
1184  {
-
1185  return 0; /* success return 0 */
-
1186  }
-
1187  }
-
1188  }
-
1189  else /* qspi interface */
-
1190  {
-
1191  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 4,
-
1192  0x00000000, 0x00, 0x00,
-
1193  0x00000000, 0x00, 0x00,
-
1194  0x00, NULL, 0x00,
-
1195  NULL, 0x00, 0x00); /* qspi write read */
-
1196  if (res != 0) /* check result */
-
1197  {
-
1198  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
1199 
-
1200  return 1; /* return error */
-
1201  }
-
1202  buf[0] = status; /* set status */
-
1203  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_STATUS_REG2, 4,
-
1204  0x00000000, 0x00, 0x00,
-
1205  0x00000000, 0x00, 0x00,
-
1206  0x00, (uint8_t *)buf, 1,
-
1207  NULL, 0x00, 4); /* qspi write read */
-
1208  if (res != 0) /* check result */
-
1209  {
-
1210  handle->debug_print("w25qxx: set status2 failed.\n"); /* set status2 failed */
-
1211 
-
1212  return 1; /* return error */
-
1213  }
-
1214 
-
1215  timeout = 1000; /* max 1000 ms */
-
1216  while (timeout != 0) /* check timeout */
-
1217  {
-
1218  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
-
1219  0x00000000, 0x00, 0x00,
-
1220  0x00000000, 0x00, 0x00,
-
1221  0x00, NULL, 0x00,
-
1222  (uint8_t *)&status_check, 1, 4); /* qspi write read */
-
1223  if (res != 0) /* check result */
-
1224  {
-
1225  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
1226 
-
1227  return 1; /* return error */
-
1228  }
-
1229  if ((status_check & 0x01) == 0x00) /* check status */
-
1230  {
-
1231  break; /* break */
-
1232  }
-
1233  timeout--; /* timeout-- */
-
1234  handle->delay_ms(1); /* delay 1 ms */
-
1235  }
-
1236  if (timeout == 0) /* check timeout */
-
1237  {
-
1238  handle->debug_print("w25qxx: write status 2 timeout.\n"); /* write status 2 timeout */
-
1239 
-
1240  return 4; /* return error */
-
1241  }
-
1242  else
-
1243  {
-
1244  return 0; /* success return 0 */
-
1245  }
-
1246  }
-
1247 }
-
1248 
-
1261 uint8_t w25qxx_set_status3(w25qxx_handle_t *handle, uint8_t status)
-
1262 {
-
1263  uint8_t res;
-
1264  uint8_t buf[2];
-
1265  uint32_t timeout;
-
1266  uint8_t status_check;
-
1267 
-
1268  if (handle == NULL) /* check handle */
-
1269  {
-
1270  return 2; /* return error */
-
1271  }
-
1272  if (handle->inited != 1) /* check handle initialization */
-
1273  {
-
1274  return 3; /* return error */
-
1275  }
-
1276 
-
1277  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
1278  {
-
1279  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
1280  {
-
1281  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 1,
-
1282  0x00000000, 0x00, 0x00,
-
1283  0x00000000, 0x00, 0x00,
-
1284  0x00, NULL, 0x00,
-
1285  NULL, 0x00, 0x00); /* qspi write read */
-
1286  if (res != 0) /* check result */
-
1287  {
-
1288  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
1289 
-
1290  return 1; /* return error */
-
1291  }
-
1292  buf[0] = status; /* set status */
-
1293  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_STATUS_REG3, 1,
-
1294  0x00000000, 0x00, 0x00,
-
1295  0x00000000, 0x00, 0x00,
-
1296  0x00, (uint8_t *)buf, 1,
-
1297  NULL, 0x00, 1); /* qspi write read */
-
1298  if (res != 0) /* check result */
-
1299  {
-
1300  handle->debug_print("w25qxx: set status3 failed.\n"); /* set status3 failed */
-
1301 
-
1302  return 1; /* return error */
-
1303  }
-
1304 
-
1305  timeout = 1000; /* max 1000 ms */
-
1306  while (timeout != 0) /* check timeout */
-
1307  {
-
1308  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
-
1309  0x00000000, 0x00, 0x00,
-
1310  0x00000000, 0x00, 0x00,
-
1311  0x00, NULL, 0x00,
-
1312  (uint8_t *)&status_check, 1, 1); /* qspi write read */
-
1313  if (res != 0) /* check result */
-
1314  {
-
1315  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
1316 
-
1317  return 1; /* return error */
-
1318  }
-
1319  if ((status_check & 0x01) == 0x00) /* check status */
-
1320  {
-
1321  break; /* break */
-
1322  }
-
1323  timeout--; /* timeout-- */
-
1324  handle->delay_ms(1); /* delay 1 ms */
-
1325  }
-
1326  if (timeout == 0) /* check timeout */
-
1327  {
-
1328  handle->debug_print("w25qxx: write status 3 timeout.\n"); /* write status 3 timeout */
-
1329 
-
1330  return 4; /* return error */
-
1331  }
-
1332  else
-
1333  {
-
1334  return 0; /* success return 0 */
-
1335  }
-
1336  }
-
1337  else /* single spi */
-
1338  {
-
1339  buf[0] = W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE; /* sr write enable command */
-
1340  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
1341  if (res != 0) /* check result */
-
1342  {
-
1343  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
1344 
-
1345  return 1; /* return error */
-
1346  }
-
1347  buf[0] = W25QXX_COMMAND_WRITE_STATUS_REG3; /* write status3 command */
-
1348  buf[1] = status; /* set status */
-
1349  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
-
1350  if (res != 0) /* check result */
-
1351  {
-
1352  handle->debug_print("w25qxx: set status3 failed.\n"); /* set status3 failed */
-
1353 
-
1354  return 1; /* return error */
-
1355  }
-
1356 
-
1357  timeout = 1000; /* max 1000 ms */
-
1358  while (timeout != 0) /* check timeout */
-
1359  {
-
1360  buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
-
1361  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1,
-
1362  (uint8_t *)&status_check, 1); /* spi write read */
-
1363  if (res != 0) /* check result */
-
1364  {
-
1365  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
1366 
-
1367  return 1; /* return error */
-
1368  }
-
1369  if ((status_check & 0x01) == 0x00) /* check status */
-
1370  {
-
1371  break; /* break */
-
1372  }
-
1373  timeout--; /* timeout-- */
-
1374  handle->delay_ms(1); /* delay 1 ms */
-
1375  }
-
1376  if (timeout == 0) /* check timeout */
-
1377  {
-
1378  handle->debug_print("w25qxx: write status 3 timeout.\n"); /* write status 3 timeout */
-
1379 
-
1380  return 4; /* return error */
-
1381  }
-
1382  else
-
1383  {
-
1384  return 0; /* success return 0 */
-
1385  }
-
1386  }
-
1387  }
-
1388  else /* qspi interface */
-
1389  {
-
1390  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 4,
-
1391  0x00000000, 0x00, 0x00,
-
1392  0x00000000, 0x00, 0x00,
-
1393  0x00, NULL, 0x00,
-
1394  NULL, 0x00, 0x00); /* qspi write read */
-
1395  if (res != 0) /* check result */
-
1396  {
-
1397  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
1398 
-
1399  return 1; /* return error */
-
1400  }
-
1401  buf[0] = status; /* set status */
-
1402  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_STATUS_REG3, 4,
-
1403  0x00000000, 0x00, 0x00,
-
1404  0x00000000, 0x00, 0x00,
-
1405  0x00, (uint8_t *)buf, 1,
-
1406  NULL, 0x00, 4); /* qspi write read */
-
1407  if (res != 0) /* check result */
-
1408  {
-
1409  handle->debug_print("w25qxx: set status3 failed.\n"); /* set status3 failed */
-
1410 
-
1411  return 1; /* return error */
-
1412  }
-
1413 
-
1414  timeout = 1000; /* max 1000 ms */
-
1415  while (timeout != 0) /* check timeout */
-
1416  {
-
1417  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
-
1418  0x00000000, 0x00, 0x00,
-
1419  0x00000000, 0x00, 0x00,
-
1420  0x00, NULL, 0x00,
-
1421  (uint8_t *)&status_check, 1, 4); /* qspi write read */
-
1422  if (res != 0) /* check result */
-
1423  {
-
1424  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
1425 
-
1426  return 1; /* return error */
-
1427  }
-
1428  if ((status_check & 0x01) == 0x00) /* check status */
-
1429  {
-
1430  break; /* break */
-
1431  }
-
1432  timeout--; /* timeout-- */
-
1433  handle->delay_ms(1); /* delay 1 ms */
-
1434  }
-
1435  if (timeout == 0) /* check timeout */
-
1436  {
-
1437  handle->debug_print("w25qxx: write status 3 timeout.\n"); /* write status 3 timeout */
-
1438 
-
1439  return 4; /* return error */
-
1440  }
-
1441  else
-
1442  {
-
1443  return 0; /* success return 0 */
-
1444  }
-
1445  }
-
1446 }
-
1447 
-
1459 uint8_t w25qxx_chip_erase(w25qxx_handle_t *handle)
-
1460 {
-
1461  uint8_t res;
-
1462  uint8_t status;
-
1463  uint8_t buf[1];
-
1464  uint32_t timeout;
-
1465 
-
1466  if (handle == NULL) /* check handle */
-
1467  {
-
1468  return 2; /* return error */
-
1469  }
-
1470  if (handle->inited != 1) /* check handle initialization */
-
1471  {
-
1472  return 3; /* return error */
-
1473  }
-
1474 
-
1475  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
1476  {
-
1477  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
1478  {
-
1479  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
1480  0x00000000, 0x00, 0x00,
-
1481  0x00000000, 0x00, 0x00,
-
1482  0x00, NULL, 0x00,
-
1483  NULL, 0x00, 0x00); /* qspi write read */
-
1484  if (res != 0) /* check result */
-
1485  {
-
1486  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
1487 
-
1488  return 1; /* return error */
-
1489  }
-
1490  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_CHIP_ERASE, 1,
-
1491  0x00000000, 0x00, 0x00,
-
1492  0x00000000, 0x00, 0x00,
-
1493  0x00, NULL, 0x00,
-
1494  NULL, 0x00, 0x00); /* qspi write read */
-
1495  if (res != 0) /* check result */
-
1496  {
-
1497  handle->debug_print("w25qxx: chip erase failed.\n"); /* chip erase failed */
-
1498 
-
1499  return 1; /* return error */
-
1500  }
-
1501  timeout = 400 * 1000; /* max 400s */
-
1502  while (timeout != 0) /* check timeout */
-
1503  {
-
1504  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
-
1505  0x00000000, 0x00, 0x00,
-
1506  0x00000000, 0x00, 0x00,
-
1507  0x00, NULL, 0x00,
-
1508  (uint8_t *)&status, 1, 1); /* qspi write read */
-
1509  if (res != 0) /* check result */
-
1510  {
-
1511  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
1512 
-
1513  return 1; /* return error */
-
1514  }
-
1515  if ((status & 0x01) == 0x00) /* check status */
-
1516  {
-
1517  break; /* break */
-
1518  }
-
1519  timeout--; /* timeout-- */
-
1520  handle->delay_ms(1); /* delay 1 ms */
-
1521  }
-
1522  if (timeout == 0) /* check timeout */
-
1523  {
-
1524  handle->debug_print("w25qxx: erase timeout.\n"); /* erase timeout */
-
1525 
-
1526  return 4; /* return error */
-
1527  }
-
1528  else
-
1529  {
-
1530  return 0; /* success return 0 */
-
1531  }
-
1532  }
-
1533  else /* single spi */
-
1534  {
-
1535  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
1536  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
1537  if (res != 0) /* check result */
-
1538  {
-
1539  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
1540 
-
1541  return 1; /* return error */
-
1542  }
-
1543  buf[0] = W25QXX_COMMAND_CHIP_ERASE; /* chip erase command */
-
1544  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi qspi write read */
-
1545  if (res != 0) /* check result */
-
1546  {
-
1547  handle->debug_print("w25qxx: chip erase failed.\n"); /* chip erase failed */
-
1548 
-
1549  return 1; /* return error */
-
1550  }
-
1551  timeout = 400 * 1000; /* max 400s */
-
1552  while (timeout != 0) /* check timeout */
-
1553  {
-
1554  buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
-
1555  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1,
-
1556  (uint8_t *)&status, 1); /* spi write read */
-
1557  if (res != 0) /* check result */
-
1558  {
-
1559  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
1560 
-
1561  return 1; /* return error */
-
1562  }
-
1563  if ((status & 0x01) == 0x00) /* check status */
-
1564  {
-
1565  break; /* break */
-
1566  }
-
1567  timeout--; /* timeout-- */
-
1568  handle->delay_ms(1); /* delay 1 ms */
-
1569  }
-
1570  if (timeout == 0) /* check timeout */
-
1571  {
-
1572  handle->debug_print("w25qxx: erase timeout.\n"); /* erase timeout */
-
1573 
-
1574  return 4; /* return error */
-
1575  }
-
1576  else
-
1577  {
-
1578  return 0; /* success return 0 */
-
1579  }
-
1580  }
-
1581  }
-
1582  else /* qspi interface */
-
1583  {
-
1584  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
1585  0x00000000, 0x00, 0x00,
-
1586  0x00000000, 0x00, 0x00,
-
1587  0x00, NULL, 0x00,
-
1588  NULL, 0x00, 0x00); /* qspi write read */
-
1589  if (res != 0) /* check result */
-
1590  {
-
1591  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
1592 
-
1593  return 1; /* return error */
-
1594  }
-
1595  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_CHIP_ERASE, 4,
-
1596  0x00000000, 0x00, 0x00,
-
1597  0x00000000, 0x00, 0x00,
-
1598  0x00, NULL, 0x00,
-
1599  NULL, 0x00, 0x00); /* qspi write read */
-
1600  if (res != 0) /* check result */
-
1601  {
-
1602  handle->debug_print("w25qxx: chip erase failed.\n"); /* chip erase failed */
-
1603 
-
1604  return 1; /* return error */
-
1605  }
-
1606  timeout = 400 * 1000; /* max 400s */
-
1607  while (timeout != 0) /* check timeout */
-
1608  {
-
1609  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
-
1610  0x00000000, 0x00, 0x00,
-
1611  0x00000000, 0x00, 0x00,
-
1612  0x00, NULL, 0x00,
-
1613  (uint8_t *)&status, 1, 4); /* qspi write read */
-
1614  if (res != 0) /* check result */
-
1615  {
-
1616  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
1617 
-
1618  return 1; /* return error */
-
1619  }
-
1620  if ((status & 0x01) == 0x00) /* check status */
-
1621  {
-
1622  break; /* break */
-
1623  }
-
1624  timeout--; /* timeout-- */
-
1625  handle->delay_ms(1); /* delay 1 ms */
-
1626  }
-
1627  if (timeout == 0) /* check timeout */
-
1628  {
-
1629  handle->debug_print("w25qxx: erase timeout.\n"); /* erase timeout */
-
1630 
-
1631  return 4; /* return error */
-
1632  }
-
1633  else
-
1634  {
-
1635  return 0; /* success return 0 */
-
1636  }
-
1637  }
-
1638 }
-
1639 
-
1650 uint8_t w25qxx_erase_program_suspend(w25qxx_handle_t *handle)
-
1651 {
-
1652  uint8_t res;
-
1653  uint8_t buf[1];
-
1654 
-
1655  if (handle == NULL) /* check handle */
-
1656  {
-
1657  return 2; /* return error */
-
1658  }
-
1659  if (handle->inited != 1) /* check handle initialization */
-
1660  {
-
1661  return 3; /* return error */
-
1662  }
-
1663 
-
1664  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
1665  {
-
1666  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
1667  {
-
1668  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND, 1,
-
1669  0x00000000, 0x00, 0x00,
-
1670  0x00000000, 0x00, 0x00,
-
1671  0x00, NULL, 0x00,
-
1672  NULL, 0x00, 0x00); /* qspi write read */
-
1673  if (res != 0) /* check result */
-
1674  {
-
1675  handle->debug_print("w25qxx: erase program suspend failed.\n"); /* erase program suspend failed */
-
1676 
-
1677  return 1; /* return error */
-
1678  }
-
1679  }
-
1680  else /* single spi */
-
1681  {
-
1682  buf[0] = W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND; /* erase program suspend command */
-
1683  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
1684  if (res != 0) /* check result */
-
1685  {
-
1686  handle->debug_print("w25qxx: erase program suspend failed.\n"); /* erase program suspend failed */
-
1687 
-
1688  return 1; /* return error */
-
1689  }
-
1690 
-
1691  return 0; /* success return 0 */
-
1692  }
-
1693  }
-
1694  else /* qspi interface */
-
1695  {
-
1696  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND, 4,
-
1697  0x00000000, 0x00, 0x00,
-
1698  0x00000000, 0x00, 0x00,
-
1699  0x00, NULL, 0x00,
-
1700  NULL, 0x00, 0x00); /* qspi write read */
-
1701  if (res != 0) /* check result */
-
1702  {
-
1703  handle->debug_print("w25qxx: erase program suspend failed.\n"); /* erase program suspend failed */
-
1704 
-
1705  return 1; /* return error */
-
1706  }
-
1707  }
-
1708 
-
1709  return 0; /* success return 0 */
-
1710 }
-
1711 
-
1722 uint8_t w25qxx_erase_program_resume(w25qxx_handle_t *handle)
-
1723 {
-
1724  uint8_t res;
-
1725  uint8_t buf[1];
-
1726 
-
1727  if (handle == NULL) /* check handle */
-
1728  {
-
1729  return 2; /* return error */
-
1730  }
-
1731  if (handle->inited != 1) /* check handle initialization */
-
1732  {
-
1733  return 3; /* return error */
-
1734  }
-
1735 
-
1736  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
1737  {
-
1738  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
1739  {
-
1740  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_ERASE_PROGRAM_RESUME, 1,
-
1741  0x00000000, 0x00, 0x00,
-
1742  0x00000000, 0x00, 0x00,
-
1743  0x00, NULL, 0x00,
-
1744  NULL, 0x00, 0x00); /* qspi write read */
-
1745  if (res != 0) /* check result */
-
1746  {
-
1747  handle->debug_print("w25qxx: erase program resume failed.\n"); /* erase program resume failed */
-
1748 
-
1749  return 1; /* return error */
-
1750  }
-
1751  }
-
1752  else /* single spi */
-
1753  {
-
1754  buf[0] = W25QXX_COMMAND_ERASE_PROGRAM_RESUME; /* erase program resume command */
-
1755  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
1756  if (res != 0) /* check result */
-
1757  {
-
1758  handle->debug_print("w25qxx: erase program resume failed.\n"); /* erase program resume failed */
-
1759 
-
1760  return 1; /* return error */
-
1761  }
-
1762  }
-
1763  }
-
1764  else /* qspi interface */
-
1765  {
-
1766  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_ERASE_PROGRAM_RESUME, 4,
-
1767  0x00000000, 0x00, 0x00,
-
1768  0x00000000, 0x00, 0x00,
-
1769  0x00, NULL, 0x00,
-
1770  NULL, 0x00, 0x00); /* qspi write read */
-
1771  if (res != 0) /* check result */
-
1772  {
-
1773  handle->debug_print("w25qxx: erase program resume failed.\n"); /* erase program resume failed */
-
1774 
-
1775  return 1; /* return error */
-
1776  }
-
1777  }
-
1778 
-
1779  return 0; /* success return 0 */
-
1780 }
-
1781 
-
1792 uint8_t w25qxx_power_down(w25qxx_handle_t *handle)
-
1793 {
-
1794  uint8_t res;
-
1795  uint8_t buf[1];
-
1796 
-
1797  if (handle == NULL) /* check handle */
-
1798  {
-
1799  return 2; /* return error */
-
1800  }
-
1801  if (handle->inited != 1) /* check handle initialization */
-
1802  {
-
1803  return 3; /* return error */
-
1804  }
-
1805 
-
1806  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
1807  {
-
1808  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
1809  {
-
1810  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_POWER_DOWN, 1,
-
1811  0x00000000, 0x00, 0x00,
-
1812  0x00000000, 0x00, 0x00,
-
1813  0x00, NULL, 0x00,
-
1814  NULL, 0x00, 0x00); /* qspi write read */
-
1815  if (res != 0) /* check result */
-
1816  {
-
1817  handle->debug_print("w25qxx: power down failed.\n"); /* power down failed */
-
1818 
-
1819  return 1; /* return error */
-
1820  }
-
1821  }
-
1822  else /* single spi */
-
1823  {
-
1824  buf[0] = W25QXX_COMMAND_POWER_DOWN; /* power down command */
-
1825  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf,
-
1826  1, NULL, 0); /* spi write read */
-
1827  if (res != 0) /* check result */
-
1828  {
-
1829  handle->debug_print("w25qxx: power down failed.\n"); /* power down failed */
-
1830 
-
1831  return 1; /* return error */
-
1832  }
-
1833  }
-
1834  }
-
1835  else /* qspi interface */
-
1836  {
-
1837  res = a_w25qxx_qspi_write_read(handle, 0xFF, 4,
-
1838  0x00000000, 0x00, 0x00,
-
1839  0x00000000, 0x00, 0x00,
-
1840  0, NULL, 0x00,
-
1841  NULL, 0x00, 0); /* spi write read */
-
1842  if (res != 0) /* check result */
-
1843  {
-
1844  handle->debug_print("w25qxx: exit qspi mode failed.\n"); /* exit qspi mode failed */
-
1845 
-
1846  return 1; /* return error */
-
1847  }
-
1848  handle->delay_ms(10); /* delay 10 ms */
-
1849  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_POWER_DOWN, 4,
-
1850  0x00000000, 0x00, 0x00,
-
1851  0x00000000, 0x00, 0x00,
-
1852  0x00, NULL, 0x00,
-
1853  NULL, 0x00, 0x00); /* qspi write read */
-
1854  if (res != 0) /* check result */
-
1855  {
-
1856  handle->debug_print("w25qxx: power down failed.\n"); /* power down failed */
-
1857 
-
1858  return 1; /* return error */
-
1859  }
-
1860  }
-
1861 
-
1862  return 0; /* success return 0 */
-
1863 }
-
1864 
-
1875 uint8_t w25qxx_release_power_down(w25qxx_handle_t *handle)
-
1876 {
-
1877  uint8_t res;
-
1878  uint8_t id;
-
1879  uint8_t buf[4];
-
1880 
-
1881  if (handle == NULL) /* check handle */
-
1882  {
-
1883  return 2; /* return error */
-
1884  }
-
1885  if (handle->inited != 1) /* check handle initialization */
-
1886  {
-
1887  return 3; /* return error */
-
1888  }
-
1889 
-
1890  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
1891  {
-
1892  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
1893  {
-
1894  res = a_w25qxx_qspi_write_read(handle,
-
1895  W25QXX_COMMAND_RELEASE_POWER_DOWN, 1,
-
1896  0x00000000, 0x00, 0x00,
-
1897  0x00000000, 0x00, 0x00,
-
1898  3 * 8, NULL, 0x00,
-
1899  (uint8_t *)&id, 1, 1); /* qspi write read */
-
1900  if (res != 0) /* check result */
-
1901  {
-
1902  handle->debug_print("w25qxx: release power down failed.\n"); /* release power down failed */
-
1903 
-
1904  return 1; /* return error */
-
1905  }
-
1906  }
-
1907  else /* single spi */
-
1908  {
-
1909  buf[0] = W25QXX_COMMAND_RELEASE_POWER_DOWN; /* release power down command */
-
1910  buf[1] = 0xFF; /* dummy */
-
1911  buf[2] = 0xFF; /* dummy */
-
1912  buf[3] = 0xFF; /* dummy */
-
1913  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, (uint8_t *)&id, 1); /* spi write read */
-
1914  if (res != 0) /* check result */
-
1915  {
-
1916  handle->debug_print("w25qxx: release power down failed.\n"); /* release power down failed */
-
1917 
-
1918  return 1; /* return error */
-
1919  }
-
1920  }
-
1921  }
-
1922  else /* qspi interface */
-
1923  {
-
1924  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_RELEASE_POWER_DOWN, 4,
-
1925  0x00000000, 0x00, 0x00,
-
1926  0x00000000, 0x00, 0x00,
-
1927  6, NULL, 0x00,
-
1928  (uint8_t *)&id, 1, 4); /* qspi write read */
-
1929  if (res != 0) /* check result */
-
1930  {
-
1931  handle->debug_print("w25qxx: release power down failed.\n"); /* release power down failed */
-
1932 
-
1933  return 1; /* return error */
-
1934  }
-
1935  }
-
1936 
-
1937  return 0; /* success return 0 */
-
1938 }
-
1939 
-
1952 uint8_t w25qxx_get_manufacturer_device_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
-
1953 {
-
1954  uint8_t res;
-
1955  uint8_t buf[4];
-
1956  uint8_t out[2];
-
1957 
-
1958  if (handle == NULL) /* check handle */
-
1959  {
-
1960  return 2; /* return error */
-
1961  }
-
1962  if (handle->inited != 1) /* check handle initialization */
-
1963  {
-
1964  return 3; /* return error */
-
1965  }
-
1966 
-
1967  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
1968  {
-
1969  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
1970  {
-
1971  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_MANUFACTURER, 1,
-
1972  0x00000000, 1, 3,
-
1973  0x00000000, 0x00, 0x00,
-
1974  0, NULL, 0x00,
-
1975  (uint8_t *)out, 2, 1); /* qspi write read */
-
1976  if (res != 0) /* check result */
-
1977  {
-
1978  handle->debug_print("w25qxx: get manufacturer device id failed.\n"); /* get manufacturer device id failed */
-
1979 
-
1980  return 1; /* return error */
-
1981  }
-
1982  *manufacturer = out[0]; /* set manufacturer */
-
1983  *device_id = out[1]; /* set device id */
-
1984  }
-
1985  else /* single spi */
-
1986  {
-
1987  buf[0] = W25QXX_COMMAND_READ_MANUFACTURER; /* read manufacturer command */
-
1988  buf[1] = 0x00; /* dummy */
-
1989  buf[2] = 0x00; /* dummy */
-
1990  buf[3] = 0x00; /* dummy */
-
1991  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4,
-
1992  (uint8_t *)out, 2); /* spi write read */
-
1993  if (res != 0) /* check result */
-
1994  {
-
1995  handle->debug_print("w25qxx: get manufacturer device id failed.\n"); /* get manufacturer device id failed */
-
1996 
-
1997  return 1; /* return error */
-
1998  }
-
1999  *manufacturer = out[0]; /* set manufacturer */
-
2000  *device_id = out[1]; /* set device id */
-
2001  }
-
2002  }
-
2003  else /* qspi interface */
-
2004  {
-
2005  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_MANUFACTURER, 4,
-
2006  0x00000000, 4, 3,
-
2007  0x00000000, 0x00, 0x00,
-
2008  0, NULL, 0x00,
-
2009  (uint8_t *)out, 2, 4); /* qspi write read */
-
2010  if (res != 0) /* check result */
-
2011  {
-
2012  handle->debug_print("w25qxx: get manufacturer device id failed.\n"); /* get manufacturer device id failed */
-
2013 
-
2014  return 1; /* return error */
-
2015  }
-
2016  *manufacturer = out[0]; /* set manufacturer */
-
2017  *device_id = out[1]; /* set device id */
-
2018  }
-
2019 
-
2020  return 0; /* success return 0 */
-
2021 }
-
2022 
-
2038 uint8_t w25qxx_get_manufacturer_device_id_dual_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
-
2039 {
-
2040  uint8_t res;
-
2041  uint8_t out[2];
-
2042 
-
2043  if (handle == NULL) /* check handle */
-
2044  {
-
2045  return 2; /* return error */
-
2046  }
-
2047  if (handle->inited != 1) /* check handle initialization */
-
2048  {
-
2049  return 3; /* return error */
-
2050  }
-
2051 
-
2052  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
2053  {
-
2054  if (handle->dual_quad_spi_enable == 0) /* check spi */
-
2055  {
-
2056  handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
-
2057 
-
2058  return 6; /* return error */
-
2059  }
-
2060  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
2061  {
-
2062  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_DEVICE_ID_DUAL_IO, 1,
-
2063  0x00000000, 2, 3,
-
2064  0x000000FF, 2, 1,
-
2065  0x00, NULL, 0x00,
-
2066  (uint8_t *)out, 2, 2); /* spi write read */
-
2067  if (res != 0) /* check result */
-
2068  {
-
2069  handle->debug_print("w25qxx: get manufacturer device id dual io failed.\n"); /* get manufacturer device id dual io failed */
-
2070 
-
2071  return 1; /* return error */
-
2072  }
-
2073  }
-
2074  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
2075  {
-
2076  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_DEVICE_ID_DUAL_IO, 1,
-
2077  0x00000000, 2, 4,
-
2078  0x000000FF, 2, 1,
-
2079  0x00, NULL, 0x00,
-
2080  (uint8_t *)out, 2, 2); /* spi write read */
-
2081  if (res != 0) /* check result */
-
2082  {
-
2083  handle->debug_print("w25qxx: get manufacturer device id dual io failed.\n"); /* get manufacturer device id dual io failed */
-
2084 
-
2085  return 1; /* return error */
-
2086  }
-
2087  }
-
2088  else
-
2089  {
-
2090  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
2091 
-
2092  return 4; /* return error */
-
2093  }
-
2094  *manufacturer = out[0]; /* set manufacturer */
-
2095  *device_id = out[1]; /* set device id */
-
2096  }
-
2097  else
-
2098  {
-
2099  handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
-
2100 
-
2101  return 5; /* return error */
-
2102  }
-
2103 
-
2104  return 0; /* success return 0 */
-
2105 }
-
2106 
-
2122 uint8_t w25qxx_get_manufacturer_device_id_quad_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
-
2123 {
-
2124  uint8_t res;
-
2125  uint8_t out[2];
-
2126 
-
2127  if (handle == NULL) /* check handle */
-
2128  {
-
2129  return 2; /* return error */
-
2130  }
-
2131  if (handle->inited != 1) /* check handle initialization */
-
2132  {
-
2133  return 3; /* return error */
-
2134  }
-
2135 
-
2136  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
2137  {
-
2138  if (handle->dual_quad_spi_enable == 0) /* check spi */
-
2139  {
-
2140  handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
-
2141 
-
2142  return 6; /* return error */
-
2143  }
-
2144  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
2145  {
-
2146  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_DEVICE_ID_QUAD_IO, 1,
-
2147  0x00000000, 4, 3,
-
2148  0x000000FF, 4, 1,
-
2149  4, NULL, 0x00,
-
2150  (uint8_t *)out, 2, 4); /* spi write read */
-
2151  if (res != 0) /* check result */
-
2152  {
-
2153  handle->debug_print("w25qxx: get manufacturer device id quad io failed.\n"); /* get manufacturer device id quad io failed */
-
2154 
-
2155  return 1; /* return error */
-
2156  }
-
2157  }
-
2158  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
2159  {
-
2160  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_DEVICE_ID_QUAD_IO, 1,
-
2161  0x00000000, 4, 4,
-
2162  0x000000FF, 4, 1,
-
2163  4, NULL, 0x00,
-
2164  (uint8_t *)out, 2, 4); /* spi write read */
-
2165  if (res != 0) /* check result */
-
2166  {
-
2167  handle->debug_print("w25qxx: get manufacturer device id quad io failed.\n"); /* get manufacturer device id quad io failed */
-
2168 
-
2169  return 1; /* return error */
-
2170  }
-
2171  }
-
2172  else
-
2173  {
-
2174  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
2175 
-
2176  return 4; /* return error */
-
2177  }
-
2178  *manufacturer = out[0]; /* set manufacturer */
-
2179  *device_id = out[1]; /* set device id */
-
2180  }
-
2181  else
-
2182  {
-
2183  handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
-
2184 
-
2185  return 5; /* return error */
-
2186  }
-
2187 
-
2188  return 0; /* success return 0 */
-
2189 }
-
2190 
-
2203 uint8_t w25qxx_get_jedec_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
-
2204 {
-
2205  uint8_t res;
-
2206  uint8_t buf[1];
-
2207  uint8_t out[3];
-
2208 
-
2209  if (handle == NULL) /* check handle */
-
2210  {
-
2211  return 2; /* return error */
-
2212  }
-
2213  if (handle->inited != 1) /* check handle initialization */
-
2214  {
-
2215  return 3; /* return error */
-
2216  }
-
2217 
-
2218  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
2219  {
-
2220  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
2221  {
-
2222  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_JEDEC_ID, 1,
-
2223  0x00000000, 0x00, 0x00,
-
2224  0x00000000, 0x00, 0x00,
-
2225  0, NULL, 0x00,
-
2226  (uint8_t *)out, 3, 1); /* qspi write read */
-
2227  if (res != 0) /* check result */
-
2228  {
-
2229  handle->debug_print("w25qxx: get jedec id failed.\n"); /* get jedec id failed */
-
2230 
-
2231  return 1; /* return error */
-
2232  }
-
2233  *manufacturer = out[0]; /* set manufacturer */
-
2234  device_id[0] = out[1]; /* set device id 0 */
-
2235  device_id[1] = out[2]; /* set device id 1 */
-
2236  }
-
2237  else /* single spi */
-
2238  {
-
2239  buf[0] = W25QXX_COMMAND_JEDEC_ID; /* jedec id command */
-
2240  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1,
-
2241  (uint8_t *)out, 3); /* spi write read */
-
2242  if (res != 0) /* check result */
-
2243  {
-
2244  handle->debug_print("w25qxx: get jedec id failed.\n"); /* get jedec id failed */
-
2245 
-
2246  return 1; /* return error */
-
2247  }
-
2248  *manufacturer = out[0]; /* set manufacturer */
-
2249  device_id[0] = out[1]; /* set device id 0 */
-
2250  device_id[1] = out[2]; /* set device id 1 */
-
2251  }
-
2252  }
-
2253  else /* qspi interface */
-
2254  {
-
2255  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_JEDEC_ID, 4,
-
2256  0x00000000, 0x00, 0x00,
-
2257  0x00000000, 0x00, 0x00,
-
2258  0, NULL, 0x00,
-
2259  (uint8_t *)out, 3, 4); /* qspi write read */
-
2260  if (res != 0) /* check result */
-
2261  {
-
2262  handle->debug_print("w25qxx: get jedec id failed.\n"); /* get jedec id failed */
-
2263 
-
2264  return 1; /* return error */
-
2265  }
-
2266  *manufacturer = out[0]; /* set manufacturer */
-
2267  device_id[0] = out[1]; /* set device id 0 */
-
2268  device_id[1] = out[2]; /* set device id 1 */
-
2269  }
-
2270 
-
2271  return 0; /* success return 0 */
-
2272 }
-
2273 
-
2284 uint8_t w25qxx_global_block_lock(w25qxx_handle_t *handle)
-
2285 {
-
2286  uint8_t res;
-
2287  uint8_t buf[1];
-
2288 
-
2289  if (handle == NULL) /* check handle */
-
2290  {
-
2291  return 2; /* return error */
-
2292  }
-
2293  if (handle->inited != 1) /* check handle initialization */
-
2294  {
-
2295  return 3; /* return error */
-
2296  }
-
2297 
-
2298  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
2299  {
-
2300  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
2301  {
-
2302  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK, 1,
-
2303  0x00000000, 0x00, 0x00,
-
2304  0x00000000, 0x00, 0x00,
-
2305  0, NULL, 0x00,
-
2306  NULL, 0x00, 0x00); /* qspi write read */
-
2307  if (res != 0) /* check result */
-
2308  {
-
2309  handle->debug_print("w25qxx: global block lock failed.\n"); /* global block lock failed */
-
2310 
-
2311  return 1; /* return error */
-
2312  }
-
2313  }
-
2314  else /* single spi */
-
2315  {
-
2316  buf[0] = W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK; /* global block lock command */
-
2317  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
2318  if (res != 0) /* check result */
-
2319  {
-
2320  handle->debug_print("w25qxx: global block lock failed.\n"); /* global block lock failed */
-
2321 
-
2322  return 1; /* return error */
-
2323  }
-
2324  }
-
2325  }
-
2326  else /* qspi interface */
-
2327  {
-
2328  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK, 4,
-
2329  0x00000000, 0x00, 0x00,
-
2330  0x00000000, 0x00, 0x00,
-
2331  0, NULL, 0x00,
-
2332  NULL, 0x00, 0x00); /* qspi write read */
-
2333  if (res != 0) /* check result */
-
2334  {
-
2335  handle->debug_print("w25qxx: global block lock failed.\n"); /* global block lock failed */
-
2336 
-
2337  return 1; /* return error */
-
2338  }
-
2339  }
-
2340 
-
2341  return 0; /* success return 0 */
-
2342 }
-
2343 
-
2354 uint8_t w25qxx_global_block_unlock(w25qxx_handle_t *handle)
-
2355 {
-
2356  uint8_t res;
-
2357  uint8_t buf[1];
-
2358 
-
2359  if (handle == NULL) /* check handle */
-
2360  {
-
2361  return 2; /* return error */
-
2362  }
-
2363  if (handle->inited != 1) /* check handle initialization */
-
2364  {
-
2365  return 3; /* return error */
-
2366  }
-
2367 
-
2368  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
2369  {
-
2370  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
2371  {
-
2372  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK, 1,
-
2373  0x00000000, 0x00, 0x00,
-
2374  0x00000000, 0x00, 0x00,
-
2375  0, NULL, 0x00,
-
2376  NULL, 0x00, 0x00); /* qspi write read */
-
2377  if (res != 0) /* check result */
-
2378  {
-
2379  handle->debug_print("w25qxx: global block unlock failed.\n"); /* global block unlock failed */
-
2380 
-
2381  return 1; /* return error */
-
2382  }
-
2383  }
-
2384  else /* single spi */
-
2385  {
-
2386  buf[0] = W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK; /* global block unlock command */
-
2387  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi qspi write read */
-
2388  if (res != 0) /* check result */
-
2389  {
-
2390  handle->debug_print("w25qxx: global block unlock failed.\n"); /* global block unlock failed */
-
2391 
-
2392  return 1; /* return error */
-
2393  }
-
2394  }
-
2395  }
-
2396  else /* qspi interface */
-
2397  {
-
2398  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK, 4,
-
2399  0x00000000, 0x00, 0x00,
-
2400  0x00000000, 0x00, 0x00,
-
2401  0, NULL, 0x00,
-
2402  NULL, 0x00, 0x00); /* qspi write read */
-
2403  if (res != 0) /* check result */
-
2404  {
-
2405  handle->debug_print("w25qxx: global block unlock failed.\n"); /* global block unlock failed */
-
2406 
-
2407  return 1; /* return error */
-
2408  }
-
2409  }
-
2410 
-
2411  return 0; /* success return 0 */
-
2412 }
-
2413 
-
2427 uint8_t w25qxx_set_read_parameters(w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
-
2428 {
-
2429  uint8_t res;
-
2430  uint8_t buf[1];
-
2431 
-
2432  if (handle == NULL) /* check handle */
-
2433  {
-
2434  return 2; /* return error */
-
2435  }
-
2436  if (handle->inited != 1) /* check handle initialization */
-
2437  {
-
2438  return 3; /* return error */
-
2439  }
-
2440 
-
2441  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
2442  {
-
2443  handle->debug_print("w25qxx: spi interface can't use this function.\n"); /* spi interface can't use this function */
-
2444 
-
2445  return 4; /* return error */
-
2446  }
-
2447  else
-
2448  {
-
2449  handle->param = (uint8_t)((dummy << 4) | (length << 0)); /* set param */
-
2450  buf[0] = handle->param; /* set param */
-
2451  res = a_w25qxx_qspi_write_read(handle, 0xC0, 4,
-
2452  0x00000000, 0x00, 0x00,
-
2453  0x00000000, 0x00, 0x00,
-
2454  0, (uint8_t *)buf, 1,
-
2455  NULL, 0x00, 4); /* qspi write read */
-
2456  if (res != 0) /* check result */
-
2457  {
-
2458  handle->debug_print("w25qxx: set read parameters failed.\n"); /* set read parameters failed */
-
2459 
-
2460  return 5; /* return error */
-
2461  }
-
2462  if (((buf[0] >> 4) & 0x03) == 0x00) /* if 0x00 */
-
2463  {
-
2464  handle->dummy = 2; /* dummy 2 */
-
2465  }
-
2466  else if (((buf[0] >> 4) & 0x03) == 0x01) /* if 0x01 */
-
2467  {
-
2468  handle->dummy = 4; /* dummy 4 */
-
2469  }
-
2470  else if (((buf[0] >> 4) & 0x03) == 0x02) /* if 0x02 */
-
2471  {
-
2472  handle->dummy = 6; /* dummy 6 */
-
2473  }
-
2474  else /* if 0x03 */
-
2475  {
-
2476  handle->dummy = 8; /* dummy 8 */
-
2477  }
-
2478  }
-
2479 
-
2480  return 0; /* success return 0 */
-
2481 }
-
2482 
-
2494 uint8_t w25qxx_enter_qspi_mode(w25qxx_handle_t *handle)
-
2495 {
-
2496  uint8_t res;
-
2497  uint8_t buf[1];
-
2498 
-
2499  if (handle == NULL) /* check handle */
-
2500  {
-
2501  return 2; /* return error */
-
2502  }
-
2503  if (handle->inited != 1) /* check handle initialization */
-
2504  {
-
2505  return 3; /* return error */
-
2506  }
-
2507 
-
2508  if (handle->spi_qspi == W25QXX_INTERFACE_QSPI) /* qspi interface */
-
2509  {
-
2510  handle->debug_print("w25qxx: qspi interface can't use this function.\n"); /* qspi interface can't use this function */
-
2511 
-
2512  return 4; /* return error */
-
2513  }
-
2514  else
-
2515  {
-
2516  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_ENTER_QSPI_MODE, 1,
-
2517  0x00000000, 0x00, 0x00,
-
2518  0x00000000, 0x00, 0x00,
-
2519  0, NULL, 0x00,
-
2520  NULL, 0x00, 0x00); /* qspi write read */
-
2521  if (res != 0) /* check result */
-
2522  {
-
2523  handle->debug_print("w25qxx: enter qspi mode failed.\n"); /* enter qspi mode failed */
-
2524 
-
2525  return 1; /* return error */
-
2526  }
-
2527  handle->delay_ms(10); /* delay 10 ms */
-
2528  buf[0] = handle->param; /* set param */
-
2529  res = a_w25qxx_qspi_write_read(handle, 0xC0, 4,
-
2530  0x00000000, 0x00, 0x00,
-
2531  0x00000000, 0x00, 0x00,
-
2532  0, (uint8_t *)buf, 1,
-
2533  NULL, 0x00, 4); /* qspi write read */
-
2534  if (res != 0) /* check result */
-
2535  {
-
2536  handle->debug_print("w25qxx: set read parameters failed.\n"); /* set read parameters failed */
-
2537 
-
2538  return 5; /* return error */
-
2539  }
-
2540  if (((buf[0] >> 4) & 0x03) == 0x00) /* if 0x00 */
-
2541  {
-
2542  handle->dummy = 2; /* dummy 2 */
-
2543  }
-
2544  else if (((buf[0] >> 4) & 0x03) == 0x01) /* if 0x01 */
-
2545  {
-
2546  handle->dummy = 4; /* dummy 4 */
-
2547  }
-
2548  else if (((buf[0] >> 4) & 0x03) == 0x02) /* if 0x02 */
-
2549  {
-
2550  handle->dummy = 6; /* dummy 6 */
-
2551  }
-
2552  else /* if 0x03 */
-
2553  {
-
2554  handle->dummy = 8; /* dummy 8 */
-
2555  }
-
2556  }
-
2557 
-
2558  return 0; /* success return 0 */
-
2559 }
-
2560 
-
2572 uint8_t w25qxx_exit_qspi_mode(w25qxx_handle_t *handle)
-
2573 {
-
2574  uint8_t res;
-
2575 
-
2576  if (handle == NULL) /* check handle */
-
2577  {
-
2578  return 2; /* return error */
-
2579  }
-
2580  if (handle->inited != 1) /* check handle initialization */
-
2581  {
-
2582  return 3; /* return error */
-
2583  }
-
2584 
-
2585  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
2586  {
-
2587  handle->debug_print("w25qxx: spi interface can't use this function.\n"); /* spi interface can't use this function */
-
2588 
-
2589  return 4; /* return error */
-
2590  }
-
2591  else
-
2592  {
-
2593  res = a_w25qxx_qspi_write_read(handle, 0xFF, 4,
-
2594  0x00000000, 0x00, 0x00,
-
2595  0x00000000, 0x00, 0x00,
-
2596  0, NULL, 0x00,
-
2597  NULL, 0x00, 0x00); /* qspi write read */
-
2598  if (res != 0) /* check result */
-
2599  {
-
2600  handle->debug_print("w25qxx: exit qspi mode failed.\n"); /* exit qspi mode failed */
-
2601 
-
2602  return 1; /* return error */
-
2603  }
-
2604  }
-
2605 
-
2606  return 0; /* success return 0 */
-
2607 }
-
2608 
-
2619 uint8_t w25qxx_enable_reset(w25qxx_handle_t *handle)
-
2620 {
-
2621  uint8_t res;
-
2622  uint8_t buf[1];
-
2623 
-
2624  if (handle == NULL) /* check handle */
-
2625  {
-
2626  return 2; /* return error */
-
2627  }
-
2628  if (handle->inited != 1) /* check handle initialization */
-
2629  {
-
2630  return 3; /* return error */
-
2631  }
-
2632 
-
2633  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
2634  {
-
2635  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
2636  {
-
2637  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_ENABLE_RESET, 1,
-
2638  0x00000000, 0x00, 0x00,
-
2639  0x00000000, 0x00, 0x00,
-
2640  0, NULL, 0x00,
-
2641  NULL, 0x00, 0x00); /* qspi write read */
-
2642  if (res != 0) /* check result */
-
2643  {
-
2644  handle->debug_print("w25qxx: enable reset failed.\n"); /* enable reset failed */
-
2645 
-
2646  return 1; /* return error */
-
2647  }
-
2648  }
-
2649  else /* single spi */
-
2650  {
-
2651  buf[0] = W25QXX_COMMAND_ENABLE_RESET; /* enable reset command */
-
2652  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf,
-
2653  1, NULL, 0); /* spi write read */
-
2654  if (res != 0) /* check result */
-
2655  {
-
2656  handle->debug_print("w25qxx: enable reset failed.\n"); /* enable reset failed */
-
2657 
-
2658  return 1; /* return error */
-
2659  }
-
2660  }
-
2661  }
-
2662  else /* qspi interface */
-
2663  {
-
2664  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_ENABLE_RESET, 4,
-
2665  0x00000000, 0x00, 0x00,
-
2666  0x00000000, 0x00, 0x00,
-
2667  0, NULL, 0x00,
-
2668  NULL, 0x00, 0x00); /* qspi write read */
-
2669  if (res != 0) /* check result */
-
2670  {
-
2671  handle->debug_print("w25qxx: enable reset failed.\n"); /* enable reset failed */
-
2672 
-
2673  return 1; /* return error */
-
2674  }
-
2675  }
-
2676 
-
2677  return 0; /* success return 0 */
-
2678 }
-
2679 
-
2690 uint8_t w25qxx_reset_device(w25qxx_handle_t *handle)
-
2691 {
-
2692  uint8_t res;
-
2693  uint8_t buf[1];
-
2694 
-
2695  if (handle == NULL) /* check handle */
-
2696  {
-
2697  return 2; /* return error */
-
2698  }
-
2699  if (handle->inited != 1) /* check handle initialization */
-
2700  {
-
2701  return 3; /* return error */
-
2702  }
-
2703 
-
2704  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
2705  {
-
2706  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
2707  {
-
2708  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_RESET_DEVICE, 1,
-
2709  0x00000000, 0x00, 0x00,
-
2710  0x00000000, 0x00, 0x00,
-
2711  0, NULL, 0x00,
-
2712  NULL, 0x00, 0x00); /* qspi write read */
-
2713  if (res != 0) /* check result */
-
2714  {
-
2715  handle->debug_print("w25qxx: reset device failed.\n"); /* reset device failed */
-
2716 
-
2717  return 1; /* return error */
-
2718  }
-
2719  }
-
2720  else /* single spi */
-
2721  {
-
2722  buf[0] = W25QXX_COMMAND_RESET_DEVICE; /* reset device command */
-
2723  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf,
-
2724  1, NULL, 0); /* spi write read */
-
2725  if (res != 0) /* check result */
-
2726  {
-
2727  handle->debug_print("w25qxx: reset device failed.\n"); /* reset device failed */
-
2728 
-
2729  return 1; /* return error */
-
2730  }
-
2731  }
-
2732  }
-
2733  else /* qspi interface */
-
2734  {
-
2735  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_RESET_DEVICE, 4,
-
2736  0x00000000, 0x00, 0x00,
-
2737  0x00000000, 0x00, 0x00,
-
2738  0, NULL, 0x00,
-
2739  NULL, 0x00, 0x00); /* qspi write read */
-
2740  if (res != 0) /* check result */
-
2741  {
-
2742  handle->debug_print("w25qxx: reset device failed.\n"); /* reset device failed */
-
2743 
-
2744  return 1; /* return error */
-
2745  }
-
2746  }
-
2747 
-
2748  return 0; /* success return 0 */
-
2749 }
-
2750 
-
2764 uint8_t w25qxx_get_unique_id(w25qxx_handle_t *handle, uint8_t id[8])
-
2765 {
-
2766  uint8_t res;
-
2767  uint8_t buf[6];
-
2768 
-
2769  if (handle == NULL) /* check handle */
-
2770  {
-
2771  return 2; /* return error */
-
2772  }
-
2773  if (handle->inited != 1) /* check handle initialization */
-
2774  {
-
2775  return 3; /* return error */
-
2776  }
-
2777 
-
2778  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
2779  {
-
2780  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
2781  {
-
2782  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
2783  {
-
2784  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_UNIQUE_ID, 1,
-
2785  0x00000000, 0x00, 0x00,
-
2786  0x00000000, 0x00, 0x00,
-
2787  4 * 8, NULL, 0x00,
-
2788  (uint8_t *)id, 8, 1); /* qspi write read */
-
2789  if (res != 0) /* check result */
-
2790  {
-
2791  handle->debug_print("w25qxx: read unique id failed.\n"); /* read unique id failed */
-
2792 
-
2793  return 1; /* return error */
-
2794  }
-
2795  }
-
2796  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
2797  {
-
2798  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_UNIQUE_ID, 1,
-
2799  0x00000000, 0x00, 0x00,
-
2800  0x00000000, 0x00, 0x00,
-
2801  5 * 8, NULL, 0x00,
-
2802  (uint8_t *)id, 8, 1); /* qspi write read */
-
2803  if (res != 0) /* check result */
-
2804  {
-
2805  handle->debug_print("w25qxx: read unique id failed.\n"); /* read unique id failed */
-
2806 
-
2807  return 1; /* return error */
-
2808  }
-
2809  }
-
2810  else
-
2811  {
-
2812  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
2813 
-
2814  return 4; /* return error */
-
2815  }
-
2816  }
-
2817  else /* single spi */
-
2818  {
-
2819  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
2820  {
-
2821  buf[0] = W25QXX_COMMAND_READ_UNIQUE_ID; /* read unique id command */
-
2822  buf[1] = 0x00; /* dummy */
-
2823  buf[2] = 0x00; /* dummy */
-
2824  buf[3] = 0x00; /* dummy */
-
2825  buf[4] = 0x00; /* dummy */
-
2826  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, (uint8_t *)id, 8); /* spi write read */
-
2827  if (res != 0) /* check result */
-
2828  {
-
2829  handle->debug_print("w25qxx: read unique id failed.\n"); /* read unique id failed */
-
2830 
-
2831  return 1; /* return error */
-
2832  }
-
2833  }
-
2834  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
2835  {
-
2836  buf[0] = W25QXX_COMMAND_READ_UNIQUE_ID; /* read unique id command */
-
2837  buf[1] = 0x00; /* dummy */
-
2838  buf[2] = 0x00; /* dummy */
-
2839  buf[3] = 0x00; /* dummy */
-
2840  buf[4] = 0x00; /* dummy */
-
2841  buf[5] = 0x00; /* dummy */
-
2842  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 6, (uint8_t *)id, 8); /* spi write read */
-
2843  if (res != 0) /* check result */
-
2844  {
-
2845  handle->debug_print("w25qxx: read unique id failed.\n"); /* read unique id failed */
-
2846 
-
2847  return 1; /* return error */
-
2848  }
-
2849  }
-
2850  else
-
2851  {
-
2852  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
2853 
-
2854  return 4; /* return error */
-
2855  }
-
2856  }
-
2857  }
-
2858  else /* qspi interface */
-
2859  {
-
2860  handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
-
2861 
-
2862  return 5; /* return error */
-
2863  }
-
2864 
-
2865  return 0; /* success return 0 */
-
2866 }
-
2867 
-
2880 uint8_t w25qxx_get_sfdp(w25qxx_handle_t *handle, uint8_t sfdp[256])
-
2881 {
-
2882  uint8_t res;
-
2883  uint8_t buf[5];
-
2884 
-
2885  if (handle == NULL) /* check handle */
-
2886  {
-
2887  return 2; /* return error */
-
2888  }
-
2889  if (handle->inited != 1) /* check handle initialization */
-
2890  {
-
2891  return 3; /* return error */
-
2892  }
-
2893 
-
2894  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
2895  {
-
2896  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
2897  {
-
2898  res = a_w25qxx_qspi_write_read(handle,
-
2899  W25QXX_COMMAND_READ_SFDP_REGISTER, 1,
-
2900  0x00000000, 1, 3,
-
2901  0x00000000, 0x00, 0x00,
-
2902  8, NULL, 0x00,
-
2903  (uint8_t *)sfdp, 256, 1); /* qspi write read */
-
2904  if (res != 0) /* check result */
-
2905  {
-
2906  handle->debug_print("w25qxx: read unique id failed.\n"); /* read unique id failed */
-
2907 
-
2908  return 1; /* return error */
-
2909  }
-
2910  }
-
2911  else /* single spi */
-
2912  {
-
2913  buf[0] = W25QXX_COMMAND_READ_SFDP_REGISTER; /* read sfdp command */
-
2914  buf[1] = 0x00; /* 0x00 */
-
2915  buf[2] = 0x00; /* 0x00 */
-
2916  buf[3] = 0x00; /* 0x00 */
-
2917  buf[4] = 0x00; /* dummy */
-
2918  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5,
-
2919  (uint8_t *)sfdp, 256); /* spi write read */
-
2920  if (res != 0) /* check result */
-
2921  {
-
2922  handle->debug_print("w25qxx: get sfdp failed.\n"); /* get sfdp failed */
-
2923 
-
2924  return 1; /* return error */
-
2925  }
-
2926  }
-
2927  }
-
2928  else /* qspi interface */
-
2929  {
-
2930  handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
-
2931 
-
2932  return 4; /* return error */
-
2933  }
-
2934 
-
2935  return 0; /* success return 0 */
-
2936 }
-
2937 
-
2952 uint8_t w25qxx_erase_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num)
-
2953 {
-
2954  uint8_t res;
-
2955  uint8_t status;
-
2956  uint32_t timeout;
-
2957  uint8_t buf[5];
-
2958 
-
2959  if (handle == NULL) /* check handle */
-
2960  {
-
2961  return 2; /* return error */
-
2962  }
-
2963  if (handle->inited != 1) /* check handle initialization */
-
2964  {
-
2965  return 3; /* return error */
-
2966  }
-
2967 
-
2968  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
2969  {
-
2970  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
2971  {
-
2972  res = a_w25qxx_qspi_write_read(handle,
-
2973  W25QXX_COMMAND_WRITE_ENABLE, 1,
-
2974  0x00000000, 0x00, 0x00,
-
2975  0x00000000, 0x00, 0x00,
-
2976  0x00, NULL, 0x00,
-
2977  NULL, 0x00, 0x00); /* qspi write read */
-
2978  if (res != 0) /* check result */
-
2979  {
-
2980  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
2981 
-
2982  return 1; /* return error */
-
2983  }
-
2984  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
2985  {
-
2986  res = a_w25qxx_qspi_write_read(handle,
-
2987  W25QXX_COMMAND_ERASE_SECURITY_REGISTER, 1,
-
2988  num << 8, 1, 3,
-
2989  0x00000000, 0x00, 0x00,
-
2990  0x00, NULL, 0x00,
-
2991  NULL, 0x00, 0x00); /* qspi write read */
-
2992  if (res != 0) /* check result */
-
2993  {
-
2994  handle->debug_print("w25qxx: erase security register failed.\n"); /* erase security register failed */
-
2995 
-
2996  return 1; /* return error */
-
2997  }
-
2998  }
-
2999  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
3000  {
-
3001  res = a_w25qxx_qspi_write_read(handle,
-
3002  W25QXX_COMMAND_ERASE_SECURITY_REGISTER, 1,
-
3003  num << 8, 1, 4,
-
3004  0x00000000, 0x00, 0x00,
-
3005  0x00, NULL, 0x00,
-
3006  NULL, 0x00, 0x00); /* qspi write read */
-
3007  if (res != 0) /* check result */
-
3008  {
-
3009  handle->debug_print("w25qxx: erase security register failed.\n"); /* erase security register failed */
-
3010 
-
3011  return 1; /* return error */
-
3012  }
-
3013  }
-
3014  else
-
3015  {
-
3016  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
3017 
-
3018  return 4; /* return error */
-
3019  }
-
3020 
-
3021  timeout = 100 * 100; /* max 1000 ms */
-
3022  while (timeout != 0) /* check timeout */
-
3023  {
-
3024  res = a_w25qxx_qspi_write_read(handle,
-
3025  W25QXX_COMMAND_READ_STATUS_REG1, 1,
-
3026  0x00000000, 0x00, 0x00,
-
3027  0x00000000, 0x00, 0x00,
-
3028  0x00, NULL, 0x00,
-
3029  (uint8_t *)&status, 1, 1); /* qspi write read */
-
3030  if (res != 0) /* check result */
-
3031  {
-
3032  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
3033 
-
3034  return 1; /* return error */
-
3035  }
-
3036  if ((status & 0x01) == 0x00) /* check status */
-
3037  {
-
3038  break; /* break */
-
3039  }
-
3040  timeout--; /* timeout-- */
-
3041  handle->delay_us(10); /* delay 10 us */
-
3042  }
-
3043  if (timeout == 0)
-
3044  {
-
3045  handle->debug_print("w25qxx: erase security register timeout.\n"); /* erase security register timeout */
-
3046 
-
3047  return 6; /* return error */
-
3048  }
-
3049  }
-
3050  else /* single spi */
-
3051  {
-
3052  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
3053  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
3054  if (res != 0) /* check result */
-
3055  {
-
3056  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
3057 
-
3058  return 1; /* return error */
-
3059  }
-
3060  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
3061  {
-
3062  buf[0] = W25QXX_COMMAND_ERASE_SECURITY_REGISTER; /* erase security register command */
-
3063  buf[1] = 0x00; /* 0x00 */
-
3064  buf[2] = num; /* num */
-
3065  buf[3] = 0x00; /* 0x00 */
-
3066  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, NULL, 0); /* spi write read */
-
3067  if (res != 0) /* check result */
-
3068  {
-
3069  handle->debug_print("w25qxx: erase security register failed.\n"); /* erase security register failed */
-
3070 
-
3071  return 1; /* return error */
-
3072  }
-
3073  }
-
3074  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
3075  {
-
3076  buf[0] = W25QXX_COMMAND_ERASE_SECURITY_REGISTER; /* erase security register command */
-
3077  buf[1] = 0x00; /* 0x00 */
-
3078  buf[2] = 0x00; /* 0x00 */
-
3079  buf[3] = num; /* num */
-
3080  buf[4] = 0x00; /* 0x00 */
-
3081  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, NULL, 0); /* spi write read */
-
3082  if (res != 0) /* check result */
-
3083  {
-
3084  handle->debug_print("w25qxx: erase security register failed.\n"); /* erase security register failed */
-
3085 
-
3086  return 1; /* return error */
-
3087  }
-
3088  }
-
3089  else
-
3090  {
-
3091  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
3092 
-
3093  return 4; /* return error */
-
3094  }
-
3095 
-
3096  timeout = 100 * 100; /* max 1000 ms */
-
3097  while (timeout != 0) /* check timeout */
-
3098  {
-
3099  buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
-
3100  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, (uint8_t *)&status, 1); /* spi write read */
-
3101  if (res != 0) /* check result */
-
3102  {
-
3103  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
3104 
-
3105  return 1; /* return error */
-
3106  }
-
3107  if ((status & 0x01) == 0x00) /* check status */
-
3108  {
-
3109  break; /* break */
-
3110  }
-
3111  timeout--; /* timeout-- */
-
3112  handle->delay_us(10); /* delay 10 us */
-
3113  }
-
3114  if (timeout == 0)
-
3115  {
-
3116  handle->debug_print("w25qxx: erase security register timeout.\n"); /* erase security register timeout */
-
3117 
-
3118  return 6; /* return error */
-
3119  }
-
3120  }
-
3121  }
-
3122  else /* qspi interface */
-
3123  {
-
3124  handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
-
3125 
-
3126  return 5; /* return error */
-
3127  }
-
3128 
-
3129  return 0; /* success return 0 */
-
3130 }
-
3131 
-
3147 uint8_t w25qxx_program_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
-
3148 {
-
3149  uint8_t res;
-
3150  uint8_t status;
-
3151  uint32_t timeout;
-
3152  uint8_t buf[5];
-
3153 
-
3154  if (handle == NULL) /* check handle */
-
3155  {
-
3156  return 2; /* return error */
-
3157  }
-
3158  if (handle->inited != 1) /* check handle initialization */
-
3159  {
-
3160  return 3; /* return error */
-
3161  }
-
3162 
-
3163  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
3164  {
-
3165  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
3166  {
-
3167  res = a_w25qxx_qspi_write_read(handle,
-
3168  W25QXX_COMMAND_WRITE_ENABLE, 1,
-
3169  0x00000000, 0x00, 0x00,
-
3170  0x00000000, 0x00, 0x00,
-
3171  0x00, NULL, 0x00,
-
3172  NULL, 0x00, 0x00); /* qspi write read */
-
3173  if (res != 0) /* check result */
-
3174  {
-
3175  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
3176 
-
3177  return 1; /* return error */
-
3178  }
-
3179  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
3180  {
-
3181  res = a_w25qxx_qspi_write_read(handle,
-
3182  W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER, 1,
-
3183  num << 8, 1, 3,
-
3184  0x00000000, 0x00, 0x00,
-
3185  0x00, data, 256,
-
3186  NULL, 0x00, 1); /* qspi write read */
-
3187  if (res != 0) /* check result */
-
3188  {
-
3189  handle->debug_print("w25qxx: program security register failed.\n"); /* program security register failed */
-
3190 
-
3191  return 1; /* return error */
-
3192  }
-
3193  }
-
3194  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
3195  {
-
3196  res = a_w25qxx_qspi_write_read(handle,
-
3197  W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER, 1,
-
3198  num << 8, 1, 4,
-
3199  0x00000000, 0x00, 0x00,
-
3200  0x00, data, 256,
-
3201  NULL, 0x00, 1); /* qspi write read */
-
3202  if (res != 0) /* check result */
-
3203  {
-
3204  handle->debug_print("w25qxx: program security register failed.\n"); /* program security register failed */
-
3205 
-
3206  return 1; /* return error */
-
3207  }
-
3208  }
-
3209  else
-
3210  {
-
3211  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
3212 
-
3213  return 4; /* return error */
-
3214  }
-
3215 
-
3216  timeout = 3 * 100; /* max 3 ms */
-
3217  while (timeout != 0) /* check timeout */
-
3218  {
-
3219  res = a_w25qxx_qspi_write_read(handle,
-
3220  W25QXX_COMMAND_READ_STATUS_REG1, 1,
-
3221  0x00000000, 0x00, 0x00,
-
3222  0x00000000, 0x00, 0x00,
-
3223  0x00, NULL, 0x00,
-
3224  (uint8_t *)&status, 1, 1); /* qspi write read */
-
3225  if (res != 0) /* check result */
-
3226  {
-
3227  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
3228 
-
3229  return 1; /* return error */
-
3230  }
-
3231  if ((status & 0x01) == 0x00) /* check status */
-
3232  {
-
3233  break; /* break */
-
3234  }
-
3235  timeout--; /* timeout-- */
-
3236  handle->delay_us(10); /* delay 10 us */
-
3237  }
-
3238  if (timeout == 0)
-
3239  {
-
3240  handle->debug_print("w25qxx: program security register timeout.\n"); /* program security register timeout */
-
3241 
-
3242  return 6; /* return error */
-
3243  }
-
3244  }
-
3245  else /* single spi */
-
3246  {
-
3247  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
3248  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
3249  if (res != 0) /* check result */
-
3250  {
-
3251  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
3252 
-
3253  return 1; /* return error */
-
3254  }
-
3255  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
3256  {
-
3257  handle->buf[0] = W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER; /* program security register command */
-
3258  handle->buf[1] = 0x00; /* 0x00 */
-
3259  handle->buf[2] = num; /* num */
-
3260  handle->buf[3] = 0x00; /* 0x00 */
-
3261  memcpy(&handle->buf[4], data, 256); /* copy data */
-
3262  res = a_w25qxx_spi_write_read(handle, (uint8_t *)handle->buf, 260, NULL, 0); /* spi write read */
-
3263  if (res != 0) /* check result */
-
3264  {
-
3265  handle->debug_print("w25qxx: program security register failed.\n"); /* program security register failed */
-
3266 
-
3267  return 1; /* return error */
-
3268  }
-
3269  }
-
3270  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
3271  {
-
3272  handle->buf[0] = W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER; /* program security register command */
-
3273  handle->buf[1] = 0x00; /* 0x00 */
-
3274  handle->buf[2] = 0x00; /* 0x00 */
-
3275  handle->buf[3] = num; /* num */
-
3276  handle->buf[4] = 0x00; /* 0x00 */
-
3277  memcpy(&handle->buf[5], data, 256); /* copy data */
-
3278  res = a_w25qxx_spi_write_read(handle, (uint8_t *)handle->buf, 261, NULL, 0); /* spi write read */
-
3279  if (res != 0) /* check result */
-
3280  {
-
3281  handle->debug_print("w25qxx: program security register failed.\n"); /* program security register failed */
-
3282 
-
3283  return 1; /* return error */
-
3284  }
-
3285  }
-
3286  else
-
3287  {
-
3288  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
3289 
-
3290  return 4; /* return error */
-
3291  }
-
3292 
-
3293  timeout = 3 * 100; /* max 3 ms */
-
3294  while (timeout != 0) /* check timeout */
-
3295  {
-
3296  buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
-
3297  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, (uint8_t *)&status, 1); /* spi write read */
-
3298  if (res != 0) /* check result */
-
3299  {
-
3300  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
3301 
-
3302  return 1; /* return error */
-
3303  }
-
3304  if ((status & 0x01) == 0x00) /* check status */
-
3305  {
-
3306  break; /* break */
-
3307  }
-
3308  timeout--; /* timeout-- */
-
3309  handle->delay_us(10); /* delay 10 us */
-
3310  }
-
3311  if (timeout == 0)
-
3312  {
-
3313  handle->debug_print("w25qxx: program security register timeout.\n"); /* program security register timeout */
-
3314 
-
3315  return 6; /* return error */
-
3316  }
-
3317  }
-
3318  }
-
3319  else /* qspi interface */
-
3320  {
-
3321  handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
-
3322 
-
3323  return 5; /* return error */
-
3324  }
-
3325 
-
3326  return 0; /* success return 0 */
-
3327 }
-
3328 
-
3344 uint8_t w25qxx_read_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
-
3345 {
-
3346  uint8_t res;
-
3347  uint8_t buf[6];
-
3348 
-
3349  if (handle == NULL) /* check handle */
-
3350  {
-
3351  return 2; /* return error */
-
3352  }
-
3353  if (handle->inited != 1) /* check handle initialization */
-
3354  {
-
3355  return 3; /* return error */
-
3356  }
-
3357 
-
3358  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
3359  {
-
3360  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
3361  {
-
3362  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
3363  {
-
3364  res = a_w25qxx_qspi_write_read(handle,
-
3365  W25QXX_COMMAND_READ_SECURITY_REGISTER, 1,
-
3366  num << 8, 1, 3,
-
3367  0x00000000, 0x00, 0x00,
-
3368  8, NULL, 0x00,
-
3369  data, 256, 1); /* qspi write read */
-
3370  if (res != 0) /* check result */
-
3371  {
-
3372  handle->debug_print("w25qxx: read security register failed.\n"); /* read security register failed */
-
3373 
-
3374  return 1; /* return error */
-
3375  }
-
3376  }
-
3377  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256)) /* 4 address mode */
-
3378  {
-
3379  res = a_w25qxx_qspi_write_read(handle,
-
3380  W25QXX_COMMAND_READ_SECURITY_REGISTER, 1,
-
3381  num << 8, 1, 4,
-
3382  0x00000000, 0x00, 0x00,
-
3383  8, NULL, 0x00,
-
3384  data, 256, 1); /* qspi write read */
-
3385  if (res != 0) /* check result */
-
3386  {
-
3387  handle->debug_print("w25qxx: read security register failed.\n"); /* read security register failed */
-
3388 
-
3389  return 1; /* return error */
-
3390  }
-
3391  }
-
3392  else
-
3393  {
-
3394  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
3395 
-
3396  return 4; /* return error */
-
3397  }
-
3398  }
-
3399  else /* single spi */
-
3400  {
-
3401  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
3402  {
-
3403  buf[0] = W25QXX_COMMAND_READ_SECURITY_REGISTER; /* read security register command */
-
3404  buf[1] = 0x00; /* 0x00 */
-
3405  buf[2] = num; /* num */
-
3406  buf[3] = 0x00; /* 0x00 */
-
3407  buf[4] = 0x00; /* dummy */
-
3408  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, data, 256); /* spi write read */
-
3409  if (res != 0) /* check result */
-
3410  {
-
3411  handle->debug_print("w25qxx: read security register failed.\n"); /* read security register failed */
-
3412 
-
3413  return 1; /* return error */
-
3414  }
-
3415  }
-
3416  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
3417  {
-
3418  buf[0] = W25QXX_COMMAND_READ_SECURITY_REGISTER; /* read security register command */
-
3419  buf[1] = 0x00; /* 0x00 */
-
3420  buf[2] = 0x00; /* 0x00 */
-
3421  buf[3] = num; /* num */
-
3422  buf[4] = 0x00; /* 0x00 */
-
3423  buf[5] = 0x00; /* dummy */
-
3424  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 6, data, 256); /* spi write read */
-
3425  if (res != 0) /* check result */
-
3426  {
-
3427  handle->debug_print("w25qxx: read security register failed.\n"); /* read security register failed */
-
3428 
-
3429  return 1; /* return error */
-
3430  }
-
3431  }
-
3432  else
-
3433  {
-
3434  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
3435 
-
3436  return 4; /* return error */
-
3437  }
-
3438  }
-
3439  }
-
3440  else /* qspi interface */
-
3441  {
-
3442  handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
-
3443 
-
3444  return 5; /* return error */
-
3445  }
-
3446 
-
3447  return 0; /* success return 0 */
-
3448 }
-
3449 
-
3465 uint8_t w25qxx_only_spi_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
-
3466 {
-
3467  uint8_t res;
-
3468  uint8_t buf[5];
-
3469 
-
3470  if (handle == NULL) /* check handle */
-
3471  {
-
3472  return 2; /* return error */
-
3473  }
-
3474  if (handle->inited != 1) /* check handle initialization */
-
3475  {
-
3476  return 3; /* return error */
-
3477  }
-
3478 
-
3479  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
3480  {
-
3481  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
3482  {
-
3483  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
3484  {
-
3485  if (handle->type >= W25Q256) /* >128Mb */
-
3486  {
-
3487  res = a_w25qxx_qspi_write_read(handle,
-
3488  W25QXX_COMMAND_WRITE_ENABLE, 1,
-
3489  0x00000000, 0x00, 0x00,
-
3490  0x00000000, 0x00, 0x00,
-
3491  0x00, NULL, 0x00,
-
3492  NULL, 0x00, 0x00); /* qspi write read */
-
3493  if (res != 0) /* check result */
-
3494  {
-
3495  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
3496 
-
3497  return 1; /* return error */
-
3498  }
-
3499  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
3500  res = a_w25qxx_qspi_write_read(handle,
-
3501  0xC5, 1,
-
3502  0x00000000, 0x00, 0x00,
-
3503  0x00000000, 0x00, 0x00,
-
3504  0x00, (uint8_t *)buf, 1,
-
3505  NULL, 0x00, 1); /* qspi write read */
-
3506  if (res != 0) /* check result */
-
3507  {
-
3508  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
3509 
-
3510  return 1; /* return error */
-
3511  }
-
3512 
-
3513  }
-
3514  res = a_w25qxx_qspi_write_read(handle,
-
3515  W25QXX_COMMAND_READ_DATA, 1,
-
3516  addr, 1, 3,
-
3517  0x00000000, 0x00, 0x00,
-
3518  0x00, NULL, 0x00,
-
3519  data, len, 1); /* qspi write read */
-
3520  if (res != 0) /* check result */
-
3521  {
-
3522  handle->debug_print("w25qxx: only spi read failed.\n"); /* only spi read failed */
-
3523 
-
3524  return 1; /* return error */
-
3525  }
-
3526  }
-
3527  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) &&
-
3528  (handle->type >= W25Q256)) /* check address mode */
-
3529  {
-
3530  res = a_w25qxx_qspi_write_read(handle,
-
3531  W25QXX_COMMAND_READ_DATA, 1,
-
3532  addr, 1, 4,
-
3533  0x00000000, 0x00, 0x00,
-
3534  0x00, NULL, 0x00,
-
3535  data, len, 1); /* qspi write read */
-
3536  if (res != 0) /* check result */
-
3537  {
-
3538  handle->debug_print("w25qxx: only spi read failed.\n"); /* only spi read failed */
-
3539 
-
3540  return 1; /* return error */
-
3541  }
-
3542  }
-
3543  else
-
3544  {
-
3545  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
3546 
-
3547  return 4; /* return error */
-
3548  }
-
3549  }
-
3550  else /* single spi */
-
3551  {
-
3552  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
3553  {
-
3554  if (handle->type >= W25Q256) /* >128Mb */
-
3555  {
-
3556  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
3557  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
3558  if (res != 0) /* check result */
-
3559  {
-
3560  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
3561 
-
3562  return 1; /* return error */
-
3563  }
-
3564  buf[0] = 0xC5; /* write extended addr register command */
-
3565  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
3566  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
-
3567  if (res != 0) /* check result */
-
3568  {
-
3569  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
3570 
-
3571  return 1; /* return error */
-
3572  }
-
3573  }
-
3574  buf[0] = W25QXX_COMMAND_READ_DATA; /* only spi read command */
-
3575  buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
3576  buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
3577  buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
3578  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, (uint8_t *)data, (uint32_t)len); /* spi write read */
-
3579  if (res != 0) /* check result */
-
3580  {
-
3581  handle->debug_print("w25qxx: only spi read failed.\n"); /* only spi read failed */
-
3582 
-
3583  return 1; /* return error */
-
3584  }
-
3585  }
-
3586  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) &&
-
3587  (handle->type >= W25Q256)) /* check address mode */
-
3588  {
-
3589  buf[0] = W25QXX_COMMAND_READ_DATA; /* only spi read command */
-
3590  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
3591  buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
3592  buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
3593  buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
3594  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, (uint8_t *)data, (uint32_t)len); /* spi write read */
-
3595  if (res != 0) /* check result */
-
3596  {
-
3597  handle->debug_print("w25qxx: only spi read failed.\n"); /* only spi read failed */
-
3598 
-
3599  return 1; /* return error */
-
3600  }
-
3601  }
-
3602  else
-
3603  {
-
3604  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
3605 
-
3606  return 4; /* return error */
-
3607  }
-
3608  }
-
3609  }
-
3610  else
-
3611  {
-
3612  handle->debug_print("w25qxx: only spi interface can use this function.\n"); /* only spi interface can use this function */
-
3613 
-
3614  return 5; /* return error */
-
3615  }
-
3616 
-
3617  return 0; /* success return 0 */
-
3618 }
-
3619 
-
3634 uint8_t w25qxx_fast_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
-
3635 {
-
3636  uint8_t res;
-
3637  uint8_t buf[6];
-
3638 
-
3639  if (handle == NULL) /* check handle */
-
3640  {
-
3641  return 2; /* return error */
-
3642  }
-
3643  if (handle->inited != 1) /* check handle initialization */
-
3644  {
-
3645  return 3; /* return error */
-
3646  }
-
3647 
-
3648  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
3649  {
-
3650  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
3651  {
-
3652  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
3653  {
-
3654  if (handle->type >= W25Q256) /* >128Mb */
-
3655  {
-
3656  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
3657  0x00000000, 0x00, 0x00,
-
3658  0x00000000, 0x00, 0x00,
-
3659  0x00, NULL, 0x00,
-
3660  NULL, 0x00, 0x00); /* qspi write read */
-
3661  if (res != 0) /* check result */
-
3662  {
-
3663  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
3664 
-
3665  return 1; /* return error */
-
3666  }
-
3667  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
3668  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
3669  0x00000000, 0x00, 0x00,
-
3670  0x00000000, 0x00, 0x00,
-
3671  0, (uint8_t *)buf, 0x01,
-
3672  NULL, 0x00, 1); /* spi write read */
-
3673  if (res != 0) /* check result */
-
3674  {
-
3675  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
3676 
-
3677  return 1; /* return error */
-
3678  }
-
3679  }
-
3680  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 1,
-
3681  addr, 1, 3,
-
3682  0x00000000, 0x00, 0x00,
-
3683  8, NULL, 0x00,
-
3684  data, len, 1); /* spi write read */
-
3685  if (res != 0) /* check result */
-
3686  {
-
3687  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
3688 
-
3689  return 1; /* return error */
-
3690  }
-
3691  }
-
3692  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
3693  {
-
3694  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 1,
-
3695  addr, 1, 4,
-
3696  0x00000000, 0x00, 0x00,
-
3697  8, NULL, 0x00,
-
3698  data, len, 1); /* spi write read */
-
3699  if (res != 0) /* check result */
-
3700  {
-
3701  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
3702 
-
3703  return 1; /* return error */
-
3704  }
-
3705  }
-
3706  else
-
3707  {
-
3708  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
3709 
-
3710  return 4; /* return error */
-
3711  }
-
3712  }
-
3713  else /* single spi */
-
3714  {
-
3715  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
3716  {
-
3717  if (handle->type >= W25Q256) /* >128Mb */
-
3718  {
-
3719  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
3720  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
3721  if (res != 0) /* check result */
-
3722  {
-
3723  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
3724 
-
3725  return 1; /* return error */
-
3726  }
-
3727  buf[0] = 0xC5; /* write extended addr register command */
-
3728  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
3729  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
-
3730  if (res != 0) /* check result */
-
3731  {
-
3732  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
3733 
-
3734  return 1; /* return error */
-
3735  }
-
3736  }
-
3737  buf[0] = W25QXX_COMMAND_FAST_READ; /* fast read command */
-
3738  buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
3739  buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
3740  buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
3741  buf[4] = 0x00; /* dummy */
-
3742  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, (uint8_t *)data, (uint32_t)len); /* spi write read */
-
3743  if (res != 0) /* check result */
-
3744  {
-
3745  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
3746 
-
3747  return 1; /* return error */
-
3748  }
-
3749  }
-
3750  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE)
-
3751  && (handle->type >= W25Q256)) /* check address mode */
-
3752  {
-
3753  buf[0] = W25QXX_COMMAND_FAST_READ; /* fast read command */
-
3754  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
3755  buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
3756  buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
3757  buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
3758  buf[5] = 0x00; /* dummy */
-
3759  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 6, (uint8_t *)data, (uint32_t)len); /* spi write read */
-
3760  if (res != 0) /* check result */
-
3761  {
-
3762  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
3763 
-
3764  return 1; /* return error */
-
3765  }
-
3766  }
-
3767  else
-
3768  {
-
3769  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
3770 
-
3771  return 4; /* return error */
-
3772  }
-
3773  }
-
3774  }
-
3775  else /* qspi interface */
-
3776  {
-
3777  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
3778  {
-
3779  if (handle->type >= W25Q256) /* >128Mb */
-
3780  {
-
3781  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
3782  0x00000000, 0x00, 0x00,
-
3783  0x00000000, 0x00, 0x00,
-
3784  0x00, NULL, 0x00,
-
3785  NULL, 0x00, 0x00); /* qspi write read */
-
3786  if (res != 0) /* check result */
-
3787  {
-
3788  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
3789 
-
3790  return 1; /* return error */
-
3791  }
-
3792  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
3793  res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
-
3794  0x00000000, 0x00, 0x00,
-
3795  0x00000000, 0x00, 0x00,
-
3796  0, (uint8_t *)buf, 0x01,
-
3797  NULL, 0x00, 4); /* spi write read */
-
3798  if (res != 0) /* check result */
-
3799  {
-
3800  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
3801 
-
3802  return 1; /* return error */
-
3803  }
-
3804  }
-
3805  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 4,
-
3806  addr, 4, 3,
-
3807  0x00000000, 0x00, 0x00,
-
3808  handle->dummy, NULL, 0x00,
-
3809  data, len, 4); /* spi write read */
-
3810  if (res != 0) /* check result */
-
3811  {
-
3812  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
3813 
-
3814  return 1; /* return error */
-
3815  }
-
3816  }
-
3817  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
3818  {
-
3819  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 4,
-
3820  addr, 4, 4,
-
3821  0x00000000, 0x00, 0x00,
-
3822  handle->dummy, NULL, 0x00, /* spi write */
-
3823  data, len, 4); /* spi write read */
-
3824  if (res != 0) /* check result */
-
3825  {
-
3826  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
3827 
-
3828  return 1; /* return error */
-
3829  }
-
3830  }
-
3831  else
-
3832  {
-
3833  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
3834 
-
3835  return 4; /* return error */
-
3836  }
-
3837  }
-
3838 
-
3839  return 0; /* success return 0 */
-
3840 }
-
3841 
-
3858 uint8_t w25qxx_fast_read_dual_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
-
3859 {
-
3860  uint8_t res;
-
3861  uint8_t buf[1];
-
3862 
-
3863  if (handle == NULL) /* check handle */
-
3864  {
-
3865  return 2; /* return error */
-
3866  }
-
3867  if (handle->inited != 1) /* check handle initialization */
-
3868  {
-
3869  return 3; /* return error */
-
3870  }
-
3871 
-
3872  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
3873  {
-
3874  if (handle->dual_quad_spi_enable == 0) /* check spi */
-
3875  {
-
3876  handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
-
3877 
-
3878  return 6; /* return error */
-
3879  }
-
3880  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
3881  {
-
3882  if (handle->type >= W25Q256) /* >128Mb */
-
3883  {
-
3884  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
3885  0x00000000, 0x00, 0x00,
-
3886  0x00000000, 0x00, 0x00,
-
3887  0x00, NULL, 0x00,
-
3888  NULL, 0x00, 0x00); /* qspi write read */
-
3889  if (res != 0) /* check result */
-
3890  {
-
3891  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
3892 
-
3893  return 1; /* return error */
-
3894  }
-
3895  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
3896  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
3897  0x00000000, 0x00, 0x00,
-
3898  0x00000000, 0x00, 0x00,
-
3899  0, (uint8_t *)buf, 0x01,
-
3900  NULL, 0x00, 1); /* spi write read */
-
3901  if (res != 0) /* check result */
-
3902  {
-
3903  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
3904 
-
3905  return 1; /* return error */
-
3906  }
-
3907  }
-
3908  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_DUAL_OUTPUT, 1,
-
3909  addr, 1, 3,
-
3910  0x00000000, 0x00, 0x00,
-
3911  8, NULL, 0x00, /* spi write */
-
3912  data, len, 2); /* spi write read */
-
3913  if (res != 0) /* check result */
-
3914  {
-
3915  handle->debug_print("w25qxx: fast read dual output failed.\n"); /* fast read dual output failed */
-
3916 
-
3917  return 1; /* return error */
-
3918  }
-
3919  }
-
3920  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
3921  {
-
3922  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_DUAL_OUTPUT, 1,
-
3923  addr, 1, 4,
-
3924  0x00000000, 0x00, 0x00,
-
3925  8, NULL, 0x00, /* spi write */
-
3926  data, len, 2); /* spi write read */
-
3927  if (res != 0) /* check result */
-
3928  {
-
3929  handle->debug_print("w25qxx: fast read dual output failed.\n"); /* fast read dual output failed */
-
3930 
-
3931  return 1; /* return error */
-
3932  }
-
3933  }
-
3934  else
-
3935  {
-
3936  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
3937 
-
3938  return 4; /* return error */
-
3939  }
-
3940  }
-
3941  else
-
3942  {
-
3943  handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
-
3944 
-
3945  return 5; /* return error */
-
3946  }
-
3947 
-
3948  return 0; /* success return 0 */
-
3949 }
-
3950 
-
3967 uint8_t w25qxx_fast_read_quad_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
-
3968 {
-
3969  uint8_t res;
-
3970  uint8_t buf[1];
-
3971 
-
3972  if (handle == NULL) /* check handle */
-
3973  {
-
3974  return 2; /* return error */
-
3975  }
-
3976  if (handle->inited != 1) /* check handle initialization */
-
3977  {
-
3978  return 3; /* return error */
-
3979  }
-
3980 
-
3981  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
3982  {
-
3983  if (handle->dual_quad_spi_enable == 0) /* check spi */
-
3984  {
-
3985  handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
-
3986 
-
3987  return 6; /* return error */
-
3988  }
-
3989  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
3990  {
-
3991  if (handle->type >= W25Q256) /* >128Mb */
-
3992  {
-
3993  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
3994  0x00000000, 0x00, 0x00,
-
3995  0x00000000, 0x00, 0x00,
-
3996  0x00, NULL, 0x00,
-
3997  NULL, 0x00, 0x00); /* qspi write read */
-
3998  if (res != 0) /* check result */
-
3999  {
-
4000  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
4001 
-
4002  return 1; /* return error */
-
4003  }
-
4004  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
4005  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
4006  0x00000000, 0x00, 0x00,
-
4007  0x00000000, 0x00, 0x00,
-
4008  0, (uint8_t *)buf, 0x01,
-
4009  NULL, 0x00, 1); /* spi write read */
-
4010  if (res != 0) /* check result */
-
4011  {
-
4012  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
4013 
-
4014  return 1; /* return error */
-
4015  }
-
4016  }
-
4017  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_QUAD_OUTPUT, 1,
-
4018  addr, 1, 3,
-
4019  0x00000000, 0x00, 0x00,
-
4020  8, NULL, 0x00, /* spi write */
-
4021  data, len, 4); /* spi write read */
-
4022  if (res != 0) /* check result */
-
4023  {
-
4024  handle->debug_print("w25qxx: fast read quad output failed.\n"); /* fast read quad output failed */
-
4025 
-
4026  return 1; /* return error */
-
4027  }
-
4028  }
-
4029  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
4030  {
-
4031  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_QUAD_OUTPUT, 1,
-
4032  addr, 1, 4,
-
4033  0x00000000, 0x00, 0x00,
-
4034  8, NULL, 0x00, /* spi write */
-
4035  data, len, 4); /* spi write read */
-
4036  if (res != 0) /* check result */
-
4037  {
-
4038  handle->debug_print("w25qxx: fast read quad output failed.\n"); /* fast read quad output failed */
-
4039 
-
4040  return 1; /* return error */
-
4041  }
-
4042  }
-
4043  else
-
4044  {
-
4045  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
4046 
-
4047  return 4; /* return error */
-
4048  }
-
4049  }
-
4050  else
-
4051  {
-
4052  handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
-
4053 
-
4054  return 5; /* return error */
-
4055  }
-
4056 
-
4057  return 0; /* success return 0 */
-
4058 }
-
4059 
-
4076 uint8_t w25qxx_fast_read_dual_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
-
4077 {
-
4078  uint8_t res;
-
4079  uint8_t buf[1];
-
4080 
-
4081  if (handle == NULL) /* check handle */
-
4082  {
-
4083  return 2; /* return error */
-
4084  }
-
4085  if (handle->inited != 1) /* check handle initialization */
-
4086  {
-
4087  return 3; /* return error */
-
4088  }
-
4089 
-
4090  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
4091  {
-
4092  if (handle->dual_quad_spi_enable == 0) /* check spi */
-
4093  {
-
4094  handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
-
4095 
-
4096  return 6; /* return error */
-
4097  }
-
4098  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
4099  {
-
4100  if (handle->type >= W25Q256) /* >128Mb */
-
4101  {
-
4102  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
4103  0x00000000, 0x00, 0x00,
-
4104  0x00000000, 0x00, 0x00,
-
4105  0x00, NULL, 0x00,
-
4106  NULL, 0x00, 0x00); /* qspi write read */
-
4107  if (res != 0) /* check result */
-
4108  {
-
4109  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
4110 
-
4111  return 1; /* return error */
-
4112  }
-
4113  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
4114  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
4115  0x00000000, 0x00, 0x00,
-
4116  0x00000000, 0x00, 0x00,
-
4117  0, (uint8_t *)buf, 0x01,
-
4118  NULL, 0x00, 1); /* spi write read */
-
4119  if (res != 0) /* check result */
-
4120  {
-
4121  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
4122 
-
4123  return 1; /* return error */
-
4124  }
-
4125  }
-
4126  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_DUAL_IO, 1,
-
4127  addr, 2, 3,
-
4128  0x000000FF, 2, 1,
-
4129  0, NULL, 0x00, /* spi write */
-
4130  data, len, 2); /* spi write read */
-
4131  if (res != 0) /* check result */
-
4132  {
-
4133  handle->debug_print("w25qxx: fast read dual io failed.\n"); /* fast read dual io failed */
-
4134 
-
4135  return 1; /* return error */
-
4136  }
-
4137  }
-
4138  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
4139  {
-
4140  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_DUAL_IO, 1,
-
4141  addr, 2, 4,
-
4142  0x000000FF, 2, 1,
-
4143  0, NULL, 0x00, /* spi write */
-
4144  data, len, 2); /* spi write read */
-
4145  if (res != 0) /* check result */
-
4146  {
-
4147  handle->debug_print("w25qxx: fast read dual io failed.\n"); /* fast read io output failed */
-
4148 
-
4149  return 1; /* return error */
-
4150  }
-
4151  }
-
4152  else
-
4153  {
-
4154  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
4155 
-
4156  return 4; /* return error */
-
4157  }
-
4158  }
-
4159  else
-
4160  {
-
4161  handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
-
4162 
-
4163  return 5; /* return error */
-
4164  }
-
4165 
-
4166  return 0; /* success return 0 */
-
4167 }
-
4168 
-
4184 uint8_t w25qxx_fast_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
-
4185 {
-
4186  uint8_t res;
-
4187  uint8_t buf[1];
-
4188 
-
4189  if (handle == NULL) /* check handle */
-
4190  {
-
4191  return 2; /* return error */
-
4192  }
-
4193  if (handle->inited != 1) /* check handle initialization */
-
4194  {
-
4195  return 3; /* return error */
-
4196  }
-
4197 
-
4198  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
4199  {
-
4200  if (handle->dual_quad_spi_enable == 0) /* check spi */
-
4201  {
-
4202  handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
-
4203 
-
4204  return 6; /* return error */
-
4205  }
-
4206  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
4207  {
-
4208  if (handle->type >= W25Q256) /* >128Mb */
-
4209  {
-
4210  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
4211  0x00000000, 0x00, 0x00,
-
4212  0x00000000, 0x00, 0x00,
-
4213  0x00, NULL, 0x00,
-
4214  NULL, 0x00, 0x00); /* qspi write read */
-
4215  if (res != 0) /* check result */
-
4216  {
-
4217  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
4218 
-
4219  return 1; /* return error */
-
4220  }
-
4221  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
4222  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
4223  0x00000000, 0x00, 0x00,
-
4224  0x00000000, 0x00, 0x00,
-
4225  0, (uint8_t *)buf, 0x01,
-
4226  NULL, 0x00, 1); /* spi write read */
-
4227  if (res != 0) /* check result */
-
4228  {
-
4229  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
4230 
-
4231  return 1; /* return error */
-
4232  }
-
4233  }
-
4234  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_QUAD_IO, 1,
-
4235  addr, 4, 3,
-
4236  0x000000FF, 4, 1,
-
4237  4, NULL, 0x00, /* spi write */
-
4238  data, len, 4); /* spi write read */
-
4239  if (res != 0) /* check result */
-
4240  {
-
4241  handle->debug_print("w25qxx: fast read quad io failed.\n"); /* fast read quad io failed */
-
4242 
-
4243  return 1; /* return error */
-
4244  }
-
4245  }
-
4246  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
4247  {
-
4248  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_QUAD_IO, 1,
-
4249  addr, 4, 4,
-
4250  0x000000FF, 4, 1,
-
4251  4, NULL, 0x00, /* spi write */
-
4252  data, len, 4); /* spi write read */
-
4253  if (res != 0) /* check result */
-
4254  {
-
4255  handle->debug_print("w25qxx: fast read quad io failed.\n"); /* fast quad io output failed */
-
4256 
-
4257  return 1; /* return error */
-
4258  }
-
4259  }
-
4260  else
-
4261  {
-
4262  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
4263 
-
4264  return 4; /* return error */
-
4265  }
-
4266  }
-
4267  else
-
4268  {
-
4269  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
4270  {
-
4271  if (handle->type >= W25Q256) /* >128Mb */
-
4272  {
-
4273  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
4274  0x00000000, 0x00, 0x00,
-
4275  0x00000000, 0x00, 0x00,
-
4276  0x00, NULL, 0x00,
-
4277  NULL, 0x00, 0x00); /* qspi write read */
-
4278  if (res != 0) /* check result */
-
4279  {
-
4280  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
4281 
-
4282  return 1; /* return error */
-
4283  }
-
4284  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
4285  res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
-
4286  0x00000000, 0x00, 0x00,
-
4287  0x00000000, 0x00, 0x00,
-
4288  0, (uint8_t *)buf, 0x01,
-
4289  NULL, 0x00, 4); /* spi write read */
-
4290  if (res != 0) /* check result */
-
4291  {
-
4292  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
4293 
-
4294  return 1; /* return error */
-
4295  }
-
4296  }
-
4297  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_QUAD_IO, 4,
-
4298  addr, 4, 3,
-
4299  0x000000FF, 4, 1,
-
4300  handle->dummy, NULL, 0x00,
-
4301  data, len, 4); /* spi write read */
-
4302  if (res != 0) /* check result */
-
4303  {
-
4304  handle->debug_print("w25qxx: fast read quad io failed.\n"); /* fast read quad io failed */
-
4305 
-
4306  return 1; /* return error */
-
4307  }
-
4308  }
-
4309  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
4310  {
-
4311  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_QUAD_IO, 4,
-
4312  addr, 4, 4,
-
4313  0x000000FF, 4, 1,
-
4314  handle->dummy, NULL, 0x00,
-
4315  data, len, 4); /* spi write read */
-
4316  if (res != 0) /* check result */
-
4317  {
-
4318  handle->debug_print("w25qxx: fast read quad io failed.\n"); /* fast quad io output failed */
-
4319 
-
4320  return 1; /* return error */
-
4321  }
-
4322  }
-
4323  else
-
4324  {
-
4325  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
4326 
-
4327  return 4; /* return error */
-
4328  }
-
4329  }
-
4330 
-
4331  return 0; /* success return 0 */
-
4332 }
-
4333 
-
4350 uint8_t w25qxx_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
-
4351 {
-
4352  uint8_t res;
-
4353  uint8_t buf[1];
-
4354 
-
4355  if (handle == NULL) /* check handle */
-
4356  {
-
4357  return 2; /* return error */
-
4358  }
-
4359  if (handle->inited != 1) /* check handle initialization */
-
4360  {
-
4361  return 3; /* return error */
-
4362  }
-
4363 
-
4364  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
4365  {
-
4366  if (handle->dual_quad_spi_enable == 0) /* check spi */
-
4367  {
-
4368  handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
-
4369 
-
4370  return 6; /* return error */
-
4371  }
-
4372  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
4373  {
-
4374  if (handle->type >= W25Q256) /* >128Mb */
-
4375  {
-
4376  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
4377  0x00000000, 0x00, 0x00,
-
4378  0x00000000, 0x00, 0x00,
-
4379  0x00, NULL, 0x00,
-
4380  NULL, 0x00, 0x00); /* qspi write read */
-
4381  if (res != 0) /* check result */
-
4382  {
-
4383  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
4384 
-
4385  return 1; /* return error */
-
4386  }
-
4387  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
4388  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
4389  0x00000000, 0x00, 0x00,
-
4390  0x00000000, 0x00, 0x00,
-
4391  0, (uint8_t *)buf, 0x01,
-
4392  NULL, 0x00, 1); /* spi write read */
-
4393  if (res != 0) /* check result */
-
4394  {
-
4395  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
4396 
-
4397  return 1; /* return error */
-
4398  }
-
4399  }
-
4400  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WORD_READ_QUAD_IO, 1,
-
4401  addr, 4, 3,
-
4402  0x000000FF, 4, 1,
-
4403  2, NULL, 0x00, /* spi write */
-
4404  data, len, 4); /* spi write read */
-
4405  if (res != 0) /* check result */
-
4406  {
-
4407  handle->debug_print("w25qxx: word read quad io failed.\n"); /* word read quad io failed */
-
4408 
-
4409  return 1; /* return error */
-
4410  }
-
4411  }
-
4412  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
4413  {
-
4414  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WORD_READ_QUAD_IO, 1,
-
4415  addr, 4, 4,
-
4416  0x000000FF, 4, 1,
-
4417  2, NULL, 0x00, /* spi write */
-
4418  data, len, 4); /* spi write read */
-
4419  if (res != 0) /* check result */
-
4420  {
-
4421  handle->debug_print("w25qxx: word read quad io failed.\n"); /* word read quad io failed */
-
4422 
-
4423  return 1; /* return error */
-
4424  }
-
4425  }
-
4426  else
-
4427  {
-
4428  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
4429 
-
4430  return 4; /* return error */
-
4431  }
-
4432  }
-
4433  else
-
4434  {
-
4435  handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
-
4436 
-
4437  return 5; /* return error */
-
4438  }
-
4439 
-
4440  return 0; /* success return 0 */
-
4441 }
-
4442 
-
4459 uint8_t w25qxx_octal_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
-
4460 {
-
4461  uint8_t res;
-
4462  uint8_t buf[1];
-
4463 
-
4464  if (handle == NULL) /* check handle */
-
4465  {
-
4466  return 2; /* return error */
-
4467  }
-
4468  if (handle->inited != 1) /* check handle initialization */
-
4469  {
-
4470  return 3; /* return error */
-
4471  }
-
4472 
-
4473  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
4474  {
-
4475  if (handle->dual_quad_spi_enable == 0) /* check spi */
-
4476  {
-
4477  handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
-
4478 
-
4479  return 6; /* return error */
-
4480  }
-
4481  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
4482  {
-
4483  if (handle->type >= W25Q256) /* >128Mb */
-
4484  {
-
4485  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
4486  0x00000000, 0x00, 0x00,
-
4487  0x00000000, 0x00, 0x00,
-
4488  0x00, NULL, 0x00,
-
4489  NULL, 0x00, 0x00); /* qspi write read */
-
4490  if (res != 0) /* check result */
-
4491  {
-
4492  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
4493 
-
4494  return 1; /* return error */
-
4495  }
-
4496  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
4497  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
4498  0x00000000, 0x00, 0x00,
-
4499  0x00000000, 0x00, 0x00,
-
4500  0, (uint8_t *)buf, 0x01,
-
4501  NULL, 0x00, 1); /* spi write read */
-
4502  if (res != 0) /* check result */
-
4503  {
-
4504  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
4505 
-
4506  return 1; /* return error */
-
4507  }
-
4508  }
-
4509  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_OCTAL_WORD_READ_QUAD_IO, 1,
-
4510  addr, 4, 3,
-
4511  0x000000FF, 4, 1,
-
4512  0, NULL, 0x00, /* spi write */
-
4513  data, len, 4); /* spi write read */
-
4514  if (res != 0) /* check result */
-
4515  {
-
4516  handle->debug_print("w25qxx: octal word read quad io failed.\n"); /* octal word read quad io failed */
-
4517 
-
4518  return 1; /* return error */
-
4519  }
-
4520  }
-
4521  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
4522  {
-
4523  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_OCTAL_WORD_READ_QUAD_IO, 1,
-
4524  addr, 4, 4,
-
4525  0x000000FF, 4, 1,
-
4526  0, NULL, 0x00, /* spi write */
-
4527  data, len, 4); /* spi write read */
-
4528  if (res != 0) /* check result */
-
4529  {
-
4530  handle->debug_print("w25qxx: octal word read quad io failed.\n"); /* octal word read quad io failed */
-
4531 
-
4532  return 1; /* return error */
-
4533  }
-
4534  }
-
4535  else
-
4536  {
-
4537  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
4538 
-
4539  return 4; /* return error */
-
4540  }
-
4541  }
-
4542  else
-
4543  {
-
4544  handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
-
4545 
-
4546  return 5; /* return error */
-
4547  }
-
4548 
-
4549  return 0; /* success return 0 */
-
4550 }
-
4551 
-
4569 uint8_t w25qxx_page_program(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
-
4570 {
-
4571  uint8_t res;
-
4572  uint8_t status;
-
4573  uint32_t timeout;
-
4574  uint8_t buf[2];
-
4575 
-
4576  if (handle == NULL) /* check handle */
-
4577  {
-
4578  return 2; /* return error */
-
4579  }
-
4580  if (handle->inited != 1) /* check handle initialization */
-
4581  {
-
4582  return 3; /* return error */
-
4583  }
-
4584  if ((addr % 256) != 0) /* check address */
-
4585  {
-
4586  handle->debug_print("w25qxx: addr is invalid.\n"); /* addr is invalid */
-
4587 
-
4588  return 4; /* return error */
-
4589  }
-
4590  if (len > 256) /* check address */
-
4591  {
-
4592  handle->debug_print("w25qxx: length is over 256.\n"); /* length is over 256 */
-
4593 
-
4594  return 7; /* return error */
-
4595  }
-
4596 
-
4597  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
4598  {
-
4599  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
4600  {
-
4601  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
4602  0x00000000, 0x00, 0x00,
-
4603  0x00000000, 0x00, 0x00,
-
4604  0x00, NULL, 0x00,
-
4605  NULL, 0x00, 0x00); /* qspi write read */
-
4606  if (res != 0) /* check result */
-
4607  {
-
4608  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
4609 
-
4610  return 1; /* return error */
-
4611  }
-
4612  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
4613  {
-
4614  if (handle->type >= W25Q256) /* >128Mb */
-
4615  {
-
4616  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
4617  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
4618  0x00000000, 0x00, 0x00,
-
4619  0x00000000, 0x00, 0x00,
-
4620  0, (uint8_t *)buf, 0x01,
-
4621  NULL, 0x00, 1); /* spi write read */
-
4622  if (res != 0) /* check result */
-
4623  {
-
4624  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
4625 
-
4626  return 1; /* return error */
-
4627  }
-
4628  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
4629  0x00000000, 0x00, 0x00,
-
4630  0x00000000, 0x00, 0x00,
-
4631  0x00, NULL, 0x00,
-
4632  NULL, 0x00, 0x00); /* qspi write read */
-
4633  if (res != 0) /* check result */
-
4634  {
-
4635  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
4636 
-
4637  return 1; /* return error */
-
4638  }
-
4639  }
-
4640  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_PAGE_PROGRAM, 1,
-
4641  addr, 1, 3,
-
4642  0x00000000, 0x00, 0x00,
-
4643  0, data, len,
-
4644  NULL, 0x00, 1); /* spi write read */
-
4645  if (res != 0) /* check result */
-
4646  {
-
4647  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
4648 
-
4649  return 1; /* return error */
-
4650  }
-
4651  }
-
4652  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
4653  {
-
4654  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_PAGE_PROGRAM, 1,
-
4655  addr, 1, 4,
-
4656  0x00000000, 0x00, 0x00,
-
4657  0, data, len,
-
4658  NULL, 0x00, 1); /* spi write read */
-
4659  if (res != 0) /* check result */
-
4660  {
-
4661  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
4662 
-
4663  return 1; /* return error */
-
4664  }
-
4665  }
-
4666  else
-
4667  {
-
4668  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
4669 
-
4670  return 5; /* return error */
-
4671  }
-
4672 
-
4673  timeout = 3 * 100; /* max 3 ms */
-
4674  while (timeout != 0) /* check timeout */
-
4675  {
-
4676  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
-
4677  0x00000000, 0x00, 0x00,
-
4678  0x00000000, 0x00, 0x00,
-
4679  0, NULL, 0,
-
4680  (uint8_t *)&status, 1, 1); /* spi write read */
-
4681  if (res != 0) /* check result */
-
4682  {
-
4683  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
4684 
-
4685  return 1; /* return error */
-
4686  }
-
4687  if ((status & 0x01) == 0x00) /* check status */
-
4688  {
-
4689  break; /* break */
-
4690  }
-
4691  timeout--; /* timeout-- */
-
4692  handle->delay_us(10); /* delay 10 us */
-
4693  }
-
4694  if (timeout == 0)
-
4695  {
-
4696  handle->debug_print("w25qxx: page program timeout.\n"); /* page program timeout */
-
4697 
-
4698  return 6; /* return error */
-
4699  }
-
4700  }
-
4701  else /* single spi */
-
4702  {
-
4703  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
4704  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
4705  if (res != 0) /* check result */
-
4706  {
-
4707  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
4708 
-
4709  return 1; /* return error */
-
4710  }
-
4711  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
4712  {
-
4713  if (handle->type >= W25Q256) /* >128Mb */
-
4714  {
-
4715  buf[0] = 0xC5; /* write extended addr register command */
-
4716  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
4717  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
-
4718  if (res != 0) /* check result */
-
4719  {
-
4720  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
4721 
-
4722  return 1; /* return error */
-
4723  }
-
4724  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
4725  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
4726  if (res != 0) /* check result */
-
4727  {
-
4728  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
4729 
-
4730  return 1; /* return error */
-
4731  }
-
4732  }
-
4733  handle->buf[0] = W25QXX_COMMAND_PAGE_PROGRAM; /* page program command */
-
4734  handle->buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
4735  handle->buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
4736  handle->buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
4737  memcpy(&handle->buf[4], data, len); /* copy data */
-
4738  res = a_w25qxx_spi_write_read(handle, (uint8_t *)handle->buf, 4 + len, NULL, 0); /* spi write read */
-
4739  if (res != 0) /* check result */
-
4740  {
-
4741  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
4742 
-
4743  return 1; /* return error */
-
4744  }
-
4745  }
-
4746  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE)
-
4747  && (handle->type >= W25Q256)) /* 4 address mode */
-
4748  {
-
4749  handle->buf[0] = W25QXX_COMMAND_PAGE_PROGRAM; /* page program command */
-
4750  handle->buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
4751  handle->buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
4752  handle->buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
4753  handle->buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
4754  memcpy(&handle->buf[5], data, len); /* copy data */
-
4755  res = a_w25qxx_spi_write_read(handle, (uint8_t *)handle->buf, 5 + len, NULL, 0); /* spi write read */
-
4756  if (res != 0) /* check result */
-
4757  {
-
4758  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
4759 
-
4760  return 1; /* return error */
-
4761  }
-
4762  }
-
4763  else
-
4764  {
-
4765  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
4766 
-
4767  return 5; /* return error */
-
4768  }
-
4769 
-
4770  timeout = 3 * 100; /* max 3 ms */
-
4771  while (timeout != 0) /* check timeout */
-
4772  {
-
4773  buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
-
4774  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, (uint8_t *)&status, 1); /* spi write read */
-
4775  if (res != 0) /* check result */
-
4776  {
-
4777  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
4778 
-
4779  return 1; /* return error */
-
4780  }
-
4781  if ((status & 0x01) == 0x00) /* check status */
-
4782  {
-
4783  break; /* break */
-
4784  }
-
4785  timeout--; /* timeout-- */
-
4786  handle->delay_us(10); /* delay 10 us */
-
4787  }
-
4788  if (timeout == 0)
-
4789  {
-
4790  handle->debug_print("w25qxx: page program timeout.\n"); /* page program timeout */
-
4791 
-
4792  return 6; /* return error */
-
4793  }
-
4794  }
-
4795  }
-
4796  else
-
4797  {
-
4798  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
4799  0x00000000, 0x00, 0x00,
-
4800  0x00000000, 0x00, 0x00,
-
4801  0x00, NULL, 0x00,
-
4802  NULL, 0x00, 0x00); /* qspi write read */
-
4803  if (res != 0) /* check result */
-
4804  {
-
4805  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
4806 
-
4807  return 1; /* return error */
-
4808  }
-
4809  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
4810  {
-
4811  if (handle->type >= W25Q256) /* >128Mb */
-
4812  {
-
4813  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
4814  res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
-
4815  0x00000000, 0x00, 0x00,
-
4816  0x00000000, 0x00, 0x00,
-
4817  0, (uint8_t *)buf, 0x01,
-
4818  NULL, 0x00, 4); /* spi write read */
-
4819  if (res != 0) /* check result */
-
4820  {
-
4821  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
4822 
-
4823  return 1; /* return error */
-
4824  }
-
4825  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
4826  0x00000000, 0x00, 0x00,
-
4827  0x00000000, 0x00, 0x00,
-
4828  0x00, NULL, 0x00,
-
4829  NULL, 0x00, 0x00); /* qspi write read */
-
4830  if (res != 0) /* check result */
-
4831  {
-
4832  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
4833 
-
4834  return 1; /* return error */
-
4835  }
-
4836  }
-
4837  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_PAGE_PROGRAM, 4,
-
4838  addr, 4, 3,
-
4839  0x00000000, 0x00, 0x00,
-
4840  0, data, len,
-
4841  NULL, 0x00, 4); /* spi write read */
-
4842  if (res != 0) /* check result */
-
4843  {
-
4844  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
4845 
-
4846  return 1; /* return error */
-
4847  }
-
4848  }
-
4849  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
4850  {
-
4851  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_PAGE_PROGRAM, 4,
-
4852  addr, 4, 4,
-
4853  0x00000000, 0x00, 0x00,
-
4854  0, data, len,
-
4855  NULL, 0x00, 4); /* spi write read */
-
4856  if (res != 0) /* check result */
-
4857  {
-
4858  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
4859 
-
4860  return 1; /* return error */
-
4861  }
-
4862  }
-
4863  else
-
4864  {
-
4865  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
4866 
-
4867  return 5; /* return error */
-
4868  }
-
4869 
-
4870  timeout = 3 * 100; /* max 3 ms */
-
4871  while (timeout != 0) /* check timeout */
-
4872  {
-
4873  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
-
4874  0x00000000, 0x00, 0x00,
-
4875  0x00000000, 0x00, 0x00,
-
4876  0, NULL, 0,
-
4877  (uint8_t *)&status, 1, 4); /* spi write read */
-
4878  if (res != 0) /* check result */
-
4879  {
-
4880  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
4881 
-
4882  return 1; /* return error */
-
4883  }
-
4884  if ((status & 0x01) == 0x00) /* check status */
-
4885  {
-
4886  break; /* break */
-
4887  }
-
4888  timeout--; /* timeout-- */
-
4889  handle->delay_us(10); /* delay 10 us */
-
4890  }
-
4891  if (timeout == 0)
-
4892  {
-
4893  handle->debug_print("w25qxx: page program timeout.\n"); /* page program timeout */
-
4894 
-
4895  return 6; /* return error */
-
4896  }
-
4897  }
-
4898 
-
4899  return 0; /* success return 0 */
-
4900 }
-
4901 
-
4920 uint8_t w25qxx_page_program_quad_input(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
-
4921 {
-
4922  uint8_t res;
-
4923  uint8_t status;
-
4924  uint32_t timeout;
-
4925  uint8_t buf[2];
-
4926 
-
4927  if (handle == NULL) /* check handle */
-
4928  {
-
4929  return 2; /* return error */
-
4930  }
-
4931  if (handle->inited != 1) /* check handle initialization */
-
4932  {
-
4933  return 3; /* return error */
-
4934  }
-
4935  if ((addr % 256) != 0) /* check address */
-
4936  {
-
4937  handle->debug_print("w25qxx: addr is invalid.\n"); /* addr is invalid */
-
4938 
-
4939  return 4; /* return error */
-
4940  }
-
4941  if (len > 256) /* check address */
-
4942  {
-
4943  handle->debug_print("w25qxx: length is over 256.\n"); /* length is over 256 */
-
4944 
-
4945  return 7; /* return error */
-
4946  }
-
4947 
-
4948  if (handle->spi_qspi == W25QXX_INTERFACE_QSPI) /* qspi interface */
-
4949  {
-
4950  handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
-
4951 
-
4952  return 5; /* return error */
-
4953  }
-
4954  else
-
4955  {
-
4956  if (handle->dual_quad_spi_enable == 0) /* check spi */
-
4957  {
-
4958  handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
-
4959 
-
4960  return 8; /* return error */
-
4961  }
-
4962  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
4963  0x00000000, 0x00, 0x00,
-
4964  0x00000000, 0x00, 0x00,
-
4965  0x00, NULL, 0x00,
-
4966  NULL, 0x00, 0x00); /* qspi write read */
-
4967  if (res != 0) /* check result */
-
4968  {
-
4969  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
4970 
-
4971  return 1; /* return error */
-
4972  }
-
4973  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
4974  {
-
4975  if (handle->type >= W25Q256) /* >128Mb */
-
4976  {
-
4977  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
4978  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
4979  0x00000000, 0x00, 0x00,
-
4980  0x00000000, 0x00, 0x00,
-
4981  0, (uint8_t *)buf, 0x01,
-
4982  NULL, 0x00, 1); /* spi write read */
-
4983  if (res != 0) /* check result */
-
4984  {
-
4985  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
4986 
-
4987  return 1; /* return error */
-
4988  }
-
4989  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
4990  0x00000000, 0x00, 0x00,
-
4991  0x00000000, 0x00, 0x00,
-
4992  0x00, NULL, 0x00,
-
4993  NULL, 0x00, 0x00); /* qspi write read */
-
4994  if (res != 0) /* check result */
-
4995  {
-
4996  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
4997 
-
4998  return 1; /* return error */
-
4999  }
-
5000  }
-
5001  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_QUAD_PAGE_PROGRAM, 1,
-
5002  addr, 1, 3,
-
5003  0x00000000, 0x00, 0x00,
-
5004  0, data, len,
-
5005  NULL, 0x00, 4); /* spi write read */
-
5006  if (res != 0) /* check result */
-
5007  {
-
5008  handle->debug_print("w25qxx: quad page program failed.\n"); /* quad page program failed */
-
5009 
-
5010  return 1; /* return error */
-
5011  }
-
5012  }
-
5013  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
5014  {
-
5015  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_QUAD_PAGE_PROGRAM, 1,
-
5016  addr, 1, 4,
-
5017  0x00000000, 0x00, 0x00,
-
5018  0, data, len,
-
5019  NULL, 0x00, 4); /* spi write read */
-
5020  if (res != 0) /* check result */
-
5021  {
-
5022  handle->debug_print("w25qxx: quad page program failed.\n"); /* quad page program failed */
-
5023 
-
5024  return 1; /* return error */
-
5025  }
-
5026  }
-
5027  else
-
5028  {
-
5029  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
5030 
-
5031  return 5; /* return error */
-
5032  }
-
5033 
-
5034  timeout = 3 * 100; /* max 3 ms */
-
5035  while (timeout != 0) /* check timeout */
-
5036  {
-
5037  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
-
5038  0x00000000, 0x00, 0x00,
-
5039  0x00000000, 0x00, 0x00,
-
5040  0, NULL, 0,
-
5041  (uint8_t *)&status, 1, 1); /* spi write read */
-
5042  if (res != 0) /* check result */
-
5043  {
-
5044  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
5045 
-
5046  return 1; /* return error */
-
5047  }
-
5048  if ((status & 0x01) == 0x00) /* check status */
-
5049  {
-
5050  break; /* break */
-
5051  }
-
5052  timeout--; /* timeout-- */
-
5053  handle->delay_us(10); /* delay 10 us */
-
5054  }
-
5055  if (timeout == 0)
-
5056  {
-
5057  handle->debug_print("w25qxx: quad page program timeout.\n"); /* quad page program timeout */
-
5058 
-
5059  return 6; /* return error */
-
5060  }
-
5061  }
-
5062 
-
5063  return 0; /* success return 0 */
-
5064 }
-
5065 
-
5080 uint8_t w25qxx_sector_erase_4k(w25qxx_handle_t *handle, uint32_t addr)
-
5081 {
-
5082  uint8_t res;
-
5083  uint8_t status;
-
5084  uint32_t timeout;
-
5085  uint8_t buf[5];
-
5086 
-
5087  if (handle == NULL) /* check handle */
-
5088  {
-
5089  return 2; /* return error */
-
5090  }
-
5091  if (handle->inited != 1) /* check handle initialization */
-
5092  {
-
5093  return 3; /* return error */
-
5094  }
-
5095  if ((addr % 4096) != 0) /* check address */
-
5096  {
-
5097  handle->debug_print("w25qxx: addr is invalid.\n"); /* addr is invalid */
-
5098 
-
5099  return 4; /* return error */
-
5100  }
-
5101 
-
5102  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
5103  {
-
5104  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
5105  {
-
5106  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
5107  0x00000000, 0x00, 0x00,
-
5108  0x00000000, 0x00, 0x00,
-
5109  0x00, NULL, 0x00,
-
5110  NULL, 0x00, 0x00); /* qspi write read */
-
5111  if (res != 0) /* check result */
-
5112  {
-
5113  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5114 
-
5115  return 1; /* return error */
-
5116  }
-
5117  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
5118  {
-
5119  if (handle->type >= W25Q256) /* >128Mb */
-
5120  {
-
5121  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
5122  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
5123  0x00000000, 0x00, 0x00,
-
5124  0x00000000, 0x00, 0x00,
-
5125  0, (uint8_t *)buf, 0x01,
-
5126  NULL, 0x00, 1); /* spi write read */
-
5127  if (res != 0) /* check result */
-
5128  {
-
5129  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
5130 
-
5131  return 1; /* return error */
-
5132  }
-
5133  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
5134  0x00000000, 0x00, 0x00,
-
5135  0x00000000, 0x00, 0x00,
-
5136  0x00, NULL, 0x00,
-
5137  NULL, 0x00, 0x00); /* qspi write read */
-
5138  if (res != 0) /* check result */
-
5139  {
-
5140  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5141 
-
5142  return 1; /* return error */
-
5143  }
-
5144  }
-
5145  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_SECTOR_ERASE_4K, 1,
-
5146  addr, 1, 3,
-
5147  0x00000000, 0x00, 0x00,
-
5148  0, NULL, 0x00,
-
5149  NULL, 0x00, 0x00); /* spi write read */
-
5150  if (res != 0) /* check result */
-
5151  {
-
5152  handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
-
5153 
-
5154  return 1; /* return error */
-
5155  }
-
5156  }
-
5157  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
5158  {
-
5159  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_SECTOR_ERASE_4K, 1,
-
5160  addr, 1, 4,
-
5161  0x00000000, 0x00, 0x00,
-
5162  0, NULL, 0x00,
-
5163  NULL, 0x00, 0x00); /* spi write read */
-
5164  if (res != 0) /* check result */
-
5165  {
-
5166  handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
-
5167 
-
5168  return 1; /* return error */
-
5169  }
-
5170  }
-
5171  else
-
5172  {
-
5173  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
5174 
-
5175  return 5; /* return error */
-
5176  }
-
5177 
-
5178  timeout = 400; /* max 400 ms */
-
5179  while (timeout != 0) /* check timeout */
-
5180  {
-
5181  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
-
5182  0x00000000, 0x00, 0x00,
-
5183  0x00000000, 0x00, 0x00,
-
5184  0, NULL, 0,
-
5185  (uint8_t *)&status, 1, 1); /* spi write read */
-
5186  if (res != 0) /* check result */
-
5187  {
-
5188  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
5189 
-
5190  return 1; /* return error */
-
5191  }
-
5192  if ((status & 0x01) == 0x00) /* check status */
-
5193  {
-
5194  break; /* break */
-
5195  }
-
5196  timeout--; /* timeout-- */
-
5197  handle->delay_ms(1); /* delay 1 ms */
-
5198  }
-
5199  if (timeout == 0)
-
5200  {
-
5201  handle->debug_print("w25qxx: sector erase 4k timeout.\n"); /* sector erase 4k timeout */
-
5202 
-
5203  return 6; /* return error */
-
5204  }
-
5205  }
-
5206  else /* single spi */
-
5207  {
-
5208  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
5209  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
5210  if (res != 0) /* check result */
-
5211  {
-
5212  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5213 
-
5214  return 1; /* return error */
-
5215  }
-
5216  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
5217  {
-
5218  if (handle->type >= W25Q256) /* >128Mb */
-
5219  {
-
5220  buf[0] = 0xC5; /* write extended addr register command */
-
5221  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
5222  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
-
5223  if (res != 0) /* check result */
-
5224  {
-
5225  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
5226 
-
5227  return 1; /* return error */
-
5228  }
-
5229  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
5230  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
5231  if (res != 0) /* check result */
-
5232  {
-
5233  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5234 
-
5235  return 1; /* return error */
-
5236  }
-
5237  }
-
5238  buf[0] = W25QXX_COMMAND_SECTOR_ERASE_4K; /* sector erase 4k command */
-
5239  buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
5240  buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
5241  buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
5242  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, NULL, 0); /* spi write read */
-
5243  if (res != 0) /* check result */
-
5244  {
-
5245  handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
-
5246 
-
5247  return 1; /* return error */
-
5248  }
-
5249  }
-
5250  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE)
-
5251  && (handle->type >= W25Q256))
-
5252  {
-
5253  buf[0] = W25QXX_COMMAND_SECTOR_ERASE_4K; /* sector erase 4k command */
-
5254  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
5255  buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
5256  buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
5257  buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
5258  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, NULL, 0); /* spi write read */
-
5259  if (res != 0) /* check result */
-
5260  {
-
5261  handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
-
5262 
-
5263  return 1; /* return error */
-
5264  }
-
5265  }
-
5266  else
-
5267  {
-
5268  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
5269 
-
5270  return 5; /* return error */
-
5271  }
-
5272 
-
5273  timeout = 400; /* max 400 ms */
-
5274  while (timeout != 0) /* check timeout */
-
5275  {
-
5276  buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
-
5277  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, (uint8_t *)&status, 1); /* spi write read */
-
5278  if (res != 0) /* check result */
-
5279  {
-
5280  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
5281 
-
5282  return 1; /* return error */
-
5283  }
-
5284  if ((status & 0x01) == 0x00) /* check status */
-
5285  {
-
5286  break; /* break */
-
5287  }
-
5288  timeout--; /* timeout-- */
-
5289  handle->delay_ms(1); /* delay 1 ms */
-
5290  }
-
5291  if (timeout == 0)
-
5292  {
-
5293  handle->debug_print("w25qxx: sector erase 4k timeout.\n"); /* sector erase 4k timeout */
-
5294 
-
5295  return 6; /* return error */
-
5296  }
-
5297  }
-
5298  }
-
5299  else
-
5300  {
-
5301  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
5302  0x00000000, 0x00, 0x00,
-
5303  0x00000000, 0x00, 0x00,
-
5304  0x00, NULL, 0x00,
-
5305  NULL, 0x00, 0x00); /* qspi write read */
-
5306  if (res != 0) /* check result */
-
5307  {
-
5308  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5309 
-
5310  return 1; /* return error */
-
5311  }
-
5312  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
5313  {
-
5314  if (handle->type >= W25Q256) /* >128Mb */
-
5315  {
-
5316  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
5317  res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
-
5318  0x00000000, 0x00, 0x00,
-
5319  0x00000000, 0x00, 0x00,
-
5320  0, (uint8_t *)buf, 0x01,
-
5321  NULL, 0x00, 4); /* spi write read */
-
5322  if (res != 0) /* check result */
-
5323  {
-
5324  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
5325 
-
5326  return 1; /* return error */
-
5327  }
-
5328  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
5329  0x00000000, 0x00, 0x00,
-
5330  0x00000000, 0x00, 0x00,
-
5331  0x00, NULL, 0x00,
-
5332  NULL, 0x00, 0x00); /* qspi write read */
-
5333  if (res != 0) /* check result */
-
5334  {
-
5335  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5336 
-
5337  return 1; /* return error */
-
5338  }
-
5339  }
-
5340  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_SECTOR_ERASE_4K, 4,
-
5341  addr, 4, 3,
-
5342  0x00000000, 0x00, 0x00,
-
5343  0, NULL, 0x00,
-
5344  NULL, 0x00, 0x00); /* spi write read */
-
5345  if (res != 0) /* check result */
-
5346  {
-
5347  handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
-
5348 
-
5349  return 1; /* return error */
-
5350  }
-
5351  }
-
5352  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
5353  {
-
5354  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_SECTOR_ERASE_4K, 4,
-
5355  addr, 4, 4,
-
5356  0x00000000, 0x00, 0x00,
-
5357  0, NULL, 0x00,
-
5358  NULL, 0x00, 0x00); /* spi write read */
-
5359  if (res != 0) /* check result */
-
5360  {
-
5361  handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
-
5362 
-
5363  return 1; /* return error */
-
5364  }
-
5365  }
-
5366  else
-
5367  {
-
5368  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
5369 
-
5370  return 5; /* return error */
-
5371  }
-
5372 
-
5373  timeout = 400; /* max 400 ms */
-
5374  while (timeout != 0) /* check timeout */
-
5375  {
-
5376  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
-
5377  0x00000000, 0x00, 0x00,
-
5378  0x00000000, 0x00, 0x00,
-
5379  0, NULL, 0,
-
5380  (uint8_t *)&status, 1, 4); /* spi write read */
-
5381  if (res != 0) /* check result */
-
5382  {
-
5383  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
5384 
-
5385  return 1; /* return error */
-
5386  }
-
5387  if ((status & 0x01) == 0x00) /* check status */
-
5388  {
-
5389  break; /* break */
-
5390  }
-
5391  timeout--; /* timeout-- */
-
5392  handle->delay_ms(1); /* delay 1 ms */
-
5393  }
-
5394  if (timeout == 0)
-
5395  {
-
5396  handle->debug_print("w25qxx: sector erase 4k timeout.\n"); /* sector erase 4k timeout */
-
5397 
-
5398  return 6; /* return error */
-
5399  }
-
5400  }
-
5401 
-
5402  return 0; /* success return 0 */
-
5403 }
-
5404 
-
5419 uint8_t w25qxx_block_erase_32k(w25qxx_handle_t *handle, uint32_t addr)
-
5420 {
-
5421  uint8_t res;
-
5422  uint8_t status;
-
5423  uint32_t timeout;
-
5424  uint8_t buf[5];
-
5425 
-
5426  if (handle == NULL) /* check handle */
-
5427  {
-
5428  return 2; /* return error */
-
5429  }
-
5430  if (handle->inited != 1) /* check handle initialization */
-
5431  {
-
5432  return 3; /* return error */
-
5433  }
-
5434  if ((addr % (32 * 1024)) != 0) /* check address */
-
5435  {
-
5436  handle->debug_print("w25qxx: addr is invalid.\n"); /* addr is invalid */
-
5437 
-
5438  return 4; /* return error */
-
5439  }
-
5440 
-
5441  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
5442  {
-
5443  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
5444  {
-
5445  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
5446  0x00000000, 0x00, 0x00,
-
5447  0x00000000, 0x00, 0x00,
-
5448  0x00, NULL, 0x00,
-
5449  NULL, 0x00, 0x00); /* qspi write read */
-
5450  if (res != 0) /* check result */
-
5451  {
-
5452  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5453 
-
5454  return 1; /* return error */
-
5455  }
-
5456  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
5457  {
-
5458  if (handle->type >= W25Q256) /* >128Mb */
-
5459  {
-
5460  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
5461  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
5462  0x00000000, 0x00, 0x00,
-
5463  0x00000000, 0x00, 0x00,
-
5464  0, (uint8_t *)buf, 0x01,
-
5465  NULL, 0x00, 1); /* spi write read */
-
5466  if (res != 0) /* check result */
-
5467  {
-
5468  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
5469 
-
5470  return 1; /* return error */
-
5471  }
-
5472  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
5473  0x00000000, 0x00, 0x00,
-
5474  0x00000000, 0x00, 0x00,
-
5475  0x00, NULL, 0x00,
-
5476  NULL, 0x00, 0x00); /* qspi write read */
-
5477  if (res != 0) /* check result */
-
5478  {
-
5479  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5480 
-
5481  return 1; /* return error */
-
5482  }
-
5483  }
-
5484  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_BLOCK_ERASE_32K, 1,
-
5485  addr, 1, 3,
-
5486  0x00000000, 0x00, 0x00,
-
5487  0, NULL, 0x00,
-
5488  NULL, 0x00, 0x00); /* spi write read */
-
5489  if (res != 0) /* check result */
-
5490  {
-
5491  handle->debug_print("w25qxx: block erase 32k failed.\n"); /* block erase 32k failed */
-
5492 
-
5493  return 1; /* return error */
-
5494  }
-
5495  }
-
5496  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
5497  {
-
5498  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_BLOCK_ERASE_32K, 1,
-
5499  addr, 1, 4,
-
5500  0x00000000, 0x00, 0x00,
-
5501  0, NULL, 0x00,
-
5502  NULL, 0x00, 0x00); /* spi write read */
-
5503  if (res != 0) /* check result */
-
5504  {
-
5505  handle->debug_print("w25qxx: block erase 32k failed.\n"); /* block erase 32k failed */
-
5506 
-
5507  return 1; /* return error */
-
5508  }
-
5509  }
-
5510  else
-
5511  {
-
5512  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
5513 
-
5514  return 5; /* return error */
-
5515  }
-
5516 
-
5517  timeout = 1600; /* max 1600 ms */
-
5518  while (timeout != 0) /* check timeout */
-
5519  {
-
5520  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
-
5521  0x00000000, 0x00, 0x00,
-
5522  0x00000000, 0x00, 0x00,
-
5523  0, NULL, 0,
-
5524  (uint8_t *)&status, 1, 1); /* spi write read */
-
5525  if (res != 0) /* check result */
-
5526  {
-
5527  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
5528 
-
5529  return 1; /* return error */
-
5530  }
-
5531  if ((status & 0x01) == 0x00) /* check status */
-
5532  {
-
5533  break; /* break */
-
5534  }
-
5535  timeout--; /* timeout-- */
-
5536  handle->delay_ms(1); /* delay 1 ms */
-
5537  }
-
5538  if (timeout == 0)
-
5539  {
-
5540  handle->debug_print("w25qxx: block erase 32k timeout.\n"); /* block erase 32k timeout */
-
5541 
-
5542  return 6; /* return error */
-
5543  }
-
5544  }
-
5545  else /* single spi */
-
5546  {
-
5547  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
5548  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
5549  if (res != 0) /* check result */
-
5550  {
-
5551  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5552 
-
5553  return 1; /* return error */
-
5554  }
-
5555  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
5556  {
-
5557  if (handle->type >= W25Q256) /* >128Mb */
-
5558  {
-
5559  buf[0] = 0xC5; /* write extended addr register command */
-
5560  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
5561  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
-
5562  if (res != 0) /* check result */
-
5563  {
-
5564  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
5565 
-
5566  return 1; /* return error */
-
5567  }
-
5568  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
5569  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
5570  if (res != 0) /* check result */
-
5571  {
-
5572  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5573 
-
5574  return 1; /* return error */
-
5575  }
-
5576  }
-
5577  buf[0] = W25QXX_COMMAND_BLOCK_ERASE_32K; /* block erase 32k command */
-
5578  buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
5579  buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
5580  buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
5581  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, NULL, 0); /* spi write read */
-
5582  if (res != 0) /* check result */
-
5583  {
-
5584  handle->debug_print("w25qxx: block erase 32k failed.\n"); /* block erase 32k failed */
-
5585 
-
5586  return 1; /* return error */
-
5587  }
-
5588  }
-
5589  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE)
-
5590  && (handle->type >= W25Q256))
-
5591  {
-
5592  buf[0] = W25QXX_COMMAND_BLOCK_ERASE_32K; /* block erase 32k command */
-
5593  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
5594  buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
5595  buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
5596  buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
5597  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, NULL, 0); /* spi write read */
-
5598  if (res != 0) /* check result */
-
5599  {
-
5600  handle->debug_print("w25qxx: block erase 32k failed.\n"); /* block erase 32k failed */
-
5601 
-
5602  return 1; /* return error */
-
5603  }
-
5604  }
-
5605  else
-
5606  {
-
5607  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
5608 
-
5609  return 5; /* return error */
-
5610  }
-
5611 
-
5612  timeout = 1600; /* max 1600 ms */
-
5613  while (timeout != 0) /* check timeout */
-
5614  {
-
5615  buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
-
5616  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, (uint8_t *)&status, 1); /* spi write read */
-
5617  if (res != 0) /* check result */
-
5618  {
-
5619  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
5620 
-
5621  return 1; /* return error */
-
5622  }
-
5623  if ((status & 0x01) == 0x00) /* check status */
-
5624  {
-
5625  break; /* break */
-
5626  }
-
5627  timeout--; /* timeout-- */
-
5628  handle->delay_ms(1); /* delay 1 ms */
-
5629  }
-
5630  if (timeout == 0)
-
5631  {
-
5632  handle->debug_print("w25qxx: block erase 32k timeout.\n"); /* block erase 32k timeout */
-
5633 
-
5634  return 6; /* return error */
-
5635  }
-
5636  }
-
5637  }
-
5638  else
-
5639  {
-
5640  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
5641  0x00000000, 0x00, 0x00,
-
5642  0x00000000, 0x00, 0x00,
-
5643  0x00, NULL, 0x00,
-
5644  NULL, 0x00, 0x00); /* qspi write read */
-
5645  if (res != 0) /* check result */
-
5646  {
-
5647  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5648 
-
5649  return 1; /* return error */
-
5650  }
-
5651  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
5652  {
-
5653  if (handle->type >= W25Q256) /* >128Mb */
-
5654  {
-
5655  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
5656  res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
-
5657  0x00000000, 0x00, 0x00,
-
5658  0x00000000, 0x00, 0x00,
-
5659  0, (uint8_t *)buf, 0x01,
-
5660  NULL, 0x00, 4); /* spi write read */
-
5661  if (res != 0) /* check result */
-
5662  {
-
5663  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
5664 
-
5665  return 1; /* return error */
-
5666  }
-
5667  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
5668  0x00000000, 0x00, 0x00,
-
5669  0x00000000, 0x00, 0x00,
-
5670  0x00, NULL, 0x00,
-
5671  NULL, 0x00, 0x00); /* qspi write read */
-
5672  if (res != 0) /* check result */
-
5673  {
-
5674  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5675 
-
5676  return 1; /* return error */
-
5677  }
-
5678  }
-
5679  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_BLOCK_ERASE_32K, 4,
-
5680  addr, 4, 3,
-
5681  0x00000000, 0x00, 0x00,
-
5682  0, NULL, 0x00,
-
5683  NULL, 0x00, 0x00); /* spi write read */
-
5684  if (res != 0) /* check result */
-
5685  {
-
5686  handle->debug_print("w25qxx: block erase 32k failed.\n"); /* block erase 32k failed */
-
5687 
-
5688  return 1; /* return error */
-
5689  }
-
5690  }
-
5691  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
5692  {
-
5693  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_BLOCK_ERASE_32K, 4,
-
5694  addr, 4, 4,
-
5695  0x00000000, 0x00, 0x00,
-
5696  0, NULL, 0x00,
-
5697  NULL, 0x00, 0x00); /* spi write read */
-
5698  if (res != 0) /* check result */
-
5699  {
-
5700  handle->debug_print("w25qxx: block erase 32k failed.\n"); /* block erase 32k failed */
-
5701 
-
5702  return 1; /* return error */
-
5703  }
-
5704  }
-
5705  else
-
5706  {
-
5707  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
5708 
-
5709  return 5; /* return error */
-
5710  }
-
5711 
-
5712  timeout = 1600; /* max 1600 ms */
-
5713  while (timeout != 0) /* check timeout */
-
5714  {
-
5715  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
-
5716  0x00000000, 0x00, 0x00,
-
5717  0x00000000, 0x00, 0x00,
-
5718  0, NULL, 0,
-
5719  (uint8_t *)&status, 1, 4); /* spi write read */
-
5720  if (res != 0) /* check result */
-
5721  {
-
5722  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
5723 
-
5724  return 1; /* return error */
-
5725  }
-
5726  if ((status & 0x01) == 0x00) /* check status */
-
5727  {
-
5728  break; /* break */
-
5729  }
-
5730  timeout--; /* timeout-- */
-
5731  handle->delay_ms(1); /* delay 1 ms */
-
5732  }
-
5733  if (timeout == 0)
-
5734  {
-
5735  handle->debug_print("w25qxx: block erase 32k timeout.\n"); /* block erase 32k timeout */
-
5736 
-
5737  return 6; /* return error */
-
5738  }
-
5739  }
-
5740 
-
5741  return 0; /* success return 0 */
-
5742 }
-
5743 
-
5758 uint8_t w25qxx_block_erase_64k(w25qxx_handle_t *handle, uint32_t addr)
-
5759 {
-
5760  uint8_t res;
-
5761  uint8_t status;
-
5762  uint32_t timeout;
-
5763  uint8_t buf[5];
-
5764 
-
5765  if (handle == NULL) /* check handle */
-
5766  {
-
5767  return 2; /* return error */
-
5768  }
-
5769  if (handle->inited != 1) /* check handle initialization */
-
5770  {
-
5771  return 3; /* return error */
-
5772  }
-
5773  if ((addr % (64 * 1024)) != 0) /* check address */
-
5774  {
-
5775  handle->debug_print("w25qxx: addr is invalid.\n"); /* addr is invalid */
-
5776 
-
5777  return 4; /* return error */
-
5778  }
-
5779 
-
5780  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
5781  {
-
5782  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
5783  {
-
5784  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
5785  0x00000000, 0x00, 0x00,
-
5786  0x00000000, 0x00, 0x00,
-
5787  0x00, NULL, 0x00,
-
5788  NULL, 0x00, 0x00); /* qspi write read */
-
5789  if (res != 0) /* check result */
-
5790  {
-
5791  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5792 
-
5793  return 1; /* return error */
-
5794  }
-
5795  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
5796  {
-
5797  if (handle->type >= W25Q256) /* >128Mb */
-
5798  {
-
5799  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
5800  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
5801  0x00000000, 0x00, 0x00,
-
5802  0x00000000, 0x00, 0x00,
-
5803  0, (uint8_t *)buf, 0x01,
-
5804  NULL, 0x00, 1); /* spi write read */
-
5805  if (res != 0) /* check result */
-
5806  {
-
5807  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
5808 
-
5809  return 1; /* return error */
-
5810  }
-
5811  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
5812  0x00000000, 0x00, 0x00,
-
5813  0x00000000, 0x00, 0x00,
-
5814  0x00, NULL, 0x00,
-
5815  NULL, 0x00, 0x00); /* qspi write read */
-
5816  if (res != 0) /* check result */
-
5817  {
-
5818  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5819 
-
5820  return 1; /* return error */
-
5821  }
-
5822  }
-
5823  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_BLOCK_ERASE_64K, 1,
-
5824  addr, 1, 3,
-
5825  0x00000000, 0x00, 0x00,
-
5826  0, NULL, 0x00,
-
5827  NULL, 0x00, 0x00); /* spi write read */
-
5828  if (res != 0) /* check result */
-
5829  {
-
5830  handle->debug_print("w25qxx: block erase 64k failed.\n"); /* block erase 64k failed */
-
5831 
-
5832  return 1; /* return error */
-
5833  }
-
5834  }
-
5835  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
5836  {
-
5837  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_BLOCK_ERASE_64K, 1,
-
5838  addr, 1, 4,
-
5839  0x00000000, 0x00, 0x00,
-
5840  0, NULL, 0x00,
-
5841  NULL, 0x00, 0x00); /* spi write read */
-
5842  if (res != 0) /* check result */
-
5843  {
-
5844  handle->debug_print("w25qxx: block erase 64k failed.\n"); /* block erase 64k failed */
-
5845 
-
5846  return 1; /* return error */
-
5847  }
-
5848  }
-
5849  else
-
5850  {
-
5851  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
5852 
-
5853  return 5; /* return error */
-
5854  }
-
5855 
-
5856  timeout = 2000; /* max 2000 ms */
-
5857  while (timeout != 0) /* check timeout */
-
5858  {
-
5859  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
-
5860  0x00000000, 0x00, 0x00,
-
5861  0x00000000, 0x00, 0x00,
-
5862  0, NULL, 0,
-
5863  (uint8_t *)&status, 1, 1); /* spi write read */
-
5864  if (res != 0) /* check result */
-
5865  {
-
5866  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
5867 
-
5868  return 1; /* return error */
-
5869  }
-
5870  if ((status & 0x01) == 0x00) /* check status */
-
5871  {
-
5872  break; /* break */
-
5873  }
-
5874  timeout--; /* timeout-- */
-
5875  handle->delay_ms(1); /* delay 1 ms */
-
5876  }
-
5877  if (timeout == 0)
-
5878  {
-
5879  handle->debug_print("w25qxx: block erase 64k timeout.\n"); /* block erase 64k timeout */
-
5880 
-
5881  return 6; /* return error */
-
5882  }
-
5883  }
-
5884  else /* single spi */
-
5885  {
-
5886  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
5887  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
5888  if (res != 0) /* check result */
-
5889  {
-
5890  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5891 
-
5892  return 1; /* return error */
-
5893  }
-
5894  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
5895  {
-
5896  if (handle->type >= W25Q256) /* >128Mb */
-
5897  {
-
5898  buf[0] = 0xC5; /* write extended addr register command */
-
5899  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
5900  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
-
5901  if (res != 0) /* check result */
-
5902  {
-
5903  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
5904 
-
5905  return 1; /* return error */
-
5906  }
-
5907  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
5908  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
5909  if (res != 0) /* check result */
-
5910  {
-
5911  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5912 
-
5913  return 1; /* return error */
-
5914  }
-
5915  }
-
5916  buf[0] = W25QXX_COMMAND_BLOCK_ERASE_64K; /* block erase 64k command */
-
5917  buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
5918  buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
5919  buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
5920  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, NULL, 0); /* spi write read */
-
5921  if (res != 0) /* check result */
-
5922  {
-
5923  handle->debug_print("w25qxx: block erase 64k failed.\n"); /* block erase 64k failed */
-
5924 
-
5925  return 1; /* return error */
-
5926  }
-
5927  }
-
5928  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
5929  {
-
5930  buf[0] = W25QXX_COMMAND_BLOCK_ERASE_64K; /* block erase 64k command */
-
5931  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
5932  buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
5933  buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
5934  buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
5935  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, NULL, 0); /* spi write read */
-
5936  if (res != 0) /* check result */
-
5937  {
-
5938  handle->debug_print("w25qxx: block erase 64k failed.\n"); /* block erase 64k failed */
-
5939 
-
5940  return 1; /* return error */
-
5941  }
-
5942  }
-
5943  else
-
5944  {
-
5945  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
5946 
-
5947  return 5; /* return error */
-
5948  }
-
5949 
-
5950  timeout = 2000; /* max 2000 ms */
-
5951  while (timeout != 0) /* check timeout */
-
5952  {
-
5953  buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
-
5954  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, (uint8_t *)&status, 1); /* spi write read */
-
5955  if (res != 0) /* check result */
-
5956  {
-
5957  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
5958 
-
5959  return 1; /* return error */
-
5960  }
-
5961  if ((status & 0x01) == 0x00) /* check status */
-
5962  {
-
5963  break; /* break */
-
5964  }
-
5965  timeout--; /* timeout-- */
-
5966  handle->delay_ms(1); /* delay 1 ms */
-
5967  }
-
5968  if (timeout == 0)
-
5969  {
-
5970  handle->debug_print("w25qxx: block erase 64k timeout.\n"); /* block erase 64k timeout */
-
5971 
-
5972  return 6; /* return error */
-
5973  }
-
5974  }
-
5975  }
-
5976  else
-
5977  {
-
5978  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
5979  0x00000000, 0x00, 0x00,
-
5980  0x00000000, 0x00, 0x00,
-
5981  0x00, NULL, 0x00,
-
5982  NULL, 0x00, 0x00); /* qspi write read */
-
5983  if (res != 0) /* check result */
-
5984  {
-
5985  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
5986 
-
5987  return 1; /* return error */
-
5988  }
-
5989  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
5990  {
-
5991  if (handle->type >= W25Q256) /* >128Mb */
-
5992  {
-
5993  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
5994  res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
-
5995  0x00000000, 0x00, 0x00,
-
5996  0x00000000, 0x00, 0x00,
-
5997  0, (uint8_t *)buf, 0x01,
-
5998  NULL, 0x00, 4); /* spi write read */
-
5999  if (res != 0) /* check result */
-
6000  {
-
6001  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
6002 
-
6003  return 1; /* return error */
-
6004  }
-
6005  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
6006  0x00000000, 0x00, 0x00,
-
6007  0x00000000, 0x00, 0x00,
-
6008  0x00, NULL, 0x00,
-
6009  NULL, 0x00, 0x00); /* qspi write read */
-
6010  if (res != 0) /* check result */
-
6011  {
-
6012  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
6013 
-
6014  return 1; /* return error */
-
6015  }
-
6016  }
-
6017  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_BLOCK_ERASE_64K, 4,
-
6018  addr, 4, 3,
-
6019  0x00000000, 0x00, 0x00,
-
6020  0, NULL, 0x00,
-
6021  NULL, 0x00, 0x00); /* spi write read */
-
6022  if (res != 0) /* check result */
-
6023  {
-
6024  handle->debug_print("w25qxx: block erase 64k failed.\n"); /* block erase 64k failed */
-
6025 
-
6026  return 1; /* return error */
-
6027  }
-
6028  }
-
6029  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
6030  {
-
6031  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_BLOCK_ERASE_64K, 4,
-
6032  addr, 4, 4,
-
6033  0x00000000, 0x00, 0x00,
-
6034  0, NULL, 0x00,
-
6035  NULL, 0x00, 0x00); /* spi write read */
-
6036  if (res != 0) /* check result */
-
6037  {
-
6038  handle->debug_print("w25qxx: block erase 64k failed.\n"); /* block erase 64k failed */
-
6039 
-
6040  return 1; /* return error */
-
6041  }
-
6042  }
-
6043  else
-
6044  {
-
6045  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
6046 
-
6047  return 5; /* return error */
-
6048  }
-
6049 
-
6050  timeout = 2000; /* max 2000 ms */
-
6051  while (timeout != 0) /* check timeout */
-
6052  {
-
6053  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
-
6054  0x00000000, 0x00, 0x00,
-
6055  0x00000000, 0x00, 0x00,
-
6056  0, NULL, 0,
-
6057  (uint8_t *)&status, 1, 4); /* spi write read */
-
6058  if (res != 0) /* check result */
-
6059  {
-
6060  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
6061 
-
6062  return 1; /* return error */
-
6063  }
-
6064  if ((status & 0x01) == 0x00) /* check status */
-
6065  {
-
6066  break; /* break */
-
6067  }
-
6068  timeout--; /* timeout-- */
-
6069  handle->delay_ms(1); /* delay 1 ms */
-
6070  }
-
6071  if (timeout == 0)
-
6072  {
-
6073  handle->debug_print("w25qxx: block erase 64k timeout.\n"); /* block erase 64k timeout */
-
6074 
-
6075  return 6; /* return error */
-
6076  }
-
6077  }
-
6078 
-
6079  return 0; /* success return 0 */
-
6080 }
-
6081 
-
6094 uint8_t w25qxx_individual_block_lock(w25qxx_handle_t *handle, uint32_t addr)
-
6095 {
-
6096  uint8_t res;
-
6097  uint8_t buf[5];
-
6098 
-
6099  if (handle == NULL) /* check handle */
-
6100  {
-
6101  return 2; /* return error */
-
6102  }
-
6103  if (handle->inited != 1) /* check handle initialization */
-
6104  {
-
6105  return 3; /* return error */
-
6106  }
-
6107 
-
6108  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
6109  {
-
6110  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
6111  {
-
6112  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
6113  {
-
6114  if (handle->type >= W25Q256) /* >128Mb */
-
6115  {
-
6116  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
6117  0x00000000, 0x00, 0x00,
-
6118  0x00000000, 0x00, 0x00,
-
6119  0x00, NULL, 0x00,
-
6120  NULL, 0x00, 0x00); /* qspi write read */
-
6121  if (res != 0) /* check result */
-
6122  {
-
6123  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
6124 
-
6125  return 1; /* return error */
-
6126  }
-
6127  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
6128  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
6129  0x00000000, 0x00, 0x00,
-
6130  0x00000000, 0x00, 0x00,
-
6131  0, (uint8_t *)buf, 0x01,
-
6132  NULL, 0x00, 1); /* spi write read */
-
6133  if (res != 0) /* check result */
-
6134  {
-
6135  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
6136 
-
6137  return 1; /* return error */
-
6138  }
-
6139  }
-
6140  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK, 1,
-
6141  addr, 1, 3,
-
6142  0x00000000, 0x00, 0x00,
-
6143  0, NULL, 0x00,
-
6144  NULL, 0x00, 0x00); /* spi write read */
-
6145  if (res != 0) /* check result */
-
6146  {
-
6147  handle->debug_print("w25qxx: individual block lock failed.\n"); /* individual block lock failed */
-
6148 
-
6149  return 1; /* return error */
-
6150  }
-
6151  }
-
6152  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
6153  {
-
6154  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK, 1,
-
6155  addr, 1, 4,
-
6156  0x00000000, 0x00, 0x00,
-
6157  0, NULL, 0x00,
-
6158  NULL, 0x00, 0x00); /* spi write read */
-
6159  if (res != 0) /* check result */
-
6160  {
-
6161  handle->debug_print("w25qxx: individual block lock failed.\n"); /* individual block lock failed */
-
6162 
-
6163  return 1; /* return error */
-
6164  }
-
6165  }
-
6166  else
-
6167  {
-
6168  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
6169 
-
6170  return 4; /* return error */
-
6171  }
-
6172  }
-
6173  else /* single spi */
-
6174  {
-
6175  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
6176  {
-
6177  if (handle->type >= W25Q256) /* >128Mb */
-
6178  {
-
6179  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
6180  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
6181  if (res != 0) /* check result */
-
6182  {
-
6183  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
6184 
-
6185  return 1; /* return error */
-
6186  }
-
6187  buf[0] = 0xC5; /* write extended addr register command */
-
6188  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
6189  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
-
6190  if (res != 0) /* check result */
-
6191  {
-
6192  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
6193 
-
6194  return 1; /* return error */
-
6195  }
-
6196  }
-
6197  buf[0] = W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK; /* individual block lock command */
-
6198  buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
6199  buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
6200  buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
6201  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, NULL, 0); /* spi write read */
-
6202  if (res != 0) /* check result */
-
6203  {
-
6204  handle->debug_print("w25qxx: individual block lock failed.\n"); /* individual block lock failed */
-
6205 
-
6206  return 1; /* return error */
-
6207  }
-
6208  }
-
6209  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
6210  {
-
6211  buf[0] = W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK; /* individual block lock command */
-
6212  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
6213  buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
6214  buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
6215  buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
6216  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, NULL, 0); /* spi write read */
-
6217  if (res != 0) /* check result */
-
6218  {
-
6219  handle->debug_print("w25qxx: individual block lock failed.\n"); /* individual block lock failed */
-
6220 
-
6221  return 1; /* return error */
-
6222  }
-
6223  }
-
6224  else
-
6225  {
-
6226  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
6227 
-
6228  return 4; /* return error */
-
6229  }
-
6230  }
-
6231  }
-
6232  else
-
6233  {
-
6234  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
6235  {
-
6236  if (handle->type >= W25Q256) /* >128Mb */
-
6237  {
-
6238  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
6239  0x00000000, 0x00, 0x00,
-
6240  0x00000000, 0x00, 0x00,
-
6241  0x00, NULL, 0x00,
-
6242  NULL, 0x00, 0x00); /* qspi write read */
-
6243  if (res != 0) /* check result */
-
6244  {
-
6245  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
6246 
-
6247  return 1; /* return error */
-
6248  }
-
6249  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
6250  res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
-
6251  0x00000000, 0x00, 0x00,
-
6252  0x00000000, 0x00, 0x00,
-
6253  0, (uint8_t *)buf, 0x01,
-
6254  NULL, 0x00, 4); /* spi write read */
-
6255  if (res != 0) /* check result */
-
6256  {
-
6257  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
6258 
-
6259  return 1; /* return error */
-
6260  }
-
6261  }
-
6262  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK, 4,
-
6263  addr, 4, 3,
-
6264  0x00000000, 0x00, 0x00,
-
6265  0, NULL, 0x00,
-
6266  NULL, 0x00, 0x00); /* spi write read */
-
6267  if (res != 0) /* check result */
-
6268  {
-
6269  handle->debug_print("w25qxx: individual block lock failed.\n"); /* individual block lock failed */
-
6270 
-
6271  return 1; /* return error */
-
6272  }
-
6273  }
-
6274  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
6275  {
-
6276  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK, 4,
-
6277  addr, 4, 4,
-
6278  0x00000000, 0x00, 0x00,
-
6279  0, NULL, 0x00,
-
6280  NULL, 0x00, 0x00); /* spi write read */
-
6281  if (res != 0) /* check result */
-
6282  {
-
6283  handle->debug_print("w25qxx: individual block lock failed.\n"); /* individual block lock failed */
-
6284 
-
6285  return 1; /* return error */
-
6286  }
-
6287  }
-
6288  else
-
6289  {
-
6290  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
6291 
-
6292  return 4; /* return error */
-
6293  }
-
6294  }
-
6295 
-
6296  return 0; /* success return 0 */
-
6297 }
-
6298 
-
6311 uint8_t w25qxx_individual_block_unlock(w25qxx_handle_t *handle, uint32_t addr)
-
6312 {
-
6313  uint8_t res;
-
6314  uint8_t buf[5];
-
6315 
-
6316  if (handle == NULL) /* check handle */
-
6317  {
-
6318  return 2; /* return error */
-
6319  }
-
6320  if (handle->inited != 1) /* check handle initialization */
-
6321  {
-
6322  return 3; /* return error */
-
6323  }
-
6324 
-
6325  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
6326  {
-
6327  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
6328  {
-
6329  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
6330  {
-
6331  if (handle->type >= W25Q256) /* >128Mb */
-
6332  {
-
6333  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
6334  0x00000000, 0x00, 0x00,
-
6335  0x00000000, 0x00, 0x00,
-
6336  0x00, NULL, 0x00,
-
6337  NULL, 0x00, 0x00); /* qspi write read */
-
6338  if (res != 0) /* check result */
-
6339  {
-
6340  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
6341 
-
6342  return 1; /* return error */
-
6343  }
-
6344  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
6345  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
6346  0x00000000, 0x00, 0x00,
-
6347  0x00000000, 0x00, 0x00,
-
6348  0, (uint8_t *)buf, 0x01,
-
6349  NULL, 0x00, 1); /* spi write read */
-
6350  if (res != 0) /* check result */
-
6351  {
-
6352  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
6353 
-
6354  return 1; /* return error */
-
6355  }
-
6356  }
-
6357  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK, 1,
-
6358  addr, 1, 3,
-
6359  0x00000000, 0x00, 0x00,
-
6360  0, NULL, 0x00,
-
6361  NULL, 0x00, 0x00); /* spi write read */
-
6362  if (res != 0) /* check result */
-
6363  {
-
6364  handle->debug_print("w25qxx: individual block unlock failed.\n"); /* individual unblock lock failed */
-
6365 
-
6366  return 1; /* return error */
-
6367  }
-
6368  }
-
6369  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
6370  {
-
6371  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK, 1,
-
6372  addr, 1, 4,
-
6373  0x00000000, 0x00, 0x00,
-
6374  0, NULL, 0x00,
-
6375  NULL, 0x00, 0x00); /* spi write read */
-
6376  if (res != 0) /* check result */
-
6377  {
-
6378  handle->debug_print("w25qxx: individual block unlock failed.\n"); /* individual block unlock failed */
-
6379 
-
6380  return 1; /* return error */
-
6381  }
-
6382  }
-
6383  else
-
6384  {
-
6385  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
6386 
-
6387  return 4; /* return error */
-
6388  }
-
6389  }
-
6390  else /* single spi */
-
6391  {
-
6392  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
6393  {
-
6394  if (handle->type >= W25Q256) /* >128Mb */
-
6395  {
-
6396  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
6397  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
6398  if (res != 0) /* check result */
-
6399  {
-
6400  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
6401 
-
6402  return 1; /* return error */
-
6403  }
-
6404  buf[0] = 0xC5; /* write extended addr register command */
-
6405  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
6406  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
-
6407  if (res != 0) /* check result */
-
6408  {
-
6409  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
6410 
-
6411  return 1; /* return error */
-
6412  }
-
6413  }
-
6414  buf[0] = W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK; /* individual block unlock command */
-
6415  buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
6416  buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
6417  buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
6418  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, NULL, 0); /* spi write read */
-
6419  if (res != 0) /* check result */
-
6420  {
-
6421  handle->debug_print("w25qxx: individual block unlock failed.\n"); /* individual block unlock failed */
-
6422 
-
6423  return 1; /* return error */
-
6424  }
-
6425  }
-
6426  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
6427  {
-
6428  buf[0] = W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK; /* individual block unlock command */
-
6429  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
6430  buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
6431  buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
6432  buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
6433  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, NULL, 0); /* spi write read */
-
6434  if (res != 0) /* check result */
-
6435  {
-
6436  handle->debug_print("w25qxx: individual block unlock failed.\n"); /* individual block unlock failed */
-
6437 
-
6438  return 1; /* return error */
-
6439  }
-
6440  }
-
6441  else
-
6442  {
-
6443  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
6444 
-
6445  return 4; /* return error */
-
6446  }
-
6447  }
-
6448  }
-
6449  else
-
6450  {
-
6451  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
6452  {
-
6453  if (handle->type >= W25Q256) /* >128Mb */
-
6454  {
-
6455  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
6456  0x00000000, 0x00, 0x00,
-
6457  0x00000000, 0x00, 0x00,
-
6458  0x00, NULL, 0x00,
-
6459  NULL, 0x00, 0x00); /* qspi write read */
-
6460  if (res != 0) /* check result */
-
6461  {
-
6462  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
6463 
-
6464  return 1; /* return error */
-
6465  }
-
6466  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
6467  res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
-
6468  0x00000000, 0x00, 0x00,
-
6469  0x00000000, 0x00, 0x00,
-
6470  0, (uint8_t *)buf, 0x01,
-
6471  NULL, 0x00, 4); /* spi write read */
-
6472  if (res != 0) /* check result */
-
6473  {
-
6474  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
6475 
-
6476  return 1; /* return error */
-
6477  }
-
6478  }
-
6479  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK, 4,
-
6480  addr, 4, 3,
-
6481  0x00000000, 0x00, 0x00,
-
6482  0, NULL, 0x00,
-
6483  NULL, 0x00, 0x00); /* spi write read */
-
6484  if (res != 0) /* check result */
-
6485  {
-
6486  handle->debug_print("w25qxx: individual block unlock failed.\n"); /* individual unblock lock failed */
-
6487 
-
6488  return 1; /* return error */
-
6489  }
-
6490  }
-
6491  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
6492  {
-
6493  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK, 4,
-
6494  addr, 4, 4,
-
6495  0x00000000, 0x00, 0x00,
-
6496  0, NULL, 0x00,
-
6497  NULL, 0x00, 0x00); /* spi write read */
-
6498  if (res != 0) /* check result */
-
6499  {
-
6500  handle->debug_print("w25qxx: individual block unlock failed.\n"); /* individual block unlock failed */
-
6501 
-
6502  return 1; /* return error */
-
6503  }
-
6504  }
-
6505  else
-
6506  {
-
6507  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
6508 
-
6509  return 4; /* return error */
-
6510  }
-
6511  }
-
6512 
-
6513  return 0; /* success return 0 */
-
6514 }
-
6515 
-
6529 uint8_t w25qxx_read_block_lock(w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
-
6530 {
-
6531  uint8_t res;
-
6532  uint8_t buf[5];
-
6533 
-
6534  if (handle == NULL) /* check handle */
-
6535  {
-
6536  return 2; /* return error */
-
6537  }
-
6538  if (handle->inited != 1) /* check handle initialization */
-
6539  {
-
6540  return 3; /* return error */
-
6541  }
-
6542 
-
6543  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
6544  {
-
6545  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
6546  {
-
6547  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
6548  {
-
6549  if (handle->type >= W25Q256) /* >128Mb */
-
6550  {
-
6551  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
6552  0x00000000, 0x00, 0x00,
-
6553  0x00000000, 0x00, 0x00,
-
6554  0x00, NULL, 0x00,
-
6555  NULL, 0x00, 0x00); /* qspi write read */
-
6556  if (res != 0) /* check result */
-
6557  {
-
6558  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
6559 
-
6560  return 1; /* return error */
-
6561  }
-
6562  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
6563  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
6564  0x00000000, 0x00, 0x00,
-
6565  0x00000000, 0x00, 0x00,
-
6566  0, (uint8_t *)buf, 0x01,
-
6567  NULL, 0x00, 1); /* spi write read */
-
6568  if (res != 0) /* check result */
-
6569  {
-
6570  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
6571 
-
6572  return 1; /* return error */
-
6573  }
-
6574  }
-
6575  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_BLOCK_LOCK, 1,
-
6576  addr, 1, 3,
-
6577  0x00000000, 0x00, 0x00,
-
6578  0, NULL, 0x00,
-
6579  value, 1, 1); /* spi write read */
-
6580  if (res != 0) /* check result */
-
6581  {
-
6582  handle->debug_print("w25qxx: read block lock failed.\n"); /* read block lock failed */
-
6583 
-
6584  return 1; /* return error */
-
6585  }
-
6586  }
-
6587  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
6588  {
-
6589  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_BLOCK_LOCK, 1,
-
6590  addr, 1, 4,
-
6591  0x00000000, 0x00, 0x00,
-
6592  0, NULL, 0x00,
-
6593  value, 1, 1); /* spi write read */
-
6594  if (res != 0) /* check result */
-
6595  {
-
6596  handle->debug_print("w25qxx: read block lock failed.\n"); /* read block lock failed */
-
6597 
-
6598  return 1; /* return error */
-
6599  }
-
6600  }
-
6601  else
-
6602  {
-
6603  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
6604 
-
6605  return 4; /* return error */
-
6606  }
-
6607  }
-
6608  else /* single spi */
-
6609  {
-
6610  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
6611  {
-
6612  if (handle->type >= W25Q256) /* >128Mb */
-
6613  {
-
6614  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
6615  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
6616  if (res != 0) /* check result */
-
6617  {
-
6618  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
6619 
-
6620  return 1; /* return error */
-
6621  }
-
6622  buf[0] = 0xC5; /* write extended addr register command */
-
6623  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
6624  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
-
6625  if (res != 0) /* check result */
-
6626  {
-
6627  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
6628 
-
6629  return 1; /* return error */
-
6630  }
-
6631  }
-
6632  buf[0] = W25QXX_COMMAND_READ_BLOCK_LOCK; /* read block lock command */
-
6633  buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
6634  buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
6635  buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
6636  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, value, 1); /* spi write read */
-
6637  if (res != 0) /* check result */
-
6638  {
-
6639  handle->debug_print("w25qxx: read block lock failed.\n"); /* read block lock failed */
-
6640 
-
6641  return 1; /* return error */
-
6642  }
-
6643  }
-
6644  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
6645  {
-
6646  buf[0] = W25QXX_COMMAND_READ_BLOCK_LOCK; /* read block lock command */
-
6647  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
6648  buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
6649  buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
6650  buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
6651  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, value, 1); /* spi write read */
-
6652  if (res != 0) /* check result */
-
6653  {
-
6654  handle->debug_print("w25qxx: read block lock failed.\n"); /* read block lock failed */
-
6655 
-
6656  return 1; /* return error */
-
6657  }
-
6658  }
-
6659  else
-
6660  {
-
6661  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
6662 
-
6663  return 4; /* return error */
-
6664  }
-
6665  }
-
6666  }
-
6667  else
-
6668  {
-
6669  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
6670  {
-
6671  if (handle->type >= W25Q256) /* >128Mb */
-
6672  {
-
6673  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
6674  0x00000000, 0x00, 0x00,
-
6675  0x00000000, 0x00, 0x00,
-
6676  0x00, NULL, 0x00,
-
6677  NULL, 0x00, 0x00); /* qspi write read */
-
6678  if (res != 0) /* check result */
-
6679  {
-
6680  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
6681 
-
6682  return 1; /* return error */
-
6683  }
-
6684  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
6685  res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
-
6686  0x00000000, 0x00, 0x00,
-
6687  0x00000000, 0x00, 0x00,
-
6688  0, (uint8_t *)buf, 0x01,
-
6689  NULL, 0x00, 4); /* spi write read */
-
6690  if (res != 0) /* check result */
-
6691  {
-
6692  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
6693 
-
6694  return 1; /* return error */
-
6695  }
-
6696  }
-
6697  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_BLOCK_LOCK, 4,
-
6698  addr, 4, 3,
-
6699  0x00000000, 0x00, 0x00,
-
6700  0, NULL, 0x00,
-
6701  value, 1, 4); /* spi write read */
-
6702  if (res != 0) /* check result */
-
6703  {
-
6704  handle->debug_print("w25qxx: read block lock failed.\n"); /* read block lock failed */
-
6705 
-
6706  return 1; /* return error */
-
6707  }
-
6708  }
-
6709  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
6710  {
-
6711  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_BLOCK_LOCK, 4,
-
6712  addr, 4, 4,
-
6713  0x00000000, 0x00, 0x00,
-
6714  0, NULL, 0x00,
-
6715  value, 1, 4); /* spi write read */
-
6716  if (res != 0) /* check result */
-
6717  {
-
6718  handle->debug_print("w25qxx: read block lock failed.\n"); /* read block lock failed */
-
6719 
-
6720  return 1; /* return error */
-
6721  }
-
6722  }
-
6723  else
-
6724  {
-
6725  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
6726 
-
6727  return 4; /* return error */
-
6728  }
-
6729  }
-
6730 
-
6731  return 0; /* success return 0 */
-
6732 }
-
6733 
-
6746 uint8_t w25qxx_set_burst_with_wrap(w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
-
6747 {
-
6748  uint8_t res;
-
6749  uint8_t buf[5];
-
6750 
-
6751  if (handle == NULL) /* check handle */
-
6752  {
-
6753  return 2; /* return error */
-
6754  }
-
6755  if (handle->inited != 1) /* check handle initialization */
-
6756  {
-
6757  return 3; /* return error */
-
6758  }
-
6759 
-
6760  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
6761  {
-
6762  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
6763  {
-
6764  buf[0] = wrap;
-
6765  res = a_w25qxx_qspi_write_read(handle,
-
6766  W25QXX_COMMAND_SET_BURST_WITH_WRAP, 1,
-
6767  0x00000000, 0x00, 0x00,
-
6768  0x00000000, 0x00, 0x00,
-
6769  3 * 8, (uint8_t *)buf, 1,
-
6770  NULL, 0x00, 1); /* spi write read */
-
6771  if (res != 0) /* check result */
-
6772  {
-
6773  handle->debug_print("w25qxx: set burst with wrap failed.\n"); /* set burst with wrap failed */
-
6774 
-
6775  return 1; /* return error */
-
6776  }
-
6777  }
-
6778  else /* single spi */
-
6779  {
-
6780  buf[0] = W25QXX_COMMAND_SET_BURST_WITH_WRAP; /* set burst with wrap command */
-
6781  buf[1] = 0x00; /* dummy */
-
6782  buf[2] = 0x00; /* dummy */
-
6783  buf[3] = 0x00; /* dummy */
-
6784  buf[4] = wrap; /* wrap */
-
6785  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, NULL, 0); /* spi write read */
-
6786  if (res != 0) /* check result */
-
6787  {
-
6788  handle->debug_print("w25qxx: set burst with wrap failed.\n"); /* set burst with wrap failed */
-
6789 
-
6790  return 1; /* return error */
-
6791  }
-
6792  }
-
6793  }
-
6794  else
-
6795  {
-
6796  handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
-
6797 
-
6798  return 4; /* return error */
-
6799  }
-
6800 
-
6801  return 0; /* success return 0 */
-
6802 }
-
6803 
-
6819 uint8_t w25qxx_init(w25qxx_handle_t *handle)
-
6820 {
-
6821  uint8_t res;
-
6822  uint8_t status;
-
6823  uint8_t buf[4];
-
6824  uint8_t out[2];
-
6825  uint16_t id;
-
6826 
-
6827  if (handle == NULL) /* check handle */
-
6828  {
-
6829  return 2; /* return error */
-
6830  }
-
6831  if (handle->debug_print == NULL) /* check debug_print */
-
6832  {
-
6833  return 3; /* return error */
-
6834  }
-
6835  if (handle->spi_qspi_init == NULL) /* check spi_qspi_init */
-
6836  {
-
6837  handle->debug_print("w25qxx: spi_qspi_init is null.\n"); /* spi_qspi_init is null */
-
6838 
-
6839  return 3; /* return error */
-
6840  }
-
6841  if (handle->spi_qspi_deinit == NULL) /* check spi_qspi_deinit */
-
6842  {
-
6843  handle->debug_print("w25qxx: spi_qspi_deinit is null.\n"); /* spi_qspi_deinit is null */
-
6844 
-
6845  return 3; /* return error */
-
6846  }
-
6847  if (handle->spi_qspi_write_read == NULL) /* check spi_qspi_write_read */
-
6848  {
-
6849  handle->debug_print("w25qxx: spi_qspi_write_read is null.\n"); /* spi_qspi_write_read is null */
-
6850 
-
6851  return 3; /* return error */
-
6852  }
-
6853  if (handle->delay_us == NULL) /* check delay_us */
-
6854  {
-
6855  handle->debug_print("w25qxx: delay_us is null.\n"); /* delay_us is null */
-
6856 
-
6857  return 3; /* return error */
-
6858  }
-
6859  if (handle->delay_ms == NULL) /* check delay_ms */
-
6860  {
-
6861  handle->debug_print("w25qxx: delay_ms is null.\n"); /* delay_ms is null */
-
6862 
-
6863  return 3; /* return error */
-
6864  }
-
6865 
-
6866  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
6867  {
-
6868  res = handle->spi_qspi_init(); /* spi init */
-
6869  if (res != 0) /* check result */
-
6870  {
-
6871  handle->debug_print("w25qxx: spi init failed.\n"); /* spi init failed */
-
6872 
-
6873  return 1; /* return error */
-
6874  }
-
6875  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
6876  {
-
6877  res = a_w25qxx_qspi_write_read(handle,
-
6878  W25QXX_COMMAND_RELEASE_POWER_DOWN, 1,
-
6879  0x00000000, 0x00, 0x00,
-
6880  0x00000000, 0x00, 0x00,
-
6881  3 * 8, NULL, 0x00,
-
6882  (uint8_t *)&id, 1, 1); /* spi write read */
-
6883  if (res != 0) /* check result */
-
6884  {
-
6885  handle->debug_print("w25qxx: release power down failed.\n"); /* release power down failed */
-
6886  (void)handle->spi_qspi_deinit();
-
6888  return 1; /* return error */
-
6889  }
-
6890  res = a_w25qxx_qspi_write_read(handle,
-
6891  W25QXX_COMMAND_ENABLE_RESET, 1,
-
6892  0x00000000, 0x00, 0x00,
-
6893  0x00000000, 0x00, 0x00,
-
6894  0x00, NULL, 0x00,
-
6895  NULL, 0x00, 0x00); /* spi write read */
-
6896  if (res != 0) /* check result */
-
6897  {
-
6898  handle->debug_print("w25qxx: enable reset failed.\n"); /* enable reset failed */
-
6899  (void)handle->spi_qspi_deinit();
-
6901  return 7; /* return error */
-
6902  }
-
6903  res = a_w25qxx_qspi_write_read(handle,
-
6904  W25QXX_COMMAND_RESET_DEVICE, 1,
-
6905  0x00000000, 0x00, 0x00,
-
6906  0x00000000, 0x00, 0x00,
-
6907  0x00, NULL, 0x00,
-
6908  NULL, 0x00, 0x00); /* spi write read */
-
6909  if (res != 0) /* check result */
-
6910  {
-
6911  handle->debug_print("w25qxx: reset device failed.\n"); /* reset device failed */
-
6912  (void)handle->spi_qspi_deinit();
-
6914  return 7; /* return error */
-
6915  }
-
6916  handle->delay_ms(10); /* delay 10 ms */
-
6917  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_MANUFACTURER, 1,
-
6918  0x00000000, 1, 3,
-
6919  0x00000000, 0x00, 0x00,
-
6920  0, NULL, 0x00,
-
6921  (uint8_t *)out, 2, 1); /* qspi write read */
-
6922  if (res != 0) /* check result */
-
6923  {
-
6924  handle->debug_print("w25qxx: get manufacturer device id failed.\n"); /* get manufacturer device id failed */
-
6925  (void)handle->spi_qspi_deinit();
-
6927  return 1; /* return error */
-
6928  }
-
6929  id = (uint16_t)out[0] << 8 | out[1]; /* set id */
-
6930  if (id != handle->type) /* check id */
-
6931  {
-
6932  handle->debug_print("w25qxx: id is invalid.\n"); /* id is invalid */
-
6933  (void)handle->spi_qspi_deinit();
-
6935  return 6; /* return error */
-
6936  }
-
6937  if (handle->type >= W25Q256)
-
6938  {
-
6939  res = a_w25qxx_qspi_write_read(handle, 0xE9, 1,
-
6940  0x00000000, 0, 0,
-
6941  0x00000000, 0x00, 0x00,
-
6942  0, NULL, 0x00,
-
6943  NULL, 0, 0); /* qspi write read */
-
6944  if (res != 0) /* check result */
-
6945  {
-
6946  handle->debug_print("w25qxx: enter 3 byte mode failed.\n"); /* enter 3 byte mode failed */
-
6947  (void)handle->spi_qspi_deinit();
-
6949  return 1; /* return error */
-
6950  }
-
6951  }
-
6952  }
-
6953  else /* single spi */
-
6954  {
-
6955  buf[0] = W25QXX_COMMAND_RELEASE_POWER_DOWN; /* release power down command */
-
6956  buf[1] = 0xFF; /* dummy */
-
6957  buf[2] = 0xFF; /* dummy */
-
6958  buf[3] = 0xFF; /* dummy */
-
6959  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4,
-
6960  (uint8_t *)&id, 1); /* spi write read */
-
6961  if (res != 0) /* check result */
-
6962  {
-
6963  handle->debug_print("w25qxx: release power down failed.\n"); /* release power down failed */
-
6964  (void)handle->spi_qspi_deinit();
-
6966  return 1; /* return error */
-
6967  }
-
6968  buf[0] = W25QXX_COMMAND_ENABLE_RESET; /* enable reset command */
-
6969  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
6970  if (res != 0) /* check result */
-
6971  {
-
6972  handle->debug_print("w25qxx: enable reset failed.\n"); /* enable reset failed */
-
6973  (void)handle->spi_qspi_deinit();
-
6975  return 7; /* return error */
-
6976  }
-
6977  buf[0] = W25QXX_COMMAND_RESET_DEVICE; /* reset device command */
-
6978  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
6979  if (res != 0) /* check result */
-
6980  {
-
6981  handle->debug_print("w25qxx: reset device failed.\n"); /* reset device failed */
-
6982  (void)handle->spi_qspi_deinit();
-
6984  return 7; /* return error */
-
6985  }
-
6986  handle->delay_ms(10); /* delay 10 ms */
-
6987  buf[0] = W25QXX_COMMAND_READ_MANUFACTURER; /* read manufacturer command */
-
6988  buf[1] = 0x00; /* dummy */
-
6989  buf[2] = 0x00; /* dummy */
-
6990  buf[3] = 0x00; /* dummy */
-
6991  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4,
-
6992  (uint8_t *)out, 2); /* spi write read */
-
6993  if (res != 0) /* check result */
-
6994  {
-
6995  handle->debug_print("w25qxx: get manufacturer device id failed.\n"); /* get manufacturer device id failed */
-
6996  (void)handle->spi_qspi_deinit();
-
6998  return 4; /* return error */
-
6999  }
-
7000  id = (uint16_t)out[0] << 8 | out[1]; /* set id */
-
7001  if (id != handle->type) /* check id */
-
7002  {
-
7003  handle->debug_print("w25qxx: id is invalid.\n"); /* id is invalid */
-
7004  (void)handle->spi_qspi_deinit();
-
7006  return 6; /* return error */
-
7007  }
-
7008  if (handle->type >= W25Q256)
-
7009  {
-
7010  buf[0] = 0xE9; /* 3 byte mode */
-
7011  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
7012  if (res != 0) /* check result */
-
7013  {
-
7014  handle->debug_print("w25qxx: set address mode failed.\n"); /* set address mode failed */
-
7015  (void)handle->spi_qspi_deinit();
-
7017  return 8; /* return error */
-
7018  }
-
7019  }
-
7020  }
-
7021  }
-
7022  else
-
7023  {
-
7024  res = handle->spi_qspi_init(); /* qspi init */
-
7025  if (res != 0) /* check result */
-
7026  {
-
7027  handle->debug_print("w25qxx: qspi init failed.\n"); /* qspi init failed */
-
7028 
-
7029  return 1; /* return error */
-
7030  }
-
7031  res = a_w25qxx_qspi_write_read(handle,
-
7032  W25QXX_COMMAND_RELEASE_POWER_DOWN, 1,
-
7033  0x00000000, 0x00, 0x00,
-
7034  0x00000000, 0x00, 0x00,
-
7035  3 * 8, NULL, 0x00,
-
7036  (uint8_t *)&id, 1, 1); /* spi write read */
-
7037  if (res != 0) /* check result */
-
7038  {
-
7039  handle->debug_print("w25qxx: release power down failed.\n"); /* release power down failed */
-
7040  (void)handle->spi_qspi_deinit();
-
7042  return 1; /* return error */
-
7043  }
-
7044  res = a_w25qxx_qspi_write_read(handle,
-
7045  W25QXX_COMMAND_ENABLE_RESET, 1,
-
7046  0x00000000, 0x00, 0x00,
-
7047  0x00000000, 0x00, 0x00,
-
7048  0x00, NULL, 0x00,
-
7049  NULL, 0x00, 0x00); /* spi write read */
-
7050  if (res != 0) /* check result */
-
7051  {
-
7052  handle->debug_print("w25qxx: enable reset failed.\n"); /* enable reset failed */
-
7053  (void)handle->spi_qspi_deinit();
-
7055  return 7; /* return error */
-
7056  }
-
7057  res = a_w25qxx_qspi_write_read(handle,
-
7058  W25QXX_COMMAND_RESET_DEVICE, 1,
-
7059  0x00000000, 0x00, 0x00,
-
7060  0x00000000, 0x00, 0x00,
-
7061  0x00, NULL, 0x00,
-
7062  NULL, 0x00, 0x00); /* spi write read */
-
7063  if (res != 0) /* check result */
-
7064  {
-
7065  handle->debug_print("w25qxx: reset device failed.\n"); /* reset device failed */
-
7066  (void)handle->spi_qspi_deinit();
-
7068  return 7; /* return error */
-
7069  }
-
7070  handle->delay_ms(10); /* delay 10 ms */
-
7071  res = a_w25qxx_qspi_write_read(handle,
-
7072  W25QXX_COMMAND_READ_STATUS_REG2, 1,
-
7073  0x00000000, 0x00, 0x00,
-
7074  0x00000000, 0x00, 0x00,
-
7075  0x00, NULL, 0x00,
-
7076  (uint8_t *)&status, 1, 1); /* spi write read */
-
7077  if (res != 0) /* check result */
-
7078  {
-
7079  handle->debug_print("w25qxx: read status 2 failed.\n"); /* read status 2 failed */
-
7080  (void)handle->spi_qspi_deinit();
-
7082  return 5; /* return error */
-
7083  }
-
7084  if ((status & 0x02) == 0) /* check status */
-
7085  {
-
7086  res = a_w25qxx_qspi_write_read(handle,
-
7087  W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 1,
-
7088  0x00000000, 0x00, 0x00,
-
7089  0x00000000, 0x00, 0x00,
-
7090  0x00, NULL, 0x00,
-
7091  NULL, 0x00, 0x00); /* spi write read */
-
7092  if (res != 0) /* check result */
-
7093  {
-
7094  handle->debug_print("w25qxx: set sr write enable failed.\n"); /* set sr write enable failed */
-
7095  (void)handle->spi_qspi_deinit();
-
7097  return 5; /* return error */
-
7098  }
-
7099  res = a_w25qxx_qspi_write_read(handle,
-
7100  W25QXX_COMMAND_WRITE_STATUS_REG2, 1,
-
7101  0x00000000, 0x00, 0x00,
-
7102  0x00000000, 0x00, 0x00,
-
7103  0x00, NULL, 0x00,
-
7104  NULL, 0x00, 0x00); /* spi write read */
-
7105  if (res != 0) /* check result */
-
7106  {
-
7107  handle->debug_print("w25qxx: write status 2 failed.\n"); /* write status 2 failed */
-
7108  (void)handle->spi_qspi_deinit();
-
7110  return 5; /* return error */
-
7111  }
-
7112  }
-
7113  res = a_w25qxx_qspi_write_read(handle,
-
7114  W25QXX_COMMAND_ENTER_QSPI_MODE, 1,
-
7115  0x00000000, 0x00, 0x00,
-
7116  0x00000000, 0x00, 0x00,
-
7117  0x00, NULL, 0x00,
-
7118  NULL, 0x00, 0x00); /* spi write read */
-
7119  if (res != 0) /* check result */
-
7120  {
-
7121  handle->debug_print("w25qxx: enter qspi failed.\n"); /* enter qspi failed */
-
7122  (void)handle->spi_qspi_deinit();
-
7124  return 5; /* return error */
-
7125  }
-
7126  handle->delay_ms(10); /* delay 10 ms */
-
7127  buf[0] = 3 << 4; /* set 8 read dummy */
-
7128  handle->param = buf[0]; /* set param */
-
7129  handle->dummy = 8; /* set dummy */
-
7130  res = a_w25qxx_qspi_write_read(handle, 0xC0, 4,
-
7131  0x00000000, 0x00, 0x00,
-
7132  0x00000000, 0x00, 0x00,
-
7133  0, (uint8_t *)buf, 1,
-
7134  NULL, 0x00, 4); /* qspi write read */
-
7135  if (res != 0) /* check result */
-
7136  {
-
7137  handle->debug_print("w25qxx: set read parameters failed.\n"); /* set read parameters failed */
-
7138  (void)handle->spi_qspi_deinit();
-
7140  return 5; /* return error */
-
7141  }
-
7142  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_MANUFACTURER, 4,
-
7143  0x00000000, 4, 3,
-
7144  0x00000000, 0x00, 0x00,
-
7145  0, NULL, 0x00,
-
7146  (uint8_t *)out, 2, 4); /* qspi write read */
-
7147  if (res != 0) /* check result */
-
7148  {
-
7149  handle->debug_print("w25qxx: get manufacturer device id failed.\n"); /* get manufacturer device id failed */
-
7150  (void)handle->spi_qspi_deinit();
-
7152  return 1; /* return error */
-
7153  }
-
7154  id = (uint16_t)out[0] << 8 | out[1]; /* set id */
-
7155  if (id != handle->type) /* check id */
-
7156  {
-
7157  handle->debug_print("w25qxx: id is invalid.\n"); /* id is invalid */
-
7158  (void)handle->spi_qspi_deinit();
-
7160  return 6; /* return error */
-
7161  }
-
7162  if (handle->type >= W25Q256)
-
7163  {
-
7164  res = a_w25qxx_qspi_write_read(handle, 0xE9, 4,
-
7165  0x00000000, 0, 0,
-
7166  0x00000000, 0x00, 0x00,
-
7167  0, NULL, 0x00,
-
7168  NULL, 0, 0); /* qspi write read */
-
7169  if (res != 0) /* check result */
-
7170  {
-
7171  handle->debug_print("w25qxx: enter 3 byte mode failed.\n"); /* enter 3 byte mode failed */
-
7172  (void)handle->spi_qspi_deinit();
-
7174  return 1; /* return error */
-
7175  }
-
7176  }
-
7177  }
-
7178  handle->address_mode = W25QXX_ADDRESS_MODE_3_BYTE; /* set address mode */
-
7179  handle->inited = 1; /* initialize inited */
-
7180 
-
7181  return 0; /* success return 0 */
-
7182 }
-
7183 
-
7195 uint8_t w25qxx_deinit(w25qxx_handle_t *handle)
-
7196 {
-
7197  uint8_t res;
-
7198  uint8_t buf[1];
-
7199 
-
7200  if (handle == NULL) /* check handle */
-
7201  {
-
7202  return 2; /* return error */
-
7203  }
-
7204  if (handle->inited != 1) /* check handle initialization */
-
7205  {
-
7206  return 3; /* return error */
-
7207  }
-
7208 
-
7209  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
7210  {
-
7211  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
7212  {
-
7213  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_POWER_DOWN, 1,
-
7214  0x00000000, 0x00, 0x00,
-
7215  0x00000000, 0x00, 0x00,
-
7216  0, NULL, 0x00,
-
7217  NULL, 0x00, 0); /* spi write read */
-
7218  if (res != 0) /* check result */
-
7219  {
-
7220  handle->debug_print("w25qxx: power down failed.\n"); /* power down failed */
-
7221 
-
7222  return 4; /* return error */
-
7223  }
-
7224  }
-
7225  else /* single spi */
-
7226  {
-
7227  buf[0] = W25QXX_COMMAND_POWER_DOWN; /* power down command */
-
7228  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf,
-
7229  1, NULL, 0); /* spi write read */
-
7230  if (res != 0) /* check result */
-
7231  {
-
7232  handle->debug_print("w25qxx: power down failed.\n"); /* power down failed */
-
7233 
-
7234  return 4; /* return error */
-
7235  }
-
7236  }
-
7237  }
-
7238  else /* qspi interface */
-
7239  {
-
7240  res = a_w25qxx_qspi_write_read(handle, 0xFF, 4,
-
7241  0x00000000, 0x00, 0x00,
-
7242  0x00000000, 0x00, 0x00,
-
7243  0, NULL, 0x00,
-
7244  NULL, 0x00, 0); /* spi write read */
-
7245  if (res != 0) /* check result */
-
7246  {
-
7247  handle->debug_print("w25qxx: exit qspi mode failed.\n"); /* exit qspi mode failed */
-
7248 
-
7249  return 1; /* return error */
-
7250  }
-
7251  handle->delay_ms(10); /* delay 10 ms */
-
7252  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_POWER_DOWN, 1,
-
7253  0x00000000, 0x00, 0x00,
-
7254  0x00000000, 0x00, 0x00,
-
7255  0, NULL, 0x00,
-
7256  NULL, 0x00, 0); /* spi write read */
-
7257  if (res != 0) /* check result */
-
7258  {
-
7259  handle->debug_print("w25qxx: power down failed.\n"); /* power down failed */
-
7260 
-
7261  return 4; /* return error */
-
7262  }
-
7263  }
-
7264  res = handle->spi_qspi_deinit(); /* qspi deinit */
-
7265  if (res != 0) /* check result */
-
7266  {
-
7267  handle->debug_print("w25qxx: spi or qspi deinit failed.\n"); /* spi or qspi deinit failed */
-
7268 
-
7269  return 1; /* return error */
-
7270  }
-
7271 
-
7272  return 0; /* success return 0 */
-
7273 }
-
7274 
-
7289 uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
-
7290 {
-
7291  uint8_t res;
-
7292  uint8_t buf[6];
-
7293 
-
7294  if (handle == NULL) /* check handle */
-
7295  {
-
7296  return 2; /* return error */
-
7297  }
-
7298  if (handle->inited != 1) /* check handle initialization */
-
7299  {
-
7300  return 3; /* return error */
-
7301  }
-
7302 
-
7303  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
7304  {
-
7305  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
7306  {
-
7307  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
7308  {
-
7309  if (handle->type >= W25Q256) /* >128Mb */
-
7310  {
-
7311  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
7312  0x00000000, 0x00, 0x00,
-
7313  0x00000000, 0x00, 0x00,
-
7314  0x00, NULL, 0x00,
-
7315  NULL, 0x00, 0x00); /* qspi write read */
-
7316  if (res != 0) /* check result */
-
7317  {
-
7318  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
7319 
-
7320  return 1; /* return error */
-
7321  }
-
7322  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
7323  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
7324  0x00000000, 0x00, 0x00,
-
7325  0x00000000, 0x00, 0x00,
-
7326  0, (uint8_t *)buf, 0x01,
-
7327  NULL, 0x00, 1); /* spi write read */
-
7328  if (res != 0) /* check result */
-
7329  {
-
7330  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
7331 
-
7332  return 1; /* return error */
-
7333  }
-
7334  }
-
7335  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 1,
-
7336  addr, 1, 3,
-
7337  0x00000000, 0x00, 0x00,
-
7338  8, NULL, 0x00, /* spi write */
-
7339  data, len, 1); /* spi write read */
-
7340  if (res != 0) /* check result */
-
7341  {
-
7342  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
7343 
-
7344  return 1; /* return error */
-
7345  }
-
7346  }
-
7347  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
7348  {
-
7349  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 1,
-
7350  addr, 1, 4,
-
7351  0x00000000, 0x00, 0x00,
-
7352  8, NULL, 0x00, /* spi write */
-
7353  data, len, 1); /* spi write read */
-
7354  if (res != 0) /* check result */
-
7355  {
-
7356  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
7357 
-
7358  return 1; /* return error */
-
7359  }
-
7360  }
-
7361  else
-
7362  {
-
7363  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
7364 
-
7365  return 4; /* return error */
-
7366  }
-
7367  }
-
7368  else /* single spi */
-
7369  {
-
7370  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
7371  {
-
7372  if (handle->type >= W25Q256) /* >128Mb */
-
7373  {
-
7374  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
7375  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
7376  if (res != 0) /* check result */
-
7377  {
-
7378  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
7379 
-
7380  return 1; /* return error */
-
7381  }
-
7382  buf[0] = 0xC5; /* write extended addr register command */
-
7383  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
7384  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
-
7385  if (res != 0) /* check result */
-
7386  {
-
7387  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
7388 
-
7389  return 1; /* return error */
-
7390  }
-
7391  }
-
7392  buf[0] = W25QXX_COMMAND_FAST_READ; /* fast read command */
-
7393  buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
7394  buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
7395  buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
7396  buf[4] = 0x00; /* dummy */
-
7397  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, (uint8_t *)data, (uint32_t)len); /* spi write read */
-
7398  if (res != 0) /* check result */
-
7399  {
-
7400  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
7401 
-
7402  return 1; /* return error */
-
7403  }
-
7404  }
-
7405  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE)
-
7406  && (handle->type >= W25Q256)) /* check address mode */
-
7407  {
-
7408  buf[0] = W25QXX_COMMAND_FAST_READ; /* fast read command */
-
7409  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
7410  buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
7411  buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
7412  buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
7413  buf[5] = 0x00; /* dummy */
-
7414  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 6, (uint8_t *)data, (uint32_t)len); /* spi write read */
-
7415  if (res != 0) /* check result */
-
7416  {
-
7417  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
7418 
-
7419  return 1; /* return error */
-
7420  }
-
7421  }
-
7422  else
-
7423  {
-
7424  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
7425 
-
7426  return 4; /* return error */
-
7427  }
-
7428  }
-
7429  }
-
7430  else /* qspi interface */
-
7431  {
-
7432  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
7433  {
-
7434  if (handle->type >= W25Q256) /* >128Mb */
-
7435  {
-
7436  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
7437  0x00000000, 0x00, 0x00,
-
7438  0x00000000, 0x00, 0x00,
-
7439  0x00, NULL, 0x00,
-
7440  NULL, 0x00, 0x00); /* qspi write read */
-
7441  if (res != 0) /* check result */
-
7442  {
-
7443  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
7444 
-
7445  return 1; /* return error */
-
7446  }
-
7447  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
7448  res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
-
7449  0x00000000, 0x00, 0x00,
-
7450  0x00000000, 0x00, 0x00,
-
7451  0, (uint8_t *)buf, 0x01,
-
7452  NULL, 0x00, 4); /* spi write read */
-
7453  if (res != 0) /* check result */
-
7454  {
-
7455  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
7456 
-
7457  return 1; /* return error */
-
7458  }
-
7459  }
-
7460  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 4,
-
7461  addr, 4, 3,
-
7462  0x00000000, 0x00, 0x00,
-
7463  handle->dummy, NULL, 0x00, /* spi write */
-
7464  data, len, 4); /* spi write read */
-
7465  if (res != 0) /* check result */
-
7466  {
-
7467  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
7468 
-
7469  return 1; /* return error */
-
7470  }
-
7471  }
-
7472  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
7473  {
-
7474  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 4,
-
7475  addr, 4, 4,
-
7476  0x00000000, 0x00, 0x00,
-
7477  handle->dummy, NULL, 0x00, /* spi write */
-
7478  data, len, 4); /* spi write read */
-
7479  if (res != 0) /* check result */
-
7480  {
-
7481  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
7482 
-
7483  return 1; /* return error */
-
7484  }
-
7485  }
-
7486  else
-
7487  {
-
7488  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
7489 
-
7490  return 4; /* return error */
-
7491  }
-
7492  }
-
7493 
-
7494  return 0; /* success return 0 */
-
7495 }
-
7496 
-
7508 static uint8_t a_w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
-
7509 {
-
7510  uint8_t res;
-
7511  uint8_t buf[6];
-
7512 
-
7513  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
7514  {
-
7515  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
7516  {
-
7517  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
7518  {
-
7519  if (handle->type >= W25Q256) /* >128Mb */
-
7520  {
-
7521  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
7522  0x00000000, 0x00, 0x00,
-
7523  0x00000000, 0x00, 0x00,
-
7524  0x00, NULL, 0x00,
-
7525  NULL, 0x00, 0x00); /* qspi write read */
-
7526  if (res != 0) /* check result */
-
7527  {
-
7528  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
7529 
-
7530  return 1; /* return error */
-
7531  }
-
7532  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
7533  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
7534  0x00000000, 0x00, 0x00,
-
7535  0x00000000, 0x00, 0x00,
-
7536  0, (uint8_t *)buf, 0x01,
-
7537  NULL, 0x00, 1); /* spi write read */
-
7538  if (res != 0) /* check result */
-
7539  {
-
7540  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
7541 
-
7542  return 1; /* return error */
-
7543  }
-
7544  }
-
7545  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 1,
-
7546  addr, 1, 3,
-
7547  0x00000000, 0x00, 0x00,
-
7548  8, NULL, 0x00,
-
7549  data, len, 1); /* spi write read */
-
7550  if (res != 0) /* check result */
-
7551  {
-
7552  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
7553 
-
7554  return 1; /* return error */
-
7555  }
-
7556  }
-
7557  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
7558  {
-
7559  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 1,
-
7560  addr, 1, 4,
-
7561  0x00000000, 0x00, 0x00,
-
7562  8, NULL, 0x00,
-
7563  data, len, 1); /* spi write read */
-
7564  if (res != 0) /* check result */
-
7565  {
-
7566  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
7567 
-
7568  return 1; /* return error */
-
7569  }
-
7570  }
-
7571  else
-
7572  {
-
7573  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
7574 
-
7575  return 1; /* return error */
-
7576  }
-
7577  }
-
7578  else
-
7579  {
-
7580  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
7581  {
-
7582  if (handle->type >= W25Q256) /* >128Mb */
-
7583  {
-
7584  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
7585  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
7586  if (res != 0) /* check result */
-
7587  {
-
7588  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
7589 
-
7590  return 1; /* return error */
-
7591  }
-
7592  buf[0] = 0xC5; /* write extended addr register command */
-
7593  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
7594  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
-
7595  if (res != 0) /* check result */
-
7596  {
-
7597  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
7598 
-
7599  return 1; /* return error */
-
7600  }
-
7601  }
-
7602  buf[0] = W25QXX_COMMAND_FAST_READ; /* fast read command */
-
7603  buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
7604  buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
7605  buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
7606  buf[4] = 0x00; /* dummy */
-
7607  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, (uint8_t *)data, (uint32_t)len); /* spi write read */
-
7608  if (res != 0) /* check result */
-
7609  {
-
7610  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
7611 
-
7612  return 1; /* return error */
-
7613  }
-
7614  }
-
7615  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256)) /* check address mode */
-
7616  {
-
7617  buf[0] = W25QXX_COMMAND_FAST_READ; /* fast read command */
-
7618  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
7619  buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
7620  buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
7621  buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
7622  buf[5] = 0x00; /* dummy */
-
7623  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 6, (uint8_t *)data, (uint32_t)len); /* spi write read */
-
7624  if (res != 0) /* check result */
-
7625  {
-
7626  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
7627 
-
7628  return 1; /* return error */
-
7629  }
-
7630  }
-
7631  else
-
7632  {
-
7633  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
7634 
-
7635  return 1; /* return error */
-
7636  }
-
7637  }
-
7638  }
-
7639  else /* qspi interface */
-
7640  {
-
7641  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
7642  {
-
7643  if (handle->type >= W25Q256) /* >128Mb */
-
7644  {
-
7645  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
7646  0x00000000, 0x00, 0x00,
-
7647  0x00000000, 0x00, 0x00,
-
7648  0x00, NULL, 0x00,
-
7649  NULL, 0x00, 0x00); /* qspi write read */
-
7650  if (res != 0) /* check result */
-
7651  {
-
7652  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
7653 
-
7654  return 1; /* return error */
-
7655  }
-
7656  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
7657  res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
-
7658  0x00000000, 0x00, 0x00,
-
7659  0x00000000, 0x00, 0x00,
-
7660  0, (uint8_t *)buf, 0x01,
-
7661  NULL, 0x00, 4); /* spi write read */
-
7662  if (res != 0) /* check result */
-
7663  {
-
7664  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
7665 
-
7666  return 1; /* return error */
-
7667  }
-
7668  }
-
7669  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 4,
-
7670  addr, 4, 3,
-
7671  0x00000000, 0x00, 0x00,
-
7672  handle->dummy, NULL, 0x00, /* spi write */
-
7673  data, len, 4); /* spi write read */
-
7674  if (res != 0) /* check result */
-
7675  {
-
7676  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
7677 
-
7678  return 1; /* return error */
-
7679  }
-
7680  }
-
7681  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
7682  {
-
7683  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 4,
-
7684  addr, 4, 4,
-
7685  0x00000000, 0x00, 0x00,
-
7686  handle->dummy, NULL, 0x00, /* spi write */
-
7687  data, len, 4); /* spi write read */
-
7688  if (res != 0) /* check result */
-
7689  {
-
7690  handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
-
7691 
-
7692  return 1; /* return error */
-
7693  }
-
7694  }
-
7695  else
-
7696  {
-
7697  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
7698 
-
7699  return 1; /* return error */
-
7700  }
-
7701  }
-
7702 
-
7703  return 0; /* success return 0 */
-
7704 }
-
7705 
-
7715 static uint8_t a_w25qxx_erase_sector(w25qxx_handle_t *handle, uint32_t addr)
-
7716 {
-
7717  uint8_t res;
-
7718  uint8_t status;
-
7719  uint32_t timeout;
-
7720  uint8_t buf[5];
-
7721 
-
7722  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
7723  {
-
7724  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
7725  {
-
7726  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
7727  0x00000000, 0x00, 0x00,
-
7728  0x00000000, 0x00, 0x00,
-
7729  0x00, NULL, 0x00,
-
7730  NULL, 0x00, 0x00); /* qspi write read */
-
7731  if (res != 0) /* check result */
-
7732  {
-
7733  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
7734 
-
7735  return 1; /* return error */
-
7736  }
-
7737  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
7738  {
-
7739  if (handle->type >= W25Q256) /* >128Mb */
-
7740  {
-
7741  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
7742  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
7743  0x00000000, 0x00, 0x00,
-
7744  0x00000000, 0x00, 0x00,
-
7745  0, (uint8_t *)buf, 0x01,
-
7746  NULL, 0x00, 1); /* spi write read */
-
7747  if (res != 0) /* check result */
-
7748  {
-
7749  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
7750 
-
7751  return 1; /* return error */
-
7752  }
-
7753  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
7754  0x00000000, 0x00, 0x00,
-
7755  0x00000000, 0x00, 0x00,
-
7756  0x00, NULL, 0x00,
-
7757  NULL, 0x00, 0x00); /* qspi write read */
-
7758  if (res != 0) /* check result */
-
7759  {
-
7760  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
7761 
-
7762  return 1; /* return error */
-
7763  }
-
7764  }
-
7765  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_SECTOR_ERASE_4K, 1,
-
7766  addr, 1, 3,
-
7767  0x00000000, 0x00, 0x00,
-
7768  0, NULL, 0x00,
-
7769  NULL, 0x00, 0x00); /* spi write read */
-
7770  if (res != 0) /* check result */
-
7771  {
-
7772  handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
-
7773 
-
7774  return 1; /* return error */
-
7775  }
-
7776  }
-
7777  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
7778  {
-
7779  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_SECTOR_ERASE_4K, 1,
-
7780  addr, 1, 4,
-
7781  0x00000000, 0x00, 0x00,
-
7782  0, NULL, 0x00,
-
7783  NULL, 0x00, 0x00); /* spi write read */
-
7784  if (res != 0) /* check result */
-
7785  {
-
7786  handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
-
7787 
-
7788  return 1; /* return error */
-
7789  }
-
7790  }
-
7791  else
-
7792  {
-
7793  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
7794 
-
7795  return 1; /* return error */
-
7796  }
-
7797 
-
7798  timeout = 400; /* max 400 ms */
-
7799  while (timeout != 0) /* check timeout */
-
7800  {
-
7801  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
-
7802  0x00000000, 0x00, 0x00,
-
7803  0x00000000, 0x00, 0x00,
-
7804  0, NULL, 0,
-
7805  (uint8_t *)&status, 1, 1); /* spi write read */
-
7806  if (res != 0) /* check result */
-
7807  {
-
7808  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
7809 
-
7810  return 1; /* return error */
-
7811  }
-
7812  if ((status & 0x01) == 0x00) /* check status */
-
7813  {
-
7814  break; /* break */
-
7815  }
-
7816  timeout--; /* timeout-- */
-
7817  handle->delay_ms(1); /* delay 1 ms */
-
7818  }
-
7819  if (timeout == 0)
-
7820  {
-
7821  handle->debug_print("w25qxx: sector erase 4k timeout.\n"); /* sector erase 4k timeout */
-
7822 
-
7823  return 1; /* return error */
-
7824  }
-
7825  }
-
7826  else /* single spi */
-
7827  {
-
7828  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
7829  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
7830  if (res != 0) /* check result */
-
7831  {
-
7832  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
7833 
-
7834  return 1; /* return error */
-
7835  }
-
7836  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
7837  {
-
7838  if (handle->type >= W25Q256) /* >128Mb */
-
7839  {
-
7840  buf[0] = 0xC5; /* write extended addr register command */
-
7841  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
7842  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
-
7843  if (res != 0) /* check result */
-
7844  {
-
7845  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
7846 
-
7847  return 1; /* return error */
-
7848  }
-
7849  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
7850  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
7851  if (res != 0) /* check result */
-
7852  {
-
7853  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
7854 
-
7855  return 1; /* return error */
-
7856  }
-
7857  }
-
7858  buf[0] = W25QXX_COMMAND_SECTOR_ERASE_4K; /* sector erase 4k command */
-
7859  buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
7860  buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
7861  buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
7862  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, NULL, 0); /* spi write read */
-
7863  if (res != 0) /* check result */
-
7864  {
-
7865  handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
-
7866 
-
7867  return 1; /* return error */
-
7868  }
-
7869  }
-
7870  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
7871  {
-
7872  buf[0] = W25QXX_COMMAND_SECTOR_ERASE_4K; /* sector erase 4k command */
-
7873  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
7874  buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
7875  buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
7876  buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
7877  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, NULL, 0); /* spi write read */
-
7878  if (res != 0) /* check result */
-
7879  {
-
7880  handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
-
7881 
-
7882  return 1; /* return error */
-
7883  }
-
7884  }
-
7885  else
-
7886  {
-
7887  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
7888 
-
7889  return 1; /* return error */
-
7890  }
-
7891 
-
7892  timeout = 400; /* max 400 ms */
-
7893  while (timeout != 0) /* check timeout */
-
7894  {
-
7895  buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
-
7896  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, (uint8_t *)&status, 1); /* spi write read */
-
7897  if (res != 0) /* check result */
-
7898  {
-
7899  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
7900 
-
7901  return 1; /* return error */
-
7902  }
-
7903  if ((status & 0x01) == 0x00) /* check status */
-
7904  {
-
7905  break; /* break */
-
7906  }
-
7907  timeout--; /* timeout-- */
-
7908  handle->delay_ms(1); /* delay 1 ms */
-
7909  }
-
7910  if (timeout == 0)
-
7911  {
-
7912  handle->debug_print("w25qxx: sector erase 4k timeout.\n"); /* sector erase 4k timeout */
-
7913 
-
7914  return 1; /* return error */
-
7915  }
-
7916  }
-
7917  }
-
7918  else
-
7919  {
-
7920  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
7921  0x00000000, 0x00, 0x00,
-
7922  0x00000000, 0x00, 0x00,
-
7923  0x00, NULL, 0x00,
-
7924  NULL, 0x00, 0x00); /* qspi write read */
-
7925  if (res != 0) /* check result */
-
7926  {
-
7927  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
7928 
-
7929  return 1; /* return error */
-
7930  }
-
7931  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
7932  {
-
7933  if (handle->type >= W25Q256) /* >128Mb */
-
7934  {
-
7935  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
7936  res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
-
7937  0x00000000, 0x00, 0x00,
-
7938  0x00000000, 0x00, 0x00,
-
7939  0, (uint8_t *)buf, 0x01,
-
7940  NULL, 0x00, 4); /* spi write read */
-
7941  if (res != 0) /* check result */
-
7942  {
-
7943  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
7944 
-
7945  return 1; /* return error */
-
7946  }
-
7947  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
7948  0x00000000, 0x00, 0x00,
-
7949  0x00000000, 0x00, 0x00,
-
7950  0x00, NULL, 0x00,
-
7951  NULL, 0x00, 0x00); /* qspi write read */
-
7952  if (res != 0) /* check result */
-
7953  {
-
7954  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
7955 
-
7956  return 1; /* return error */
-
7957  }
-
7958  }
-
7959  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_SECTOR_ERASE_4K, 4,
-
7960  addr, 4, 3,
-
7961  0x00000000, 0x00, 0x00,
-
7962  0, NULL, 0x00,
-
7963  NULL, 0x00, 0x00); /* spi write read */
-
7964  if (res != 0) /* check result */
-
7965  {
-
7966  handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
-
7967 
-
7968  return 1; /* return error */
-
7969  }
-
7970  }
-
7971  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
7972  {
-
7973  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_SECTOR_ERASE_4K, 4,
-
7974  addr, 4, 4,
-
7975  0x00000000, 0x00, 0x00,
-
7976  0, NULL, 0x00,
-
7977  NULL, 0x00, 0x00); /* spi write read */
-
7978  if (res != 0) /* check result */
-
7979  {
-
7980  handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
-
7981 
-
7982  return 1; /* return error */
-
7983  }
-
7984  }
-
7985  else
-
7986  {
-
7987  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
7988 
-
7989  return 1; /* return error */
-
7990  }
-
7991 
-
7992  timeout = 400; /* max 400 ms */
-
7993  while (timeout != 0) /* check timeout */
-
7994  {
-
7995  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
-
7996  0x00000000, 0x00, 0x00,
-
7997  0x00000000, 0x00, 0x00,
-
7998  0, NULL, 0,
-
7999  (uint8_t *)&status, 1, 4); /* spi write read */
-
8000  if (res != 0) /* check result */
-
8001  {
-
8002  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
8003 
-
8004  return 1; /* return error */
-
8005  }
-
8006  if ((status & 0x01) == 0x00) /* check status */
-
8007  {
-
8008  break; /* break */
-
8009  }
-
8010  timeout--; /* timeout-- */
-
8011  handle->delay_ms(1); /* delay 1 ms */
-
8012  }
-
8013  if (timeout == 0)
-
8014  {
-
8015  handle->debug_print("w25qxx: sector erase 4k timeout.\n"); /* sector erase 4k timeout */
-
8016 
-
8017  return 1; /* return error */
-
8018  }
-
8019  }
-
8020 
-
8021  return 0; /* success return 0 */
-
8022 }
-
8023 
-
8035 static uint8_t a_w25qxx_page_program(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
-
8036 {
-
8037  uint8_t res;
-
8038  uint8_t status;
-
8039  uint32_t timeout;
-
8040  uint8_t buf[2];
-
8041 
-
8042  if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
-
8043  {
-
8044  if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
-
8045  {
-
8046  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
8047  0x00000000, 0x00, 0x00,
-
8048  0x00000000, 0x00, 0x00,
-
8049  0x00, NULL, 0x00,
-
8050  NULL, 0x00, 0x00); /* qspi write read */
-
8051  if (res != 0) /* check result */
-
8052  {
-
8053  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
8054 
-
8055  return 1; /* return error */
-
8056  }
-
8057  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
8058  {
-
8059  if (handle->type >= W25Q256) /* >128Mb */
-
8060  {
-
8061  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
8062  res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
-
8063  0x00000000, 0x00, 0x00,
-
8064  0x00000000, 0x00, 0x00,
-
8065  0, (uint8_t *)buf, 0x01,
-
8066  NULL, 0x00, 1); /* spi write read */
-
8067  if (res != 0) /* check result */
-
8068  {
-
8069  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
8070 
-
8071  return 1; /* return error */
-
8072  }
-
8073  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
-
8074  0x00000000, 0x00, 0x00,
-
8075  0x00000000, 0x00, 0x00,
-
8076  0x00, NULL, 0x00,
-
8077  NULL, 0x00, 0x00); /* qspi write read */
-
8078  if (res != 0) /* check result */
-
8079  {
-
8080  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
8081 
-
8082  return 1; /* return error */
-
8083  }
-
8084  }
-
8085  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_PAGE_PROGRAM, 1,
-
8086  addr, 1, 3,
-
8087  0x00000000, 0x00, 0x00,
-
8088  0, data, len,
-
8089  NULL, 0x00, 1); /* spi write read */
-
8090  if (res != 0) /* check result */
-
8091  {
-
8092  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
8093 
-
8094  return 1; /* return error */
-
8095  }
-
8096  }
-
8097  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
8098  {
-
8099  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_PAGE_PROGRAM, 1,
-
8100  addr, 1, 4,
-
8101  0x00000000, 0x00, 0x00,
-
8102  0, data, len,
-
8103  NULL, 0x00, 1); /* spi write read */
-
8104  if (res != 0) /* check result */
-
8105  {
-
8106  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
8107 
-
8108  return 1; /* return error */
-
8109  }
-
8110  }
-
8111  else
-
8112  {
-
8113  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
8114 
-
8115  return 1; /* return error */
-
8116  }
-
8117 
-
8118  timeout = 3 * 100; /* max 3 ms */
-
8119  while (timeout != 0) /* check timeout */
-
8120  {
-
8121  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
-
8122  0x00000000, 0x00, 0x00,
-
8123  0x00000000, 0x00, 0x00,
-
8124  0, NULL, 0,
-
8125  (uint8_t *)&status, 1, 1); /* spi write read */
-
8126  if (res != 0) /* check result */
-
8127  {
-
8128  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
8129 
-
8130  return 1; /* return error */
-
8131  }
-
8132  if ((status & 0x01) == 0x00) /* check status */
-
8133  {
-
8134  break; /* break */
-
8135  }
-
8136  timeout--; /* timeout-- */
-
8137  handle->delay_us(10); /* delay 10 us */
-
8138  }
-
8139  if (timeout == 0)
-
8140  {
-
8141  handle->debug_print("w25qxx: page program timeout.\n"); /* page program timeout */
-
8142 
-
8143  return 1; /* return error */
-
8144  }
-
8145  }
-
8146  else /* single spi */
-
8147  {
-
8148  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
8149  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
8150  if (res != 0) /* check result */
-
8151  {
-
8152  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
8153 
-
8154  return 1; /* return error */
-
8155  }
-
8156  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
8157  {
-
8158  if (handle->type >= W25Q256) /* >128Mb */
-
8159  {
-
8160  buf[0] = 0xC5; /* write extended addr register command */
-
8161  buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
8162  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
-
8163  if (res != 0) /* check result */
-
8164  {
-
8165  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
8166 
-
8167  return 1; /* return error */
-
8168  }
-
8169  buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
-
8170  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
-
8171  if (res != 0) /* check result */
-
8172  {
-
8173  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
8174 
-
8175  return 1; /* return error */
-
8176  }
-
8177  }
-
8178  handle->buf[0] = W25QXX_COMMAND_PAGE_PROGRAM; /* page program command */
-
8179  handle->buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
8180  handle->buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
8181  handle->buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
8182  memcpy(&handle->buf[4], data, len); /* copy data */
-
8183  res = a_w25qxx_spi_write_read(handle, (uint8_t *)handle->buf, 4 + len, NULL, 0); /* spi write read */
-
8184  if (res != 0) /* check result */
-
8185  {
-
8186  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
8187 
-
8188  return 1; /* return error */
-
8189  }
-
8190  }
-
8191  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE)
-
8192  && (handle->type >= W25Q256)) /* 4 address mode */
-
8193  {
-
8194  handle->buf[0] = W25QXX_COMMAND_PAGE_PROGRAM; /* page program command */
-
8195  handle->buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
8196  handle->buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
-
8197  handle->buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
-
8198  handle->buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
-
8199  memcpy(&handle->buf[5], data, len); /* copy data */
-
8200  res = a_w25qxx_spi_write_read(handle, (uint8_t *)handle->buf, 5 + len, NULL, 0); /* spi write read */
-
8201  if (res != 0) /* check result */
-
8202  {
-
8203  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
8204 
-
8205  return 1; /* return error */
-
8206  }
-
8207  }
-
8208  else
-
8209  {
-
8210  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
8211 
-
8212  return 1; /* return error */
-
8213  }
-
8214 
-
8215  timeout = 3 * 100; /* max 3 ms */
-
8216  while (timeout != 0) /* check timeout */
-
8217  {
-
8218  buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
-
8219  res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, (uint8_t *)&status, 1); /* spi write read */
-
8220  if (res != 0) /* check result */
-
8221  {
-
8222  handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
-
8223 
-
8224  return 1; /* return error */
-
8225  }
-
8226  if ((status & 0x01) == 0x00) /* check status */
-
8227  {
-
8228  break; /* break */
-
8229  }
-
8230  timeout--; /* timeout-- */
-
8231  handle->delay_us(10); /* delay 10 us */
-
8232  }
-
8233  if (timeout == 0)
-
8234  {
-
8235  handle->debug_print("w25qxx: page program timeout.\n"); /* page program timeout */
-
8236 
-
8237  return 1; /* return error */
-
8238  }
-
8239  }
-
8240  }
-
8241  else
-
8242  {
-
8243  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
8244  0x00000000, 0x00, 0x00,
-
8245  0x00000000, 0x00, 0x00,
-
8246  0x00, NULL, 0x00,
-
8247  NULL, 0x00, 0x00); /* qspi write read */
-
8248  if (res != 0) /* check result */
-
8249  {
-
8250  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
8251 
-
8252  return 1; /* return error */
-
8253  }
-
8254  if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
-
8255  {
-
8256  if (handle->type >= W25Q256) /* >128Mb */
-
8257  {
-
8258  buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
-
8259  res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
-
8260  0x00000000, 0x00, 0x00,
-
8261  0x00000000, 0x00, 0x00,
-
8262  0, (uint8_t *)buf, 0x01,
-
8263  NULL, 0x00, 4); /* spi write read */
-
8264  if (res != 0) /* check result */
-
8265  {
-
8266  handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
-
8267 
-
8268  return 1; /* return error */
-
8269  }
-
8270  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
-
8271  0x00000000, 0x00, 0x00,
-
8272  0x00000000, 0x00, 0x00,
-
8273  0x00, NULL, 0x00,
-
8274  NULL, 0x00, 0x00); /* qspi write read */
-
8275  if (res != 0) /* check result */
-
8276  {
-
8277  handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
-
8278 
-
8279  return 1; /* return error */
-
8280  }
-
8281  }
-
8282  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_PAGE_PROGRAM, 4,
-
8283  addr, 4, 3,
-
8284  0x00000000, 0x00, 0x00,
-
8285  0, data, len,
-
8286  NULL, 0x00, 4); /* spi write read */
-
8287  if (res != 0) /* check result */
-
8288  {
-
8289  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
8290 
-
8291  return 1; /* return error */
-
8292  }
-
8293  }
-
8294  else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
-
8295  {
-
8296  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_PAGE_PROGRAM, 4,
-
8297  addr, 4, 4,
-
8298  0x00000000, 0x00, 0x00,
-
8299  0, data, len,
-
8300  NULL, 0x00, 4); /* spi write read */
-
8301  if (res != 0) /* check result */
-
8302  {
-
8303  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
8304 
-
8305  return 1; /* return error */
-
8306  }
-
8307  }
-
8308  else
-
8309  {
-
8310  handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
-
8311 
-
8312  return 1; /* return error */
-
8313  }
-
8314 
-
8315  timeout = 3 * 100; /* max 3 ms */
-
8316  while (timeout != 0) /* check timeout */
-
8317  {
-
8318  res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
-
8319  0x00000000, 0x00, 0x00,
-
8320  0x00000000, 0x00, 0x00,
-
8321  0, NULL, 0,
-
8322  (uint8_t *)&status, 1, 4); /* spi write read */
-
8323  if (res != 0) /* check result */
-
8324  {
-
8325  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
8326 
-
8327  return 1; /* return error */
-
8328  }
-
8329  if ((status & 0x01) == 0x00) /* check status */
-
8330  {
-
8331  break; /* break */
-
8332  }
-
8333  timeout--; /* timeout-- */
-
8334  handle->delay_us(10); /* delay 10 us */
-
8335  }
-
8336  if (timeout == 0)
-
8337  {
-
8338  handle->debug_print("w25qxx: page program timeout.\n"); /* page program timeout */
-
8339 
-
8340  return 1; /* return error */
-
8341  }
-
8342  }
-
8343 
-
8344  return 0; /* success return 0 */
-
8345 }
-
8346 
-
8358 static uint8_t a_w25qxx_write_no_check(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
-
8359 {
-
8360  uint8_t res;
-
8361  uint16_t page_remain;
-
8362 
-
8363  page_remain = 256 - addr % 256; /* get remain */
-
8364  if (len <= page_remain) /* check length */
-
8365  {
-
8366  page_remain = (uint16_t)len; /* page remain */
-
8367  }
-
8368  while( 1) /* loop */
-
8369  {
-
8370  res = a_w25qxx_page_program(handle, addr, data, page_remain); /* page program */
-
8371  if (res != 0)
-
8372  {
-
8373  handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
-
8374 
-
8375  return 1; /* return error */
-
8376  }
-
8377  if (len == page_remain) /* check length */
-
8378  {
-
8379  break; /* break loop */
-
8380  }
-
8381  else
-
8382  {
-
8383  data += page_remain; /* data + page_remain */
-
8384  addr += page_remain; /* address + page_remain */
-
8385  len -= page_remain; /* length - page_remain */
-
8386  if (len > 256) /* check length */
-
8387  {
-
8388  page_remain = 256; /* set page remain */
-
8389  }
-
8390  else
-
8391  {
-
8392  page_remain = (uint16_t)len; /* set length */
-
8393  }
-
8394  }
-
8395  }
-
8396 
-
8397  return 0; /* success return 0 */
-
8398 }
-
8399 
-
8415 uint8_t w25qxx_write(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
-
8416 {
-
8417  uint8_t res;
-
8418  uint32_t sec_pos;
-
8419  uint32_t sec_off;
-
8420  uint32_t sec_remain;
-
8421  uint32_t i;
-
8422 
-
8423  if (handle == NULL) /* check handle */
-
8424  {
-
8425  return 2; /* return error */
-
8426  }
-
8427  if (handle->inited != 1) /* check handle initialization */
-
8428  {
-
8429  return 3; /* return error */
-
8430  }
-
8431 
-
8432  sec_pos = addr / 4096; /* get sector position */
-
8433  sec_off = addr % 4096; /* get sector offset */
-
8434  sec_remain = 4096 - sec_off; /* get sector remain */
-
8435  if (len <= sec_remain) /* check length */
-
8436  {
-
8437  sec_remain = len; /* set remain */
-
8438  }
-
8439  while(1) /* loop */
-
8440  {
-
8441  res = a_w25qxx_read(handle, sec_pos * 4096, handle->buf_4k, 4096); /* read 4k data */
-
8442  if (res != 0)
-
8443  {
-
8444  handle->debug_print("w25qxx: read failed.\n"); /* read failed */
-
8445 
-
8446  return 4; /* return error */
-
8447  }
-
8448  for (i = 0; i< sec_remain; i++) /* sec_remain length */
-
8449  {
-
8450  if (handle->buf_4k[sec_off + i] != 0xFF) /* check 0xFF */
-
8451  {
-
8452  break; /* break loop */
-
8453  }
-
8454  }
-
8455  if (i < sec_remain) /* not all is 0xFF */
-
8456  {
-
8457  res = a_w25qxx_erase_sector(handle, sec_pos * 4096); /* erase sector */
-
8458  if (res != 0)
-
8459  {
-
8460  handle->debug_print("w25qxx: erase sector failed.\n"); /* erase sector failed */
-
8461 
-
8462  return 5; /* return error */
-
8463  }
-
8464  for (i = 0; i<sec_remain; i++) /* sec_remain length */
-
8465  {
-
8466  handle->buf_4k[i + sec_off] = data[i]; /* copy data */
-
8467  }
-
8468  res = a_w25qxx_write_no_check(handle, sec_pos * 4096, handle->buf_4k, 4096); /* write data no check */
-
8469  if (res != 0) /* check result */
-
8470  {
-
8471  handle->debug_print("w25qxx: write failed.\n"); /* write failed */
-
8472 
-
8473  return 1; /* return error */
-
8474  }
-
8475  }
-
8476  else
-
8477  {
-
8478  res = a_w25qxx_write_no_check(handle, addr, data, sec_remain); /* write data */
-
8479  if (res != 0) /* check result */
-
8480  {
-
8481  handle->debug_print("w25qxx: write failed.\n"); /* write failed */
-
8482 
-
8483  return 1; /* return error */
-
8484  }
-
8485  }
-
8486  if (len == sec_remain) /* check length length*/
-
8487  {
-
8488  break; /* break loop */
-
8489  }
-
8490  else
-
8491  {
-
8492  sec_pos++; /* sector++ */
-
8493  sec_off = 0; /* set offset */
-
8494  data += sec_remain; /* data + remain */
-
8495  addr += sec_remain; /* addr + remain */
-
8496  len -= sec_remain; /* len - remain */
-
8497  if (len > 4096) /* check length */
-
8498  {
-
8499  sec_remain = 4096; /* set 4096 */
-
8500  }
-
8501  else
-
8502  {
-
8503  sec_remain = len; /* set length */
-
8504  }
-
8505  }
-
8506  }
-
8507 
-
8508  return 0; /* success return 0 */
-
8509 }
-
8510 
-
8535 uint8_t w25qxx_write_read_reg(w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line,
-
8536  uint32_t address, uint8_t address_line, uint8_t address_len,
-
8537  uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len,
-
8538  uint8_t dummy, uint8_t *in_buf, uint32_t in_len,
-
8539  uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
-
8540 {
-
8541 
-
8542  if (handle == NULL) /* check handle */
-
8543  {
-
8544  return 2; /* return error */
-
8545  }
-
8546  if (handle->inited != 1) /* check handle initialization */
-
8547  {
-
8548  return 3; /* return error */
-
8549  }
-
8550 
-
8551  return a_w25qxx_qspi_write_read(handle, instruction, instruction_line,
-
8552  address, address_line, address_len,
-
8553  alternate, alternate_line, alternate_len,
-
8554  dummy, in_buf, in_len,
-
8555  out_buf, out_len, data_line); /* write and read */
-
8556 }
-
8557 
-
8566 uint8_t w25qxx_info(w25qxx_info_t *info)
-
8567 {
-
8568  if (info == NULL) /* check handle */
-
8569  {
-
8570  return 2; /* return error */
-
8571  }
-
8572 
-
8573  memset(info, 0, sizeof(w25qxx_info_t)); /* initialize w25qxx info structure */
-
8574  strncpy(info->chip_name, CHIP_NAME, 32); /* copy chip name */
-
8575  strncpy(info->manufacturer_name, MANUFACTURER_NAME, 32); /* copy manufacturer name */
-
8576  strncpy(info->interface, "SPI QSPI", 16); /* copy interface name */
-
8577  info->supply_voltage_min_v = SUPPLY_VOLTAGE_MIN; /* set minimal supply voltage */
-
8578  info->supply_voltage_max_v = SUPPLY_VOLTAGE_MAX; /* set maximum supply voltage */
-
8579  info->max_current_ma = MAX_CURRENT; /* set maximum current */
-
8580  info->temperature_max = TEMPERATURE_MAX; /* set minimal temperature */
-
8581  info->temperature_min = TEMPERATURE_MIN; /* set maximum temperature */
-
8582  info->driver_version = DRIVER_VERSION; /* set driver version */
-
8583 
-
8584  return 0; /* success return 0 */
-
8585 }
-
W25QXX_COMMAND_ENTER_QSPI_MODE
#define W25QXX_COMMAND_ENTER_QSPI_MODE
Definition: driver_w25qxx.c:72
-
W25QXX_COMMAND_READ_STATUS_REG3
#define W25QXX_COMMAND_READ_STATUS_REG3
Definition: driver_w25qxx.c:59
-
W25QXX_COMMAND_ERASE_PROGRAM_RESUME
#define W25QXX_COMMAND_ERASE_PROGRAM_RESUME
Definition: driver_w25qxx.c:65
-
W25QXX_COMMAND_READ_BLOCK_LOCK
#define W25QXX_COMMAND_READ_BLOCK_LOCK
Definition: driver_w25qxx.c:91
-
W25QXX_COMMAND_FAST_READ_DUAL_IO
#define W25QXX_COMMAND_FAST_READ_DUAL_IO
Definition: driver_w25qxx.c:92
-
W25QXX_COMMAND_READ_DATA
#define W25QXX_COMMAND_READ_DATA
Definition: driver_w25qxx.c:81
-
MAX_CURRENT
#define MAX_CURRENT
Definition: driver_w25qxx.c:46
-
W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK
#define W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK
Definition: driver_w25qxx.c:89
-
W25QXX_COMMAND_WRITE_DISABLE
#define W25QXX_COMMAND_WRITE_DISABLE
Definition: driver_w25qxx.c:56
-
W25QXX_COMMAND_DEVICE_ID_DUAL_IO
#define W25QXX_COMMAND_DEVICE_ID_DUAL_IO
Definition: driver_w25qxx.c:93
-
W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK
#define W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK
Definition: driver_w25qxx.c:90
-
W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND
#define W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND
Definition: driver_w25qxx.c:64
-
W25QXX_COMMAND_READ_STATUS_REG2
#define W25QXX_COMMAND_READ_STATUS_REG2
Definition: driver_w25qxx.c:58
-
W25QXX_COMMAND_WRITE_STATUS_REG2
#define W25QXX_COMMAND_WRITE_STATUS_REG2
Definition: driver_w25qxx.c:61
-
W25QXX_COMMAND_BLOCK_ERASE_64K
#define W25QXX_COMMAND_BLOCK_ERASE_64K
Definition: driver_w25qxx.c:80
-
W25QXX_COMMAND_READ_SECURITY_REGISTER
#define W25QXX_COMMAND_READ_SECURITY_REGISTER
Definition: driver_w25qxx.c:88
-
W25QXX_COMMAND_FAST_READ_QUAD_OUTPUT
#define W25QXX_COMMAND_FAST_READ_QUAD_OUTPUT
Definition: driver_w25qxx.c:84
-
W25QXX_COMMAND_JEDEC_ID
#define W25QXX_COMMAND_JEDEC_ID
Definition: driver_w25qxx.c:69
-
W25QXX_COMMAND_READ_SFDP_REGISTER
#define W25QXX_COMMAND_READ_SFDP_REGISTER
Definition: driver_w25qxx.c:85
-
W25QXX_COMMAND_CHIP_ERASE
#define W25QXX_COMMAND_CHIP_ERASE
Definition: driver_w25qxx.c:63
-
SUPPLY_VOLTAGE_MAX
#define SUPPLY_VOLTAGE_MAX
Definition: driver_w25qxx.c:45
-
W25QXX_COMMAND_READ_UNIQUE_ID
#define W25QXX_COMMAND_READ_UNIQUE_ID
Definition: driver_w25qxx.c:75
-
W25QXX_COMMAND_WRITE_STATUS_REG3
#define W25QXX_COMMAND_WRITE_STATUS_REG3
Definition: driver_w25qxx.c:62
-
W25QXX_COMMAND_ENABLE_RESET
#define W25QXX_COMMAND_ENABLE_RESET
Definition: driver_w25qxx.c:73
-
W25QXX_COMMAND_SECTOR_ERASE_4K
#define W25QXX_COMMAND_SECTOR_ERASE_4K
Definition: driver_w25qxx.c:78
-
W25QXX_COMMAND_POWER_DOWN
#define W25QXX_COMMAND_POWER_DOWN
Definition: driver_w25qxx.c:66
-
W25QXX_COMMAND_DEVICE_ID_QUAD_IO
#define W25QXX_COMMAND_DEVICE_ID_QUAD_IO
Definition: driver_w25qxx.c:98
-
W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE
#define W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE
Definition: driver_w25qxx.c:55
-
W25QXX_COMMAND_FAST_READ_QUAD_IO
#define W25QXX_COMMAND_FAST_READ_QUAD_IO
Definition: driver_w25qxx.c:95
-
W25QXX_COMMAND_QUAD_PAGE_PROGRAM
#define W25QXX_COMMAND_QUAD_PAGE_PROGRAM
Definition: driver_w25qxx.c:77
-
W25QXX_COMMAND_ERASE_SECURITY_REGISTER
#define W25QXX_COMMAND_ERASE_SECURITY_REGISTER
Definition: driver_w25qxx.c:86
-
W25QXX_COMMAND_BLOCK_ERASE_32K
#define W25QXX_COMMAND_BLOCK_ERASE_32K
Definition: driver_w25qxx.c:79
-
W25QXX_COMMAND_FAST_READ_DUAL_OUTPUT
#define W25QXX_COMMAND_FAST_READ_DUAL_OUTPUT
Definition: driver_w25qxx.c:83
-
TEMPERATURE_MAX
#define TEMPERATURE_MAX
Definition: driver_w25qxx.c:48
-
W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER
#define W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER
Definition: driver_w25qxx.c:87
-
W25QXX_COMMAND_WRITE_STATUS_REG1
#define W25QXX_COMMAND_WRITE_STATUS_REG1
Definition: driver_w25qxx.c:60
-
W25QXX_COMMAND_WORD_READ_QUAD_IO
#define W25QXX_COMMAND_WORD_READ_QUAD_IO
Definition: driver_w25qxx.c:96
-
MANUFACTURER_NAME
#define MANUFACTURER_NAME
Definition: driver_w25qxx.c:43
-
TEMPERATURE_MIN
#define TEMPERATURE_MIN
Definition: driver_w25qxx.c:47
-
SUPPLY_VOLTAGE_MIN
#define SUPPLY_VOLTAGE_MIN
Definition: driver_w25qxx.c:44
-
W25QXX_COMMAND_RESET_DEVICE
#define W25QXX_COMMAND_RESET_DEVICE
Definition: driver_w25qxx.c:74
-
W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK
#define W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK
Definition: driver_w25qxx.c:71
-
W25QXX_COMMAND_FAST_READ
#define W25QXX_COMMAND_FAST_READ
Definition: driver_w25qxx.c:82
-
W25QXX_COMMAND_OCTAL_WORD_READ_QUAD_IO
#define W25QXX_COMMAND_OCTAL_WORD_READ_QUAD_IO
Definition: driver_w25qxx.c:97
-
W25QXX_COMMAND_SET_BURST_WITH_WRAP
#define W25QXX_COMMAND_SET_BURST_WITH_WRAP
Definition: driver_w25qxx.c:94
-
W25QXX_COMMAND_RELEASE_POWER_DOWN
#define W25QXX_COMMAND_RELEASE_POWER_DOWN
Definition: driver_w25qxx.c:67
-
CHIP_NAME
#define CHIP_NAME
chip information definition
Definition: driver_w25qxx.c:42
-
W25QXX_COMMAND_READ_STATUS_REG1
#define W25QXX_COMMAND_READ_STATUS_REG1
Definition: driver_w25qxx.c:57
-
DRIVER_VERSION
#define DRIVER_VERSION
Definition: driver_w25qxx.c:49
-
W25QXX_COMMAND_PAGE_PROGRAM
#define W25QXX_COMMAND_PAGE_PROGRAM
Definition: driver_w25qxx.c:76
-
W25QXX_COMMAND_WRITE_ENABLE
#define W25QXX_COMMAND_WRITE_ENABLE
chip command definition
Definition: driver_w25qxx.c:54
-
W25QXX_COMMAND_READ_MANUFACTURER
#define W25QXX_COMMAND_READ_MANUFACTURER
Definition: driver_w25qxx.c:68
-
W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK
#define W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK
Definition: driver_w25qxx.c:70
+Go to the documentation of this file.
1
+
37#include "driver_w25qxx.h"
+
38
+
42#define CHIP_NAME "Winbond W25QXX"
+
43#define MANUFACTURER_NAME "Winbond"
+
44#define SUPPLY_VOLTAGE_MIN 2.7f
+
45#define SUPPLY_VOLTAGE_MAX 3.6f
+
46#define MAX_CURRENT 25.0f
+
47#define TEMPERATURE_MIN -40.0f
+
48#define TEMPERATURE_MAX 85.0f
+
49#define DRIVER_VERSION 1000
+
54#define W25QXX_COMMAND_WRITE_ENABLE 0x06
+
55#define W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE 0x50
+
56#define W25QXX_COMMAND_WRITE_DISABLE 0x04
+
57#define W25QXX_COMMAND_READ_STATUS_REG1 0x05
+
58#define W25QXX_COMMAND_READ_STATUS_REG2 0x35
+
59#define W25QXX_COMMAND_READ_STATUS_REG3 0x15
+
60#define W25QXX_COMMAND_WRITE_STATUS_REG1 0x01
+
61#define W25QXX_COMMAND_WRITE_STATUS_REG2 0x31
+
62#define W25QXX_COMMAND_WRITE_STATUS_REG3 0x11
+
63#define W25QXX_COMMAND_CHIP_ERASE 0xC7
+
64#define W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND 0x75
+
65#define W25QXX_COMMAND_ERASE_PROGRAM_RESUME 0x7A
+
66#define W25QXX_COMMAND_POWER_DOWN 0xB9
+
67#define W25QXX_COMMAND_RELEASE_POWER_DOWN 0xAB
+
68#define W25QXX_COMMAND_READ_MANUFACTURER 0x90
+
69#define W25QXX_COMMAND_JEDEC_ID 0x9F
+
70#define W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK 0x7E
+
71#define W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK 0x98
+
72#define W25QXX_COMMAND_ENTER_QSPI_MODE 0x38
+
73#define W25QXX_COMMAND_ENABLE_RESET 0x66
+
74#define W25QXX_COMMAND_RESET_DEVICE 0x99
+
75#define W25QXX_COMMAND_READ_UNIQUE_ID 0x4B
+
76#define W25QXX_COMMAND_PAGE_PROGRAM 0x02
+
77#define W25QXX_COMMAND_QUAD_PAGE_PROGRAM 0x32
+
78#define W25QXX_COMMAND_SECTOR_ERASE_4K 0x20
+
79#define W25QXX_COMMAND_BLOCK_ERASE_32K 0x52
+
80#define W25QXX_COMMAND_BLOCK_ERASE_64K 0xD8
+
81#define W25QXX_COMMAND_READ_DATA 0x03
+
82#define W25QXX_COMMAND_FAST_READ 0x0B
+
83#define W25QXX_COMMAND_FAST_READ_DUAL_OUTPUT 0x3B
+
84#define W25QXX_COMMAND_FAST_READ_QUAD_OUTPUT 0x6B
+
85#define W25QXX_COMMAND_READ_SFDP_REGISTER 0x5A
+
86#define W25QXX_COMMAND_ERASE_SECURITY_REGISTER 0x44
+
87#define W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER 0x42
+
88#define W25QXX_COMMAND_READ_SECURITY_REGISTER 0x48
+
89#define W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK 0x36
+
90#define W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK 0x39
+
91#define W25QXX_COMMAND_READ_BLOCK_LOCK 0x3D
+
92#define W25QXX_COMMAND_FAST_READ_DUAL_IO 0xBB
+
93#define W25QXX_COMMAND_DEVICE_ID_DUAL_IO 0x92
+
94#define W25QXX_COMMAND_SET_BURST_WITH_WRAP 0x77
+
95#define W25QXX_COMMAND_FAST_READ_QUAD_IO 0xEB
+
96#define W25QXX_COMMAND_WORD_READ_QUAD_IO 0xE7
+
97#define W25QXX_COMMAND_OCTAL_WORD_READ_QUAD_IO 0xE3
+
98#define W25QXX_COMMAND_DEVICE_ID_QUAD_IO 0x94
+
112static uint8_t a_w25qxx_spi_write_read(w25qxx_handle_t *handle, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len)
+
113{
+
114 if (handle->spi_qspi_write_read(0x00, 0x00, 0x00000000, 0x00, 0x00, /* write read data */
+
115 0x00000000, 0x00, 0x00,
+
116 0x00, in_buf, in_len, out_buf, out_len, 1) != 0)
+
117 {
+
118 return 1; /* return error */
+
119 }
+
120 else
+
121 {
+
122 return 0; /* success return 0 */
+
123 }
+
124}
+
125
+
148static uint8_t a_w25qxx_qspi_write_read(w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line,
+
149 uint32_t address, uint8_t address_line, uint8_t address_len,
+
150 uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len,
+
151 uint8_t dummy, uint8_t *in_buf, uint32_t in_len,
+
152 uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
+
153{
+
154 if (handle->spi_qspi_write_read(instruction, instruction_line, address, address_line, address_len, /* write read data */
+
155 alternate, alternate_line, alternate_len,
+
156 dummy, in_buf, in_len, out_buf, out_len, data_line) != 0)
+
157 {
+
158 return 1; /* return error */
+
159 }
+
160 else
+
161 {
+
162 return 0; /* success return 0 */
+
163 }
+
164}
+
165
+
+
175uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable)
+
176{
+
177 if (handle == NULL) /* check handle */
+
178 {
+
179 return 2; /* return error */
+
180 }
+
181
+
182 handle->dual_quad_spi_enable = (uint8_t)enable; /* set enable */
+
183
+
184 return 0; /* success return 0 */
+
185}
+
+
186
+
+
196uint8_t w25qxx_get_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t *enable)
+
197{
+
198 if (handle == NULL) /* check handle */
+
199 {
+
200 return 2; /* return error */
+
201 }
+
202
+
203 *enable = (w25qxx_bool_t)(handle->dual_quad_spi_enable); /* get enable */
+
204
+
205 return 0; /* success return 0 */
+
206}
+
+
207
+
+
217uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type)
+
218{
+
219 if (handle == NULL) /* check handle */
+
220 {
+
221 return 2; /* return error */
+
222 }
+
223
+
224 handle->type = (uint16_t)type; /* set type */
+
225
+
226 return 0; /* success return 0 */
+
227}
+
+
228
+
+
238uint8_t w25qxx_get_type(w25qxx_handle_t *handle, w25qxx_type_t *type)
+
239{
+
240 if (handle == NULL) /* check handle */
+
241 {
+
242 return 2; /* return error */
+
243 }
+
244
+
245 *type = (w25qxx_type_t)(handle->type); /* get type */
+
246
+
247 return 0; /* success return 0 */
+
248}
+
+
249
+
+
259uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface)
+
260{
+
261 if (handle == NULL) /* check handle */
+
262 {
+
263 return 2; /* return error */
+
264 }
+
265
+
266 handle->spi_qspi = (uint8_t)interface; /* set interface */
+
267
+
268 return 0; /* success return 0 */
+
269}
+
+
270
+
+
280uint8_t w25qxx_get_interface(w25qxx_handle_t *handle, w25qxx_interface_t *interface)
+
281{
+
282 if (handle == NULL) /* check handle */
+
283 {
+
284 return 2; /* return error */
+
285 }
+
286
+
287 *interface = (w25qxx_interface_t)(handle->spi_qspi); /* get interface */
+
288
+
289 return 0; /* success return 0 */
+
290}
+
+
291
+
+
304uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
+
305{
+
306 uint8_t res;
+
307 uint8_t buf[1];
+
308
+
309 if (handle == NULL) /* check handle */
+
310 {
+
311 return 2; /* return error */
+
312 }
+
313 if (handle->inited != 1) /* check handle initialization */
+
314 {
+
315 return 3; /* return error */
+
316 }
+
317 if (handle->type < W25Q256) /* check type */
+
318 {
+
319 handle->debug_print("w25qxx: current type can't use this function.\n"); /* current type can't use this function */
+
320
+
321 return 4; /* return error */
+
322 }
+
323
+
324 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
325 {
+
326 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
327 {
+
328 if (mode == W25QXX_ADDRESS_MODE_3_BYTE) /* address 3 mode byte */
+
329 {
+
330 buf[0] = 0xE9; /* 3 byte mode */
+
331 }
+
332 else /* address 4 mode byte */
+
333 {
+
334 buf[0] = 0xB7; /* 4 byte mode */
+
335 }
+
336 res = a_w25qxx_qspi_write_read(handle, buf[0], 1,
+
337 0x00000000, 0x00, 0x00,
+
338 0x00000000, 0x00, 0x00,
+
339 0x00, NULL, 0x00,
+
340 NULL, 0x00, 0x00); /* qspi write read */
+
341 if (res != 0) /* check result */
+
342 {
+
343 handle->debug_print("w25qxx: set address mode failed.\n"); /* set address mode failed */
+
344
+
345 return 1; /* return error */
+
346 }
+
347 }
+
348 else /* single spi */
+
349 {
+
350 if (mode == W25QXX_ADDRESS_MODE_3_BYTE) /* address 3 mode byte */
+
351 {
+
352 buf[0] = 0xE9; /* 3 byte mode */
+
353 }
+
354 else /* address 4 mode byte */
+
355 {
+
356 buf[0] = 0xB7; /* 4 byte mode */
+
357 }
+
358 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
359 if (res != 0) /* check result */
+
360 {
+
361 handle->debug_print("w25qxx: set address mode failed.\n"); /* set address mode failed */
+
362
+
363 return 1; /* return error */
+
364 }
+
365 }
+
366 }
+
367 else /* qspi interface */
+
368 {
+
369 if (mode == W25QXX_ADDRESS_MODE_3_BYTE) /* address 3 mode byte */
+
370 {
+
371 buf[0] = 0xE9; /* 3 byte mode */
+
372 }
+
373 else /* address 4 mode byte */
+
374 {
+
375 buf[0] = 0xB7; /* 4 byte mode */
+
376 }
+
377 res = a_w25qxx_qspi_write_read(handle, buf[0], 4,
+
378 0x00000000, 0x00, 0x00,
+
379 0x00000000, 0x00, 0x00,
+
380 0x00, NULL, 0x00,
+
381 NULL, 0x00, 0x00); /* qspi write read */
+
382 if (res != 0) /* check result */
+
383 {
+
384 handle->debug_print("w25qxx: set address mode failed.\n"); /* set address mode failed */
+
385
+
386 return 1; /* return error */
+
387 }
+
388 }
+
389
+
390 handle->address_mode = (uint8_t)mode; /* set address mode */
+
391
+
392 return 0; /* success return 0 */
+
393}
+
+
394
+
+
405uint8_t w25qxx_get_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t *mode)
+
406{
+
407 if (handle == NULL) /* check handle */
+
408 {
+
409 return 2; /* return error */
+
410 }
+
411 if (handle->inited != 1) /* check handle initialization */
+
412 {
+
413 return 3; /* return error */
+
414 }
+
415
+
416 *mode = (w25qxx_address_mode_t)(handle->address_mode); /* get address mode */
+
417
+
418 return 0; /* success return 0 */
+
419}
+
+
420
+
+
431uint8_t w25qxx_enable_write(w25qxx_handle_t *handle)
+
432{
+
433 uint8_t res;
+
434 uint8_t buf[1];
+
435
+
436 if (handle == NULL) /* check handle */
+
437 {
+
438 return 2; /* return error */
+
439 }
+
440 if (handle->inited != 1) /* check handle initialization */
+
441 {
+
442 return 3; /* return error */
+
443 }
+
444
+
445 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
446 {
+
447 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
448 {
+
449 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
450 0x00000000, 0x00, 0x00,
+
451 0x00000000, 0x00, 0x00,
+
452 0x00, NULL, 0x00,
+
453 NULL, 0x00, 0x00); /* qspi write read */
+
454 if (res != 0) /* check result */
+
455 {
+
456 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
457
+
458 return 1; /* return error */
+
459 }
+
460 }
+
461 else /* single spi */
+
462 {
+
463 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
464 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
465 if (res != 0) /* check result */
+
466 {
+
467 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
468
+
469 return 1; /* return error */
+
470 }
+
471 }
+
472 }
+
473 else /* qspi interface */
+
474 {
+
475 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
476 0x00000000, 0x00, 0x00,
+
477 0x00000000, 0x00, 0x00,
+
478 0x00, NULL, 0x00,
+
479 NULL, 0x00, 0x00); /* qspi write read */
+
480 if (res != 0) /* check result */
+
481 {
+
482 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
483
+
484 return 1; /* return error */
+
485 }
+
486 }
+
487
+
488 return 0; /* success return 0 */
+
489}
+
+
490
+
+
501uint8_t w25qxx_enable_volatile_sr_write(w25qxx_handle_t *handle)
+
502{
+
503 uint8_t res;
+
504 uint8_t buf[1];
+
505
+
506 if (handle == NULL) /* check handle */
+
507 {
+
508 return 2; /* return error */
+
509 }
+
510 if (handle->inited != 1) /* check handle initialization */
+
511 {
+
512 return 3; /* return error */
+
513 }
+
514
+
515 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
516 {
+
517 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
518 {
+
519 res = a_w25qxx_qspi_write_read(handle,
+
520 W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 1,
+
521 0x00000000, 0x00, 0x00,
+
522 0x00000000, 0x00, 0x00,
+
523 0x00, NULL, 0x00,
+
524 NULL, 0x00, 0x00); /* qspi write read */
+
525 if (res != 0) /* check result */
+
526 {
+
527 handle->debug_print("w25qxx: sr write enable failed.\n"); /* sr write enable failed */
+
528
+
529 return 1; /* return error */
+
530 }
+
531 }
+
532 else /* single spi */
+
533 {
+
534 buf[0] = W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE; /* sr write enable command */
+
535 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
536 if (res != 0) /* check result */
+
537 {
+
538 handle->debug_print("w25qxx: sr write enable failed.\n"); /* sr write enable failed */
+
539
+
540 return 1; /* return error */
+
541 }
+
542 }
+
543 }
+
544 else /* qspi interface */
+
545 {
+
546 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 4,
+
547 0x00000000, 0x00, 0x00,
+
548 0x00000000, 0x00, 0x00,
+
549 0x00, NULL, 0x00,
+
550 NULL, 0x00, 0x00); /* qspi write read */
+
551 if (res != 0) /* check result */
+
552 {
+
553 handle->debug_print("w25qxx: sr write enable failed.\n"); /* sr write enable failed */
+
554
+
555 return 1; /* return error */
+
556 }
+
557 }
+
558
+
559 return 0; /* success return 0 */
+
560}
+
+
561
+
+
572uint8_t w25qxx_disable_write(w25qxx_handle_t *handle)
+
573{
+
574 uint8_t res;
+
575 uint8_t buf[1];
+
576
+
577 if (handle == NULL) /* check handle */
+
578 {
+
579 return 2; /* return error */
+
580 }
+
581 if (handle->inited != 1) /* check handle initialization */
+
582 {
+
583 return 3; /* return error */
+
584 }
+
585
+
586 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
587 {
+
588 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
589 {
+
590 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_DISABLE, 1,
+
591 0x00000000, 0x00, 0x00,
+
592 0x00000000, 0x00, 0x00,
+
593 0x00, NULL, 0x00,
+
594 NULL, 0x00, 0x00); /* qspi write read */
+
595 if (res != 0) /* check result */
+
596 {
+
597 handle->debug_print("w25qxx: write disable failed.\n"); /* write disable failed */
+
598
+
599 return 1; /* return error */
+
600 }
+
601 }
+
602 else /* single spi */
+
603 {
+
604 buf[0] = W25QXX_COMMAND_WRITE_DISABLE; /* write disable command */
+
605 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi qspi write read */
+
606 if (res != 0) /* check result */
+
607 {
+
608 handle->debug_print("w25qxx: write disable failed.\n"); /* write disable failed */
+
609
+
610 return 1; /* return error */
+
611 }
+
612 }
+
613 }
+
614 else /* qspi interface */
+
615 {
+
616 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_DISABLE, 4,
+
617 0x00000000, 0x00, 0x00,
+
618 0x00000000, 0x00, 0x00,
+
619 0x00, NULL, 0x00,
+
620 NULL, 0x00, 0x00); /* qspi write read */
+
621 if (res != 0) /* check result */
+
622 {
+
623 handle->debug_print("w25qxx: write disable failed.\n"); /* write disable failed */
+
624
+
625 return 1; /* return error */
+
626 }
+
627 }
+
628
+
629 return 0; /* success return 0 */
+
630}
+
+
631
+
+
643uint8_t w25qxx_get_status1(w25qxx_handle_t *handle, uint8_t *status)
+
644{
+
645 uint8_t res;
+
646 uint8_t buf[1];
+
647
+
648 if (handle == NULL) /* check handle */
+
649 {
+
650 return 2; /* return error */
+
651 }
+
652 if (handle->inited != 1) /* check handle initialization */
+
653 {
+
654 return 3; /* return error */
+
655 }
+
656
+
657 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
658 {
+
659 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
660 {
+
661 res = a_w25qxx_qspi_write_read(handle,
+
662 W25QXX_COMMAND_READ_STATUS_REG1, 1,
+
663 0x00000000, 0x00, 0x00,
+
664 0x00000000, 0x00, 0x00,
+
665 0x00, NULL, 0x00,
+
666 status, 1, 1); /* qspi write read */
+
667 if (res != 0) /* check result */
+
668 {
+
669 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
670
+
671 return 1; /* return error */
+
672 }
+
673 }
+
674 else /* single spi */
+
675 {
+
676 buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
+
677 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf,
+
678 1, status, 1); /* spi write read */
+
679 if (res != 0) /* check result */
+
680 {
+
681 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
682
+
683 return 1; /* return error */
+
684 }
+
685 }
+
686 }
+
687 else /* qspi interface */
+
688 {
+
689 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
+
690 0x00000000, 0x00, 0x00,
+
691 0x00000000, 0x00, 0x00,
+
692 0x00, NULL, 0x00,
+
693 status, 1, 4); /* qspi write read */
+
694 if (res != 0) /* check result */
+
695 {
+
696 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
697
+
698 return 1; /* return error */
+
699 }
+
700 }
+
701
+
702 return 0; /* success return 0 */
+
703}
+
+
704
+
+
716uint8_t w25qxx_get_status2(w25qxx_handle_t *handle, uint8_t *status)
+
717{
+
718 uint8_t res;
+
719 uint8_t buf[1];
+
720
+
721 if (handle == NULL) /* check handle */
+
722 {
+
723 return 2; /* return error */
+
724 }
+
725 if (handle->inited != 1) /* check handle initialization */
+
726 {
+
727 return 3; /* return error */
+
728 }
+
729
+
730 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
731 {
+
732 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
733 {
+
734 res = a_w25qxx_qspi_write_read(handle,
+
735 W25QXX_COMMAND_READ_STATUS_REG2, 1,
+
736 0x00000000, 0x00, 0x00,
+
737 0x00000000, 0x00, 0x00,
+
738 0x00, NULL, 0x00,
+
739 status, 1, 1); /* qspi write read */
+
740 if (res != 0) /* check result */
+
741 {
+
742 handle->debug_print("w25qxx: get status2 failed.\n"); /* get status2 failed */
+
743
+
744 return 1; /* return error */
+
745 }
+
746 }
+
747 else /* single spi */
+
748 {
+
749 buf[0] = W25QXX_COMMAND_READ_STATUS_REG2; /* read status2 command */
+
750 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf,
+
751 1, status, 1); /* spi write read */
+
752 if (res != 0) /* check result */
+
753 {
+
754 handle->debug_print("w25qxx: get status2 failed.\n"); /* get status2 failed */
+
755
+
756 return 1; /* return error */
+
757 }
+
758 }
+
759 }
+
760 else /* qspi interface */
+
761 {
+
762 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG2, 4,
+
763 0x00000000, 0x00, 0x00,
+
764 0x00000000, 0x00, 0x00,
+
765 0x00, NULL, 0x00,
+
766 status, 1, 4); /* qspi write read */
+
767 if (res != 0) /* check result */
+
768 {
+
769 handle->debug_print("w25qxx: get status2 failed.\n"); /* get status2 failed */
+
770
+
771 return 1; /* return error */
+
772 }
+
773 }
+
774
+
775 return 0; /* success return 0 */
+
776}
+
+
777
+
+
789uint8_t w25qxx_get_status3(w25qxx_handle_t *handle, uint8_t *status)
+
790{
+
791 uint8_t res;
+
792 uint8_t buf[1];
+
793
+
794 if (handle == NULL) /* check handle */
+
795 {
+
796 return 2; /* return error */
+
797 }
+
798 if (handle->inited != 1) /* check handle initialization */
+
799 {
+
800 return 3; /* return error */
+
801 }
+
802
+
803 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
804 {
+
805 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
806 {
+
807 res = a_w25qxx_qspi_write_read(handle,
+
808 W25QXX_COMMAND_READ_STATUS_REG3, 1,
+
809 0x00000000, 0x00, 0x00,
+
810 0x00000000, 0x00, 0x00,
+
811 0x00, NULL, 0x00,
+
812 status, 1, 1); /* qspi write read */
+
813 if (res != 0) /* check result */
+
814 {
+
815 handle->debug_print("w25qxx: get status3 failed.\n"); /* get status3 failed */
+
816
+
817 return 1; /* return error */
+
818 }
+
819 }
+
820 else /* single spi */
+
821 {
+
822 buf[0] = W25QXX_COMMAND_READ_STATUS_REG3; /* read status3 command */
+
823 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1,
+
824 status, 1); /* spi write read */
+
825 if (res != 0) /* check result */
+
826 {
+
827 handle->debug_print("w25qxx: get status3 failed.\n"); /* get status3 failed */
+
828
+
829 return 1; /* return error */
+
830 }
+
831 }
+
832 }
+
833 else /* qspi interface */
+
834 {
+
835 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG3, 4,
+
836 0x00000000, 0x00, 0x00,
+
837 0x00000000, 0x00, 0x00,
+
838 0x00, NULL, 0x00,
+
839 status, 1, 4); /* qspi write read */
+
840 if (res != 0) /* check result */
+
841 {
+
842 handle->debug_print("w25qxx: get status3 failed.\n"); /* get status3 failed */
+
843
+
844 return 1; /* return error */
+
845 }
+
846 }
+
847
+
848 return 0; /* success return 0 */
+
849}
+
+
850
+
+
863uint8_t w25qxx_set_status1(w25qxx_handle_t *handle, uint8_t status)
+
864{
+
865 uint8_t res;
+
866 uint8_t buf[2];
+
867 uint32_t timeout;
+
868 uint8_t status_check;
+
869
+
870 if (handle == NULL) /* check handle */
+
871 {
+
872 return 2; /* return error */
+
873 }
+
874 if (handle->inited != 1) /* check handle initialization */
+
875 {
+
876 return 3; /* return error */
+
877 }
+
878
+
879 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
880 {
+
881 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
882 {
+
883 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 1,
+
884 0x00000000, 0x00, 0x00,
+
885 0x00000000, 0x00, 0x00,
+
886 0x00, NULL, 0x00,
+
887 NULL, 0x00, 0x00); /* qspi write read */
+
888 if (res != 0) /* check result */
+
889 {
+
890 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
891
+
892 return 1; /* return error */
+
893 }
+
894 buf[0] = status; /* set status */
+
895 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_STATUS_REG1, 1,
+
896 0x00000000, 0x00, 0x00,
+
897 0x00000000, 0x00, 0x00,
+
898 0x00, (uint8_t *)buf, 1,
+
899 NULL, 0x00, 1); /* qspi write read */
+
900 if (res != 0) /* check result */
+
901 {
+
902 handle->debug_print("w25qxx: set status1 failed.\n"); /* set status1 failed */
+
903
+
904 return 1; /* return error */
+
905 }
+
906
+
907 timeout = 1000; /* max 1000 ms */
+
908 while (timeout != 0) /* check timeout */
+
909 {
+
910 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
+
911 0x00000000, 0x00, 0x00,
+
912 0x00000000, 0x00, 0x00,
+
913 0x00, NULL, 0x00,
+
914 (uint8_t *)&status_check, 1, 1); /* qspi write read */
+
915 if (res != 0) /* check result */
+
916 {
+
917 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
918
+
919 return 1; /* return error */
+
920 }
+
921 if ((status_check & 0x01) == 0x00) /* check status */
+
922 {
+
923 break; /* break */
+
924 }
+
925 timeout--; /* timeout-- */
+
926 handle->delay_ms(1); /* delay 1 ms */
+
927 }
+
928 if (timeout == 0) /* check timeout */
+
929 {
+
930 handle->debug_print("w25qxx: write status 1 timeout.\n"); /* write status 1 timeout */
+
931
+
932 return 4; /* return error */
+
933 }
+
934 else
+
935 {
+
936 return 0; /* success return 0 */
+
937 }
+
938 }
+
939 else /* single spi */
+
940 {
+
941 buf[0] = W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE; /* sr write enable command */
+
942 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
943 if (res != 0) /* check result */
+
944 {
+
945 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
946
+
947 return 1; /* return error */
+
948 }
+
949 buf[0] = W25QXX_COMMAND_WRITE_STATUS_REG1; /* write status1 command */
+
950 buf[1] = status; /* set status */
+
951 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
+
952 if (res != 0) /* check result */
+
953 {
+
954 handle->debug_print("w25qxx: set status1 failed.\n"); /* set status1 failed */
+
955
+
956 return 1; /* return error */
+
957 }
+
958
+
959 timeout = 1000; /* max 1000 ms */
+
960 while (timeout != 0) /* check timeout */
+
961 {
+
962 buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
+
963 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1,
+
964 (uint8_t *)&status_check, 1); /* spi write read */
+
965 if (res != 0) /* check result */
+
966 {
+
967 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
968
+
969 return 1; /* return error */
+
970 }
+
971 if ((status_check & 0x01) == 0x00) /* check status */
+
972 {
+
973 break; /* break */
+
974 }
+
975 timeout--; /* timeout-- */
+
976 handle->delay_ms(1); /* delay 1 ms */
+
977 }
+
978 if (timeout == 0) /* check timeout */
+
979 {
+
980 handle->debug_print("w25qxx: write status 1 timeout.\n"); /* write status 1 timeout */
+
981
+
982 return 4; /* return error */
+
983 }
+
984 else
+
985 {
+
986 return 0; /* success return 0 */
+
987 }
+
988 }
+
989 }
+
990 else /* qspi interface */
+
991 {
+
992 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 4,
+
993 0x00000000, 0x00, 0x00,
+
994 0x00000000, 0x00, 0x00,
+
995 0x00, NULL, 0x00,
+
996 NULL, 0x00, 0x00); /* qspi write read */
+
997 if (res != 0) /* check result */
+
998 {
+
999 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
1000
+
1001 return 1; /* return error */
+
1002 }
+
1003 buf[0] = status; /* set status */
+
1004 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_STATUS_REG1, 4,
+
1005 0x00000000, 0x00, 0x00,
+
1006 0x00000000, 0x00, 0x00,
+
1007 0x00, (uint8_t *)buf, 1,
+
1008 NULL, 0x00, 4); /* qspi write read */
+
1009 if (res != 0) /* check result */
+
1010 {
+
1011 handle->debug_print("w25qxx: set status1 failed.\n"); /* set status1 failed */
+
1012
+
1013 return 1; /* return error */
+
1014 }
+
1015
+
1016 timeout = 1000; /* max 1000 ms */
+
1017 while (timeout != 0) /* check timeout */
+
1018 {
+
1019 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
+
1020 0x00000000, 0x00, 0x00,
+
1021 0x00000000, 0x00, 0x00,
+
1022 0x00, NULL, 0x00,
+
1023 (uint8_t *)&status_check, 1, 4); /* qspi write read */
+
1024 if (res != 0) /* check result */
+
1025 {
+
1026 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
1027
+
1028 return 1; /* return error */
+
1029 }
+
1030 if ((status_check & 0x01) == 0x00) /* check status */
+
1031 {
+
1032 break; /* break */
+
1033 }
+
1034 timeout--; /* timeout-- */
+
1035 handle->delay_ms(1); /* delay 1 ms */
+
1036 }
+
1037 if (timeout == 0) /* check timeout */
+
1038 {
+
1039 handle->debug_print("w25qxx: write status 1 timeout.\n"); /* write status 1 timeout */
+
1040
+
1041 return 4; /* return error */
+
1042 }
+
1043 else
+
1044 {
+
1045 return 0; /* success return 0 */
+
1046 }
+
1047 }
+
1048}
+
+
1049
+
+
1062uint8_t w25qxx_set_status2(w25qxx_handle_t *handle, uint8_t status)
+
1063{
+
1064 uint8_t res;
+
1065 uint8_t buf[2];
+
1066 uint32_t timeout;
+
1067 uint8_t status_check;
+
1068
+
1069 if (handle == NULL) /* check handle */
+
1070 {
+
1071 return 2; /* return error */
+
1072 }
+
1073 if (handle->inited != 1) /* check handle initialization */
+
1074 {
+
1075 return 3; /* return error */
+
1076 }
+
1077
+
1078 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
1079 {
+
1080 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
1081 {
+
1082 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 1,
+
1083 0x00000000, 0x00, 0x00,
+
1084 0x00000000, 0x00, 0x00,
+
1085 0x00, NULL, 0x00,
+
1086 NULL, 0x00, 0x00); /* qspi write read */
+
1087 if (res != 0) /* check result */
+
1088 {
+
1089 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
1090
+
1091 return 1; /* return error */
+
1092 }
+
1093 buf[0] = status; /* set status */
+
1094 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_STATUS_REG2, 1,
+
1095 0x00000000, 0x00, 0x00,
+
1096 0x00000000, 0x00, 0x00,
+
1097 0x00, (uint8_t *)buf, 1,
+
1098 NULL, 0x00, 1); /* qspi write read */
+
1099 if (res != 0) /* check result */
+
1100 {
+
1101 handle->debug_print("w25qxx: set status2 failed.\n"); /* set status2 failed */
+
1102
+
1103 return 1; /* return error */
+
1104 }
+
1105
+
1106 timeout = 1000; /* max 1000 ms */
+
1107 while (timeout != 0) /* check timeout */
+
1108 {
+
1109 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
+
1110 0x00000000, 0x00, 0x00,
+
1111 0x00000000, 0x00, 0x00,
+
1112 0x00, NULL, 0x00,
+
1113 (uint8_t *)&status_check, 1, 1); /* qspi write read */
+
1114 if (res != 0) /* check result */
+
1115 {
+
1116 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
1117
+
1118 return 1; /* return error */
+
1119 }
+
1120 if ((status_check & 0x01) == 0x00) /* check status */
+
1121 {
+
1122 break; /* break */
+
1123 }
+
1124 timeout--; /* timeout-- */
+
1125 handle->delay_ms(1); /* delay 1 ms */
+
1126 }
+
1127 if (timeout == 0) /* check timeout */
+
1128 {
+
1129 handle->debug_print("w25qxx: write status 2 timeout.\n"); /* write status 2 timeout */
+
1130
+
1131 return 4; /* return error */
+
1132 }
+
1133 else
+
1134 {
+
1135 return 0; /* success return 0 */
+
1136 }
+
1137 }
+
1138 else /* single spi */
+
1139 {
+
1140 buf[0] = W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE; /* sr write enable command */
+
1141 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
1142 if (res != 0) /* check result */
+
1143 {
+
1144 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
1145
+
1146 return 1; /* return error */
+
1147 }
+
1148 buf[0] = W25QXX_COMMAND_WRITE_STATUS_REG2; /* write status2 command */
+
1149 buf[1] = status; /* set status */
+
1150 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
+
1151 if (res != 0) /* check result */
+
1152 {
+
1153 handle->debug_print("w25qxx: set status2 failed.\n"); /* set status2 failed */
+
1154
+
1155 return 1; /* return error */
+
1156 }
+
1157
+
1158 timeout = 1000; /* max 1000 ms */
+
1159 while (timeout != 0) /* check timeout */
+
1160 {
+
1161 buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
+
1162 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1,
+
1163 (uint8_t *)&status_check, 1); /* spi write read */
+
1164 if (res != 0) /* check result */
+
1165 {
+
1166 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
1167
+
1168 return 1; /* return error */
+
1169 }
+
1170 if ((status_check & 0x01) == 0x00) /* check status */
+
1171 {
+
1172 break; /* break */
+
1173 }
+
1174 timeout--; /* timeout-- */
+
1175 handle->delay_ms(1); /* delay 1 ms */
+
1176 }
+
1177 if (timeout == 0) /* check timeout */
+
1178 {
+
1179 handle->debug_print("w25qxx: write status 2 timeout.\n"); /* write status 2 timeout */
+
1180
+
1181 return 4; /* return error */
+
1182 }
+
1183 else
+
1184 {
+
1185 return 0; /* success return 0 */
+
1186 }
+
1187 }
+
1188 }
+
1189 else /* qspi interface */
+
1190 {
+
1191 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 4,
+
1192 0x00000000, 0x00, 0x00,
+
1193 0x00000000, 0x00, 0x00,
+
1194 0x00, NULL, 0x00,
+
1195 NULL, 0x00, 0x00); /* qspi write read */
+
1196 if (res != 0) /* check result */
+
1197 {
+
1198 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
1199
+
1200 return 1; /* return error */
+
1201 }
+
1202 buf[0] = status; /* set status */
+
1203 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_STATUS_REG2, 4,
+
1204 0x00000000, 0x00, 0x00,
+
1205 0x00000000, 0x00, 0x00,
+
1206 0x00, (uint8_t *)buf, 1,
+
1207 NULL, 0x00, 4); /* qspi write read */
+
1208 if (res != 0) /* check result */
+
1209 {
+
1210 handle->debug_print("w25qxx: set status2 failed.\n"); /* set status2 failed */
+
1211
+
1212 return 1; /* return error */
+
1213 }
+
1214
+
1215 timeout = 1000; /* max 1000 ms */
+
1216 while (timeout != 0) /* check timeout */
+
1217 {
+
1218 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
+
1219 0x00000000, 0x00, 0x00,
+
1220 0x00000000, 0x00, 0x00,
+
1221 0x00, NULL, 0x00,
+
1222 (uint8_t *)&status_check, 1, 4); /* qspi write read */
+
1223 if (res != 0) /* check result */
+
1224 {
+
1225 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
1226
+
1227 return 1; /* return error */
+
1228 }
+
1229 if ((status_check & 0x01) == 0x00) /* check status */
+
1230 {
+
1231 break; /* break */
+
1232 }
+
1233 timeout--; /* timeout-- */
+
1234 handle->delay_ms(1); /* delay 1 ms */
+
1235 }
+
1236 if (timeout == 0) /* check timeout */
+
1237 {
+
1238 handle->debug_print("w25qxx: write status 2 timeout.\n"); /* write status 2 timeout */
+
1239
+
1240 return 4; /* return error */
+
1241 }
+
1242 else
+
1243 {
+
1244 return 0; /* success return 0 */
+
1245 }
+
1246 }
+
1247}
+
+
1248
+
+
1261uint8_t w25qxx_set_status3(w25qxx_handle_t *handle, uint8_t status)
+
1262{
+
1263 uint8_t res;
+
1264 uint8_t buf[2];
+
1265 uint32_t timeout;
+
1266 uint8_t status_check;
+
1267
+
1268 if (handle == NULL) /* check handle */
+
1269 {
+
1270 return 2; /* return error */
+
1271 }
+
1272 if (handle->inited != 1) /* check handle initialization */
+
1273 {
+
1274 return 3; /* return error */
+
1275 }
+
1276
+
1277 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
1278 {
+
1279 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
1280 {
+
1281 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 1,
+
1282 0x00000000, 0x00, 0x00,
+
1283 0x00000000, 0x00, 0x00,
+
1284 0x00, NULL, 0x00,
+
1285 NULL, 0x00, 0x00); /* qspi write read */
+
1286 if (res != 0) /* check result */
+
1287 {
+
1288 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
1289
+
1290 return 1; /* return error */
+
1291 }
+
1292 buf[0] = status; /* set status */
+
1293 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_STATUS_REG3, 1,
+
1294 0x00000000, 0x00, 0x00,
+
1295 0x00000000, 0x00, 0x00,
+
1296 0x00, (uint8_t *)buf, 1,
+
1297 NULL, 0x00, 1); /* qspi write read */
+
1298 if (res != 0) /* check result */
+
1299 {
+
1300 handle->debug_print("w25qxx: set status3 failed.\n"); /* set status3 failed */
+
1301
+
1302 return 1; /* return error */
+
1303 }
+
1304
+
1305 timeout = 1000; /* max 1000 ms */
+
1306 while (timeout != 0) /* check timeout */
+
1307 {
+
1308 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
+
1309 0x00000000, 0x00, 0x00,
+
1310 0x00000000, 0x00, 0x00,
+
1311 0x00, NULL, 0x00,
+
1312 (uint8_t *)&status_check, 1, 1); /* qspi write read */
+
1313 if (res != 0) /* check result */
+
1314 {
+
1315 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
1316
+
1317 return 1; /* return error */
+
1318 }
+
1319 if ((status_check & 0x01) == 0x00) /* check status */
+
1320 {
+
1321 break; /* break */
+
1322 }
+
1323 timeout--; /* timeout-- */
+
1324 handle->delay_ms(1); /* delay 1 ms */
+
1325 }
+
1326 if (timeout == 0) /* check timeout */
+
1327 {
+
1328 handle->debug_print("w25qxx: write status 3 timeout.\n"); /* write status 3 timeout */
+
1329
+
1330 return 4; /* return error */
+
1331 }
+
1332 else
+
1333 {
+
1334 return 0; /* success return 0 */
+
1335 }
+
1336 }
+
1337 else /* single spi */
+
1338 {
+
1339 buf[0] = W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE; /* sr write enable command */
+
1340 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
1341 if (res != 0) /* check result */
+
1342 {
+
1343 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
1344
+
1345 return 1; /* return error */
+
1346 }
+
1347 buf[0] = W25QXX_COMMAND_WRITE_STATUS_REG3; /* write status3 command */
+
1348 buf[1] = status; /* set status */
+
1349 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
+
1350 if (res != 0) /* check result */
+
1351 {
+
1352 handle->debug_print("w25qxx: set status3 failed.\n"); /* set status3 failed */
+
1353
+
1354 return 1; /* return error */
+
1355 }
+
1356
+
1357 timeout = 1000; /* max 1000 ms */
+
1358 while (timeout != 0) /* check timeout */
+
1359 {
+
1360 buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
+
1361 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1,
+
1362 (uint8_t *)&status_check, 1); /* spi write read */
+
1363 if (res != 0) /* check result */
+
1364 {
+
1365 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
1366
+
1367 return 1; /* return error */
+
1368 }
+
1369 if ((status_check & 0x01) == 0x00) /* check status */
+
1370 {
+
1371 break; /* break */
+
1372 }
+
1373 timeout--; /* timeout-- */
+
1374 handle->delay_ms(1); /* delay 1 ms */
+
1375 }
+
1376 if (timeout == 0) /* check timeout */
+
1377 {
+
1378 handle->debug_print("w25qxx: write status 3 timeout.\n"); /* write status 3 timeout */
+
1379
+
1380 return 4; /* return error */
+
1381 }
+
1382 else
+
1383 {
+
1384 return 0; /* success return 0 */
+
1385 }
+
1386 }
+
1387 }
+
1388 else /* qspi interface */
+
1389 {
+
1390 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 4,
+
1391 0x00000000, 0x00, 0x00,
+
1392 0x00000000, 0x00, 0x00,
+
1393 0x00, NULL, 0x00,
+
1394 NULL, 0x00, 0x00); /* qspi write read */
+
1395 if (res != 0) /* check result */
+
1396 {
+
1397 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
1398
+
1399 return 1; /* return error */
+
1400 }
+
1401 buf[0] = status; /* set status */
+
1402 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_STATUS_REG3, 4,
+
1403 0x00000000, 0x00, 0x00,
+
1404 0x00000000, 0x00, 0x00,
+
1405 0x00, (uint8_t *)buf, 1,
+
1406 NULL, 0x00, 4); /* qspi write read */
+
1407 if (res != 0) /* check result */
+
1408 {
+
1409 handle->debug_print("w25qxx: set status3 failed.\n"); /* set status3 failed */
+
1410
+
1411 return 1; /* return error */
+
1412 }
+
1413
+
1414 timeout = 1000; /* max 1000 ms */
+
1415 while (timeout != 0) /* check timeout */
+
1416 {
+
1417 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
+
1418 0x00000000, 0x00, 0x00,
+
1419 0x00000000, 0x00, 0x00,
+
1420 0x00, NULL, 0x00,
+
1421 (uint8_t *)&status_check, 1, 4); /* qspi write read */
+
1422 if (res != 0) /* check result */
+
1423 {
+
1424 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
1425
+
1426 return 1; /* return error */
+
1427 }
+
1428 if ((status_check & 0x01) == 0x00) /* check status */
+
1429 {
+
1430 break; /* break */
+
1431 }
+
1432 timeout--; /* timeout-- */
+
1433 handle->delay_ms(1); /* delay 1 ms */
+
1434 }
+
1435 if (timeout == 0) /* check timeout */
+
1436 {
+
1437 handle->debug_print("w25qxx: write status 3 timeout.\n"); /* write status 3 timeout */
+
1438
+
1439 return 4; /* return error */
+
1440 }
+
1441 else
+
1442 {
+
1443 return 0; /* success return 0 */
+
1444 }
+
1445 }
+
1446}
+
+
1447
+
+
1459uint8_t w25qxx_chip_erase(w25qxx_handle_t *handle)
+
1460{
+
1461 uint8_t res;
+
1462 uint8_t status;
+
1463 uint8_t buf[1];
+
1464 uint32_t timeout;
+
1465
+
1466 if (handle == NULL) /* check handle */
+
1467 {
+
1468 return 2; /* return error */
+
1469 }
+
1470 if (handle->inited != 1) /* check handle initialization */
+
1471 {
+
1472 return 3; /* return error */
+
1473 }
+
1474
+
1475 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
1476 {
+
1477 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
1478 {
+
1479 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
1480 0x00000000, 0x00, 0x00,
+
1481 0x00000000, 0x00, 0x00,
+
1482 0x00, NULL, 0x00,
+
1483 NULL, 0x00, 0x00); /* qspi write read */
+
1484 if (res != 0) /* check result */
+
1485 {
+
1486 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
1487
+
1488 return 1; /* return error */
+
1489 }
+
1490 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_CHIP_ERASE, 1,
+
1491 0x00000000, 0x00, 0x00,
+
1492 0x00000000, 0x00, 0x00,
+
1493 0x00, NULL, 0x00,
+
1494 NULL, 0x00, 0x00); /* qspi write read */
+
1495 if (res != 0) /* check result */
+
1496 {
+
1497 handle->debug_print("w25qxx: chip erase failed.\n"); /* chip erase failed */
+
1498
+
1499 return 1; /* return error */
+
1500 }
+
1501 timeout = 400 * 1000; /* max 400s */
+
1502 while (timeout != 0) /* check timeout */
+
1503 {
+
1504 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
+
1505 0x00000000, 0x00, 0x00,
+
1506 0x00000000, 0x00, 0x00,
+
1507 0x00, NULL, 0x00,
+
1508 (uint8_t *)&status, 1, 1); /* qspi write read */
+
1509 if (res != 0) /* check result */
+
1510 {
+
1511 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
1512
+
1513 return 1; /* return error */
+
1514 }
+
1515 if ((status & 0x01) == 0x00) /* check status */
+
1516 {
+
1517 break; /* break */
+
1518 }
+
1519 timeout--; /* timeout-- */
+
1520 handle->delay_ms(1); /* delay 1 ms */
+
1521 }
+
1522 if (timeout == 0) /* check timeout */
+
1523 {
+
1524 handle->debug_print("w25qxx: erase timeout.\n"); /* erase timeout */
+
1525
+
1526 return 4; /* return error */
+
1527 }
+
1528 else
+
1529 {
+
1530 return 0; /* success return 0 */
+
1531 }
+
1532 }
+
1533 else /* single spi */
+
1534 {
+
1535 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
1536 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
1537 if (res != 0) /* check result */
+
1538 {
+
1539 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
1540
+
1541 return 1; /* return error */
+
1542 }
+
1543 buf[0] = W25QXX_COMMAND_CHIP_ERASE; /* chip erase command */
+
1544 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi qspi write read */
+
1545 if (res != 0) /* check result */
+
1546 {
+
1547 handle->debug_print("w25qxx: chip erase failed.\n"); /* chip erase failed */
+
1548
+
1549 return 1; /* return error */
+
1550 }
+
1551 timeout = 400 * 1000; /* max 400s */
+
1552 while (timeout != 0) /* check timeout */
+
1553 {
+
1554 buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
+
1555 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1,
+
1556 (uint8_t *)&status, 1); /* spi write read */
+
1557 if (res != 0) /* check result */
+
1558 {
+
1559 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
1560
+
1561 return 1; /* return error */
+
1562 }
+
1563 if ((status & 0x01) == 0x00) /* check status */
+
1564 {
+
1565 break; /* break */
+
1566 }
+
1567 timeout--; /* timeout-- */
+
1568 handle->delay_ms(1); /* delay 1 ms */
+
1569 }
+
1570 if (timeout == 0) /* check timeout */
+
1571 {
+
1572 handle->debug_print("w25qxx: erase timeout.\n"); /* erase timeout */
+
1573
+
1574 return 4; /* return error */
+
1575 }
+
1576 else
+
1577 {
+
1578 return 0; /* success return 0 */
+
1579 }
+
1580 }
+
1581 }
+
1582 else /* qspi interface */
+
1583 {
+
1584 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
1585 0x00000000, 0x00, 0x00,
+
1586 0x00000000, 0x00, 0x00,
+
1587 0x00, NULL, 0x00,
+
1588 NULL, 0x00, 0x00); /* qspi write read */
+
1589 if (res != 0) /* check result */
+
1590 {
+
1591 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
1592
+
1593 return 1; /* return error */
+
1594 }
+
1595 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_CHIP_ERASE, 4,
+
1596 0x00000000, 0x00, 0x00,
+
1597 0x00000000, 0x00, 0x00,
+
1598 0x00, NULL, 0x00,
+
1599 NULL, 0x00, 0x00); /* qspi write read */
+
1600 if (res != 0) /* check result */
+
1601 {
+
1602 handle->debug_print("w25qxx: chip erase failed.\n"); /* chip erase failed */
+
1603
+
1604 return 1; /* return error */
+
1605 }
+
1606 timeout = 400 * 1000; /* max 400s */
+
1607 while (timeout != 0) /* check timeout */
+
1608 {
+
1609 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
+
1610 0x00000000, 0x00, 0x00,
+
1611 0x00000000, 0x00, 0x00,
+
1612 0x00, NULL, 0x00,
+
1613 (uint8_t *)&status, 1, 4); /* qspi write read */
+
1614 if (res != 0) /* check result */
+
1615 {
+
1616 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
1617
+
1618 return 1; /* return error */
+
1619 }
+
1620 if ((status & 0x01) == 0x00) /* check status */
+
1621 {
+
1622 break; /* break */
+
1623 }
+
1624 timeout--; /* timeout-- */
+
1625 handle->delay_ms(1); /* delay 1 ms */
+
1626 }
+
1627 if (timeout == 0) /* check timeout */
+
1628 {
+
1629 handle->debug_print("w25qxx: erase timeout.\n"); /* erase timeout */
+
1630
+
1631 return 4; /* return error */
+
1632 }
+
1633 else
+
1634 {
+
1635 return 0; /* success return 0 */
+
1636 }
+
1637 }
+
1638}
+
+
1639
+
+
1650uint8_t w25qxx_erase_program_suspend(w25qxx_handle_t *handle)
+
1651{
+
1652 uint8_t res;
+
1653 uint8_t buf[1];
+
1654
+
1655 if (handle == NULL) /* check handle */
+
1656 {
+
1657 return 2; /* return error */
+
1658 }
+
1659 if (handle->inited != 1) /* check handle initialization */
+
1660 {
+
1661 return 3; /* return error */
+
1662 }
+
1663
+
1664 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
1665 {
+
1666 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
1667 {
+
1668 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND, 1,
+
1669 0x00000000, 0x00, 0x00,
+
1670 0x00000000, 0x00, 0x00,
+
1671 0x00, NULL, 0x00,
+
1672 NULL, 0x00, 0x00); /* qspi write read */
+
1673 if (res != 0) /* check result */
+
1674 {
+
1675 handle->debug_print("w25qxx: erase program suspend failed.\n"); /* erase program suspend failed */
+
1676
+
1677 return 1; /* return error */
+
1678 }
+
1679 }
+
1680 else /* single spi */
+
1681 {
+
1682 buf[0] = W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND; /* erase program suspend command */
+
1683 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
1684 if (res != 0) /* check result */
+
1685 {
+
1686 handle->debug_print("w25qxx: erase program suspend failed.\n"); /* erase program suspend failed */
+
1687
+
1688 return 1; /* return error */
+
1689 }
+
1690
+
1691 return 0; /* success return 0 */
+
1692 }
+
1693 }
+
1694 else /* qspi interface */
+
1695 {
+
1696 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND, 4,
+
1697 0x00000000, 0x00, 0x00,
+
1698 0x00000000, 0x00, 0x00,
+
1699 0x00, NULL, 0x00,
+
1700 NULL, 0x00, 0x00); /* qspi write read */
+
1701 if (res != 0) /* check result */
+
1702 {
+
1703 handle->debug_print("w25qxx: erase program suspend failed.\n"); /* erase program suspend failed */
+
1704
+
1705 return 1; /* return error */
+
1706 }
+
1707 }
+
1708
+
1709 return 0; /* success return 0 */
+
1710}
+
+
1711
+
+
1722uint8_t w25qxx_erase_program_resume(w25qxx_handle_t *handle)
+
1723{
+
1724 uint8_t res;
+
1725 uint8_t buf[1];
+
1726
+
1727 if (handle == NULL) /* check handle */
+
1728 {
+
1729 return 2; /* return error */
+
1730 }
+
1731 if (handle->inited != 1) /* check handle initialization */
+
1732 {
+
1733 return 3; /* return error */
+
1734 }
+
1735
+
1736 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
1737 {
+
1738 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
1739 {
+
1740 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_ERASE_PROGRAM_RESUME, 1,
+
1741 0x00000000, 0x00, 0x00,
+
1742 0x00000000, 0x00, 0x00,
+
1743 0x00, NULL, 0x00,
+
1744 NULL, 0x00, 0x00); /* qspi write read */
+
1745 if (res != 0) /* check result */
+
1746 {
+
1747 handle->debug_print("w25qxx: erase program resume failed.\n"); /* erase program resume failed */
+
1748
+
1749 return 1; /* return error */
+
1750 }
+
1751 }
+
1752 else /* single spi */
+
1753 {
+
1754 buf[0] = W25QXX_COMMAND_ERASE_PROGRAM_RESUME; /* erase program resume command */
+
1755 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
1756 if (res != 0) /* check result */
+
1757 {
+
1758 handle->debug_print("w25qxx: erase program resume failed.\n"); /* erase program resume failed */
+
1759
+
1760 return 1; /* return error */
+
1761 }
+
1762 }
+
1763 }
+
1764 else /* qspi interface */
+
1765 {
+
1766 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_ERASE_PROGRAM_RESUME, 4,
+
1767 0x00000000, 0x00, 0x00,
+
1768 0x00000000, 0x00, 0x00,
+
1769 0x00, NULL, 0x00,
+
1770 NULL, 0x00, 0x00); /* qspi write read */
+
1771 if (res != 0) /* check result */
+
1772 {
+
1773 handle->debug_print("w25qxx: erase program resume failed.\n"); /* erase program resume failed */
+
1774
+
1775 return 1; /* return error */
+
1776 }
+
1777 }
+
1778
+
1779 return 0; /* success return 0 */
+
1780}
+
+
1781
+
+
1792uint8_t w25qxx_power_down(w25qxx_handle_t *handle)
+
1793{
+
1794 uint8_t res;
+
1795 uint8_t buf[1];
+
1796
+
1797 if (handle == NULL) /* check handle */
+
1798 {
+
1799 return 2; /* return error */
+
1800 }
+
1801 if (handle->inited != 1) /* check handle initialization */
+
1802 {
+
1803 return 3; /* return error */
+
1804 }
+
1805
+
1806 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
1807 {
+
1808 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
1809 {
+
1810 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_POWER_DOWN, 1,
+
1811 0x00000000, 0x00, 0x00,
+
1812 0x00000000, 0x00, 0x00,
+
1813 0x00, NULL, 0x00,
+
1814 NULL, 0x00, 0x00); /* qspi write read */
+
1815 if (res != 0) /* check result */
+
1816 {
+
1817 handle->debug_print("w25qxx: power down failed.\n"); /* power down failed */
+
1818
+
1819 return 1; /* return error */
+
1820 }
+
1821 }
+
1822 else /* single spi */
+
1823 {
+
1824 buf[0] = W25QXX_COMMAND_POWER_DOWN; /* power down command */
+
1825 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf,
+
1826 1, NULL, 0); /* spi write read */
+
1827 if (res != 0) /* check result */
+
1828 {
+
1829 handle->debug_print("w25qxx: power down failed.\n"); /* power down failed */
+
1830
+
1831 return 1; /* return error */
+
1832 }
+
1833 }
+
1834 }
+
1835 else /* qspi interface */
+
1836 {
+
1837 res = a_w25qxx_qspi_write_read(handle, 0xFF, 4,
+
1838 0x00000000, 0x00, 0x00,
+
1839 0x00000000, 0x00, 0x00,
+
1840 0, NULL, 0x00,
+
1841 NULL, 0x00, 0); /* spi write read */
+
1842 if (res != 0) /* check result */
+
1843 {
+
1844 handle->debug_print("w25qxx: exit qspi mode failed.\n"); /* exit qspi mode failed */
+
1845
+
1846 return 1; /* return error */
+
1847 }
+
1848 handle->delay_ms(10); /* delay 10 ms */
+
1849 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_POWER_DOWN, 4,
+
1850 0x00000000, 0x00, 0x00,
+
1851 0x00000000, 0x00, 0x00,
+
1852 0x00, NULL, 0x00,
+
1853 NULL, 0x00, 0x00); /* qspi write read */
+
1854 if (res != 0) /* check result */
+
1855 {
+
1856 handle->debug_print("w25qxx: power down failed.\n"); /* power down failed */
+
1857
+
1858 return 1; /* return error */
+
1859 }
+
1860 }
+
1861
+
1862 return 0; /* success return 0 */
+
1863}
+
+
1864
+
+
1875uint8_t w25qxx_release_power_down(w25qxx_handle_t *handle)
+
1876{
+
1877 uint8_t res;
+
1878 uint8_t id;
+
1879 uint8_t buf[4];
+
1880
+
1881 if (handle == NULL) /* check handle */
+
1882 {
+
1883 return 2; /* return error */
+
1884 }
+
1885 if (handle->inited != 1) /* check handle initialization */
+
1886 {
+
1887 return 3; /* return error */
+
1888 }
+
1889
+
1890 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
1891 {
+
1892 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
1893 {
+
1894 res = a_w25qxx_qspi_write_read(handle,
+
1895 W25QXX_COMMAND_RELEASE_POWER_DOWN, 1,
+
1896 0x00000000, 0x00, 0x00,
+
1897 0x00000000, 0x00, 0x00,
+
1898 3 * 8, NULL, 0x00,
+
1899 (uint8_t *)&id, 1, 1); /* qspi write read */
+
1900 if (res != 0) /* check result */
+
1901 {
+
1902 handle->debug_print("w25qxx: release power down failed.\n"); /* release power down failed */
+
1903
+
1904 return 1; /* return error */
+
1905 }
+
1906 }
+
1907 else /* single spi */
+
1908 {
+
1909 buf[0] = W25QXX_COMMAND_RELEASE_POWER_DOWN; /* release power down command */
+
1910 buf[1] = 0xFF; /* dummy */
+
1911 buf[2] = 0xFF; /* dummy */
+
1912 buf[3] = 0xFF; /* dummy */
+
1913 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, (uint8_t *)&id, 1); /* spi write read */
+
1914 if (res != 0) /* check result */
+
1915 {
+
1916 handle->debug_print("w25qxx: release power down failed.\n"); /* release power down failed */
+
1917
+
1918 return 1; /* return error */
+
1919 }
+
1920 }
+
1921 }
+
1922 else /* qspi interface */
+
1923 {
+
1924 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_RELEASE_POWER_DOWN, 4,
+
1925 0x00000000, 0x00, 0x00,
+
1926 0x00000000, 0x00, 0x00,
+
1927 6, NULL, 0x00,
+
1928 (uint8_t *)&id, 1, 4); /* qspi write read */
+
1929 if (res != 0) /* check result */
+
1930 {
+
1931 handle->debug_print("w25qxx: release power down failed.\n"); /* release power down failed */
+
1932
+
1933 return 1; /* return error */
+
1934 }
+
1935 }
+
1936
+
1937 return 0; /* success return 0 */
+
1938}
+
+
1939
+
+
1952uint8_t w25qxx_get_manufacturer_device_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
+
1953{
+
1954 uint8_t res;
+
1955 uint8_t buf[4];
+
1956 uint8_t out[2];
+
1957
+
1958 if (handle == NULL) /* check handle */
+
1959 {
+
1960 return 2; /* return error */
+
1961 }
+
1962 if (handle->inited != 1) /* check handle initialization */
+
1963 {
+
1964 return 3; /* return error */
+
1965 }
+
1966
+
1967 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
1968 {
+
1969 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
1970 {
+
1971 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_MANUFACTURER, 1,
+
1972 0x00000000, 1, 3,
+
1973 0x00000000, 0x00, 0x00,
+
1974 0, NULL, 0x00,
+
1975 (uint8_t *)out, 2, 1); /* qspi write read */
+
1976 if (res != 0) /* check result */
+
1977 {
+
1978 handle->debug_print("w25qxx: get manufacturer device id failed.\n"); /* get manufacturer device id failed */
+
1979
+
1980 return 1; /* return error */
+
1981 }
+
1982 *manufacturer = out[0]; /* set manufacturer */
+
1983 *device_id = out[1]; /* set device id */
+
1984 }
+
1985 else /* single spi */
+
1986 {
+
1987 buf[0] = W25QXX_COMMAND_READ_MANUFACTURER; /* read manufacturer command */
+
1988 buf[1] = 0x00; /* dummy */
+
1989 buf[2] = 0x00; /* dummy */
+
1990 buf[3] = 0x00; /* dummy */
+
1991 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4,
+
1992 (uint8_t *)out, 2); /* spi write read */
+
1993 if (res != 0) /* check result */
+
1994 {
+
1995 handle->debug_print("w25qxx: get manufacturer device id failed.\n"); /* get manufacturer device id failed */
+
1996
+
1997 return 1; /* return error */
+
1998 }
+
1999 *manufacturer = out[0]; /* set manufacturer */
+
2000 *device_id = out[1]; /* set device id */
+
2001 }
+
2002 }
+
2003 else /* qspi interface */
+
2004 {
+
2005 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_MANUFACTURER, 4,
+
2006 0x00000000, 4, 3,
+
2007 0x00000000, 0x00, 0x00,
+
2008 0, NULL, 0x00,
+
2009 (uint8_t *)out, 2, 4); /* qspi write read */
+
2010 if (res != 0) /* check result */
+
2011 {
+
2012 handle->debug_print("w25qxx: get manufacturer device id failed.\n"); /* get manufacturer device id failed */
+
2013
+
2014 return 1; /* return error */
+
2015 }
+
2016 *manufacturer = out[0]; /* set manufacturer */
+
2017 *device_id = out[1]; /* set device id */
+
2018 }
+
2019
+
2020 return 0; /* success return 0 */
+
2021}
+
+
2022
+
+
2038uint8_t w25qxx_get_manufacturer_device_id_dual_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
+
2039{
+
2040 uint8_t res;
+
2041 uint8_t out[2];
+
2042
+
2043 if (handle == NULL) /* check handle */
+
2044 {
+
2045 return 2; /* return error */
+
2046 }
+
2047 if (handle->inited != 1) /* check handle initialization */
+
2048 {
+
2049 return 3; /* return error */
+
2050 }
+
2051
+
2052 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
2053 {
+
2054 if (handle->dual_quad_spi_enable == 0) /* check spi */
+
2055 {
+
2056 handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
+
2057
+
2058 return 6; /* return error */
+
2059 }
+
2060 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
2061 {
+
2062 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_DEVICE_ID_DUAL_IO, 1,
+
2063 0x00000000, 2, 3,
+
2064 0x000000FF, 2, 1,
+
2065 0x00, NULL, 0x00,
+
2066 (uint8_t *)out, 2, 2); /* spi write read */
+
2067 if (res != 0) /* check result */
+
2068 {
+
2069 handle->debug_print("w25qxx: get manufacturer device id dual io failed.\n"); /* get manufacturer device id dual io failed */
+
2070
+
2071 return 1; /* return error */
+
2072 }
+
2073 }
+
2074 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
2075 {
+
2076 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_DEVICE_ID_DUAL_IO, 1,
+
2077 0x00000000, 2, 4,
+
2078 0x000000FF, 2, 1,
+
2079 0x00, NULL, 0x00,
+
2080 (uint8_t *)out, 2, 2); /* spi write read */
+
2081 if (res != 0) /* check result */
+
2082 {
+
2083 handle->debug_print("w25qxx: get manufacturer device id dual io failed.\n"); /* get manufacturer device id dual io failed */
+
2084
+
2085 return 1; /* return error */
+
2086 }
+
2087 }
+
2088 else
+
2089 {
+
2090 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
2091
+
2092 return 4; /* return error */
+
2093 }
+
2094 *manufacturer = out[0]; /* set manufacturer */
+
2095 *device_id = out[1]; /* set device id */
+
2096 }
+
2097 else
+
2098 {
+
2099 handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
+
2100
+
2101 return 5; /* return error */
+
2102 }
+
2103
+
2104 return 0; /* success return 0 */
+
2105}
+
+
2106
+
+
2122uint8_t w25qxx_get_manufacturer_device_id_quad_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
+
2123{
+
2124 uint8_t res;
+
2125 uint8_t out[2];
+
2126
+
2127 if (handle == NULL) /* check handle */
+
2128 {
+
2129 return 2; /* return error */
+
2130 }
+
2131 if (handle->inited != 1) /* check handle initialization */
+
2132 {
+
2133 return 3; /* return error */
+
2134 }
+
2135
+
2136 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
2137 {
+
2138 if (handle->dual_quad_spi_enable == 0) /* check spi */
+
2139 {
+
2140 handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
+
2141
+
2142 return 6; /* return error */
+
2143 }
+
2144 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
2145 {
+
2146 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_DEVICE_ID_QUAD_IO, 1,
+
2147 0x00000000, 4, 3,
+
2148 0x000000FF, 4, 1,
+
2149 4, NULL, 0x00,
+
2150 (uint8_t *)out, 2, 4); /* spi write read */
+
2151 if (res != 0) /* check result */
+
2152 {
+
2153 handle->debug_print("w25qxx: get manufacturer device id quad io failed.\n"); /* get manufacturer device id quad io failed */
+
2154
+
2155 return 1; /* return error */
+
2156 }
+
2157 }
+
2158 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
2159 {
+
2160 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_DEVICE_ID_QUAD_IO, 1,
+
2161 0x00000000, 4, 4,
+
2162 0x000000FF, 4, 1,
+
2163 4, NULL, 0x00,
+
2164 (uint8_t *)out, 2, 4); /* spi write read */
+
2165 if (res != 0) /* check result */
+
2166 {
+
2167 handle->debug_print("w25qxx: get manufacturer device id quad io failed.\n"); /* get manufacturer device id quad io failed */
+
2168
+
2169 return 1; /* return error */
+
2170 }
+
2171 }
+
2172 else
+
2173 {
+
2174 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
2175
+
2176 return 4; /* return error */
+
2177 }
+
2178 *manufacturer = out[0]; /* set manufacturer */
+
2179 *device_id = out[1]; /* set device id */
+
2180 }
+
2181 else
+
2182 {
+
2183 handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
+
2184
+
2185 return 5; /* return error */
+
2186 }
+
2187
+
2188 return 0; /* success return 0 */
+
2189}
+
+
2190
+
+
2203uint8_t w25qxx_get_jedec_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
+
2204{
+
2205 uint8_t res;
+
2206 uint8_t buf[1];
+
2207 uint8_t out[3];
+
2208
+
2209 if (handle == NULL) /* check handle */
+
2210 {
+
2211 return 2; /* return error */
+
2212 }
+
2213 if (handle->inited != 1) /* check handle initialization */
+
2214 {
+
2215 return 3; /* return error */
+
2216 }
+
2217
+
2218 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
2219 {
+
2220 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
2221 {
+
2222 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_JEDEC_ID, 1,
+
2223 0x00000000, 0x00, 0x00,
+
2224 0x00000000, 0x00, 0x00,
+
2225 0, NULL, 0x00,
+
2226 (uint8_t *)out, 3, 1); /* qspi write read */
+
2227 if (res != 0) /* check result */
+
2228 {
+
2229 handle->debug_print("w25qxx: get jedec id failed.\n"); /* get jedec id failed */
+
2230
+
2231 return 1; /* return error */
+
2232 }
+
2233 *manufacturer = out[0]; /* set manufacturer */
+
2234 device_id[0] = out[1]; /* set device id 0 */
+
2235 device_id[1] = out[2]; /* set device id 1 */
+
2236 }
+
2237 else /* single spi */
+
2238 {
+
2239 buf[0] = W25QXX_COMMAND_JEDEC_ID; /* jedec id command */
+
2240 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1,
+
2241 (uint8_t *)out, 3); /* spi write read */
+
2242 if (res != 0) /* check result */
+
2243 {
+
2244 handle->debug_print("w25qxx: get jedec id failed.\n"); /* get jedec id failed */
+
2245
+
2246 return 1; /* return error */
+
2247 }
+
2248 *manufacturer = out[0]; /* set manufacturer */
+
2249 device_id[0] = out[1]; /* set device id 0 */
+
2250 device_id[1] = out[2]; /* set device id 1 */
+
2251 }
+
2252 }
+
2253 else /* qspi interface */
+
2254 {
+
2255 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_JEDEC_ID, 4,
+
2256 0x00000000, 0x00, 0x00,
+
2257 0x00000000, 0x00, 0x00,
+
2258 0, NULL, 0x00,
+
2259 (uint8_t *)out, 3, 4); /* qspi write read */
+
2260 if (res != 0) /* check result */
+
2261 {
+
2262 handle->debug_print("w25qxx: get jedec id failed.\n"); /* get jedec id failed */
+
2263
+
2264 return 1; /* return error */
+
2265 }
+
2266 *manufacturer = out[0]; /* set manufacturer */
+
2267 device_id[0] = out[1]; /* set device id 0 */
+
2268 device_id[1] = out[2]; /* set device id 1 */
+
2269 }
+
2270
+
2271 return 0; /* success return 0 */
+
2272}
+
+
2273
+
+
2284uint8_t w25qxx_global_block_lock(w25qxx_handle_t *handle)
+
2285{
+
2286 uint8_t res;
+
2287 uint8_t buf[1];
+
2288
+
2289 if (handle == NULL) /* check handle */
+
2290 {
+
2291 return 2; /* return error */
+
2292 }
+
2293 if (handle->inited != 1) /* check handle initialization */
+
2294 {
+
2295 return 3; /* return error */
+
2296 }
+
2297
+
2298 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
2299 {
+
2300 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
2301 {
+
2302 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK, 1,
+
2303 0x00000000, 0x00, 0x00,
+
2304 0x00000000, 0x00, 0x00,
+
2305 0, NULL, 0x00,
+
2306 NULL, 0x00, 0x00); /* qspi write read */
+
2307 if (res != 0) /* check result */
+
2308 {
+
2309 handle->debug_print("w25qxx: global block lock failed.\n"); /* global block lock failed */
+
2310
+
2311 return 1; /* return error */
+
2312 }
+
2313 }
+
2314 else /* single spi */
+
2315 {
+
2316 buf[0] = W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK; /* global block lock command */
+
2317 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
2318 if (res != 0) /* check result */
+
2319 {
+
2320 handle->debug_print("w25qxx: global block lock failed.\n"); /* global block lock failed */
+
2321
+
2322 return 1; /* return error */
+
2323 }
+
2324 }
+
2325 }
+
2326 else /* qspi interface */
+
2327 {
+
2328 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK, 4,
+
2329 0x00000000, 0x00, 0x00,
+
2330 0x00000000, 0x00, 0x00,
+
2331 0, NULL, 0x00,
+
2332 NULL, 0x00, 0x00); /* qspi write read */
+
2333 if (res != 0) /* check result */
+
2334 {
+
2335 handle->debug_print("w25qxx: global block lock failed.\n"); /* global block lock failed */
+
2336
+
2337 return 1; /* return error */
+
2338 }
+
2339 }
+
2340
+
2341 return 0; /* success return 0 */
+
2342}
+
+
2343
+
+
2354uint8_t w25qxx_global_block_unlock(w25qxx_handle_t *handle)
+
2355{
+
2356 uint8_t res;
+
2357 uint8_t buf[1];
+
2358
+
2359 if (handle == NULL) /* check handle */
+
2360 {
+
2361 return 2; /* return error */
+
2362 }
+
2363 if (handle->inited != 1) /* check handle initialization */
+
2364 {
+
2365 return 3; /* return error */
+
2366 }
+
2367
+
2368 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
2369 {
+
2370 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
2371 {
+
2372 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK, 1,
+
2373 0x00000000, 0x00, 0x00,
+
2374 0x00000000, 0x00, 0x00,
+
2375 0, NULL, 0x00,
+
2376 NULL, 0x00, 0x00); /* qspi write read */
+
2377 if (res != 0) /* check result */
+
2378 {
+
2379 handle->debug_print("w25qxx: global block unlock failed.\n"); /* global block unlock failed */
+
2380
+
2381 return 1; /* return error */
+
2382 }
+
2383 }
+
2384 else /* single spi */
+
2385 {
+
2386 buf[0] = W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK; /* global block unlock command */
+
2387 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi qspi write read */
+
2388 if (res != 0) /* check result */
+
2389 {
+
2390 handle->debug_print("w25qxx: global block unlock failed.\n"); /* global block unlock failed */
+
2391
+
2392 return 1; /* return error */
+
2393 }
+
2394 }
+
2395 }
+
2396 else /* qspi interface */
+
2397 {
+
2398 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK, 4,
+
2399 0x00000000, 0x00, 0x00,
+
2400 0x00000000, 0x00, 0x00,
+
2401 0, NULL, 0x00,
+
2402 NULL, 0x00, 0x00); /* qspi write read */
+
2403 if (res != 0) /* check result */
+
2404 {
+
2405 handle->debug_print("w25qxx: global block unlock failed.\n"); /* global block unlock failed */
+
2406
+
2407 return 1; /* return error */
+
2408 }
+
2409 }
+
2410
+
2411 return 0; /* success return 0 */
+
2412}
+
+
2413
+
+
2427uint8_t w25qxx_set_read_parameters(w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
+
2428{
+
2429 uint8_t res;
+
2430 uint8_t buf[1];
+
2431
+
2432 if (handle == NULL) /* check handle */
+
2433 {
+
2434 return 2; /* return error */
+
2435 }
+
2436 if (handle->inited != 1) /* check handle initialization */
+
2437 {
+
2438 return 3; /* return error */
+
2439 }
+
2440
+
2441 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
2442 {
+
2443 handle->debug_print("w25qxx: spi interface can't use this function.\n"); /* spi interface can't use this function */
+
2444
+
2445 return 4; /* return error */
+
2446 }
+
2447 else
+
2448 {
+
2449 handle->param = (uint8_t)((dummy << 4) | (length << 0)); /* set param */
+
2450 buf[0] = handle->param; /* set param */
+
2451 res = a_w25qxx_qspi_write_read(handle, 0xC0, 4,
+
2452 0x00000000, 0x00, 0x00,
+
2453 0x00000000, 0x00, 0x00,
+
2454 0, (uint8_t *)buf, 1,
+
2455 NULL, 0x00, 4); /* qspi write read */
+
2456 if (res != 0) /* check result */
+
2457 {
+
2458 handle->debug_print("w25qxx: set read parameters failed.\n"); /* set read parameters failed */
+
2459
+
2460 return 5; /* return error */
+
2461 }
+
2462 if (((buf[0] >> 4) & 0x03) == 0x00) /* if 0x00 */
+
2463 {
+
2464 handle->dummy = 2; /* dummy 2 */
+
2465 }
+
2466 else if (((buf[0] >> 4) & 0x03) == 0x01) /* if 0x01 */
+
2467 {
+
2468 handle->dummy = 4; /* dummy 4 */
+
2469 }
+
2470 else if (((buf[0] >> 4) & 0x03) == 0x02) /* if 0x02 */
+
2471 {
+
2472 handle->dummy = 6; /* dummy 6 */
+
2473 }
+
2474 else /* if 0x03 */
+
2475 {
+
2476 handle->dummy = 8; /* dummy 8 */
+
2477 }
+
2478 }
+
2479
+
2480 return 0; /* success return 0 */
+
2481}
+
+
2482
+
+
2494uint8_t w25qxx_enter_qspi_mode(w25qxx_handle_t *handle)
+
2495{
+
2496 uint8_t res;
+
2497 uint8_t buf[1];
+
2498
+
2499 if (handle == NULL) /* check handle */
+
2500 {
+
2501 return 2; /* return error */
+
2502 }
+
2503 if (handle->inited != 1) /* check handle initialization */
+
2504 {
+
2505 return 3; /* return error */
+
2506 }
+
2507
+
2508 if (handle->spi_qspi == W25QXX_INTERFACE_QSPI) /* qspi interface */
+
2509 {
+
2510 handle->debug_print("w25qxx: qspi interface can't use this function.\n"); /* qspi interface can't use this function */
+
2511
+
2512 return 4; /* return error */
+
2513 }
+
2514 else
+
2515 {
+
2516 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_ENTER_QSPI_MODE, 1,
+
2517 0x00000000, 0x00, 0x00,
+
2518 0x00000000, 0x00, 0x00,
+
2519 0, NULL, 0x00,
+
2520 NULL, 0x00, 0x00); /* qspi write read */
+
2521 if (res != 0) /* check result */
+
2522 {
+
2523 handle->debug_print("w25qxx: enter qspi mode failed.\n"); /* enter qspi mode failed */
+
2524
+
2525 return 1; /* return error */
+
2526 }
+
2527 handle->delay_ms(10); /* delay 10 ms */
+
2528 buf[0] = handle->param; /* set param */
+
2529 res = a_w25qxx_qspi_write_read(handle, 0xC0, 4,
+
2530 0x00000000, 0x00, 0x00,
+
2531 0x00000000, 0x00, 0x00,
+
2532 0, (uint8_t *)buf, 1,
+
2533 NULL, 0x00, 4); /* qspi write read */
+
2534 if (res != 0) /* check result */
+
2535 {
+
2536 handle->debug_print("w25qxx: set read parameters failed.\n"); /* set read parameters failed */
+
2537
+
2538 return 5; /* return error */
+
2539 }
+
2540 if (((buf[0] >> 4) & 0x03) == 0x00) /* if 0x00 */
+
2541 {
+
2542 handle->dummy = 2; /* dummy 2 */
+
2543 }
+
2544 else if (((buf[0] >> 4) & 0x03) == 0x01) /* if 0x01 */
+
2545 {
+
2546 handle->dummy = 4; /* dummy 4 */
+
2547 }
+
2548 else if (((buf[0] >> 4) & 0x03) == 0x02) /* if 0x02 */
+
2549 {
+
2550 handle->dummy = 6; /* dummy 6 */
+
2551 }
+
2552 else /* if 0x03 */
+
2553 {
+
2554 handle->dummy = 8; /* dummy 8 */
+
2555 }
+
2556 }
+
2557
+
2558 return 0; /* success return 0 */
+
2559}
+
+
2560
+
+
2572uint8_t w25qxx_exit_qspi_mode(w25qxx_handle_t *handle)
+
2573{
+
2574 uint8_t res;
+
2575
+
2576 if (handle == NULL) /* check handle */
+
2577 {
+
2578 return 2; /* return error */
+
2579 }
+
2580 if (handle->inited != 1) /* check handle initialization */
+
2581 {
+
2582 return 3; /* return error */
+
2583 }
+
2584
+
2585 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
2586 {
+
2587 handle->debug_print("w25qxx: spi interface can't use this function.\n"); /* spi interface can't use this function */
+
2588
+
2589 return 4; /* return error */
+
2590 }
+
2591 else
+
2592 {
+
2593 res = a_w25qxx_qspi_write_read(handle, 0xFF, 4,
+
2594 0x00000000, 0x00, 0x00,
+
2595 0x00000000, 0x00, 0x00,
+
2596 0, NULL, 0x00,
+
2597 NULL, 0x00, 0x00); /* qspi write read */
+
2598 if (res != 0) /* check result */
+
2599 {
+
2600 handle->debug_print("w25qxx: exit qspi mode failed.\n"); /* exit qspi mode failed */
+
2601
+
2602 return 1; /* return error */
+
2603 }
+
2604 }
+
2605
+
2606 return 0; /* success return 0 */
+
2607}
+
+
2608
+
+
2619uint8_t w25qxx_enable_reset(w25qxx_handle_t *handle)
+
2620{
+
2621 uint8_t res;
+
2622 uint8_t buf[1];
+
2623
+
2624 if (handle == NULL) /* check handle */
+
2625 {
+
2626 return 2; /* return error */
+
2627 }
+
2628 if (handle->inited != 1) /* check handle initialization */
+
2629 {
+
2630 return 3; /* return error */
+
2631 }
+
2632
+
2633 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
2634 {
+
2635 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
2636 {
+
2637 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_ENABLE_RESET, 1,
+
2638 0x00000000, 0x00, 0x00,
+
2639 0x00000000, 0x00, 0x00,
+
2640 0, NULL, 0x00,
+
2641 NULL, 0x00, 0x00); /* qspi write read */
+
2642 if (res != 0) /* check result */
+
2643 {
+
2644 handle->debug_print("w25qxx: enable reset failed.\n"); /* enable reset failed */
+
2645
+
2646 return 1; /* return error */
+
2647 }
+
2648 }
+
2649 else /* single spi */
+
2650 {
+
2651 buf[0] = W25QXX_COMMAND_ENABLE_RESET; /* enable reset command */
+
2652 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf,
+
2653 1, NULL, 0); /* spi write read */
+
2654 if (res != 0) /* check result */
+
2655 {
+
2656 handle->debug_print("w25qxx: enable reset failed.\n"); /* enable reset failed */
+
2657
+
2658 return 1; /* return error */
+
2659 }
+
2660 }
+
2661 }
+
2662 else /* qspi interface */
+
2663 {
+
2664 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_ENABLE_RESET, 4,
+
2665 0x00000000, 0x00, 0x00,
+
2666 0x00000000, 0x00, 0x00,
+
2667 0, NULL, 0x00,
+
2668 NULL, 0x00, 0x00); /* qspi write read */
+
2669 if (res != 0) /* check result */
+
2670 {
+
2671 handle->debug_print("w25qxx: enable reset failed.\n"); /* enable reset failed */
+
2672
+
2673 return 1; /* return error */
+
2674 }
+
2675 }
+
2676
+
2677 return 0; /* success return 0 */
+
2678}
+
+
2679
+
+
2690uint8_t w25qxx_reset_device(w25qxx_handle_t *handle)
+
2691{
+
2692 uint8_t res;
+
2693 uint8_t buf[1];
+
2694
+
2695 if (handle == NULL) /* check handle */
+
2696 {
+
2697 return 2; /* return error */
+
2698 }
+
2699 if (handle->inited != 1) /* check handle initialization */
+
2700 {
+
2701 return 3; /* return error */
+
2702 }
+
2703
+
2704 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
2705 {
+
2706 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
2707 {
+
2708 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_RESET_DEVICE, 1,
+
2709 0x00000000, 0x00, 0x00,
+
2710 0x00000000, 0x00, 0x00,
+
2711 0, NULL, 0x00,
+
2712 NULL, 0x00, 0x00); /* qspi write read */
+
2713 if (res != 0) /* check result */
+
2714 {
+
2715 handle->debug_print("w25qxx: reset device failed.\n"); /* reset device failed */
+
2716
+
2717 return 1; /* return error */
+
2718 }
+
2719 }
+
2720 else /* single spi */
+
2721 {
+
2722 buf[0] = W25QXX_COMMAND_RESET_DEVICE; /* reset device command */
+
2723 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf,
+
2724 1, NULL, 0); /* spi write read */
+
2725 if (res != 0) /* check result */
+
2726 {
+
2727 handle->debug_print("w25qxx: reset device failed.\n"); /* reset device failed */
+
2728
+
2729 return 1; /* return error */
+
2730 }
+
2731 }
+
2732 }
+
2733 else /* qspi interface */
+
2734 {
+
2735 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_RESET_DEVICE, 4,
+
2736 0x00000000, 0x00, 0x00,
+
2737 0x00000000, 0x00, 0x00,
+
2738 0, NULL, 0x00,
+
2739 NULL, 0x00, 0x00); /* qspi write read */
+
2740 if (res != 0) /* check result */
+
2741 {
+
2742 handle->debug_print("w25qxx: reset device failed.\n"); /* reset device failed */
+
2743
+
2744 return 1; /* return error */
+
2745 }
+
2746 }
+
2747
+
2748 return 0; /* success return 0 */
+
2749}
+
+
2750
+
+
2764uint8_t w25qxx_get_unique_id(w25qxx_handle_t *handle, uint8_t id[8])
+
2765{
+
2766 uint8_t res;
+
2767 uint8_t buf[6];
+
2768
+
2769 if (handle == NULL) /* check handle */
+
2770 {
+
2771 return 2; /* return error */
+
2772 }
+
2773 if (handle->inited != 1) /* check handle initialization */
+
2774 {
+
2775 return 3; /* return error */
+
2776 }
+
2777
+
2778 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
2779 {
+
2780 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
2781 {
+
2782 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
2783 {
+
2784 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_UNIQUE_ID, 1,
+
2785 0x00000000, 0x00, 0x00,
+
2786 0x00000000, 0x00, 0x00,
+
2787 4 * 8, NULL, 0x00,
+
2788 (uint8_t *)id, 8, 1); /* qspi write read */
+
2789 if (res != 0) /* check result */
+
2790 {
+
2791 handle->debug_print("w25qxx: read unique id failed.\n"); /* read unique id failed */
+
2792
+
2793 return 1; /* return error */
+
2794 }
+
2795 }
+
2796 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
2797 {
+
2798 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_UNIQUE_ID, 1,
+
2799 0x00000000, 0x00, 0x00,
+
2800 0x00000000, 0x00, 0x00,
+
2801 5 * 8, NULL, 0x00,
+
2802 (uint8_t *)id, 8, 1); /* qspi write read */
+
2803 if (res != 0) /* check result */
+
2804 {
+
2805 handle->debug_print("w25qxx: read unique id failed.\n"); /* read unique id failed */
+
2806
+
2807 return 1; /* return error */
+
2808 }
+
2809 }
+
2810 else
+
2811 {
+
2812 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
2813
+
2814 return 4; /* return error */
+
2815 }
+
2816 }
+
2817 else /* single spi */
+
2818 {
+
2819 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
2820 {
+
2821 buf[0] = W25QXX_COMMAND_READ_UNIQUE_ID; /* read unique id command */
+
2822 buf[1] = 0x00; /* dummy */
+
2823 buf[2] = 0x00; /* dummy */
+
2824 buf[3] = 0x00; /* dummy */
+
2825 buf[4] = 0x00; /* dummy */
+
2826 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, (uint8_t *)id, 8); /* spi write read */
+
2827 if (res != 0) /* check result */
+
2828 {
+
2829 handle->debug_print("w25qxx: read unique id failed.\n"); /* read unique id failed */
+
2830
+
2831 return 1; /* return error */
+
2832 }
+
2833 }
+
2834 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
2835 {
+
2836 buf[0] = W25QXX_COMMAND_READ_UNIQUE_ID; /* read unique id command */
+
2837 buf[1] = 0x00; /* dummy */
+
2838 buf[2] = 0x00; /* dummy */
+
2839 buf[3] = 0x00; /* dummy */
+
2840 buf[4] = 0x00; /* dummy */
+
2841 buf[5] = 0x00; /* dummy */
+
2842 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 6, (uint8_t *)id, 8); /* spi write read */
+
2843 if (res != 0) /* check result */
+
2844 {
+
2845 handle->debug_print("w25qxx: read unique id failed.\n"); /* read unique id failed */
+
2846
+
2847 return 1; /* return error */
+
2848 }
+
2849 }
+
2850 else
+
2851 {
+
2852 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
2853
+
2854 return 4; /* return error */
+
2855 }
+
2856 }
+
2857 }
+
2858 else /* qspi interface */
+
2859 {
+
2860 handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
+
2861
+
2862 return 5; /* return error */
+
2863 }
+
2864
+
2865 return 0; /* success return 0 */
+
2866}
+
+
2867
+
+
2880uint8_t w25qxx_get_sfdp(w25qxx_handle_t *handle, uint8_t sfdp[256])
+
2881{
+
2882 uint8_t res;
+
2883 uint8_t buf[5];
+
2884
+
2885 if (handle == NULL) /* check handle */
+
2886 {
+
2887 return 2; /* return error */
+
2888 }
+
2889 if (handle->inited != 1) /* check handle initialization */
+
2890 {
+
2891 return 3; /* return error */
+
2892 }
+
2893
+
2894 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
2895 {
+
2896 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
2897 {
+
2898 res = a_w25qxx_qspi_write_read(handle,
+
2899 W25QXX_COMMAND_READ_SFDP_REGISTER, 1,
+
2900 0x00000000, 1, 3,
+
2901 0x00000000, 0x00, 0x00,
+
2902 8, NULL, 0x00,
+
2903 (uint8_t *)sfdp, 256, 1); /* qspi write read */
+
2904 if (res != 0) /* check result */
+
2905 {
+
2906 handle->debug_print("w25qxx: read unique id failed.\n"); /* read unique id failed */
+
2907
+
2908 return 1; /* return error */
+
2909 }
+
2910 }
+
2911 else /* single spi */
+
2912 {
+
2913 buf[0] = W25QXX_COMMAND_READ_SFDP_REGISTER; /* read sfdp command */
+
2914 buf[1] = 0x00; /* 0x00 */
+
2915 buf[2] = 0x00; /* 0x00 */
+
2916 buf[3] = 0x00; /* 0x00 */
+
2917 buf[4] = 0x00; /* dummy */
+
2918 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5,
+
2919 (uint8_t *)sfdp, 256); /* spi write read */
+
2920 if (res != 0) /* check result */
+
2921 {
+
2922 handle->debug_print("w25qxx: get sfdp failed.\n"); /* get sfdp failed */
+
2923
+
2924 return 1; /* return error */
+
2925 }
+
2926 }
+
2927 }
+
2928 else /* qspi interface */
+
2929 {
+
2930 handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
+
2931
+
2932 return 4; /* return error */
+
2933 }
+
2934
+
2935 return 0; /* success return 0 */
+
2936}
+
+
2937
+
+
2952uint8_t w25qxx_erase_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num)
+
2953{
+
2954 uint8_t res;
+
2955 uint8_t status;
+
2956 uint32_t timeout;
+
2957 uint8_t buf[5];
+
2958
+
2959 if (handle == NULL) /* check handle */
+
2960 {
+
2961 return 2; /* return error */
+
2962 }
+
2963 if (handle->inited != 1) /* check handle initialization */
+
2964 {
+
2965 return 3; /* return error */
+
2966 }
+
2967
+
2968 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
2969 {
+
2970 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
2971 {
+
2972 res = a_w25qxx_qspi_write_read(handle,
+
2973 W25QXX_COMMAND_WRITE_ENABLE, 1,
+
2974 0x00000000, 0x00, 0x00,
+
2975 0x00000000, 0x00, 0x00,
+
2976 0x00, NULL, 0x00,
+
2977 NULL, 0x00, 0x00); /* qspi write read */
+
2978 if (res != 0) /* check result */
+
2979 {
+
2980 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
2981
+
2982 return 1; /* return error */
+
2983 }
+
2984 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
2985 {
+
2986 res = a_w25qxx_qspi_write_read(handle,
+
2987 W25QXX_COMMAND_ERASE_SECURITY_REGISTER, 1,
+
2988 num << 8, 1, 3,
+
2989 0x00000000, 0x00, 0x00,
+
2990 0x00, NULL, 0x00,
+
2991 NULL, 0x00, 0x00); /* qspi write read */
+
2992 if (res != 0) /* check result */
+
2993 {
+
2994 handle->debug_print("w25qxx: erase security register failed.\n"); /* erase security register failed */
+
2995
+
2996 return 1; /* return error */
+
2997 }
+
2998 }
+
2999 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
3000 {
+
3001 res = a_w25qxx_qspi_write_read(handle,
+
3002 W25QXX_COMMAND_ERASE_SECURITY_REGISTER, 1,
+
3003 num << 8, 1, 4,
+
3004 0x00000000, 0x00, 0x00,
+
3005 0x00, NULL, 0x00,
+
3006 NULL, 0x00, 0x00); /* qspi write read */
+
3007 if (res != 0) /* check result */
+
3008 {
+
3009 handle->debug_print("w25qxx: erase security register failed.\n"); /* erase security register failed */
+
3010
+
3011 return 1; /* return error */
+
3012 }
+
3013 }
+
3014 else
+
3015 {
+
3016 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
3017
+
3018 return 4; /* return error */
+
3019 }
+
3020
+
3021 timeout = 100 * 100; /* max 1000 ms */
+
3022 while (timeout != 0) /* check timeout */
+
3023 {
+
3024 res = a_w25qxx_qspi_write_read(handle,
+
3025 W25QXX_COMMAND_READ_STATUS_REG1, 1,
+
3026 0x00000000, 0x00, 0x00,
+
3027 0x00000000, 0x00, 0x00,
+
3028 0x00, NULL, 0x00,
+
3029 (uint8_t *)&status, 1, 1); /* qspi write read */
+
3030 if (res != 0) /* check result */
+
3031 {
+
3032 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
3033
+
3034 return 1; /* return error */
+
3035 }
+
3036 if ((status & 0x01) == 0x00) /* check status */
+
3037 {
+
3038 break; /* break */
+
3039 }
+
3040 timeout--; /* timeout-- */
+
3041 handle->delay_us(10); /* delay 10 us */
+
3042 }
+
3043 if (timeout == 0)
+
3044 {
+
3045 handle->debug_print("w25qxx: erase security register timeout.\n"); /* erase security register timeout */
+
3046
+
3047 return 6; /* return error */
+
3048 }
+
3049 }
+
3050 else /* single spi */
+
3051 {
+
3052 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
3053 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
3054 if (res != 0) /* check result */
+
3055 {
+
3056 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
3057
+
3058 return 1; /* return error */
+
3059 }
+
3060 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
3061 {
+
3062 buf[0] = W25QXX_COMMAND_ERASE_SECURITY_REGISTER; /* erase security register command */
+
3063 buf[1] = 0x00; /* 0x00 */
+
3064 buf[2] = num; /* num */
+
3065 buf[3] = 0x00; /* 0x00 */
+
3066 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, NULL, 0); /* spi write read */
+
3067 if (res != 0) /* check result */
+
3068 {
+
3069 handle->debug_print("w25qxx: erase security register failed.\n"); /* erase security register failed */
+
3070
+
3071 return 1; /* return error */
+
3072 }
+
3073 }
+
3074 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
3075 {
+
3076 buf[0] = W25QXX_COMMAND_ERASE_SECURITY_REGISTER; /* erase security register command */
+
3077 buf[1] = 0x00; /* 0x00 */
+
3078 buf[2] = 0x00; /* 0x00 */
+
3079 buf[3] = num; /* num */
+
3080 buf[4] = 0x00; /* 0x00 */
+
3081 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, NULL, 0); /* spi write read */
+
3082 if (res != 0) /* check result */
+
3083 {
+
3084 handle->debug_print("w25qxx: erase security register failed.\n"); /* erase security register failed */
+
3085
+
3086 return 1; /* return error */
+
3087 }
+
3088 }
+
3089 else
+
3090 {
+
3091 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
3092
+
3093 return 4; /* return error */
+
3094 }
+
3095
+
3096 timeout = 100 * 100; /* max 1000 ms */
+
3097 while (timeout != 0) /* check timeout */
+
3098 {
+
3099 buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
+
3100 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, (uint8_t *)&status, 1); /* spi write read */
+
3101 if (res != 0) /* check result */
+
3102 {
+
3103 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
3104
+
3105 return 1; /* return error */
+
3106 }
+
3107 if ((status & 0x01) == 0x00) /* check status */
+
3108 {
+
3109 break; /* break */
+
3110 }
+
3111 timeout--; /* timeout-- */
+
3112 handle->delay_us(10); /* delay 10 us */
+
3113 }
+
3114 if (timeout == 0)
+
3115 {
+
3116 handle->debug_print("w25qxx: erase security register timeout.\n"); /* erase security register timeout */
+
3117
+
3118 return 6; /* return error */
+
3119 }
+
3120 }
+
3121 }
+
3122 else /* qspi interface */
+
3123 {
+
3124 handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
+
3125
+
3126 return 5; /* return error */
+
3127 }
+
3128
+
3129 return 0; /* success return 0 */
+
3130}
+
+
3131
+
+
3147uint8_t w25qxx_program_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
+
3148{
+
3149 uint8_t res;
+
3150 uint8_t status;
+
3151 uint32_t timeout;
+
3152 uint8_t buf[5];
+
3153
+
3154 if (handle == NULL) /* check handle */
+
3155 {
+
3156 return 2; /* return error */
+
3157 }
+
3158 if (handle->inited != 1) /* check handle initialization */
+
3159 {
+
3160 return 3; /* return error */
+
3161 }
+
3162
+
3163 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
3164 {
+
3165 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
3166 {
+
3167 res = a_w25qxx_qspi_write_read(handle,
+
3168 W25QXX_COMMAND_WRITE_ENABLE, 1,
+
3169 0x00000000, 0x00, 0x00,
+
3170 0x00000000, 0x00, 0x00,
+
3171 0x00, NULL, 0x00,
+
3172 NULL, 0x00, 0x00); /* qspi write read */
+
3173 if (res != 0) /* check result */
+
3174 {
+
3175 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
3176
+
3177 return 1; /* return error */
+
3178 }
+
3179 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
3180 {
+
3181 res = a_w25qxx_qspi_write_read(handle,
+
3182 W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER, 1,
+
3183 num << 8, 1, 3,
+
3184 0x00000000, 0x00, 0x00,
+
3185 0x00, data, 256,
+
3186 NULL, 0x00, 1); /* qspi write read */
+
3187 if (res != 0) /* check result */
+
3188 {
+
3189 handle->debug_print("w25qxx: program security register failed.\n"); /* program security register failed */
+
3190
+
3191 return 1; /* return error */
+
3192 }
+
3193 }
+
3194 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
3195 {
+
3196 res = a_w25qxx_qspi_write_read(handle,
+
3197 W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER, 1,
+
3198 num << 8, 1, 4,
+
3199 0x00000000, 0x00, 0x00,
+
3200 0x00, data, 256,
+
3201 NULL, 0x00, 1); /* qspi write read */
+
3202 if (res != 0) /* check result */
+
3203 {
+
3204 handle->debug_print("w25qxx: program security register failed.\n"); /* program security register failed */
+
3205
+
3206 return 1; /* return error */
+
3207 }
+
3208 }
+
3209 else
+
3210 {
+
3211 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
3212
+
3213 return 4; /* return error */
+
3214 }
+
3215
+
3216 timeout = 3 * 100; /* max 3 ms */
+
3217 while (timeout != 0) /* check timeout */
+
3218 {
+
3219 res = a_w25qxx_qspi_write_read(handle,
+
3220 W25QXX_COMMAND_READ_STATUS_REG1, 1,
+
3221 0x00000000, 0x00, 0x00,
+
3222 0x00000000, 0x00, 0x00,
+
3223 0x00, NULL, 0x00,
+
3224 (uint8_t *)&status, 1, 1); /* qspi write read */
+
3225 if (res != 0) /* check result */
+
3226 {
+
3227 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
3228
+
3229 return 1; /* return error */
+
3230 }
+
3231 if ((status & 0x01) == 0x00) /* check status */
+
3232 {
+
3233 break; /* break */
+
3234 }
+
3235 timeout--; /* timeout-- */
+
3236 handle->delay_us(10); /* delay 10 us */
+
3237 }
+
3238 if (timeout == 0)
+
3239 {
+
3240 handle->debug_print("w25qxx: program security register timeout.\n"); /* program security register timeout */
+
3241
+
3242 return 6; /* return error */
+
3243 }
+
3244 }
+
3245 else /* single spi */
+
3246 {
+
3247 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
3248 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
3249 if (res != 0) /* check result */
+
3250 {
+
3251 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
3252
+
3253 return 1; /* return error */
+
3254 }
+
3255 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
3256 {
+
3257 handle->buf[0] = W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER; /* program security register command */
+
3258 handle->buf[1] = 0x00; /* 0x00 */
+
3259 handle->buf[2] = num; /* num */
+
3260 handle->buf[3] = 0x00; /* 0x00 */
+
3261 memcpy(&handle->buf[4], data, 256); /* copy data */
+
3262 res = a_w25qxx_spi_write_read(handle, (uint8_t *)handle->buf, 260, NULL, 0); /* spi write read */
+
3263 if (res != 0) /* check result */
+
3264 {
+
3265 handle->debug_print("w25qxx: program security register failed.\n"); /* program security register failed */
+
3266
+
3267 return 1; /* return error */
+
3268 }
+
3269 }
+
3270 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
3271 {
+
3272 handle->buf[0] = W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER; /* program security register command */
+
3273 handle->buf[1] = 0x00; /* 0x00 */
+
3274 handle->buf[2] = 0x00; /* 0x00 */
+
3275 handle->buf[3] = num; /* num */
+
3276 handle->buf[4] = 0x00; /* 0x00 */
+
3277 memcpy(&handle->buf[5], data, 256); /* copy data */
+
3278 res = a_w25qxx_spi_write_read(handle, (uint8_t *)handle->buf, 261, NULL, 0); /* spi write read */
+
3279 if (res != 0) /* check result */
+
3280 {
+
3281 handle->debug_print("w25qxx: program security register failed.\n"); /* program security register failed */
+
3282
+
3283 return 1; /* return error */
+
3284 }
+
3285 }
+
3286 else
+
3287 {
+
3288 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
3289
+
3290 return 4; /* return error */
+
3291 }
+
3292
+
3293 timeout = 3 * 100; /* max 3 ms */
+
3294 while (timeout != 0) /* check timeout */
+
3295 {
+
3296 buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
+
3297 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, (uint8_t *)&status, 1); /* spi write read */
+
3298 if (res != 0) /* check result */
+
3299 {
+
3300 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
3301
+
3302 return 1; /* return error */
+
3303 }
+
3304 if ((status & 0x01) == 0x00) /* check status */
+
3305 {
+
3306 break; /* break */
+
3307 }
+
3308 timeout--; /* timeout-- */
+
3309 handle->delay_us(10); /* delay 10 us */
+
3310 }
+
3311 if (timeout == 0)
+
3312 {
+
3313 handle->debug_print("w25qxx: program security register timeout.\n"); /* program security register timeout */
+
3314
+
3315 return 6; /* return error */
+
3316 }
+
3317 }
+
3318 }
+
3319 else /* qspi interface */
+
3320 {
+
3321 handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
+
3322
+
3323 return 5; /* return error */
+
3324 }
+
3325
+
3326 return 0; /* success return 0 */
+
3327}
+
+
3328
+
+
3344uint8_t w25qxx_read_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
+
3345{
+
3346 uint8_t res;
+
3347 uint8_t buf[6];
+
3348
+
3349 if (handle == NULL) /* check handle */
+
3350 {
+
3351 return 2; /* return error */
+
3352 }
+
3353 if (handle->inited != 1) /* check handle initialization */
+
3354 {
+
3355 return 3; /* return error */
+
3356 }
+
3357
+
3358 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
3359 {
+
3360 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
3361 {
+
3362 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
3363 {
+
3364 res = a_w25qxx_qspi_write_read(handle,
+
3365 W25QXX_COMMAND_READ_SECURITY_REGISTER, 1,
+
3366 num << 8, 1, 3,
+
3367 0x00000000, 0x00, 0x00,
+
3368 8, NULL, 0x00,
+
3369 data, 256, 1); /* qspi write read */
+
3370 if (res != 0) /* check result */
+
3371 {
+
3372 handle->debug_print("w25qxx: read security register failed.\n"); /* read security register failed */
+
3373
+
3374 return 1; /* return error */
+
3375 }
+
3376 }
+
3377 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256)) /* 4 address mode */
+
3378 {
+
3379 res = a_w25qxx_qspi_write_read(handle,
+
3380 W25QXX_COMMAND_READ_SECURITY_REGISTER, 1,
+
3381 num << 8, 1, 4,
+
3382 0x00000000, 0x00, 0x00,
+
3383 8, NULL, 0x00,
+
3384 data, 256, 1); /* qspi write read */
+
3385 if (res != 0) /* check result */
+
3386 {
+
3387 handle->debug_print("w25qxx: read security register failed.\n"); /* read security register failed */
+
3388
+
3389 return 1; /* return error */
+
3390 }
+
3391 }
+
3392 else
+
3393 {
+
3394 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
3395
+
3396 return 4; /* return error */
+
3397 }
+
3398 }
+
3399 else /* single spi */
+
3400 {
+
3401 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
3402 {
+
3403 buf[0] = W25QXX_COMMAND_READ_SECURITY_REGISTER; /* read security register command */
+
3404 buf[1] = 0x00; /* 0x00 */
+
3405 buf[2] = num; /* num */
+
3406 buf[3] = 0x00; /* 0x00 */
+
3407 buf[4] = 0x00; /* dummy */
+
3408 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, data, 256); /* spi write read */
+
3409 if (res != 0) /* check result */
+
3410 {
+
3411 handle->debug_print("w25qxx: read security register failed.\n"); /* read security register failed */
+
3412
+
3413 return 1; /* return error */
+
3414 }
+
3415 }
+
3416 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
3417 {
+
3418 buf[0] = W25QXX_COMMAND_READ_SECURITY_REGISTER; /* read security register command */
+
3419 buf[1] = 0x00; /* 0x00 */
+
3420 buf[2] = 0x00; /* 0x00 */
+
3421 buf[3] = num; /* num */
+
3422 buf[4] = 0x00; /* 0x00 */
+
3423 buf[5] = 0x00; /* dummy */
+
3424 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 6, data, 256); /* spi write read */
+
3425 if (res != 0) /* check result */
+
3426 {
+
3427 handle->debug_print("w25qxx: read security register failed.\n"); /* read security register failed */
+
3428
+
3429 return 1; /* return error */
+
3430 }
+
3431 }
+
3432 else
+
3433 {
+
3434 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
3435
+
3436 return 4; /* return error */
+
3437 }
+
3438 }
+
3439 }
+
3440 else /* qspi interface */
+
3441 {
+
3442 handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
+
3443
+
3444 return 5; /* return error */
+
3445 }
+
3446
+
3447 return 0; /* success return 0 */
+
3448}
+
+
3449
+
+
3465uint8_t w25qxx_only_spi_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
+
3466{
+
3467 uint8_t res;
+
3468 uint8_t buf[5];
+
3469
+
3470 if (handle == NULL) /* check handle */
+
3471 {
+
3472 return 2; /* return error */
+
3473 }
+
3474 if (handle->inited != 1) /* check handle initialization */
+
3475 {
+
3476 return 3; /* return error */
+
3477 }
+
3478
+
3479 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
3480 {
+
3481 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
3482 {
+
3483 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
3484 {
+
3485 if (handle->type >= W25Q256) /* >128Mb */
+
3486 {
+
3487 res = a_w25qxx_qspi_write_read(handle,
+
3488 W25QXX_COMMAND_WRITE_ENABLE, 1,
+
3489 0x00000000, 0x00, 0x00,
+
3490 0x00000000, 0x00, 0x00,
+
3491 0x00, NULL, 0x00,
+
3492 NULL, 0x00, 0x00); /* qspi write read */
+
3493 if (res != 0) /* check result */
+
3494 {
+
3495 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
3496
+
3497 return 1; /* return error */
+
3498 }
+
3499 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
3500 res = a_w25qxx_qspi_write_read(handle,
+
3501 0xC5, 1,
+
3502 0x00000000, 0x00, 0x00,
+
3503 0x00000000, 0x00, 0x00,
+
3504 0x00, (uint8_t *)buf, 1,
+
3505 NULL, 0x00, 1); /* qspi write read */
+
3506 if (res != 0) /* check result */
+
3507 {
+
3508 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
3509
+
3510 return 1; /* return error */
+
3511 }
+
3512
+
3513 }
+
3514 res = a_w25qxx_qspi_write_read(handle,
+
3515 W25QXX_COMMAND_READ_DATA, 1,
+
3516 addr, 1, 3,
+
3517 0x00000000, 0x00, 0x00,
+
3518 0x00, NULL, 0x00,
+
3519 data, len, 1); /* qspi write read */
+
3520 if (res != 0) /* check result */
+
3521 {
+
3522 handle->debug_print("w25qxx: only spi read failed.\n"); /* only spi read failed */
+
3523
+
3524 return 1; /* return error */
+
3525 }
+
3526 }
+
3527 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) &&
+
3528 (handle->type >= W25Q256)) /* check address mode */
+
3529 {
+
3530 res = a_w25qxx_qspi_write_read(handle,
+
3531 W25QXX_COMMAND_READ_DATA, 1,
+
3532 addr, 1, 4,
+
3533 0x00000000, 0x00, 0x00,
+
3534 0x00, NULL, 0x00,
+
3535 data, len, 1); /* qspi write read */
+
3536 if (res != 0) /* check result */
+
3537 {
+
3538 handle->debug_print("w25qxx: only spi read failed.\n"); /* only spi read failed */
+
3539
+
3540 return 1; /* return error */
+
3541 }
+
3542 }
+
3543 else
+
3544 {
+
3545 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
3546
+
3547 return 4; /* return error */
+
3548 }
+
3549 }
+
3550 else /* single spi */
+
3551 {
+
3552 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
3553 {
+
3554 if (handle->type >= W25Q256) /* >128Mb */
+
3555 {
+
3556 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
3557 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
3558 if (res != 0) /* check result */
+
3559 {
+
3560 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
3561
+
3562 return 1; /* return error */
+
3563 }
+
3564 buf[0] = 0xC5; /* write extended addr register command */
+
3565 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
3566 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
+
3567 if (res != 0) /* check result */
+
3568 {
+
3569 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
3570
+
3571 return 1; /* return error */
+
3572 }
+
3573 }
+
3574 buf[0] = W25QXX_COMMAND_READ_DATA; /* only spi read command */
+
3575 buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
3576 buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
3577 buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
3578 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, (uint8_t *)data, (uint32_t)len); /* spi write read */
+
3579 if (res != 0) /* check result */
+
3580 {
+
3581 handle->debug_print("w25qxx: only spi read failed.\n"); /* only spi read failed */
+
3582
+
3583 return 1; /* return error */
+
3584 }
+
3585 }
+
3586 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) &&
+
3587 (handle->type >= W25Q256)) /* check address mode */
+
3588 {
+
3589 buf[0] = W25QXX_COMMAND_READ_DATA; /* only spi read command */
+
3590 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
3591 buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
3592 buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
3593 buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
3594 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, (uint8_t *)data, (uint32_t)len); /* spi write read */
+
3595 if (res != 0) /* check result */
+
3596 {
+
3597 handle->debug_print("w25qxx: only spi read failed.\n"); /* only spi read failed */
+
3598
+
3599 return 1; /* return error */
+
3600 }
+
3601 }
+
3602 else
+
3603 {
+
3604 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
3605
+
3606 return 4; /* return error */
+
3607 }
+
3608 }
+
3609 }
+
3610 else
+
3611 {
+
3612 handle->debug_print("w25qxx: only spi interface can use this function.\n"); /* only spi interface can use this function */
+
3613
+
3614 return 5; /* return error */
+
3615 }
+
3616
+
3617 return 0; /* success return 0 */
+
3618}
+
+
3619
+
+
3634uint8_t w25qxx_fast_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
+
3635{
+
3636 uint8_t res;
+
3637 uint8_t buf[6];
+
3638
+
3639 if (handle == NULL) /* check handle */
+
3640 {
+
3641 return 2; /* return error */
+
3642 }
+
3643 if (handle->inited != 1) /* check handle initialization */
+
3644 {
+
3645 return 3; /* return error */
+
3646 }
+
3647
+
3648 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
3649 {
+
3650 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
3651 {
+
3652 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
3653 {
+
3654 if (handle->type >= W25Q256) /* >128Mb */
+
3655 {
+
3656 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
3657 0x00000000, 0x00, 0x00,
+
3658 0x00000000, 0x00, 0x00,
+
3659 0x00, NULL, 0x00,
+
3660 NULL, 0x00, 0x00); /* qspi write read */
+
3661 if (res != 0) /* check result */
+
3662 {
+
3663 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
3664
+
3665 return 1; /* return error */
+
3666 }
+
3667 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
3668 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
3669 0x00000000, 0x00, 0x00,
+
3670 0x00000000, 0x00, 0x00,
+
3671 0, (uint8_t *)buf, 0x01,
+
3672 NULL, 0x00, 1); /* spi write read */
+
3673 if (res != 0) /* check result */
+
3674 {
+
3675 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
3676
+
3677 return 1; /* return error */
+
3678 }
+
3679 }
+
3680 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 1,
+
3681 addr, 1, 3,
+
3682 0x00000000, 0x00, 0x00,
+
3683 8, NULL, 0x00,
+
3684 data, len, 1); /* spi write read */
+
3685 if (res != 0) /* check result */
+
3686 {
+
3687 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
3688
+
3689 return 1; /* return error */
+
3690 }
+
3691 }
+
3692 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
3693 {
+
3694 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 1,
+
3695 addr, 1, 4,
+
3696 0x00000000, 0x00, 0x00,
+
3697 8, NULL, 0x00,
+
3698 data, len, 1); /* spi write read */
+
3699 if (res != 0) /* check result */
+
3700 {
+
3701 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
3702
+
3703 return 1; /* return error */
+
3704 }
+
3705 }
+
3706 else
+
3707 {
+
3708 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
3709
+
3710 return 4; /* return error */
+
3711 }
+
3712 }
+
3713 else /* single spi */
+
3714 {
+
3715 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
3716 {
+
3717 if (handle->type >= W25Q256) /* >128Mb */
+
3718 {
+
3719 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
3720 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
3721 if (res != 0) /* check result */
+
3722 {
+
3723 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
3724
+
3725 return 1; /* return error */
+
3726 }
+
3727 buf[0] = 0xC5; /* write extended addr register command */
+
3728 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
3729 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
+
3730 if (res != 0) /* check result */
+
3731 {
+
3732 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
3733
+
3734 return 1; /* return error */
+
3735 }
+
3736 }
+
3737 buf[0] = W25QXX_COMMAND_FAST_READ; /* fast read command */
+
3738 buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
3739 buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
3740 buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
3741 buf[4] = 0x00; /* dummy */
+
3742 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, (uint8_t *)data, (uint32_t)len); /* spi write read */
+
3743 if (res != 0) /* check result */
+
3744 {
+
3745 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
3746
+
3747 return 1; /* return error */
+
3748 }
+
3749 }
+
3750 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE)
+
3751 && (handle->type >= W25Q256)) /* check address mode */
+
3752 {
+
3753 buf[0] = W25QXX_COMMAND_FAST_READ; /* fast read command */
+
3754 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
3755 buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
3756 buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
3757 buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
3758 buf[5] = 0x00; /* dummy */
+
3759 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 6, (uint8_t *)data, (uint32_t)len); /* spi write read */
+
3760 if (res != 0) /* check result */
+
3761 {
+
3762 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
3763
+
3764 return 1; /* return error */
+
3765 }
+
3766 }
+
3767 else
+
3768 {
+
3769 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
3770
+
3771 return 4; /* return error */
+
3772 }
+
3773 }
+
3774 }
+
3775 else /* qspi interface */
+
3776 {
+
3777 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
3778 {
+
3779 if (handle->type >= W25Q256) /* >128Mb */
+
3780 {
+
3781 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
3782 0x00000000, 0x00, 0x00,
+
3783 0x00000000, 0x00, 0x00,
+
3784 0x00, NULL, 0x00,
+
3785 NULL, 0x00, 0x00); /* qspi write read */
+
3786 if (res != 0) /* check result */
+
3787 {
+
3788 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
3789
+
3790 return 1; /* return error */
+
3791 }
+
3792 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
3793 res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
+
3794 0x00000000, 0x00, 0x00,
+
3795 0x00000000, 0x00, 0x00,
+
3796 0, (uint8_t *)buf, 0x01,
+
3797 NULL, 0x00, 4); /* spi write read */
+
3798 if (res != 0) /* check result */
+
3799 {
+
3800 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
3801
+
3802 return 1; /* return error */
+
3803 }
+
3804 }
+
3805 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 4,
+
3806 addr, 4, 3,
+
3807 0x00000000, 0x00, 0x00,
+
3808 handle->dummy, NULL, 0x00,
+
3809 data, len, 4); /* spi write read */
+
3810 if (res != 0) /* check result */
+
3811 {
+
3812 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
3813
+
3814 return 1; /* return error */
+
3815 }
+
3816 }
+
3817 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
3818 {
+
3819 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 4,
+
3820 addr, 4, 4,
+
3821 0x00000000, 0x00, 0x00,
+
3822 handle->dummy, NULL, 0x00, /* spi write */
+
3823 data, len, 4); /* spi write read */
+
3824 if (res != 0) /* check result */
+
3825 {
+
3826 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
3827
+
3828 return 1; /* return error */
+
3829 }
+
3830 }
+
3831 else
+
3832 {
+
3833 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
3834
+
3835 return 4; /* return error */
+
3836 }
+
3837 }
+
3838
+
3839 return 0; /* success return 0 */
+
3840}
+
+
3841
+
+
3858uint8_t w25qxx_fast_read_dual_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
+
3859{
+
3860 uint8_t res;
+
3861 uint8_t buf[1];
+
3862
+
3863 if (handle == NULL) /* check handle */
+
3864 {
+
3865 return 2; /* return error */
+
3866 }
+
3867 if (handle->inited != 1) /* check handle initialization */
+
3868 {
+
3869 return 3; /* return error */
+
3870 }
+
3871
+
3872 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
3873 {
+
3874 if (handle->dual_quad_spi_enable == 0) /* check spi */
+
3875 {
+
3876 handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
+
3877
+
3878 return 6; /* return error */
+
3879 }
+
3880 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
3881 {
+
3882 if (handle->type >= W25Q256) /* >128Mb */
+
3883 {
+
3884 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
3885 0x00000000, 0x00, 0x00,
+
3886 0x00000000, 0x00, 0x00,
+
3887 0x00, NULL, 0x00,
+
3888 NULL, 0x00, 0x00); /* qspi write read */
+
3889 if (res != 0) /* check result */
+
3890 {
+
3891 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
3892
+
3893 return 1; /* return error */
+
3894 }
+
3895 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
3896 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
3897 0x00000000, 0x00, 0x00,
+
3898 0x00000000, 0x00, 0x00,
+
3899 0, (uint8_t *)buf, 0x01,
+
3900 NULL, 0x00, 1); /* spi write read */
+
3901 if (res != 0) /* check result */
+
3902 {
+
3903 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
3904
+
3905 return 1; /* return error */
+
3906 }
+
3907 }
+
3908 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_DUAL_OUTPUT, 1,
+
3909 addr, 1, 3,
+
3910 0x00000000, 0x00, 0x00,
+
3911 8, NULL, 0x00, /* spi write */
+
3912 data, len, 2); /* spi write read */
+
3913 if (res != 0) /* check result */
+
3914 {
+
3915 handle->debug_print("w25qxx: fast read dual output failed.\n"); /* fast read dual output failed */
+
3916
+
3917 return 1; /* return error */
+
3918 }
+
3919 }
+
3920 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
3921 {
+
3922 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_DUAL_OUTPUT, 1,
+
3923 addr, 1, 4,
+
3924 0x00000000, 0x00, 0x00,
+
3925 8, NULL, 0x00, /* spi write */
+
3926 data, len, 2); /* spi write read */
+
3927 if (res != 0) /* check result */
+
3928 {
+
3929 handle->debug_print("w25qxx: fast read dual output failed.\n"); /* fast read dual output failed */
+
3930
+
3931 return 1; /* return error */
+
3932 }
+
3933 }
+
3934 else
+
3935 {
+
3936 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
3937
+
3938 return 4; /* return error */
+
3939 }
+
3940 }
+
3941 else
+
3942 {
+
3943 handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
+
3944
+
3945 return 5; /* return error */
+
3946 }
+
3947
+
3948 return 0; /* success return 0 */
+
3949}
+
+
3950
+
+
3967uint8_t w25qxx_fast_read_quad_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
+
3968{
+
3969 uint8_t res;
+
3970 uint8_t buf[1];
+
3971
+
3972 if (handle == NULL) /* check handle */
+
3973 {
+
3974 return 2; /* return error */
+
3975 }
+
3976 if (handle->inited != 1) /* check handle initialization */
+
3977 {
+
3978 return 3; /* return error */
+
3979 }
+
3980
+
3981 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
3982 {
+
3983 if (handle->dual_quad_spi_enable == 0) /* check spi */
+
3984 {
+
3985 handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
+
3986
+
3987 return 6; /* return error */
+
3988 }
+
3989 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
3990 {
+
3991 if (handle->type >= W25Q256) /* >128Mb */
+
3992 {
+
3993 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
3994 0x00000000, 0x00, 0x00,
+
3995 0x00000000, 0x00, 0x00,
+
3996 0x00, NULL, 0x00,
+
3997 NULL, 0x00, 0x00); /* qspi write read */
+
3998 if (res != 0) /* check result */
+
3999 {
+
4000 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
4001
+
4002 return 1; /* return error */
+
4003 }
+
4004 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
4005 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
4006 0x00000000, 0x00, 0x00,
+
4007 0x00000000, 0x00, 0x00,
+
4008 0, (uint8_t *)buf, 0x01,
+
4009 NULL, 0x00, 1); /* spi write read */
+
4010 if (res != 0) /* check result */
+
4011 {
+
4012 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
4013
+
4014 return 1; /* return error */
+
4015 }
+
4016 }
+
4017 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_QUAD_OUTPUT, 1,
+
4018 addr, 1, 3,
+
4019 0x00000000, 0x00, 0x00,
+
4020 8, NULL, 0x00, /* spi write */
+
4021 data, len, 4); /* spi write read */
+
4022 if (res != 0) /* check result */
+
4023 {
+
4024 handle->debug_print("w25qxx: fast read quad output failed.\n"); /* fast read quad output failed */
+
4025
+
4026 return 1; /* return error */
+
4027 }
+
4028 }
+
4029 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
4030 {
+
4031 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_QUAD_OUTPUT, 1,
+
4032 addr, 1, 4,
+
4033 0x00000000, 0x00, 0x00,
+
4034 8, NULL, 0x00, /* spi write */
+
4035 data, len, 4); /* spi write read */
+
4036 if (res != 0) /* check result */
+
4037 {
+
4038 handle->debug_print("w25qxx: fast read quad output failed.\n"); /* fast read quad output failed */
+
4039
+
4040 return 1; /* return error */
+
4041 }
+
4042 }
+
4043 else
+
4044 {
+
4045 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
4046
+
4047 return 4; /* return error */
+
4048 }
+
4049 }
+
4050 else
+
4051 {
+
4052 handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
+
4053
+
4054 return 5; /* return error */
+
4055 }
+
4056
+
4057 return 0; /* success return 0 */
+
4058}
+
+
4059
+
+
4076uint8_t w25qxx_fast_read_dual_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
+
4077{
+
4078 uint8_t res;
+
4079 uint8_t buf[1];
+
4080
+
4081 if (handle == NULL) /* check handle */
+
4082 {
+
4083 return 2; /* return error */
+
4084 }
+
4085 if (handle->inited != 1) /* check handle initialization */
+
4086 {
+
4087 return 3; /* return error */
+
4088 }
+
4089
+
4090 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
4091 {
+
4092 if (handle->dual_quad_spi_enable == 0) /* check spi */
+
4093 {
+
4094 handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
+
4095
+
4096 return 6; /* return error */
+
4097 }
+
4098 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
4099 {
+
4100 if (handle->type >= W25Q256) /* >128Mb */
+
4101 {
+
4102 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
4103 0x00000000, 0x00, 0x00,
+
4104 0x00000000, 0x00, 0x00,
+
4105 0x00, NULL, 0x00,
+
4106 NULL, 0x00, 0x00); /* qspi write read */
+
4107 if (res != 0) /* check result */
+
4108 {
+
4109 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
4110
+
4111 return 1; /* return error */
+
4112 }
+
4113 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
4114 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
4115 0x00000000, 0x00, 0x00,
+
4116 0x00000000, 0x00, 0x00,
+
4117 0, (uint8_t *)buf, 0x01,
+
4118 NULL, 0x00, 1); /* spi write read */
+
4119 if (res != 0) /* check result */
+
4120 {
+
4121 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
4122
+
4123 return 1; /* return error */
+
4124 }
+
4125 }
+
4126 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_DUAL_IO, 1,
+
4127 addr, 2, 3,
+
4128 0x000000FF, 2, 1,
+
4129 0, NULL, 0x00, /* spi write */
+
4130 data, len, 2); /* spi write read */
+
4131 if (res != 0) /* check result */
+
4132 {
+
4133 handle->debug_print("w25qxx: fast read dual io failed.\n"); /* fast read dual io failed */
+
4134
+
4135 return 1; /* return error */
+
4136 }
+
4137 }
+
4138 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
4139 {
+
4140 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_DUAL_IO, 1,
+
4141 addr, 2, 4,
+
4142 0x000000FF, 2, 1,
+
4143 0, NULL, 0x00, /* spi write */
+
4144 data, len, 2); /* spi write read */
+
4145 if (res != 0) /* check result */
+
4146 {
+
4147 handle->debug_print("w25qxx: fast read dual io failed.\n"); /* fast read io output failed */
+
4148
+
4149 return 1; /* return error */
+
4150 }
+
4151 }
+
4152 else
+
4153 {
+
4154 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
4155
+
4156 return 4; /* return error */
+
4157 }
+
4158 }
+
4159 else
+
4160 {
+
4161 handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
+
4162
+
4163 return 5; /* return error */
+
4164 }
+
4165
+
4166 return 0; /* success return 0 */
+
4167}
+
+
4168
+
+
4184uint8_t w25qxx_fast_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
+
4185{
+
4186 uint8_t res;
+
4187 uint8_t buf[1];
+
4188
+
4189 if (handle == NULL) /* check handle */
+
4190 {
+
4191 return 2; /* return error */
+
4192 }
+
4193 if (handle->inited != 1) /* check handle initialization */
+
4194 {
+
4195 return 3; /* return error */
+
4196 }
+
4197
+
4198 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
4199 {
+
4200 if (handle->dual_quad_spi_enable == 0) /* check spi */
+
4201 {
+
4202 handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
+
4203
+
4204 return 6; /* return error */
+
4205 }
+
4206 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
4207 {
+
4208 if (handle->type >= W25Q256) /* >128Mb */
+
4209 {
+
4210 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
4211 0x00000000, 0x00, 0x00,
+
4212 0x00000000, 0x00, 0x00,
+
4213 0x00, NULL, 0x00,
+
4214 NULL, 0x00, 0x00); /* qspi write read */
+
4215 if (res != 0) /* check result */
+
4216 {
+
4217 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
4218
+
4219 return 1; /* return error */
+
4220 }
+
4221 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
4222 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
4223 0x00000000, 0x00, 0x00,
+
4224 0x00000000, 0x00, 0x00,
+
4225 0, (uint8_t *)buf, 0x01,
+
4226 NULL, 0x00, 1); /* spi write read */
+
4227 if (res != 0) /* check result */
+
4228 {
+
4229 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
4230
+
4231 return 1; /* return error */
+
4232 }
+
4233 }
+
4234 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_QUAD_IO, 1,
+
4235 addr, 4, 3,
+
4236 0x000000FF, 4, 1,
+
4237 4, NULL, 0x00, /* spi write */
+
4238 data, len, 4); /* spi write read */
+
4239 if (res != 0) /* check result */
+
4240 {
+
4241 handle->debug_print("w25qxx: fast read quad io failed.\n"); /* fast read quad io failed */
+
4242
+
4243 return 1; /* return error */
+
4244 }
+
4245 }
+
4246 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
4247 {
+
4248 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_QUAD_IO, 1,
+
4249 addr, 4, 4,
+
4250 0x000000FF, 4, 1,
+
4251 4, NULL, 0x00, /* spi write */
+
4252 data, len, 4); /* spi write read */
+
4253 if (res != 0) /* check result */
+
4254 {
+
4255 handle->debug_print("w25qxx: fast read quad io failed.\n"); /* fast quad io output failed */
+
4256
+
4257 return 1; /* return error */
+
4258 }
+
4259 }
+
4260 else
+
4261 {
+
4262 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
4263
+
4264 return 4; /* return error */
+
4265 }
+
4266 }
+
4267 else
+
4268 {
+
4269 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
4270 {
+
4271 if (handle->type >= W25Q256) /* >128Mb */
+
4272 {
+
4273 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
4274 0x00000000, 0x00, 0x00,
+
4275 0x00000000, 0x00, 0x00,
+
4276 0x00, NULL, 0x00,
+
4277 NULL, 0x00, 0x00); /* qspi write read */
+
4278 if (res != 0) /* check result */
+
4279 {
+
4280 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
4281
+
4282 return 1; /* return error */
+
4283 }
+
4284 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
4285 res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
+
4286 0x00000000, 0x00, 0x00,
+
4287 0x00000000, 0x00, 0x00,
+
4288 0, (uint8_t *)buf, 0x01,
+
4289 NULL, 0x00, 4); /* spi write read */
+
4290 if (res != 0) /* check result */
+
4291 {
+
4292 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
4293
+
4294 return 1; /* return error */
+
4295 }
+
4296 }
+
4297 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_QUAD_IO, 4,
+
4298 addr, 4, 3,
+
4299 0x000000FF, 4, 1,
+
4300 handle->dummy, NULL, 0x00,
+
4301 data, len, 4); /* spi write read */
+
4302 if (res != 0) /* check result */
+
4303 {
+
4304 handle->debug_print("w25qxx: fast read quad io failed.\n"); /* fast read quad io failed */
+
4305
+
4306 return 1; /* return error */
+
4307 }
+
4308 }
+
4309 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
4310 {
+
4311 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ_QUAD_IO, 4,
+
4312 addr, 4, 4,
+
4313 0x000000FF, 4, 1,
+
4314 handle->dummy, NULL, 0x00,
+
4315 data, len, 4); /* spi write read */
+
4316 if (res != 0) /* check result */
+
4317 {
+
4318 handle->debug_print("w25qxx: fast read quad io failed.\n"); /* fast quad io output failed */
+
4319
+
4320 return 1; /* return error */
+
4321 }
+
4322 }
+
4323 else
+
4324 {
+
4325 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
4326
+
4327 return 4; /* return error */
+
4328 }
+
4329 }
+
4330
+
4331 return 0; /* success return 0 */
+
4332}
+
+
4333
+
+
4350uint8_t w25qxx_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
+
4351{
+
4352 uint8_t res;
+
4353 uint8_t buf[1];
+
4354
+
4355 if (handle == NULL) /* check handle */
+
4356 {
+
4357 return 2; /* return error */
+
4358 }
+
4359 if (handle->inited != 1) /* check handle initialization */
+
4360 {
+
4361 return 3; /* return error */
+
4362 }
+
4363
+
4364 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
4365 {
+
4366 if (handle->dual_quad_spi_enable == 0) /* check spi */
+
4367 {
+
4368 handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
+
4369
+
4370 return 6; /* return error */
+
4371 }
+
4372 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
4373 {
+
4374 if (handle->type >= W25Q256) /* >128Mb */
+
4375 {
+
4376 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
4377 0x00000000, 0x00, 0x00,
+
4378 0x00000000, 0x00, 0x00,
+
4379 0x00, NULL, 0x00,
+
4380 NULL, 0x00, 0x00); /* qspi write read */
+
4381 if (res != 0) /* check result */
+
4382 {
+
4383 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
4384
+
4385 return 1; /* return error */
+
4386 }
+
4387 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
4388 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
4389 0x00000000, 0x00, 0x00,
+
4390 0x00000000, 0x00, 0x00,
+
4391 0, (uint8_t *)buf, 0x01,
+
4392 NULL, 0x00, 1); /* spi write read */
+
4393 if (res != 0) /* check result */
+
4394 {
+
4395 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
4396
+
4397 return 1; /* return error */
+
4398 }
+
4399 }
+
4400 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WORD_READ_QUAD_IO, 1,
+
4401 addr, 4, 3,
+
4402 0x000000FF, 4, 1,
+
4403 2, NULL, 0x00, /* spi write */
+
4404 data, len, 4); /* spi write read */
+
4405 if (res != 0) /* check result */
+
4406 {
+
4407 handle->debug_print("w25qxx: word read quad io failed.\n"); /* word read quad io failed */
+
4408
+
4409 return 1; /* return error */
+
4410 }
+
4411 }
+
4412 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
4413 {
+
4414 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WORD_READ_QUAD_IO, 1,
+
4415 addr, 4, 4,
+
4416 0x000000FF, 4, 1,
+
4417 2, NULL, 0x00, /* spi write */
+
4418 data, len, 4); /* spi write read */
+
4419 if (res != 0) /* check result */
+
4420 {
+
4421 handle->debug_print("w25qxx: word read quad io failed.\n"); /* word read quad io failed */
+
4422
+
4423 return 1; /* return error */
+
4424 }
+
4425 }
+
4426 else
+
4427 {
+
4428 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
4429
+
4430 return 4; /* return error */
+
4431 }
+
4432 }
+
4433 else
+
4434 {
+
4435 handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
+
4436
+
4437 return 5; /* return error */
+
4438 }
+
4439
+
4440 return 0; /* success return 0 */
+
4441}
+
+
4442
+
+
4459uint8_t w25qxx_octal_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
+
4460{
+
4461 uint8_t res;
+
4462 uint8_t buf[1];
+
4463
+
4464 if (handle == NULL) /* check handle */
+
4465 {
+
4466 return 2; /* return error */
+
4467 }
+
4468 if (handle->inited != 1) /* check handle initialization */
+
4469 {
+
4470 return 3; /* return error */
+
4471 }
+
4472
+
4473 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
4474 {
+
4475 if (handle->dual_quad_spi_enable == 0) /* check spi */
+
4476 {
+
4477 handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
+
4478
+
4479 return 6; /* return error */
+
4480 }
+
4481 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
4482 {
+
4483 if (handle->type >= W25Q256) /* >128Mb */
+
4484 {
+
4485 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
4486 0x00000000, 0x00, 0x00,
+
4487 0x00000000, 0x00, 0x00,
+
4488 0x00, NULL, 0x00,
+
4489 NULL, 0x00, 0x00); /* qspi write read */
+
4490 if (res != 0) /* check result */
+
4491 {
+
4492 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
4493
+
4494 return 1; /* return error */
+
4495 }
+
4496 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
4497 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
4498 0x00000000, 0x00, 0x00,
+
4499 0x00000000, 0x00, 0x00,
+
4500 0, (uint8_t *)buf, 0x01,
+
4501 NULL, 0x00, 1); /* spi write read */
+
4502 if (res != 0) /* check result */
+
4503 {
+
4504 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
4505
+
4506 return 1; /* return error */
+
4507 }
+
4508 }
+
4509 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_OCTAL_WORD_READ_QUAD_IO, 1,
+
4510 addr, 4, 3,
+
4511 0x000000FF, 4, 1,
+
4512 0, NULL, 0x00, /* spi write */
+
4513 data, len, 4); /* spi write read */
+
4514 if (res != 0) /* check result */
+
4515 {
+
4516 handle->debug_print("w25qxx: octal word read quad io failed.\n"); /* octal word read quad io failed */
+
4517
+
4518 return 1; /* return error */
+
4519 }
+
4520 }
+
4521 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
4522 {
+
4523 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_OCTAL_WORD_READ_QUAD_IO, 1,
+
4524 addr, 4, 4,
+
4525 0x000000FF, 4, 1,
+
4526 0, NULL, 0x00, /* spi write */
+
4527 data, len, 4); /* spi write read */
+
4528 if (res != 0) /* check result */
+
4529 {
+
4530 handle->debug_print("w25qxx: octal word read quad io failed.\n"); /* octal word read quad io failed */
+
4531
+
4532 return 1; /* return error */
+
4533 }
+
4534 }
+
4535 else
+
4536 {
+
4537 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
4538
+
4539 return 4; /* return error */
+
4540 }
+
4541 }
+
4542 else
+
4543 {
+
4544 handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
+
4545
+
4546 return 5; /* return error */
+
4547 }
+
4548
+
4549 return 0; /* success return 0 */
+
4550}
+
+
4551
+
+
4569uint8_t w25qxx_page_program(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
+
4570{
+
4571 uint8_t res;
+
4572 uint8_t status;
+
4573 uint32_t timeout;
+
4574 uint8_t buf[2];
+
4575
+
4576 if (handle == NULL) /* check handle */
+
4577 {
+
4578 return 2; /* return error */
+
4579 }
+
4580 if (handle->inited != 1) /* check handle initialization */
+
4581 {
+
4582 return 3; /* return error */
+
4583 }
+
4584 if ((addr % 256) != 0) /* check address */
+
4585 {
+
4586 handle->debug_print("w25qxx: addr is invalid.\n"); /* addr is invalid */
+
4587
+
4588 return 4; /* return error */
+
4589 }
+
4590 if (len > 256) /* check address */
+
4591 {
+
4592 handle->debug_print("w25qxx: length is over 256.\n"); /* length is over 256 */
+
4593
+
4594 return 7; /* return error */
+
4595 }
+
4596
+
4597 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
4598 {
+
4599 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
4600 {
+
4601 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
4602 0x00000000, 0x00, 0x00,
+
4603 0x00000000, 0x00, 0x00,
+
4604 0x00, NULL, 0x00,
+
4605 NULL, 0x00, 0x00); /* qspi write read */
+
4606 if (res != 0) /* check result */
+
4607 {
+
4608 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
4609
+
4610 return 1; /* return error */
+
4611 }
+
4612 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
4613 {
+
4614 if (handle->type >= W25Q256) /* >128Mb */
+
4615 {
+
4616 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
4617 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
4618 0x00000000, 0x00, 0x00,
+
4619 0x00000000, 0x00, 0x00,
+
4620 0, (uint8_t *)buf, 0x01,
+
4621 NULL, 0x00, 1); /* spi write read */
+
4622 if (res != 0) /* check result */
+
4623 {
+
4624 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
4625
+
4626 return 1; /* return error */
+
4627 }
+
4628 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
4629 0x00000000, 0x00, 0x00,
+
4630 0x00000000, 0x00, 0x00,
+
4631 0x00, NULL, 0x00,
+
4632 NULL, 0x00, 0x00); /* qspi write read */
+
4633 if (res != 0) /* check result */
+
4634 {
+
4635 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
4636
+
4637 return 1; /* return error */
+
4638 }
+
4639 }
+
4640 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_PAGE_PROGRAM, 1,
+
4641 addr, 1, 3,
+
4642 0x00000000, 0x00, 0x00,
+
4643 0, data, len,
+
4644 NULL, 0x00, 1); /* spi write read */
+
4645 if (res != 0) /* check result */
+
4646 {
+
4647 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
4648
+
4649 return 1; /* return error */
+
4650 }
+
4651 }
+
4652 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
4653 {
+
4654 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_PAGE_PROGRAM, 1,
+
4655 addr, 1, 4,
+
4656 0x00000000, 0x00, 0x00,
+
4657 0, data, len,
+
4658 NULL, 0x00, 1); /* spi write read */
+
4659 if (res != 0) /* check result */
+
4660 {
+
4661 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
4662
+
4663 return 1; /* return error */
+
4664 }
+
4665 }
+
4666 else
+
4667 {
+
4668 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
4669
+
4670 return 5; /* return error */
+
4671 }
+
4672
+
4673 timeout = 3 * 100; /* max 3 ms */
+
4674 while (timeout != 0) /* check timeout */
+
4675 {
+
4676 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
+
4677 0x00000000, 0x00, 0x00,
+
4678 0x00000000, 0x00, 0x00,
+
4679 0, NULL, 0,
+
4680 (uint8_t *)&status, 1, 1); /* spi write read */
+
4681 if (res != 0) /* check result */
+
4682 {
+
4683 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
4684
+
4685 return 1; /* return error */
+
4686 }
+
4687 if ((status & 0x01) == 0x00) /* check status */
+
4688 {
+
4689 break; /* break */
+
4690 }
+
4691 timeout--; /* timeout-- */
+
4692 handle->delay_us(10); /* delay 10 us */
+
4693 }
+
4694 if (timeout == 0)
+
4695 {
+
4696 handle->debug_print("w25qxx: page program timeout.\n"); /* page program timeout */
+
4697
+
4698 return 6; /* return error */
+
4699 }
+
4700 }
+
4701 else /* single spi */
+
4702 {
+
4703 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
4704 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
4705 if (res != 0) /* check result */
+
4706 {
+
4707 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
4708
+
4709 return 1; /* return error */
+
4710 }
+
4711 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
4712 {
+
4713 if (handle->type >= W25Q256) /* >128Mb */
+
4714 {
+
4715 buf[0] = 0xC5; /* write extended addr register command */
+
4716 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
4717 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
+
4718 if (res != 0) /* check result */
+
4719 {
+
4720 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
4721
+
4722 return 1; /* return error */
+
4723 }
+
4724 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
4725 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
4726 if (res != 0) /* check result */
+
4727 {
+
4728 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
4729
+
4730 return 1; /* return error */
+
4731 }
+
4732 }
+
4733 handle->buf[0] = W25QXX_COMMAND_PAGE_PROGRAM; /* page program command */
+
4734 handle->buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
4735 handle->buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
4736 handle->buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
4737 memcpy(&handle->buf[4], data, len); /* copy data */
+
4738 res = a_w25qxx_spi_write_read(handle, (uint8_t *)handle->buf, 4 + len, NULL, 0); /* spi write read */
+
4739 if (res != 0) /* check result */
+
4740 {
+
4741 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
4742
+
4743 return 1; /* return error */
+
4744 }
+
4745 }
+
4746 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE)
+
4747 && (handle->type >= W25Q256)) /* 4 address mode */
+
4748 {
+
4749 handle->buf[0] = W25QXX_COMMAND_PAGE_PROGRAM; /* page program command */
+
4750 handle->buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
4751 handle->buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
4752 handle->buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
4753 handle->buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
4754 memcpy(&handle->buf[5], data, len); /* copy data */
+
4755 res = a_w25qxx_spi_write_read(handle, (uint8_t *)handle->buf, 5 + len, NULL, 0); /* spi write read */
+
4756 if (res != 0) /* check result */
+
4757 {
+
4758 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
4759
+
4760 return 1; /* return error */
+
4761 }
+
4762 }
+
4763 else
+
4764 {
+
4765 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
4766
+
4767 return 5; /* return error */
+
4768 }
+
4769
+
4770 timeout = 3 * 100; /* max 3 ms */
+
4771 while (timeout != 0) /* check timeout */
+
4772 {
+
4773 buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
+
4774 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, (uint8_t *)&status, 1); /* spi write read */
+
4775 if (res != 0) /* check result */
+
4776 {
+
4777 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
4778
+
4779 return 1; /* return error */
+
4780 }
+
4781 if ((status & 0x01) == 0x00) /* check status */
+
4782 {
+
4783 break; /* break */
+
4784 }
+
4785 timeout--; /* timeout-- */
+
4786 handle->delay_us(10); /* delay 10 us */
+
4787 }
+
4788 if (timeout == 0)
+
4789 {
+
4790 handle->debug_print("w25qxx: page program timeout.\n"); /* page program timeout */
+
4791
+
4792 return 6; /* return error */
+
4793 }
+
4794 }
+
4795 }
+
4796 else
+
4797 {
+
4798 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
4799 0x00000000, 0x00, 0x00,
+
4800 0x00000000, 0x00, 0x00,
+
4801 0x00, NULL, 0x00,
+
4802 NULL, 0x00, 0x00); /* qspi write read */
+
4803 if (res != 0) /* check result */
+
4804 {
+
4805 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
4806
+
4807 return 1; /* return error */
+
4808 }
+
4809 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
4810 {
+
4811 if (handle->type >= W25Q256) /* >128Mb */
+
4812 {
+
4813 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
4814 res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
+
4815 0x00000000, 0x00, 0x00,
+
4816 0x00000000, 0x00, 0x00,
+
4817 0, (uint8_t *)buf, 0x01,
+
4818 NULL, 0x00, 4); /* spi write read */
+
4819 if (res != 0) /* check result */
+
4820 {
+
4821 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
4822
+
4823 return 1; /* return error */
+
4824 }
+
4825 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
4826 0x00000000, 0x00, 0x00,
+
4827 0x00000000, 0x00, 0x00,
+
4828 0x00, NULL, 0x00,
+
4829 NULL, 0x00, 0x00); /* qspi write read */
+
4830 if (res != 0) /* check result */
+
4831 {
+
4832 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
4833
+
4834 return 1; /* return error */
+
4835 }
+
4836 }
+
4837 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_PAGE_PROGRAM, 4,
+
4838 addr, 4, 3,
+
4839 0x00000000, 0x00, 0x00,
+
4840 0, data, len,
+
4841 NULL, 0x00, 4); /* spi write read */
+
4842 if (res != 0) /* check result */
+
4843 {
+
4844 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
4845
+
4846 return 1; /* return error */
+
4847 }
+
4848 }
+
4849 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
4850 {
+
4851 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_PAGE_PROGRAM, 4,
+
4852 addr, 4, 4,
+
4853 0x00000000, 0x00, 0x00,
+
4854 0, data, len,
+
4855 NULL, 0x00, 4); /* spi write read */
+
4856 if (res != 0) /* check result */
+
4857 {
+
4858 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
4859
+
4860 return 1; /* return error */
+
4861 }
+
4862 }
+
4863 else
+
4864 {
+
4865 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
4866
+
4867 return 5; /* return error */
+
4868 }
+
4869
+
4870 timeout = 3 * 100; /* max 3 ms */
+
4871 while (timeout != 0) /* check timeout */
+
4872 {
+
4873 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
+
4874 0x00000000, 0x00, 0x00,
+
4875 0x00000000, 0x00, 0x00,
+
4876 0, NULL, 0,
+
4877 (uint8_t *)&status, 1, 4); /* spi write read */
+
4878 if (res != 0) /* check result */
+
4879 {
+
4880 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
4881
+
4882 return 1; /* return error */
+
4883 }
+
4884 if ((status & 0x01) == 0x00) /* check status */
+
4885 {
+
4886 break; /* break */
+
4887 }
+
4888 timeout--; /* timeout-- */
+
4889 handle->delay_us(10); /* delay 10 us */
+
4890 }
+
4891 if (timeout == 0)
+
4892 {
+
4893 handle->debug_print("w25qxx: page program timeout.\n"); /* page program timeout */
+
4894
+
4895 return 6; /* return error */
+
4896 }
+
4897 }
+
4898
+
4899 return 0; /* success return 0 */
+
4900}
+
+
4901
+
+
4920uint8_t w25qxx_page_program_quad_input(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
+
4921{
+
4922 uint8_t res;
+
4923 uint8_t status;
+
4924 uint32_t timeout;
+
4925 uint8_t buf[2];
+
4926
+
4927 if (handle == NULL) /* check handle */
+
4928 {
+
4929 return 2; /* return error */
+
4930 }
+
4931 if (handle->inited != 1) /* check handle initialization */
+
4932 {
+
4933 return 3; /* return error */
+
4934 }
+
4935 if ((addr % 256) != 0) /* check address */
+
4936 {
+
4937 handle->debug_print("w25qxx: addr is invalid.\n"); /* addr is invalid */
+
4938
+
4939 return 4; /* return error */
+
4940 }
+
4941 if (len > 256) /* check address */
+
4942 {
+
4943 handle->debug_print("w25qxx: length is over 256.\n"); /* length is over 256 */
+
4944
+
4945 return 7; /* return error */
+
4946 }
+
4947
+
4948 if (handle->spi_qspi == W25QXX_INTERFACE_QSPI) /* qspi interface */
+
4949 {
+
4950 handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
+
4951
+
4952 return 5; /* return error */
+
4953 }
+
4954 else
+
4955 {
+
4956 if (handle->dual_quad_spi_enable == 0) /* check spi */
+
4957 {
+
4958 handle->debug_print("w25qxx: standard spi can't use this function failed.\n"); /* standard spi can't use this function failed */
+
4959
+
4960 return 8; /* return error */
+
4961 }
+
4962 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
4963 0x00000000, 0x00, 0x00,
+
4964 0x00000000, 0x00, 0x00,
+
4965 0x00, NULL, 0x00,
+
4966 NULL, 0x00, 0x00); /* qspi write read */
+
4967 if (res != 0) /* check result */
+
4968 {
+
4969 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
4970
+
4971 return 1; /* return error */
+
4972 }
+
4973 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
4974 {
+
4975 if (handle->type >= W25Q256) /* >128Mb */
+
4976 {
+
4977 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
4978 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
4979 0x00000000, 0x00, 0x00,
+
4980 0x00000000, 0x00, 0x00,
+
4981 0, (uint8_t *)buf, 0x01,
+
4982 NULL, 0x00, 1); /* spi write read */
+
4983 if (res != 0) /* check result */
+
4984 {
+
4985 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
4986
+
4987 return 1; /* return error */
+
4988 }
+
4989 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
4990 0x00000000, 0x00, 0x00,
+
4991 0x00000000, 0x00, 0x00,
+
4992 0x00, NULL, 0x00,
+
4993 NULL, 0x00, 0x00); /* qspi write read */
+
4994 if (res != 0) /* check result */
+
4995 {
+
4996 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
4997
+
4998 return 1; /* return error */
+
4999 }
+
5000 }
+
5001 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_QUAD_PAGE_PROGRAM, 1,
+
5002 addr, 1, 3,
+
5003 0x00000000, 0x00, 0x00,
+
5004 0, data, len,
+
5005 NULL, 0x00, 4); /* spi write read */
+
5006 if (res != 0) /* check result */
+
5007 {
+
5008 handle->debug_print("w25qxx: quad page program failed.\n"); /* quad page program failed */
+
5009
+
5010 return 1; /* return error */
+
5011 }
+
5012 }
+
5013 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
5014 {
+
5015 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_QUAD_PAGE_PROGRAM, 1,
+
5016 addr, 1, 4,
+
5017 0x00000000, 0x00, 0x00,
+
5018 0, data, len,
+
5019 NULL, 0x00, 4); /* spi write read */
+
5020 if (res != 0) /* check result */
+
5021 {
+
5022 handle->debug_print("w25qxx: quad page program failed.\n"); /* quad page program failed */
+
5023
+
5024 return 1; /* return error */
+
5025 }
+
5026 }
+
5027 else
+
5028 {
+
5029 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
5030
+
5031 return 5; /* return error */
+
5032 }
+
5033
+
5034 timeout = 3 * 100; /* max 3 ms */
+
5035 while (timeout != 0) /* check timeout */
+
5036 {
+
5037 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
+
5038 0x00000000, 0x00, 0x00,
+
5039 0x00000000, 0x00, 0x00,
+
5040 0, NULL, 0,
+
5041 (uint8_t *)&status, 1, 1); /* spi write read */
+
5042 if (res != 0) /* check result */
+
5043 {
+
5044 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
5045
+
5046 return 1; /* return error */
+
5047 }
+
5048 if ((status & 0x01) == 0x00) /* check status */
+
5049 {
+
5050 break; /* break */
+
5051 }
+
5052 timeout--; /* timeout-- */
+
5053 handle->delay_us(10); /* delay 10 us */
+
5054 }
+
5055 if (timeout == 0)
+
5056 {
+
5057 handle->debug_print("w25qxx: quad page program timeout.\n"); /* quad page program timeout */
+
5058
+
5059 return 6; /* return error */
+
5060 }
+
5061 }
+
5062
+
5063 return 0; /* success return 0 */
+
5064}
+
+
5065
+
+
5080uint8_t w25qxx_sector_erase_4k(w25qxx_handle_t *handle, uint32_t addr)
+
5081{
+
5082 uint8_t res;
+
5083 uint8_t status;
+
5084 uint32_t timeout;
+
5085 uint8_t buf[5];
+
5086
+
5087 if (handle == NULL) /* check handle */
+
5088 {
+
5089 return 2; /* return error */
+
5090 }
+
5091 if (handle->inited != 1) /* check handle initialization */
+
5092 {
+
5093 return 3; /* return error */
+
5094 }
+
5095 if ((addr % 4096) != 0) /* check address */
+
5096 {
+
5097 handle->debug_print("w25qxx: addr is invalid.\n"); /* addr is invalid */
+
5098
+
5099 return 4; /* return error */
+
5100 }
+
5101
+
5102 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
5103 {
+
5104 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
5105 {
+
5106 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
5107 0x00000000, 0x00, 0x00,
+
5108 0x00000000, 0x00, 0x00,
+
5109 0x00, NULL, 0x00,
+
5110 NULL, 0x00, 0x00); /* qspi write read */
+
5111 if (res != 0) /* check result */
+
5112 {
+
5113 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5114
+
5115 return 1; /* return error */
+
5116 }
+
5117 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
5118 {
+
5119 if (handle->type >= W25Q256) /* >128Mb */
+
5120 {
+
5121 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
5122 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
5123 0x00000000, 0x00, 0x00,
+
5124 0x00000000, 0x00, 0x00,
+
5125 0, (uint8_t *)buf, 0x01,
+
5126 NULL, 0x00, 1); /* spi write read */
+
5127 if (res != 0) /* check result */
+
5128 {
+
5129 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
5130
+
5131 return 1; /* return error */
+
5132 }
+
5133 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
5134 0x00000000, 0x00, 0x00,
+
5135 0x00000000, 0x00, 0x00,
+
5136 0x00, NULL, 0x00,
+
5137 NULL, 0x00, 0x00); /* qspi write read */
+
5138 if (res != 0) /* check result */
+
5139 {
+
5140 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5141
+
5142 return 1; /* return error */
+
5143 }
+
5144 }
+
5145 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_SECTOR_ERASE_4K, 1,
+
5146 addr, 1, 3,
+
5147 0x00000000, 0x00, 0x00,
+
5148 0, NULL, 0x00,
+
5149 NULL, 0x00, 0x00); /* spi write read */
+
5150 if (res != 0) /* check result */
+
5151 {
+
5152 handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
+
5153
+
5154 return 1; /* return error */
+
5155 }
+
5156 }
+
5157 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
5158 {
+
5159 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_SECTOR_ERASE_4K, 1,
+
5160 addr, 1, 4,
+
5161 0x00000000, 0x00, 0x00,
+
5162 0, NULL, 0x00,
+
5163 NULL, 0x00, 0x00); /* spi write read */
+
5164 if (res != 0) /* check result */
+
5165 {
+
5166 handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
+
5167
+
5168 return 1; /* return error */
+
5169 }
+
5170 }
+
5171 else
+
5172 {
+
5173 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
5174
+
5175 return 5; /* return error */
+
5176 }
+
5177
+
5178 timeout = 400; /* max 400 ms */
+
5179 while (timeout != 0) /* check timeout */
+
5180 {
+
5181 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
+
5182 0x00000000, 0x00, 0x00,
+
5183 0x00000000, 0x00, 0x00,
+
5184 0, NULL, 0,
+
5185 (uint8_t *)&status, 1, 1); /* spi write read */
+
5186 if (res != 0) /* check result */
+
5187 {
+
5188 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
5189
+
5190 return 1; /* return error */
+
5191 }
+
5192 if ((status & 0x01) == 0x00) /* check status */
+
5193 {
+
5194 break; /* break */
+
5195 }
+
5196 timeout--; /* timeout-- */
+
5197 handle->delay_ms(1); /* delay 1 ms */
+
5198 }
+
5199 if (timeout == 0)
+
5200 {
+
5201 handle->debug_print("w25qxx: sector erase 4k timeout.\n"); /* sector erase 4k timeout */
+
5202
+
5203 return 6; /* return error */
+
5204 }
+
5205 }
+
5206 else /* single spi */
+
5207 {
+
5208 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
5209 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
5210 if (res != 0) /* check result */
+
5211 {
+
5212 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5213
+
5214 return 1; /* return error */
+
5215 }
+
5216 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
5217 {
+
5218 if (handle->type >= W25Q256) /* >128Mb */
+
5219 {
+
5220 buf[0] = 0xC5; /* write extended addr register command */
+
5221 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
5222 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
+
5223 if (res != 0) /* check result */
+
5224 {
+
5225 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
5226
+
5227 return 1; /* return error */
+
5228 }
+
5229 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
5230 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
5231 if (res != 0) /* check result */
+
5232 {
+
5233 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5234
+
5235 return 1; /* return error */
+
5236 }
+
5237 }
+
5238 buf[0] = W25QXX_COMMAND_SECTOR_ERASE_4K; /* sector erase 4k command */
+
5239 buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
5240 buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
5241 buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
5242 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, NULL, 0); /* spi write read */
+
5243 if (res != 0) /* check result */
+
5244 {
+
5245 handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
+
5246
+
5247 return 1; /* return error */
+
5248 }
+
5249 }
+
5250 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE)
+
5251 && (handle->type >= W25Q256))
+
5252 {
+
5253 buf[0] = W25QXX_COMMAND_SECTOR_ERASE_4K; /* sector erase 4k command */
+
5254 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
5255 buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
5256 buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
5257 buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
5258 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, NULL, 0); /* spi write read */
+
5259 if (res != 0) /* check result */
+
5260 {
+
5261 handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
+
5262
+
5263 return 1; /* return error */
+
5264 }
+
5265 }
+
5266 else
+
5267 {
+
5268 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
5269
+
5270 return 5; /* return error */
+
5271 }
+
5272
+
5273 timeout = 400; /* max 400 ms */
+
5274 while (timeout != 0) /* check timeout */
+
5275 {
+
5276 buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
+
5277 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, (uint8_t *)&status, 1); /* spi write read */
+
5278 if (res != 0) /* check result */
+
5279 {
+
5280 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
5281
+
5282 return 1; /* return error */
+
5283 }
+
5284 if ((status & 0x01) == 0x00) /* check status */
+
5285 {
+
5286 break; /* break */
+
5287 }
+
5288 timeout--; /* timeout-- */
+
5289 handle->delay_ms(1); /* delay 1 ms */
+
5290 }
+
5291 if (timeout == 0)
+
5292 {
+
5293 handle->debug_print("w25qxx: sector erase 4k timeout.\n"); /* sector erase 4k timeout */
+
5294
+
5295 return 6; /* return error */
+
5296 }
+
5297 }
+
5298 }
+
5299 else
+
5300 {
+
5301 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
5302 0x00000000, 0x00, 0x00,
+
5303 0x00000000, 0x00, 0x00,
+
5304 0x00, NULL, 0x00,
+
5305 NULL, 0x00, 0x00); /* qspi write read */
+
5306 if (res != 0) /* check result */
+
5307 {
+
5308 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5309
+
5310 return 1; /* return error */
+
5311 }
+
5312 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
5313 {
+
5314 if (handle->type >= W25Q256) /* >128Mb */
+
5315 {
+
5316 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
5317 res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
+
5318 0x00000000, 0x00, 0x00,
+
5319 0x00000000, 0x00, 0x00,
+
5320 0, (uint8_t *)buf, 0x01,
+
5321 NULL, 0x00, 4); /* spi write read */
+
5322 if (res != 0) /* check result */
+
5323 {
+
5324 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
5325
+
5326 return 1; /* return error */
+
5327 }
+
5328 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
5329 0x00000000, 0x00, 0x00,
+
5330 0x00000000, 0x00, 0x00,
+
5331 0x00, NULL, 0x00,
+
5332 NULL, 0x00, 0x00); /* qspi write read */
+
5333 if (res != 0) /* check result */
+
5334 {
+
5335 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5336
+
5337 return 1; /* return error */
+
5338 }
+
5339 }
+
5340 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_SECTOR_ERASE_4K, 4,
+
5341 addr, 4, 3,
+
5342 0x00000000, 0x00, 0x00,
+
5343 0, NULL, 0x00,
+
5344 NULL, 0x00, 0x00); /* spi write read */
+
5345 if (res != 0) /* check result */
+
5346 {
+
5347 handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
+
5348
+
5349 return 1; /* return error */
+
5350 }
+
5351 }
+
5352 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
5353 {
+
5354 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_SECTOR_ERASE_4K, 4,
+
5355 addr, 4, 4,
+
5356 0x00000000, 0x00, 0x00,
+
5357 0, NULL, 0x00,
+
5358 NULL, 0x00, 0x00); /* spi write read */
+
5359 if (res != 0) /* check result */
+
5360 {
+
5361 handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
+
5362
+
5363 return 1; /* return error */
+
5364 }
+
5365 }
+
5366 else
+
5367 {
+
5368 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
5369
+
5370 return 5; /* return error */
+
5371 }
+
5372
+
5373 timeout = 400; /* max 400 ms */
+
5374 while (timeout != 0) /* check timeout */
+
5375 {
+
5376 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
+
5377 0x00000000, 0x00, 0x00,
+
5378 0x00000000, 0x00, 0x00,
+
5379 0, NULL, 0,
+
5380 (uint8_t *)&status, 1, 4); /* spi write read */
+
5381 if (res != 0) /* check result */
+
5382 {
+
5383 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
5384
+
5385 return 1; /* return error */
+
5386 }
+
5387 if ((status & 0x01) == 0x00) /* check status */
+
5388 {
+
5389 break; /* break */
+
5390 }
+
5391 timeout--; /* timeout-- */
+
5392 handle->delay_ms(1); /* delay 1 ms */
+
5393 }
+
5394 if (timeout == 0)
+
5395 {
+
5396 handle->debug_print("w25qxx: sector erase 4k timeout.\n"); /* sector erase 4k timeout */
+
5397
+
5398 return 6; /* return error */
+
5399 }
+
5400 }
+
5401
+
5402 return 0; /* success return 0 */
+
5403}
+
+
5404
+
+
5419uint8_t w25qxx_block_erase_32k(w25qxx_handle_t *handle, uint32_t addr)
+
5420{
+
5421 uint8_t res;
+
5422 uint8_t status;
+
5423 uint32_t timeout;
+
5424 uint8_t buf[5];
+
5425
+
5426 if (handle == NULL) /* check handle */
+
5427 {
+
5428 return 2; /* return error */
+
5429 }
+
5430 if (handle->inited != 1) /* check handle initialization */
+
5431 {
+
5432 return 3; /* return error */
+
5433 }
+
5434 if ((addr % (32 * 1024)) != 0) /* check address */
+
5435 {
+
5436 handle->debug_print("w25qxx: addr is invalid.\n"); /* addr is invalid */
+
5437
+
5438 return 4; /* return error */
+
5439 }
+
5440
+
5441 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
5442 {
+
5443 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
5444 {
+
5445 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
5446 0x00000000, 0x00, 0x00,
+
5447 0x00000000, 0x00, 0x00,
+
5448 0x00, NULL, 0x00,
+
5449 NULL, 0x00, 0x00); /* qspi write read */
+
5450 if (res != 0) /* check result */
+
5451 {
+
5452 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5453
+
5454 return 1; /* return error */
+
5455 }
+
5456 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
5457 {
+
5458 if (handle->type >= W25Q256) /* >128Mb */
+
5459 {
+
5460 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
5461 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
5462 0x00000000, 0x00, 0x00,
+
5463 0x00000000, 0x00, 0x00,
+
5464 0, (uint8_t *)buf, 0x01,
+
5465 NULL, 0x00, 1); /* spi write read */
+
5466 if (res != 0) /* check result */
+
5467 {
+
5468 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
5469
+
5470 return 1; /* return error */
+
5471 }
+
5472 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
5473 0x00000000, 0x00, 0x00,
+
5474 0x00000000, 0x00, 0x00,
+
5475 0x00, NULL, 0x00,
+
5476 NULL, 0x00, 0x00); /* qspi write read */
+
5477 if (res != 0) /* check result */
+
5478 {
+
5479 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5480
+
5481 return 1; /* return error */
+
5482 }
+
5483 }
+
5484 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_BLOCK_ERASE_32K, 1,
+
5485 addr, 1, 3,
+
5486 0x00000000, 0x00, 0x00,
+
5487 0, NULL, 0x00,
+
5488 NULL, 0x00, 0x00); /* spi write read */
+
5489 if (res != 0) /* check result */
+
5490 {
+
5491 handle->debug_print("w25qxx: block erase 32k failed.\n"); /* block erase 32k failed */
+
5492
+
5493 return 1; /* return error */
+
5494 }
+
5495 }
+
5496 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
5497 {
+
5498 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_BLOCK_ERASE_32K, 1,
+
5499 addr, 1, 4,
+
5500 0x00000000, 0x00, 0x00,
+
5501 0, NULL, 0x00,
+
5502 NULL, 0x00, 0x00); /* spi write read */
+
5503 if (res != 0) /* check result */
+
5504 {
+
5505 handle->debug_print("w25qxx: block erase 32k failed.\n"); /* block erase 32k failed */
+
5506
+
5507 return 1; /* return error */
+
5508 }
+
5509 }
+
5510 else
+
5511 {
+
5512 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
5513
+
5514 return 5; /* return error */
+
5515 }
+
5516
+
5517 timeout = 1600; /* max 1600 ms */
+
5518 while (timeout != 0) /* check timeout */
+
5519 {
+
5520 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
+
5521 0x00000000, 0x00, 0x00,
+
5522 0x00000000, 0x00, 0x00,
+
5523 0, NULL, 0,
+
5524 (uint8_t *)&status, 1, 1); /* spi write read */
+
5525 if (res != 0) /* check result */
+
5526 {
+
5527 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
5528
+
5529 return 1; /* return error */
+
5530 }
+
5531 if ((status & 0x01) == 0x00) /* check status */
+
5532 {
+
5533 break; /* break */
+
5534 }
+
5535 timeout--; /* timeout-- */
+
5536 handle->delay_ms(1); /* delay 1 ms */
+
5537 }
+
5538 if (timeout == 0)
+
5539 {
+
5540 handle->debug_print("w25qxx: block erase 32k timeout.\n"); /* block erase 32k timeout */
+
5541
+
5542 return 6; /* return error */
+
5543 }
+
5544 }
+
5545 else /* single spi */
+
5546 {
+
5547 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
5548 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
5549 if (res != 0) /* check result */
+
5550 {
+
5551 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5552
+
5553 return 1; /* return error */
+
5554 }
+
5555 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
5556 {
+
5557 if (handle->type >= W25Q256) /* >128Mb */
+
5558 {
+
5559 buf[0] = 0xC5; /* write extended addr register command */
+
5560 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
5561 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
+
5562 if (res != 0) /* check result */
+
5563 {
+
5564 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
5565
+
5566 return 1; /* return error */
+
5567 }
+
5568 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
5569 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
5570 if (res != 0) /* check result */
+
5571 {
+
5572 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5573
+
5574 return 1; /* return error */
+
5575 }
+
5576 }
+
5577 buf[0] = W25QXX_COMMAND_BLOCK_ERASE_32K; /* block erase 32k command */
+
5578 buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
5579 buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
5580 buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
5581 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, NULL, 0); /* spi write read */
+
5582 if (res != 0) /* check result */
+
5583 {
+
5584 handle->debug_print("w25qxx: block erase 32k failed.\n"); /* block erase 32k failed */
+
5585
+
5586 return 1; /* return error */
+
5587 }
+
5588 }
+
5589 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE)
+
5590 && (handle->type >= W25Q256))
+
5591 {
+
5592 buf[0] = W25QXX_COMMAND_BLOCK_ERASE_32K; /* block erase 32k command */
+
5593 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
5594 buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
5595 buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
5596 buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
5597 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, NULL, 0); /* spi write read */
+
5598 if (res != 0) /* check result */
+
5599 {
+
5600 handle->debug_print("w25qxx: block erase 32k failed.\n"); /* block erase 32k failed */
+
5601
+
5602 return 1; /* return error */
+
5603 }
+
5604 }
+
5605 else
+
5606 {
+
5607 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
5608
+
5609 return 5; /* return error */
+
5610 }
+
5611
+
5612 timeout = 1600; /* max 1600 ms */
+
5613 while (timeout != 0) /* check timeout */
+
5614 {
+
5615 buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
+
5616 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, (uint8_t *)&status, 1); /* spi write read */
+
5617 if (res != 0) /* check result */
+
5618 {
+
5619 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
5620
+
5621 return 1; /* return error */
+
5622 }
+
5623 if ((status & 0x01) == 0x00) /* check status */
+
5624 {
+
5625 break; /* break */
+
5626 }
+
5627 timeout--; /* timeout-- */
+
5628 handle->delay_ms(1); /* delay 1 ms */
+
5629 }
+
5630 if (timeout == 0)
+
5631 {
+
5632 handle->debug_print("w25qxx: block erase 32k timeout.\n"); /* block erase 32k timeout */
+
5633
+
5634 return 6; /* return error */
+
5635 }
+
5636 }
+
5637 }
+
5638 else
+
5639 {
+
5640 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
5641 0x00000000, 0x00, 0x00,
+
5642 0x00000000, 0x00, 0x00,
+
5643 0x00, NULL, 0x00,
+
5644 NULL, 0x00, 0x00); /* qspi write read */
+
5645 if (res != 0) /* check result */
+
5646 {
+
5647 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5648
+
5649 return 1; /* return error */
+
5650 }
+
5651 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
5652 {
+
5653 if (handle->type >= W25Q256) /* >128Mb */
+
5654 {
+
5655 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
5656 res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
+
5657 0x00000000, 0x00, 0x00,
+
5658 0x00000000, 0x00, 0x00,
+
5659 0, (uint8_t *)buf, 0x01,
+
5660 NULL, 0x00, 4); /* spi write read */
+
5661 if (res != 0) /* check result */
+
5662 {
+
5663 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
5664
+
5665 return 1; /* return error */
+
5666 }
+
5667 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
5668 0x00000000, 0x00, 0x00,
+
5669 0x00000000, 0x00, 0x00,
+
5670 0x00, NULL, 0x00,
+
5671 NULL, 0x00, 0x00); /* qspi write read */
+
5672 if (res != 0) /* check result */
+
5673 {
+
5674 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5675
+
5676 return 1; /* return error */
+
5677 }
+
5678 }
+
5679 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_BLOCK_ERASE_32K, 4,
+
5680 addr, 4, 3,
+
5681 0x00000000, 0x00, 0x00,
+
5682 0, NULL, 0x00,
+
5683 NULL, 0x00, 0x00); /* spi write read */
+
5684 if (res != 0) /* check result */
+
5685 {
+
5686 handle->debug_print("w25qxx: block erase 32k failed.\n"); /* block erase 32k failed */
+
5687
+
5688 return 1; /* return error */
+
5689 }
+
5690 }
+
5691 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
5692 {
+
5693 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_BLOCK_ERASE_32K, 4,
+
5694 addr, 4, 4,
+
5695 0x00000000, 0x00, 0x00,
+
5696 0, NULL, 0x00,
+
5697 NULL, 0x00, 0x00); /* spi write read */
+
5698 if (res != 0) /* check result */
+
5699 {
+
5700 handle->debug_print("w25qxx: block erase 32k failed.\n"); /* block erase 32k failed */
+
5701
+
5702 return 1; /* return error */
+
5703 }
+
5704 }
+
5705 else
+
5706 {
+
5707 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
5708
+
5709 return 5; /* return error */
+
5710 }
+
5711
+
5712 timeout = 1600; /* max 1600 ms */
+
5713 while (timeout != 0) /* check timeout */
+
5714 {
+
5715 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
+
5716 0x00000000, 0x00, 0x00,
+
5717 0x00000000, 0x00, 0x00,
+
5718 0, NULL, 0,
+
5719 (uint8_t *)&status, 1, 4); /* spi write read */
+
5720 if (res != 0) /* check result */
+
5721 {
+
5722 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
5723
+
5724 return 1; /* return error */
+
5725 }
+
5726 if ((status & 0x01) == 0x00) /* check status */
+
5727 {
+
5728 break; /* break */
+
5729 }
+
5730 timeout--; /* timeout-- */
+
5731 handle->delay_ms(1); /* delay 1 ms */
+
5732 }
+
5733 if (timeout == 0)
+
5734 {
+
5735 handle->debug_print("w25qxx: block erase 32k timeout.\n"); /* block erase 32k timeout */
+
5736
+
5737 return 6; /* return error */
+
5738 }
+
5739 }
+
5740
+
5741 return 0; /* success return 0 */
+
5742}
+
+
5743
+
+
5758uint8_t w25qxx_block_erase_64k(w25qxx_handle_t *handle, uint32_t addr)
+
5759{
+
5760 uint8_t res;
+
5761 uint8_t status;
+
5762 uint32_t timeout;
+
5763 uint8_t buf[5];
+
5764
+
5765 if (handle == NULL) /* check handle */
+
5766 {
+
5767 return 2; /* return error */
+
5768 }
+
5769 if (handle->inited != 1) /* check handle initialization */
+
5770 {
+
5771 return 3; /* return error */
+
5772 }
+
5773 if ((addr % (64 * 1024)) != 0) /* check address */
+
5774 {
+
5775 handle->debug_print("w25qxx: addr is invalid.\n"); /* addr is invalid */
+
5776
+
5777 return 4; /* return error */
+
5778 }
+
5779
+
5780 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
5781 {
+
5782 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
5783 {
+
5784 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
5785 0x00000000, 0x00, 0x00,
+
5786 0x00000000, 0x00, 0x00,
+
5787 0x00, NULL, 0x00,
+
5788 NULL, 0x00, 0x00); /* qspi write read */
+
5789 if (res != 0) /* check result */
+
5790 {
+
5791 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5792
+
5793 return 1; /* return error */
+
5794 }
+
5795 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
5796 {
+
5797 if (handle->type >= W25Q256) /* >128Mb */
+
5798 {
+
5799 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
5800 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
5801 0x00000000, 0x00, 0x00,
+
5802 0x00000000, 0x00, 0x00,
+
5803 0, (uint8_t *)buf, 0x01,
+
5804 NULL, 0x00, 1); /* spi write read */
+
5805 if (res != 0) /* check result */
+
5806 {
+
5807 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
5808
+
5809 return 1; /* return error */
+
5810 }
+
5811 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
5812 0x00000000, 0x00, 0x00,
+
5813 0x00000000, 0x00, 0x00,
+
5814 0x00, NULL, 0x00,
+
5815 NULL, 0x00, 0x00); /* qspi write read */
+
5816 if (res != 0) /* check result */
+
5817 {
+
5818 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5819
+
5820 return 1; /* return error */
+
5821 }
+
5822 }
+
5823 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_BLOCK_ERASE_64K, 1,
+
5824 addr, 1, 3,
+
5825 0x00000000, 0x00, 0x00,
+
5826 0, NULL, 0x00,
+
5827 NULL, 0x00, 0x00); /* spi write read */
+
5828 if (res != 0) /* check result */
+
5829 {
+
5830 handle->debug_print("w25qxx: block erase 64k failed.\n"); /* block erase 64k failed */
+
5831
+
5832 return 1; /* return error */
+
5833 }
+
5834 }
+
5835 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
5836 {
+
5837 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_BLOCK_ERASE_64K, 1,
+
5838 addr, 1, 4,
+
5839 0x00000000, 0x00, 0x00,
+
5840 0, NULL, 0x00,
+
5841 NULL, 0x00, 0x00); /* spi write read */
+
5842 if (res != 0) /* check result */
+
5843 {
+
5844 handle->debug_print("w25qxx: block erase 64k failed.\n"); /* block erase 64k failed */
+
5845
+
5846 return 1; /* return error */
+
5847 }
+
5848 }
+
5849 else
+
5850 {
+
5851 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
5852
+
5853 return 5; /* return error */
+
5854 }
+
5855
+
5856 timeout = 2000; /* max 2000 ms */
+
5857 while (timeout != 0) /* check timeout */
+
5858 {
+
5859 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
+
5860 0x00000000, 0x00, 0x00,
+
5861 0x00000000, 0x00, 0x00,
+
5862 0, NULL, 0,
+
5863 (uint8_t *)&status, 1, 1); /* spi write read */
+
5864 if (res != 0) /* check result */
+
5865 {
+
5866 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
5867
+
5868 return 1; /* return error */
+
5869 }
+
5870 if ((status & 0x01) == 0x00) /* check status */
+
5871 {
+
5872 break; /* break */
+
5873 }
+
5874 timeout--; /* timeout-- */
+
5875 handle->delay_ms(1); /* delay 1 ms */
+
5876 }
+
5877 if (timeout == 0)
+
5878 {
+
5879 handle->debug_print("w25qxx: block erase 64k timeout.\n"); /* block erase 64k timeout */
+
5880
+
5881 return 6; /* return error */
+
5882 }
+
5883 }
+
5884 else /* single spi */
+
5885 {
+
5886 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
5887 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
5888 if (res != 0) /* check result */
+
5889 {
+
5890 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5891
+
5892 return 1; /* return error */
+
5893 }
+
5894 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
5895 {
+
5896 if (handle->type >= W25Q256) /* >128Mb */
+
5897 {
+
5898 buf[0] = 0xC5; /* write extended addr register command */
+
5899 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
5900 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
+
5901 if (res != 0) /* check result */
+
5902 {
+
5903 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
5904
+
5905 return 1; /* return error */
+
5906 }
+
5907 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
5908 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
5909 if (res != 0) /* check result */
+
5910 {
+
5911 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5912
+
5913 return 1; /* return error */
+
5914 }
+
5915 }
+
5916 buf[0] = W25QXX_COMMAND_BLOCK_ERASE_64K; /* block erase 64k command */
+
5917 buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
5918 buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
5919 buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
5920 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, NULL, 0); /* spi write read */
+
5921 if (res != 0) /* check result */
+
5922 {
+
5923 handle->debug_print("w25qxx: block erase 64k failed.\n"); /* block erase 64k failed */
+
5924
+
5925 return 1; /* return error */
+
5926 }
+
5927 }
+
5928 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
5929 {
+
5930 buf[0] = W25QXX_COMMAND_BLOCK_ERASE_64K; /* block erase 64k command */
+
5931 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
5932 buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
5933 buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
5934 buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
5935 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, NULL, 0); /* spi write read */
+
5936 if (res != 0) /* check result */
+
5937 {
+
5938 handle->debug_print("w25qxx: block erase 64k failed.\n"); /* block erase 64k failed */
+
5939
+
5940 return 1; /* return error */
+
5941 }
+
5942 }
+
5943 else
+
5944 {
+
5945 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
5946
+
5947 return 5; /* return error */
+
5948 }
+
5949
+
5950 timeout = 2000; /* max 2000 ms */
+
5951 while (timeout != 0) /* check timeout */
+
5952 {
+
5953 buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
+
5954 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, (uint8_t *)&status, 1); /* spi write read */
+
5955 if (res != 0) /* check result */
+
5956 {
+
5957 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
5958
+
5959 return 1; /* return error */
+
5960 }
+
5961 if ((status & 0x01) == 0x00) /* check status */
+
5962 {
+
5963 break; /* break */
+
5964 }
+
5965 timeout--; /* timeout-- */
+
5966 handle->delay_ms(1); /* delay 1 ms */
+
5967 }
+
5968 if (timeout == 0)
+
5969 {
+
5970 handle->debug_print("w25qxx: block erase 64k timeout.\n"); /* block erase 64k timeout */
+
5971
+
5972 return 6; /* return error */
+
5973 }
+
5974 }
+
5975 }
+
5976 else
+
5977 {
+
5978 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
5979 0x00000000, 0x00, 0x00,
+
5980 0x00000000, 0x00, 0x00,
+
5981 0x00, NULL, 0x00,
+
5982 NULL, 0x00, 0x00); /* qspi write read */
+
5983 if (res != 0) /* check result */
+
5984 {
+
5985 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
5986
+
5987 return 1; /* return error */
+
5988 }
+
5989 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
5990 {
+
5991 if (handle->type >= W25Q256) /* >128Mb */
+
5992 {
+
5993 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
5994 res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
+
5995 0x00000000, 0x00, 0x00,
+
5996 0x00000000, 0x00, 0x00,
+
5997 0, (uint8_t *)buf, 0x01,
+
5998 NULL, 0x00, 4); /* spi write read */
+
5999 if (res != 0) /* check result */
+
6000 {
+
6001 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
6002
+
6003 return 1; /* return error */
+
6004 }
+
6005 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
6006 0x00000000, 0x00, 0x00,
+
6007 0x00000000, 0x00, 0x00,
+
6008 0x00, NULL, 0x00,
+
6009 NULL, 0x00, 0x00); /* qspi write read */
+
6010 if (res != 0) /* check result */
+
6011 {
+
6012 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
6013
+
6014 return 1; /* return error */
+
6015 }
+
6016 }
+
6017 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_BLOCK_ERASE_64K, 4,
+
6018 addr, 4, 3,
+
6019 0x00000000, 0x00, 0x00,
+
6020 0, NULL, 0x00,
+
6021 NULL, 0x00, 0x00); /* spi write read */
+
6022 if (res != 0) /* check result */
+
6023 {
+
6024 handle->debug_print("w25qxx: block erase 64k failed.\n"); /* block erase 64k failed */
+
6025
+
6026 return 1; /* return error */
+
6027 }
+
6028 }
+
6029 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
6030 {
+
6031 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_BLOCK_ERASE_64K, 4,
+
6032 addr, 4, 4,
+
6033 0x00000000, 0x00, 0x00,
+
6034 0, NULL, 0x00,
+
6035 NULL, 0x00, 0x00); /* spi write read */
+
6036 if (res != 0) /* check result */
+
6037 {
+
6038 handle->debug_print("w25qxx: block erase 64k failed.\n"); /* block erase 64k failed */
+
6039
+
6040 return 1; /* return error */
+
6041 }
+
6042 }
+
6043 else
+
6044 {
+
6045 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
6046
+
6047 return 5; /* return error */
+
6048 }
+
6049
+
6050 timeout = 2000; /* max 2000 ms */
+
6051 while (timeout != 0) /* check timeout */
+
6052 {
+
6053 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
+
6054 0x00000000, 0x00, 0x00,
+
6055 0x00000000, 0x00, 0x00,
+
6056 0, NULL, 0,
+
6057 (uint8_t *)&status, 1, 4); /* spi write read */
+
6058 if (res != 0) /* check result */
+
6059 {
+
6060 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
6061
+
6062 return 1; /* return error */
+
6063 }
+
6064 if ((status & 0x01) == 0x00) /* check status */
+
6065 {
+
6066 break; /* break */
+
6067 }
+
6068 timeout--; /* timeout-- */
+
6069 handle->delay_ms(1); /* delay 1 ms */
+
6070 }
+
6071 if (timeout == 0)
+
6072 {
+
6073 handle->debug_print("w25qxx: block erase 64k timeout.\n"); /* block erase 64k timeout */
+
6074
+
6075 return 6; /* return error */
+
6076 }
+
6077 }
+
6078
+
6079 return 0; /* success return 0 */
+
6080}
+
+
6081
+
+
6094uint8_t w25qxx_individual_block_lock(w25qxx_handle_t *handle, uint32_t addr)
+
6095{
+
6096 uint8_t res;
+
6097 uint8_t buf[5];
+
6098
+
6099 if (handle == NULL) /* check handle */
+
6100 {
+
6101 return 2; /* return error */
+
6102 }
+
6103 if (handle->inited != 1) /* check handle initialization */
+
6104 {
+
6105 return 3; /* return error */
+
6106 }
+
6107
+
6108 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
6109 {
+
6110 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
6111 {
+
6112 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
6113 {
+
6114 if (handle->type >= W25Q256) /* >128Mb */
+
6115 {
+
6116 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
6117 0x00000000, 0x00, 0x00,
+
6118 0x00000000, 0x00, 0x00,
+
6119 0x00, NULL, 0x00,
+
6120 NULL, 0x00, 0x00); /* qspi write read */
+
6121 if (res != 0) /* check result */
+
6122 {
+
6123 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
6124
+
6125 return 1; /* return error */
+
6126 }
+
6127 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
6128 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
6129 0x00000000, 0x00, 0x00,
+
6130 0x00000000, 0x00, 0x00,
+
6131 0, (uint8_t *)buf, 0x01,
+
6132 NULL, 0x00, 1); /* spi write read */
+
6133 if (res != 0) /* check result */
+
6134 {
+
6135 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
6136
+
6137 return 1; /* return error */
+
6138 }
+
6139 }
+
6140 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK, 1,
+
6141 addr, 1, 3,
+
6142 0x00000000, 0x00, 0x00,
+
6143 0, NULL, 0x00,
+
6144 NULL, 0x00, 0x00); /* spi write read */
+
6145 if (res != 0) /* check result */
+
6146 {
+
6147 handle->debug_print("w25qxx: individual block lock failed.\n"); /* individual block lock failed */
+
6148
+
6149 return 1; /* return error */
+
6150 }
+
6151 }
+
6152 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
6153 {
+
6154 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK, 1,
+
6155 addr, 1, 4,
+
6156 0x00000000, 0x00, 0x00,
+
6157 0, NULL, 0x00,
+
6158 NULL, 0x00, 0x00); /* spi write read */
+
6159 if (res != 0) /* check result */
+
6160 {
+
6161 handle->debug_print("w25qxx: individual block lock failed.\n"); /* individual block lock failed */
+
6162
+
6163 return 1; /* return error */
+
6164 }
+
6165 }
+
6166 else
+
6167 {
+
6168 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
6169
+
6170 return 4; /* return error */
+
6171 }
+
6172 }
+
6173 else /* single spi */
+
6174 {
+
6175 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
6176 {
+
6177 if (handle->type >= W25Q256) /* >128Mb */
+
6178 {
+
6179 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
6180 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
6181 if (res != 0) /* check result */
+
6182 {
+
6183 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
6184
+
6185 return 1; /* return error */
+
6186 }
+
6187 buf[0] = 0xC5; /* write extended addr register command */
+
6188 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
6189 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
+
6190 if (res != 0) /* check result */
+
6191 {
+
6192 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
6193
+
6194 return 1; /* return error */
+
6195 }
+
6196 }
+
6197 buf[0] = W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK; /* individual block lock command */
+
6198 buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
6199 buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
6200 buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
6201 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, NULL, 0); /* spi write read */
+
6202 if (res != 0) /* check result */
+
6203 {
+
6204 handle->debug_print("w25qxx: individual block lock failed.\n"); /* individual block lock failed */
+
6205
+
6206 return 1; /* return error */
+
6207 }
+
6208 }
+
6209 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
6210 {
+
6211 buf[0] = W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK; /* individual block lock command */
+
6212 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
6213 buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
6214 buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
6215 buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
6216 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, NULL, 0); /* spi write read */
+
6217 if (res != 0) /* check result */
+
6218 {
+
6219 handle->debug_print("w25qxx: individual block lock failed.\n"); /* individual block lock failed */
+
6220
+
6221 return 1; /* return error */
+
6222 }
+
6223 }
+
6224 else
+
6225 {
+
6226 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
6227
+
6228 return 4; /* return error */
+
6229 }
+
6230 }
+
6231 }
+
6232 else
+
6233 {
+
6234 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
6235 {
+
6236 if (handle->type >= W25Q256) /* >128Mb */
+
6237 {
+
6238 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
6239 0x00000000, 0x00, 0x00,
+
6240 0x00000000, 0x00, 0x00,
+
6241 0x00, NULL, 0x00,
+
6242 NULL, 0x00, 0x00); /* qspi write read */
+
6243 if (res != 0) /* check result */
+
6244 {
+
6245 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
6246
+
6247 return 1; /* return error */
+
6248 }
+
6249 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
6250 res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
+
6251 0x00000000, 0x00, 0x00,
+
6252 0x00000000, 0x00, 0x00,
+
6253 0, (uint8_t *)buf, 0x01,
+
6254 NULL, 0x00, 4); /* spi write read */
+
6255 if (res != 0) /* check result */
+
6256 {
+
6257 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
6258
+
6259 return 1; /* return error */
+
6260 }
+
6261 }
+
6262 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK, 4,
+
6263 addr, 4, 3,
+
6264 0x00000000, 0x00, 0x00,
+
6265 0, NULL, 0x00,
+
6266 NULL, 0x00, 0x00); /* spi write read */
+
6267 if (res != 0) /* check result */
+
6268 {
+
6269 handle->debug_print("w25qxx: individual block lock failed.\n"); /* individual block lock failed */
+
6270
+
6271 return 1; /* return error */
+
6272 }
+
6273 }
+
6274 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
6275 {
+
6276 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK, 4,
+
6277 addr, 4, 4,
+
6278 0x00000000, 0x00, 0x00,
+
6279 0, NULL, 0x00,
+
6280 NULL, 0x00, 0x00); /* spi write read */
+
6281 if (res != 0) /* check result */
+
6282 {
+
6283 handle->debug_print("w25qxx: individual block lock failed.\n"); /* individual block lock failed */
+
6284
+
6285 return 1; /* return error */
+
6286 }
+
6287 }
+
6288 else
+
6289 {
+
6290 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
6291
+
6292 return 4; /* return error */
+
6293 }
+
6294 }
+
6295
+
6296 return 0; /* success return 0 */
+
6297}
+
+
6298
+
+
6311uint8_t w25qxx_individual_block_unlock(w25qxx_handle_t *handle, uint32_t addr)
+
6312{
+
6313 uint8_t res;
+
6314 uint8_t buf[5];
+
6315
+
6316 if (handle == NULL) /* check handle */
+
6317 {
+
6318 return 2; /* return error */
+
6319 }
+
6320 if (handle->inited != 1) /* check handle initialization */
+
6321 {
+
6322 return 3; /* return error */
+
6323 }
+
6324
+
6325 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
6326 {
+
6327 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
6328 {
+
6329 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
6330 {
+
6331 if (handle->type >= W25Q256) /* >128Mb */
+
6332 {
+
6333 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
6334 0x00000000, 0x00, 0x00,
+
6335 0x00000000, 0x00, 0x00,
+
6336 0x00, NULL, 0x00,
+
6337 NULL, 0x00, 0x00); /* qspi write read */
+
6338 if (res != 0) /* check result */
+
6339 {
+
6340 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
6341
+
6342 return 1; /* return error */
+
6343 }
+
6344 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
6345 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
6346 0x00000000, 0x00, 0x00,
+
6347 0x00000000, 0x00, 0x00,
+
6348 0, (uint8_t *)buf, 0x01,
+
6349 NULL, 0x00, 1); /* spi write read */
+
6350 if (res != 0) /* check result */
+
6351 {
+
6352 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
6353
+
6354 return 1; /* return error */
+
6355 }
+
6356 }
+
6357 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK, 1,
+
6358 addr, 1, 3,
+
6359 0x00000000, 0x00, 0x00,
+
6360 0, NULL, 0x00,
+
6361 NULL, 0x00, 0x00); /* spi write read */
+
6362 if (res != 0) /* check result */
+
6363 {
+
6364 handle->debug_print("w25qxx: individual block unlock failed.\n"); /* individual unblock lock failed */
+
6365
+
6366 return 1; /* return error */
+
6367 }
+
6368 }
+
6369 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
6370 {
+
6371 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK, 1,
+
6372 addr, 1, 4,
+
6373 0x00000000, 0x00, 0x00,
+
6374 0, NULL, 0x00,
+
6375 NULL, 0x00, 0x00); /* spi write read */
+
6376 if (res != 0) /* check result */
+
6377 {
+
6378 handle->debug_print("w25qxx: individual block unlock failed.\n"); /* individual block unlock failed */
+
6379
+
6380 return 1; /* return error */
+
6381 }
+
6382 }
+
6383 else
+
6384 {
+
6385 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
6386
+
6387 return 4; /* return error */
+
6388 }
+
6389 }
+
6390 else /* single spi */
+
6391 {
+
6392 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
6393 {
+
6394 if (handle->type >= W25Q256) /* >128Mb */
+
6395 {
+
6396 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
6397 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
6398 if (res != 0) /* check result */
+
6399 {
+
6400 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
6401
+
6402 return 1; /* return error */
+
6403 }
+
6404 buf[0] = 0xC5; /* write extended addr register command */
+
6405 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
6406 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
+
6407 if (res != 0) /* check result */
+
6408 {
+
6409 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
6410
+
6411 return 1; /* return error */
+
6412 }
+
6413 }
+
6414 buf[0] = W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK; /* individual block unlock command */
+
6415 buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
6416 buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
6417 buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
6418 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, NULL, 0); /* spi write read */
+
6419 if (res != 0) /* check result */
+
6420 {
+
6421 handle->debug_print("w25qxx: individual block unlock failed.\n"); /* individual block unlock failed */
+
6422
+
6423 return 1; /* return error */
+
6424 }
+
6425 }
+
6426 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
6427 {
+
6428 buf[0] = W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK; /* individual block unlock command */
+
6429 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
6430 buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
6431 buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
6432 buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
6433 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, NULL, 0); /* spi write read */
+
6434 if (res != 0) /* check result */
+
6435 {
+
6436 handle->debug_print("w25qxx: individual block unlock failed.\n"); /* individual block unlock failed */
+
6437
+
6438 return 1; /* return error */
+
6439 }
+
6440 }
+
6441 else
+
6442 {
+
6443 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
6444
+
6445 return 4; /* return error */
+
6446 }
+
6447 }
+
6448 }
+
6449 else
+
6450 {
+
6451 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
6452 {
+
6453 if (handle->type >= W25Q256) /* >128Mb */
+
6454 {
+
6455 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
6456 0x00000000, 0x00, 0x00,
+
6457 0x00000000, 0x00, 0x00,
+
6458 0x00, NULL, 0x00,
+
6459 NULL, 0x00, 0x00); /* qspi write read */
+
6460 if (res != 0) /* check result */
+
6461 {
+
6462 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
6463
+
6464 return 1; /* return error */
+
6465 }
+
6466 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
6467 res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
+
6468 0x00000000, 0x00, 0x00,
+
6469 0x00000000, 0x00, 0x00,
+
6470 0, (uint8_t *)buf, 0x01,
+
6471 NULL, 0x00, 4); /* spi write read */
+
6472 if (res != 0) /* check result */
+
6473 {
+
6474 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
6475
+
6476 return 1; /* return error */
+
6477 }
+
6478 }
+
6479 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK, 4,
+
6480 addr, 4, 3,
+
6481 0x00000000, 0x00, 0x00,
+
6482 0, NULL, 0x00,
+
6483 NULL, 0x00, 0x00); /* spi write read */
+
6484 if (res != 0) /* check result */
+
6485 {
+
6486 handle->debug_print("w25qxx: individual block unlock failed.\n"); /* individual unblock lock failed */
+
6487
+
6488 return 1; /* return error */
+
6489 }
+
6490 }
+
6491 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
6492 {
+
6493 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK, 4,
+
6494 addr, 4, 4,
+
6495 0x00000000, 0x00, 0x00,
+
6496 0, NULL, 0x00,
+
6497 NULL, 0x00, 0x00); /* spi write read */
+
6498 if (res != 0) /* check result */
+
6499 {
+
6500 handle->debug_print("w25qxx: individual block unlock failed.\n"); /* individual block unlock failed */
+
6501
+
6502 return 1; /* return error */
+
6503 }
+
6504 }
+
6505 else
+
6506 {
+
6507 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
6508
+
6509 return 4; /* return error */
+
6510 }
+
6511 }
+
6512
+
6513 return 0; /* success return 0 */
+
6514}
+
+
6515
+
+
6529uint8_t w25qxx_read_block_lock(w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
+
6530{
+
6531 uint8_t res;
+
6532 uint8_t buf[5];
+
6533
+
6534 if (handle == NULL) /* check handle */
+
6535 {
+
6536 return 2; /* return error */
+
6537 }
+
6538 if (handle->inited != 1) /* check handle initialization */
+
6539 {
+
6540 return 3; /* return error */
+
6541 }
+
6542
+
6543 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
6544 {
+
6545 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
6546 {
+
6547 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
6548 {
+
6549 if (handle->type >= W25Q256) /* >128Mb */
+
6550 {
+
6551 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
6552 0x00000000, 0x00, 0x00,
+
6553 0x00000000, 0x00, 0x00,
+
6554 0x00, NULL, 0x00,
+
6555 NULL, 0x00, 0x00); /* qspi write read */
+
6556 if (res != 0) /* check result */
+
6557 {
+
6558 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
6559
+
6560 return 1; /* return error */
+
6561 }
+
6562 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
6563 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
6564 0x00000000, 0x00, 0x00,
+
6565 0x00000000, 0x00, 0x00,
+
6566 0, (uint8_t *)buf, 0x01,
+
6567 NULL, 0x00, 1); /* spi write read */
+
6568 if (res != 0) /* check result */
+
6569 {
+
6570 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
6571
+
6572 return 1; /* return error */
+
6573 }
+
6574 }
+
6575 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_BLOCK_LOCK, 1,
+
6576 addr, 1, 3,
+
6577 0x00000000, 0x00, 0x00,
+
6578 0, NULL, 0x00,
+
6579 value, 1, 1); /* spi write read */
+
6580 if (res != 0) /* check result */
+
6581 {
+
6582 handle->debug_print("w25qxx: read block lock failed.\n"); /* read block lock failed */
+
6583
+
6584 return 1; /* return error */
+
6585 }
+
6586 }
+
6587 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
6588 {
+
6589 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_BLOCK_LOCK, 1,
+
6590 addr, 1, 4,
+
6591 0x00000000, 0x00, 0x00,
+
6592 0, NULL, 0x00,
+
6593 value, 1, 1); /* spi write read */
+
6594 if (res != 0) /* check result */
+
6595 {
+
6596 handle->debug_print("w25qxx: read block lock failed.\n"); /* read block lock failed */
+
6597
+
6598 return 1; /* return error */
+
6599 }
+
6600 }
+
6601 else
+
6602 {
+
6603 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
6604
+
6605 return 4; /* return error */
+
6606 }
+
6607 }
+
6608 else /* single spi */
+
6609 {
+
6610 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
6611 {
+
6612 if (handle->type >= W25Q256) /* >128Mb */
+
6613 {
+
6614 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
6615 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
6616 if (res != 0) /* check result */
+
6617 {
+
6618 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
6619
+
6620 return 1; /* return error */
+
6621 }
+
6622 buf[0] = 0xC5; /* write extended addr register command */
+
6623 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
6624 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
+
6625 if (res != 0) /* check result */
+
6626 {
+
6627 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
6628
+
6629 return 1; /* return error */
+
6630 }
+
6631 }
+
6632 buf[0] = W25QXX_COMMAND_READ_BLOCK_LOCK; /* read block lock command */
+
6633 buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
6634 buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
6635 buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
6636 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, value, 1); /* spi write read */
+
6637 if (res != 0) /* check result */
+
6638 {
+
6639 handle->debug_print("w25qxx: read block lock failed.\n"); /* read block lock failed */
+
6640
+
6641 return 1; /* return error */
+
6642 }
+
6643 }
+
6644 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
6645 {
+
6646 buf[0] = W25QXX_COMMAND_READ_BLOCK_LOCK; /* read block lock command */
+
6647 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
6648 buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
6649 buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
6650 buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
6651 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, value, 1); /* spi write read */
+
6652 if (res != 0) /* check result */
+
6653 {
+
6654 handle->debug_print("w25qxx: read block lock failed.\n"); /* read block lock failed */
+
6655
+
6656 return 1; /* return error */
+
6657 }
+
6658 }
+
6659 else
+
6660 {
+
6661 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
6662
+
6663 return 4; /* return error */
+
6664 }
+
6665 }
+
6666 }
+
6667 else
+
6668 {
+
6669 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
6670 {
+
6671 if (handle->type >= W25Q256) /* >128Mb */
+
6672 {
+
6673 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
6674 0x00000000, 0x00, 0x00,
+
6675 0x00000000, 0x00, 0x00,
+
6676 0x00, NULL, 0x00,
+
6677 NULL, 0x00, 0x00); /* qspi write read */
+
6678 if (res != 0) /* check result */
+
6679 {
+
6680 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
6681
+
6682 return 1; /* return error */
+
6683 }
+
6684 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
6685 res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
+
6686 0x00000000, 0x00, 0x00,
+
6687 0x00000000, 0x00, 0x00,
+
6688 0, (uint8_t *)buf, 0x01,
+
6689 NULL, 0x00, 4); /* spi write read */
+
6690 if (res != 0) /* check result */
+
6691 {
+
6692 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
6693
+
6694 return 1; /* return error */
+
6695 }
+
6696 }
+
6697 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_BLOCK_LOCK, 4,
+
6698 addr, 4, 3,
+
6699 0x00000000, 0x00, 0x00,
+
6700 0, NULL, 0x00,
+
6701 value, 1, 4); /* spi write read */
+
6702 if (res != 0) /* check result */
+
6703 {
+
6704 handle->debug_print("w25qxx: read block lock failed.\n"); /* read block lock failed */
+
6705
+
6706 return 1; /* return error */
+
6707 }
+
6708 }
+
6709 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
6710 {
+
6711 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_BLOCK_LOCK, 4,
+
6712 addr, 4, 4,
+
6713 0x00000000, 0x00, 0x00,
+
6714 0, NULL, 0x00,
+
6715 value, 1, 4); /* spi write read */
+
6716 if (res != 0) /* check result */
+
6717 {
+
6718 handle->debug_print("w25qxx: read block lock failed.\n"); /* read block lock failed */
+
6719
+
6720 return 1; /* return error */
+
6721 }
+
6722 }
+
6723 else
+
6724 {
+
6725 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
6726
+
6727 return 4; /* return error */
+
6728 }
+
6729 }
+
6730
+
6731 return 0; /* success return 0 */
+
6732}
+
+
6733
+
+
6746uint8_t w25qxx_set_burst_with_wrap(w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
+
6747{
+
6748 uint8_t res;
+
6749 uint8_t buf[5];
+
6750
+
6751 if (handle == NULL) /* check handle */
+
6752 {
+
6753 return 2; /* return error */
+
6754 }
+
6755 if (handle->inited != 1) /* check handle initialization */
+
6756 {
+
6757 return 3; /* return error */
+
6758 }
+
6759
+
6760 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
6761 {
+
6762 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
6763 {
+
6764 buf[0] = wrap;
+
6765 res = a_w25qxx_qspi_write_read(handle,
+
6766 W25QXX_COMMAND_SET_BURST_WITH_WRAP, 1,
+
6767 0x00000000, 0x00, 0x00,
+
6768 0x00000000, 0x00, 0x00,
+
6769 3 * 8, (uint8_t *)buf, 1,
+
6770 NULL, 0x00, 1); /* spi write read */
+
6771 if (res != 0) /* check result */
+
6772 {
+
6773 handle->debug_print("w25qxx: set burst with wrap failed.\n"); /* set burst with wrap failed */
+
6774
+
6775 return 1; /* return error */
+
6776 }
+
6777 }
+
6778 else /* single spi */
+
6779 {
+
6780 buf[0] = W25QXX_COMMAND_SET_BURST_WITH_WRAP; /* set burst with wrap command */
+
6781 buf[1] = 0x00; /* dummy */
+
6782 buf[2] = 0x00; /* dummy */
+
6783 buf[3] = 0x00; /* dummy */
+
6784 buf[4] = wrap; /* wrap */
+
6785 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, NULL, 0); /* spi write read */
+
6786 if (res != 0) /* check result */
+
6787 {
+
6788 handle->debug_print("w25qxx: set burst with wrap failed.\n"); /* set burst with wrap failed */
+
6789
+
6790 return 1; /* return error */
+
6791 }
+
6792 }
+
6793 }
+
6794 else
+
6795 {
+
6796 handle->debug_print("w25qxx: qspi can't use this function.\n"); /* qspi can't use this function */
+
6797
+
6798 return 4; /* return error */
+
6799 }
+
6800
+
6801 return 0; /* success return 0 */
+
6802}
+
+
6803
+
+
6819uint8_t w25qxx_init(w25qxx_handle_t *handle)
+
6820{
+
6821 uint8_t res;
+
6822 uint8_t status;
+
6823 uint8_t buf[4];
+
6824 uint8_t out[2];
+
6825 uint16_t id;
+
6826
+
6827 if (handle == NULL) /* check handle */
+
6828 {
+
6829 return 2; /* return error */
+
6830 }
+
6831 if (handle->debug_print == NULL) /* check debug_print */
+
6832 {
+
6833 return 3; /* return error */
+
6834 }
+
6835 if (handle->spi_qspi_init == NULL) /* check spi_qspi_init */
+
6836 {
+
6837 handle->debug_print("w25qxx: spi_qspi_init is null.\n"); /* spi_qspi_init is null */
+
6838
+
6839 return 3; /* return error */
+
6840 }
+
6841 if (handle->spi_qspi_deinit == NULL) /* check spi_qspi_deinit */
+
6842 {
+
6843 handle->debug_print("w25qxx: spi_qspi_deinit is null.\n"); /* spi_qspi_deinit is null */
+
6844
+
6845 return 3; /* return error */
+
6846 }
+
6847 if (handle->spi_qspi_write_read == NULL) /* check spi_qspi_write_read */
+
6848 {
+
6849 handle->debug_print("w25qxx: spi_qspi_write_read is null.\n"); /* spi_qspi_write_read is null */
+
6850
+
6851 return 3; /* return error */
+
6852 }
+
6853 if (handle->delay_us == NULL) /* check delay_us */
+
6854 {
+
6855 handle->debug_print("w25qxx: delay_us is null.\n"); /* delay_us is null */
+
6856
+
6857 return 3; /* return error */
+
6858 }
+
6859 if (handle->delay_ms == NULL) /* check delay_ms */
+
6860 {
+
6861 handle->debug_print("w25qxx: delay_ms is null.\n"); /* delay_ms is null */
+
6862
+
6863 return 3; /* return error */
+
6864 }
+
6865
+
6866 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
6867 {
+
6868 res = handle->spi_qspi_init(); /* spi init */
+
6869 if (res != 0) /* check result */
+
6870 {
+
6871 handle->debug_print("w25qxx: spi init failed.\n"); /* spi init failed */
+
6872
+
6873 return 1; /* return error */
+
6874 }
+
6875 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
6876 {
+
6877 res = a_w25qxx_qspi_write_read(handle,
+
6878 W25QXX_COMMAND_RELEASE_POWER_DOWN, 1,
+
6879 0x00000000, 0x00, 0x00,
+
6880 0x00000000, 0x00, 0x00,
+
6881 3 * 8, NULL, 0x00,
+
6882 (uint8_t *)&id, 1, 1); /* spi write read */
+
6883 if (res != 0) /* check result */
+
6884 {
+
6885 handle->debug_print("w25qxx: release power down failed.\n"); /* release power down failed */
+
6886 (void)handle->spi_qspi_deinit();
+
6888 return 1; /* return error */
+
6889 }
+
6890 res = a_w25qxx_qspi_write_read(handle,
+
6891 W25QXX_COMMAND_ENABLE_RESET, 1,
+
6892 0x00000000, 0x00, 0x00,
+
6893 0x00000000, 0x00, 0x00,
+
6894 0x00, NULL, 0x00,
+
6895 NULL, 0x00, 0x00); /* spi write read */
+
6896 if (res != 0) /* check result */
+
6897 {
+
6898 handle->debug_print("w25qxx: enable reset failed.\n"); /* enable reset failed */
+
6899 (void)handle->spi_qspi_deinit();
+
6901 return 7; /* return error */
+
6902 }
+
6903 res = a_w25qxx_qspi_write_read(handle,
+
6904 W25QXX_COMMAND_RESET_DEVICE, 1,
+
6905 0x00000000, 0x00, 0x00,
+
6906 0x00000000, 0x00, 0x00,
+
6907 0x00, NULL, 0x00,
+
6908 NULL, 0x00, 0x00); /* spi write read */
+
6909 if (res != 0) /* check result */
+
6910 {
+
6911 handle->debug_print("w25qxx: reset device failed.\n"); /* reset device failed */
+
6912 (void)handle->spi_qspi_deinit();
+
6914 return 7; /* return error */
+
6915 }
+
6916 handle->delay_ms(10); /* delay 10 ms */
+
6917 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_MANUFACTURER, 1,
+
6918 0x00000000, 1, 3,
+
6919 0x00000000, 0x00, 0x00,
+
6920 0, NULL, 0x00,
+
6921 (uint8_t *)out, 2, 1); /* qspi write read */
+
6922 if (res != 0) /* check result */
+
6923 {
+
6924 handle->debug_print("w25qxx: get manufacturer device id failed.\n"); /* get manufacturer device id failed */
+
6925 (void)handle->spi_qspi_deinit();
+
6927 return 1; /* return error */
+
6928 }
+
6929 id = (uint16_t)out[0] << 8 | out[1]; /* set id */
+
6930 if (id != handle->type) /* check id */
+
6931 {
+
6932 handle->debug_print("w25qxx: id is invalid.\n"); /* id is invalid */
+
6933 (void)handle->spi_qspi_deinit();
+
6935 return 6; /* return error */
+
6936 }
+
6937 if (handle->type >= W25Q256)
+
6938 {
+
6939 res = a_w25qxx_qspi_write_read(handle, 0xE9, 1,
+
6940 0x00000000, 0, 0,
+
6941 0x00000000, 0x00, 0x00,
+
6942 0, NULL, 0x00,
+
6943 NULL, 0, 0); /* qspi write read */
+
6944 if (res != 0) /* check result */
+
6945 {
+
6946 handle->debug_print("w25qxx: enter 3 byte mode failed.\n"); /* enter 3 byte mode failed */
+
6947 (void)handle->spi_qspi_deinit();
+
6949 return 1; /* return error */
+
6950 }
+
6951 }
+
6952 }
+
6953 else /* single spi */
+
6954 {
+
6955 buf[0] = W25QXX_COMMAND_RELEASE_POWER_DOWN; /* release power down command */
+
6956 buf[1] = 0xFF; /* dummy */
+
6957 buf[2] = 0xFF; /* dummy */
+
6958 buf[3] = 0xFF; /* dummy */
+
6959 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4,
+
6960 (uint8_t *)&id, 1); /* spi write read */
+
6961 if (res != 0) /* check result */
+
6962 {
+
6963 handle->debug_print("w25qxx: release power down failed.\n"); /* release power down failed */
+
6964 (void)handle->spi_qspi_deinit();
+
6966 return 1; /* return error */
+
6967 }
+
6968 buf[0] = W25QXX_COMMAND_ENABLE_RESET; /* enable reset command */
+
6969 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
6970 if (res != 0) /* check result */
+
6971 {
+
6972 handle->debug_print("w25qxx: enable reset failed.\n"); /* enable reset failed */
+
6973 (void)handle->spi_qspi_deinit();
+
6975 return 7; /* return error */
+
6976 }
+
6977 buf[0] = W25QXX_COMMAND_RESET_DEVICE; /* reset device command */
+
6978 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
6979 if (res != 0) /* check result */
+
6980 {
+
6981 handle->debug_print("w25qxx: reset device failed.\n"); /* reset device failed */
+
6982 (void)handle->spi_qspi_deinit();
+
6984 return 7; /* return error */
+
6985 }
+
6986 handle->delay_ms(10); /* delay 10 ms */
+
6987 buf[0] = W25QXX_COMMAND_READ_MANUFACTURER; /* read manufacturer command */
+
6988 buf[1] = 0x00; /* dummy */
+
6989 buf[2] = 0x00; /* dummy */
+
6990 buf[3] = 0x00; /* dummy */
+
6991 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4,
+
6992 (uint8_t *)out, 2); /* spi write read */
+
6993 if (res != 0) /* check result */
+
6994 {
+
6995 handle->debug_print("w25qxx: get manufacturer device id failed.\n"); /* get manufacturer device id failed */
+
6996 (void)handle->spi_qspi_deinit();
+
6998 return 4; /* return error */
+
6999 }
+
7000 id = (uint16_t)out[0] << 8 | out[1]; /* set id */
+
7001 if (id != handle->type) /* check id */
+
7002 {
+
7003 handle->debug_print("w25qxx: id is invalid.\n"); /* id is invalid */
+
7004 (void)handle->spi_qspi_deinit();
+
7006 return 6; /* return error */
+
7007 }
+
7008 if (handle->type >= W25Q256)
+
7009 {
+
7010 buf[0] = 0xE9; /* 3 byte mode */
+
7011 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
7012 if (res != 0) /* check result */
+
7013 {
+
7014 handle->debug_print("w25qxx: set address mode failed.\n"); /* set address mode failed */
+
7015 (void)handle->spi_qspi_deinit();
+
7017 return 8; /* return error */
+
7018 }
+
7019 }
+
7020 }
+
7021 }
+
7022 else
+
7023 {
+
7024 res = handle->spi_qspi_init(); /* qspi init */
+
7025 if (res != 0) /* check result */
+
7026 {
+
7027 handle->debug_print("w25qxx: qspi init failed.\n"); /* qspi init failed */
+
7028
+
7029 return 1; /* return error */
+
7030 }
+
7031 res = a_w25qxx_qspi_write_read(handle,
+
7032 W25QXX_COMMAND_RELEASE_POWER_DOWN, 1,
+
7033 0x00000000, 0x00, 0x00,
+
7034 0x00000000, 0x00, 0x00,
+
7035 3 * 8, NULL, 0x00,
+
7036 (uint8_t *)&id, 1, 1); /* spi write read */
+
7037 if (res != 0) /* check result */
+
7038 {
+
7039 handle->debug_print("w25qxx: release power down failed.\n"); /* release power down failed */
+
7040 (void)handle->spi_qspi_deinit();
+
7042 return 1; /* return error */
+
7043 }
+
7044 res = a_w25qxx_qspi_write_read(handle,
+
7045 W25QXX_COMMAND_ENABLE_RESET, 1,
+
7046 0x00000000, 0x00, 0x00,
+
7047 0x00000000, 0x00, 0x00,
+
7048 0x00, NULL, 0x00,
+
7049 NULL, 0x00, 0x00); /* spi write read */
+
7050 if (res != 0) /* check result */
+
7051 {
+
7052 handle->debug_print("w25qxx: enable reset failed.\n"); /* enable reset failed */
+
7053 (void)handle->spi_qspi_deinit();
+
7055 return 7; /* return error */
+
7056 }
+
7057 res = a_w25qxx_qspi_write_read(handle,
+
7058 W25QXX_COMMAND_RESET_DEVICE, 1,
+
7059 0x00000000, 0x00, 0x00,
+
7060 0x00000000, 0x00, 0x00,
+
7061 0x00, NULL, 0x00,
+
7062 NULL, 0x00, 0x00); /* spi write read */
+
7063 if (res != 0) /* check result */
+
7064 {
+
7065 handle->debug_print("w25qxx: reset device failed.\n"); /* reset device failed */
+
7066 (void)handle->spi_qspi_deinit();
+
7068 return 7; /* return error */
+
7069 }
+
7070 handle->delay_ms(10); /* delay 10 ms */
+
7071 res = a_w25qxx_qspi_write_read(handle,
+
7072 W25QXX_COMMAND_READ_STATUS_REG2, 1,
+
7073 0x00000000, 0x00, 0x00,
+
7074 0x00000000, 0x00, 0x00,
+
7075 0x00, NULL, 0x00,
+
7076 (uint8_t *)&status, 1, 1); /* spi write read */
+
7077 if (res != 0) /* check result */
+
7078 {
+
7079 handle->debug_print("w25qxx: read status 2 failed.\n"); /* read status 2 failed */
+
7080 (void)handle->spi_qspi_deinit();
+
7082 return 5; /* return error */
+
7083 }
+
7084 if ((status & 0x02) == 0) /* check status */
+
7085 {
+
7086 res = a_w25qxx_qspi_write_read(handle,
+
7087 W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE, 1,
+
7088 0x00000000, 0x00, 0x00,
+
7089 0x00000000, 0x00, 0x00,
+
7090 0x00, NULL, 0x00,
+
7091 NULL, 0x00, 0x00); /* spi write read */
+
7092 if (res != 0) /* check result */
+
7093 {
+
7094 handle->debug_print("w25qxx: set sr write enable failed.\n"); /* set sr write enable failed */
+
7095 (void)handle->spi_qspi_deinit();
+
7097 return 5; /* return error */
+
7098 }
+
7099 res = a_w25qxx_qspi_write_read(handle,
+
7100 W25QXX_COMMAND_WRITE_STATUS_REG2, 1,
+
7101 0x00000000, 0x00, 0x00,
+
7102 0x00000000, 0x00, 0x00,
+
7103 0x00, NULL, 0x00,
+
7104 NULL, 0x00, 0x00); /* spi write read */
+
7105 if (res != 0) /* check result */
+
7106 {
+
7107 handle->debug_print("w25qxx: write status 2 failed.\n"); /* write status 2 failed */
+
7108 (void)handle->spi_qspi_deinit();
+
7110 return 5; /* return error */
+
7111 }
+
7112 }
+
7113 res = a_w25qxx_qspi_write_read(handle,
+
7114 W25QXX_COMMAND_ENTER_QSPI_MODE, 1,
+
7115 0x00000000, 0x00, 0x00,
+
7116 0x00000000, 0x00, 0x00,
+
7117 0x00, NULL, 0x00,
+
7118 NULL, 0x00, 0x00); /* spi write read */
+
7119 if (res != 0) /* check result */
+
7120 {
+
7121 handle->debug_print("w25qxx: enter qspi failed.\n"); /* enter qspi failed */
+
7122 (void)handle->spi_qspi_deinit();
+
7124 return 5; /* return error */
+
7125 }
+
7126 handle->delay_ms(10); /* delay 10 ms */
+
7127 buf[0] = 3 << 4; /* set 8 read dummy */
+
7128 handle->param = buf[0]; /* set param */
+
7129 handle->dummy = 8; /* set dummy */
+
7130 res = a_w25qxx_qspi_write_read(handle, 0xC0, 4,
+
7131 0x00000000, 0x00, 0x00,
+
7132 0x00000000, 0x00, 0x00,
+
7133 0, (uint8_t *)buf, 1,
+
7134 NULL, 0x00, 4); /* qspi write read */
+
7135 if (res != 0) /* check result */
+
7136 {
+
7137 handle->debug_print("w25qxx: set read parameters failed.\n"); /* set read parameters failed */
+
7138 (void)handle->spi_qspi_deinit();
+
7140 return 5; /* return error */
+
7141 }
+
7142 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_MANUFACTURER, 4,
+
7143 0x00000000, 4, 3,
+
7144 0x00000000, 0x00, 0x00,
+
7145 0, NULL, 0x00,
+
7146 (uint8_t *)out, 2, 4); /* qspi write read */
+
7147 if (res != 0) /* check result */
+
7148 {
+
7149 handle->debug_print("w25qxx: get manufacturer device id failed.\n"); /* get manufacturer device id failed */
+
7150 (void)handle->spi_qspi_deinit();
+
7152 return 1; /* return error */
+
7153 }
+
7154 id = (uint16_t)out[0] << 8 | out[1]; /* set id */
+
7155 if (id != handle->type) /* check id */
+
7156 {
+
7157 handle->debug_print("w25qxx: id is invalid.\n"); /* id is invalid */
+
7158 (void)handle->spi_qspi_deinit();
+
7160 return 6; /* return error */
+
7161 }
+
7162 if (handle->type >= W25Q256)
+
7163 {
+
7164 res = a_w25qxx_qspi_write_read(handle, 0xE9, 4,
+
7165 0x00000000, 0, 0,
+
7166 0x00000000, 0x00, 0x00,
+
7167 0, NULL, 0x00,
+
7168 NULL, 0, 0); /* qspi write read */
+
7169 if (res != 0) /* check result */
+
7170 {
+
7171 handle->debug_print("w25qxx: enter 3 byte mode failed.\n"); /* enter 3 byte mode failed */
+
7172 (void)handle->spi_qspi_deinit();
+
7174 return 1; /* return error */
+
7175 }
+
7176 }
+
7177 }
+
7178 handle->address_mode = W25QXX_ADDRESS_MODE_3_BYTE; /* set address mode */
+
7179 handle->inited = 1; /* initialize inited */
+
7180
+
7181 return 0; /* success return 0 */
+
7182}
+
+
7183
+
+
7195uint8_t w25qxx_deinit(w25qxx_handle_t *handle)
+
7196{
+
7197 uint8_t res;
+
7198 uint8_t buf[1];
+
7199
+
7200 if (handle == NULL) /* check handle */
+
7201 {
+
7202 return 2; /* return error */
+
7203 }
+
7204 if (handle->inited != 1) /* check handle initialization */
+
7205 {
+
7206 return 3; /* return error */
+
7207 }
+
7208
+
7209 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
7210 {
+
7211 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
7212 {
+
7213 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_POWER_DOWN, 1,
+
7214 0x00000000, 0x00, 0x00,
+
7215 0x00000000, 0x00, 0x00,
+
7216 0, NULL, 0x00,
+
7217 NULL, 0x00, 0); /* spi write read */
+
7218 if (res != 0) /* check result */
+
7219 {
+
7220 handle->debug_print("w25qxx: power down failed.\n"); /* power down failed */
+
7221
+
7222 return 4; /* return error */
+
7223 }
+
7224 }
+
7225 else /* single spi */
+
7226 {
+
7227 buf[0] = W25QXX_COMMAND_POWER_DOWN; /* power down command */
+
7228 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf,
+
7229 1, NULL, 0); /* spi write read */
+
7230 if (res != 0) /* check result */
+
7231 {
+
7232 handle->debug_print("w25qxx: power down failed.\n"); /* power down failed */
+
7233
+
7234 return 4; /* return error */
+
7235 }
+
7236 }
+
7237 }
+
7238 else /* qspi interface */
+
7239 {
+
7240 res = a_w25qxx_qspi_write_read(handle, 0xFF, 4,
+
7241 0x00000000, 0x00, 0x00,
+
7242 0x00000000, 0x00, 0x00,
+
7243 0, NULL, 0x00,
+
7244 NULL, 0x00, 0); /* spi write read */
+
7245 if (res != 0) /* check result */
+
7246 {
+
7247 handle->debug_print("w25qxx: exit qspi mode failed.\n"); /* exit qspi mode failed */
+
7248
+
7249 return 1; /* return error */
+
7250 }
+
7251 handle->delay_ms(10); /* delay 10 ms */
+
7252 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_POWER_DOWN, 1,
+
7253 0x00000000, 0x00, 0x00,
+
7254 0x00000000, 0x00, 0x00,
+
7255 0, NULL, 0x00,
+
7256 NULL, 0x00, 0); /* spi write read */
+
7257 if (res != 0) /* check result */
+
7258 {
+
7259 handle->debug_print("w25qxx: power down failed.\n"); /* power down failed */
+
7260
+
7261 return 4; /* return error */
+
7262 }
+
7263 }
+
7264 res = handle->spi_qspi_deinit(); /* qspi deinit */
+
7265 if (res != 0) /* check result */
+
7266 {
+
7267 handle->debug_print("w25qxx: spi or qspi deinit failed.\n"); /* spi or qspi deinit failed */
+
7268
+
7269 return 1; /* return error */
+
7270 }
+
7271
+
7272 return 0; /* success return 0 */
+
7273}
+
+
7274
+
+
7289uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
+
7290{
+
7291 uint8_t res;
+
7292 uint8_t buf[6];
+
7293
+
7294 if (handle == NULL) /* check handle */
+
7295 {
+
7296 return 2; /* return error */
+
7297 }
+
7298 if (handle->inited != 1) /* check handle initialization */
+
7299 {
+
7300 return 3; /* return error */
+
7301 }
+
7302
+
7303 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
7304 {
+
7305 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
7306 {
+
7307 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
7308 {
+
7309 if (handle->type >= W25Q256) /* >128Mb */
+
7310 {
+
7311 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
7312 0x00000000, 0x00, 0x00,
+
7313 0x00000000, 0x00, 0x00,
+
7314 0x00, NULL, 0x00,
+
7315 NULL, 0x00, 0x00); /* qspi write read */
+
7316 if (res != 0) /* check result */
+
7317 {
+
7318 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
7319
+
7320 return 1; /* return error */
+
7321 }
+
7322 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
7323 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
7324 0x00000000, 0x00, 0x00,
+
7325 0x00000000, 0x00, 0x00,
+
7326 0, (uint8_t *)buf, 0x01,
+
7327 NULL, 0x00, 1); /* spi write read */
+
7328 if (res != 0) /* check result */
+
7329 {
+
7330 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
7331
+
7332 return 1; /* return error */
+
7333 }
+
7334 }
+
7335 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 1,
+
7336 addr, 1, 3,
+
7337 0x00000000, 0x00, 0x00,
+
7338 8, NULL, 0x00, /* spi write */
+
7339 data, len, 1); /* spi write read */
+
7340 if (res != 0) /* check result */
+
7341 {
+
7342 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
7343
+
7344 return 1; /* return error */
+
7345 }
+
7346 }
+
7347 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
7348 {
+
7349 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 1,
+
7350 addr, 1, 4,
+
7351 0x00000000, 0x00, 0x00,
+
7352 8, NULL, 0x00, /* spi write */
+
7353 data, len, 1); /* spi write read */
+
7354 if (res != 0) /* check result */
+
7355 {
+
7356 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
7357
+
7358 return 1; /* return error */
+
7359 }
+
7360 }
+
7361 else
+
7362 {
+
7363 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
7364
+
7365 return 4; /* return error */
+
7366 }
+
7367 }
+
7368 else /* single spi */
+
7369 {
+
7370 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
7371 {
+
7372 if (handle->type >= W25Q256) /* >128Mb */
+
7373 {
+
7374 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
7375 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
7376 if (res != 0) /* check result */
+
7377 {
+
7378 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
7379
+
7380 return 1; /* return error */
+
7381 }
+
7382 buf[0] = 0xC5; /* write extended addr register command */
+
7383 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
7384 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
+
7385 if (res != 0) /* check result */
+
7386 {
+
7387 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
7388
+
7389 return 1; /* return error */
+
7390 }
+
7391 }
+
7392 buf[0] = W25QXX_COMMAND_FAST_READ; /* fast read command */
+
7393 buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
7394 buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
7395 buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
7396 buf[4] = 0x00; /* dummy */
+
7397 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, (uint8_t *)data, (uint32_t)len); /* spi write read */
+
7398 if (res != 0) /* check result */
+
7399 {
+
7400 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
7401
+
7402 return 1; /* return error */
+
7403 }
+
7404 }
+
7405 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE)
+
7406 && (handle->type >= W25Q256)) /* check address mode */
+
7407 {
+
7408 buf[0] = W25QXX_COMMAND_FAST_READ; /* fast read command */
+
7409 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
7410 buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
7411 buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
7412 buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
7413 buf[5] = 0x00; /* dummy */
+
7414 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 6, (uint8_t *)data, (uint32_t)len); /* spi write read */
+
7415 if (res != 0) /* check result */
+
7416 {
+
7417 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
7418
+
7419 return 1; /* return error */
+
7420 }
+
7421 }
+
7422 else
+
7423 {
+
7424 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
7425
+
7426 return 4; /* return error */
+
7427 }
+
7428 }
+
7429 }
+
7430 else /* qspi interface */
+
7431 {
+
7432 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
7433 {
+
7434 if (handle->type >= W25Q256) /* >128Mb */
+
7435 {
+
7436 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
7437 0x00000000, 0x00, 0x00,
+
7438 0x00000000, 0x00, 0x00,
+
7439 0x00, NULL, 0x00,
+
7440 NULL, 0x00, 0x00); /* qspi write read */
+
7441 if (res != 0) /* check result */
+
7442 {
+
7443 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
7444
+
7445 return 1; /* return error */
+
7446 }
+
7447 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
7448 res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
+
7449 0x00000000, 0x00, 0x00,
+
7450 0x00000000, 0x00, 0x00,
+
7451 0, (uint8_t *)buf, 0x01,
+
7452 NULL, 0x00, 4); /* spi write read */
+
7453 if (res != 0) /* check result */
+
7454 {
+
7455 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
7456
+
7457 return 1; /* return error */
+
7458 }
+
7459 }
+
7460 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 4,
+
7461 addr, 4, 3,
+
7462 0x00000000, 0x00, 0x00,
+
7463 handle->dummy, NULL, 0x00, /* spi write */
+
7464 data, len, 4); /* spi write read */
+
7465 if (res != 0) /* check result */
+
7466 {
+
7467 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
7468
+
7469 return 1; /* return error */
+
7470 }
+
7471 }
+
7472 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
7473 {
+
7474 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 4,
+
7475 addr, 4, 4,
+
7476 0x00000000, 0x00, 0x00,
+
7477 handle->dummy, NULL, 0x00, /* spi write */
+
7478 data, len, 4); /* spi write read */
+
7479 if (res != 0) /* check result */
+
7480 {
+
7481 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
7482
+
7483 return 1; /* return error */
+
7484 }
+
7485 }
+
7486 else
+
7487 {
+
7488 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
7489
+
7490 return 4; /* return error */
+
7491 }
+
7492 }
+
7493
+
7494 return 0; /* success return 0 */
+
7495}
+
+
7496
+
7508static uint8_t a_w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
+
7509{
+
7510 uint8_t res;
+
7511 uint8_t buf[6];
+
7512
+
7513 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
7514 {
+
7515 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
7516 {
+
7517 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
7518 {
+
7519 if (handle->type >= W25Q256) /* >128Mb */
+
7520 {
+
7521 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
7522 0x00000000, 0x00, 0x00,
+
7523 0x00000000, 0x00, 0x00,
+
7524 0x00, NULL, 0x00,
+
7525 NULL, 0x00, 0x00); /* qspi write read */
+
7526 if (res != 0) /* check result */
+
7527 {
+
7528 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
7529
+
7530 return 1; /* return error */
+
7531 }
+
7532 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
7533 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
7534 0x00000000, 0x00, 0x00,
+
7535 0x00000000, 0x00, 0x00,
+
7536 0, (uint8_t *)buf, 0x01,
+
7537 NULL, 0x00, 1); /* spi write read */
+
7538 if (res != 0) /* check result */
+
7539 {
+
7540 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
7541
+
7542 return 1; /* return error */
+
7543 }
+
7544 }
+
7545 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 1,
+
7546 addr, 1, 3,
+
7547 0x00000000, 0x00, 0x00,
+
7548 8, NULL, 0x00,
+
7549 data, len, 1); /* spi write read */
+
7550 if (res != 0) /* check result */
+
7551 {
+
7552 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
7553
+
7554 return 1; /* return error */
+
7555 }
+
7556 }
+
7557 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
7558 {
+
7559 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 1,
+
7560 addr, 1, 4,
+
7561 0x00000000, 0x00, 0x00,
+
7562 8, NULL, 0x00,
+
7563 data, len, 1); /* spi write read */
+
7564 if (res != 0) /* check result */
+
7565 {
+
7566 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
7567
+
7568 return 1; /* return error */
+
7569 }
+
7570 }
+
7571 else
+
7572 {
+
7573 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
7574
+
7575 return 1; /* return error */
+
7576 }
+
7577 }
+
7578 else
+
7579 {
+
7580 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
7581 {
+
7582 if (handle->type >= W25Q256) /* >128Mb */
+
7583 {
+
7584 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
7585 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
7586 if (res != 0) /* check result */
+
7587 {
+
7588 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
7589
+
7590 return 1; /* return error */
+
7591 }
+
7592 buf[0] = 0xC5; /* write extended addr register command */
+
7593 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
7594 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
+
7595 if (res != 0) /* check result */
+
7596 {
+
7597 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
7598
+
7599 return 1; /* return error */
+
7600 }
+
7601 }
+
7602 buf[0] = W25QXX_COMMAND_FAST_READ; /* fast read command */
+
7603 buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
7604 buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
7605 buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
7606 buf[4] = 0x00; /* dummy */
+
7607 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, (uint8_t *)data, (uint32_t)len); /* spi write read */
+
7608 if (res != 0) /* check result */
+
7609 {
+
7610 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
7611
+
7612 return 1; /* return error */
+
7613 }
+
7614 }
+
7615 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256)) /* check address mode */
+
7616 {
+
7617 buf[0] = W25QXX_COMMAND_FAST_READ; /* fast read command */
+
7618 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
7619 buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
7620 buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
7621 buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
7622 buf[5] = 0x00; /* dummy */
+
7623 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 6, (uint8_t *)data, (uint32_t)len); /* spi write read */
+
7624 if (res != 0) /* check result */
+
7625 {
+
7626 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
7627
+
7628 return 1; /* return error */
+
7629 }
+
7630 }
+
7631 else
+
7632 {
+
7633 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
7634
+
7635 return 1; /* return error */
+
7636 }
+
7637 }
+
7638 }
+
7639 else /* qspi interface */
+
7640 {
+
7641 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
7642 {
+
7643 if (handle->type >= W25Q256) /* >128Mb */
+
7644 {
+
7645 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
7646 0x00000000, 0x00, 0x00,
+
7647 0x00000000, 0x00, 0x00,
+
7648 0x00, NULL, 0x00,
+
7649 NULL, 0x00, 0x00); /* qspi write read */
+
7650 if (res != 0) /* check result */
+
7651 {
+
7652 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
7653
+
7654 return 1; /* return error */
+
7655 }
+
7656 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
7657 res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
+
7658 0x00000000, 0x00, 0x00,
+
7659 0x00000000, 0x00, 0x00,
+
7660 0, (uint8_t *)buf, 0x01,
+
7661 NULL, 0x00, 4); /* spi write read */
+
7662 if (res != 0) /* check result */
+
7663 {
+
7664 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
7665
+
7666 return 1; /* return error */
+
7667 }
+
7668 }
+
7669 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 4,
+
7670 addr, 4, 3,
+
7671 0x00000000, 0x00, 0x00,
+
7672 handle->dummy, NULL, 0x00, /* spi write */
+
7673 data, len, 4); /* spi write read */
+
7674 if (res != 0) /* check result */
+
7675 {
+
7676 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
7677
+
7678 return 1; /* return error */
+
7679 }
+
7680 }
+
7681 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
7682 {
+
7683 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_FAST_READ, 4,
+
7684 addr, 4, 4,
+
7685 0x00000000, 0x00, 0x00,
+
7686 handle->dummy, NULL, 0x00, /* spi write */
+
7687 data, len, 4); /* spi write read */
+
7688 if (res != 0) /* check result */
+
7689 {
+
7690 handle->debug_print("w25qxx: fast read failed.\n"); /* fast read failed */
+
7691
+
7692 return 1; /* return error */
+
7693 }
+
7694 }
+
7695 else
+
7696 {
+
7697 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
7698
+
7699 return 1; /* return error */
+
7700 }
+
7701 }
+
7702
+
7703 return 0; /* success return 0 */
+
7704}
+
7705
+
7715static uint8_t a_w25qxx_erase_sector(w25qxx_handle_t *handle, uint32_t addr)
+
7716{
+
7717 uint8_t res;
+
7718 uint8_t status;
+
7719 uint32_t timeout;
+
7720 uint8_t buf[5];
+
7721
+
7722 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
7723 {
+
7724 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
7725 {
+
7726 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
7727 0x00000000, 0x00, 0x00,
+
7728 0x00000000, 0x00, 0x00,
+
7729 0x00, NULL, 0x00,
+
7730 NULL, 0x00, 0x00); /* qspi write read */
+
7731 if (res != 0) /* check result */
+
7732 {
+
7733 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
7734
+
7735 return 1; /* return error */
+
7736 }
+
7737 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
7738 {
+
7739 if (handle->type >= W25Q256) /* >128Mb */
+
7740 {
+
7741 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
7742 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
7743 0x00000000, 0x00, 0x00,
+
7744 0x00000000, 0x00, 0x00,
+
7745 0, (uint8_t *)buf, 0x01,
+
7746 NULL, 0x00, 1); /* spi write read */
+
7747 if (res != 0) /* check result */
+
7748 {
+
7749 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
7750
+
7751 return 1; /* return error */
+
7752 }
+
7753 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
7754 0x00000000, 0x00, 0x00,
+
7755 0x00000000, 0x00, 0x00,
+
7756 0x00, NULL, 0x00,
+
7757 NULL, 0x00, 0x00); /* qspi write read */
+
7758 if (res != 0) /* check result */
+
7759 {
+
7760 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
7761
+
7762 return 1; /* return error */
+
7763 }
+
7764 }
+
7765 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_SECTOR_ERASE_4K, 1,
+
7766 addr, 1, 3,
+
7767 0x00000000, 0x00, 0x00,
+
7768 0, NULL, 0x00,
+
7769 NULL, 0x00, 0x00); /* spi write read */
+
7770 if (res != 0) /* check result */
+
7771 {
+
7772 handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
+
7773
+
7774 return 1; /* return error */
+
7775 }
+
7776 }
+
7777 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
7778 {
+
7779 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_SECTOR_ERASE_4K, 1,
+
7780 addr, 1, 4,
+
7781 0x00000000, 0x00, 0x00,
+
7782 0, NULL, 0x00,
+
7783 NULL, 0x00, 0x00); /* spi write read */
+
7784 if (res != 0) /* check result */
+
7785 {
+
7786 handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
+
7787
+
7788 return 1; /* return error */
+
7789 }
+
7790 }
+
7791 else
+
7792 {
+
7793 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
7794
+
7795 return 1; /* return error */
+
7796 }
+
7797
+
7798 timeout = 400; /* max 400 ms */
+
7799 while (timeout != 0) /* check timeout */
+
7800 {
+
7801 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
+
7802 0x00000000, 0x00, 0x00,
+
7803 0x00000000, 0x00, 0x00,
+
7804 0, NULL, 0,
+
7805 (uint8_t *)&status, 1, 1); /* spi write read */
+
7806 if (res != 0) /* check result */
+
7807 {
+
7808 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
7809
+
7810 return 1; /* return error */
+
7811 }
+
7812 if ((status & 0x01) == 0x00) /* check status */
+
7813 {
+
7814 break; /* break */
+
7815 }
+
7816 timeout--; /* timeout-- */
+
7817 handle->delay_ms(1); /* delay 1 ms */
+
7818 }
+
7819 if (timeout == 0)
+
7820 {
+
7821 handle->debug_print("w25qxx: sector erase 4k timeout.\n"); /* sector erase 4k timeout */
+
7822
+
7823 return 1; /* return error */
+
7824 }
+
7825 }
+
7826 else /* single spi */
+
7827 {
+
7828 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
7829 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
7830 if (res != 0) /* check result */
+
7831 {
+
7832 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
7833
+
7834 return 1; /* return error */
+
7835 }
+
7836 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
7837 {
+
7838 if (handle->type >= W25Q256) /* >128Mb */
+
7839 {
+
7840 buf[0] = 0xC5; /* write extended addr register command */
+
7841 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
7842 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
+
7843 if (res != 0) /* check result */
+
7844 {
+
7845 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
7846
+
7847 return 1; /* return error */
+
7848 }
+
7849 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
7850 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
7851 if (res != 0) /* check result */
+
7852 {
+
7853 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
7854
+
7855 return 1; /* return error */
+
7856 }
+
7857 }
+
7858 buf[0] = W25QXX_COMMAND_SECTOR_ERASE_4K; /* sector erase 4k command */
+
7859 buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
7860 buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
7861 buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
7862 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 4, NULL, 0); /* spi write read */
+
7863 if (res != 0) /* check result */
+
7864 {
+
7865 handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
+
7866
+
7867 return 1; /* return error */
+
7868 }
+
7869 }
+
7870 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
7871 {
+
7872 buf[0] = W25QXX_COMMAND_SECTOR_ERASE_4K; /* sector erase 4k command */
+
7873 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
7874 buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
7875 buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
7876 buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
7877 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 5, NULL, 0); /* spi write read */
+
7878 if (res != 0) /* check result */
+
7879 {
+
7880 handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
+
7881
+
7882 return 1; /* return error */
+
7883 }
+
7884 }
+
7885 else
+
7886 {
+
7887 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
7888
+
7889 return 1; /* return error */
+
7890 }
+
7891
+
7892 timeout = 400; /* max 400 ms */
+
7893 while (timeout != 0) /* check timeout */
+
7894 {
+
7895 buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
+
7896 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, (uint8_t *)&status, 1); /* spi write read */
+
7897 if (res != 0) /* check result */
+
7898 {
+
7899 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
7900
+
7901 return 1; /* return error */
+
7902 }
+
7903 if ((status & 0x01) == 0x00) /* check status */
+
7904 {
+
7905 break; /* break */
+
7906 }
+
7907 timeout--; /* timeout-- */
+
7908 handle->delay_ms(1); /* delay 1 ms */
+
7909 }
+
7910 if (timeout == 0)
+
7911 {
+
7912 handle->debug_print("w25qxx: sector erase 4k timeout.\n"); /* sector erase 4k timeout */
+
7913
+
7914 return 1; /* return error */
+
7915 }
+
7916 }
+
7917 }
+
7918 else
+
7919 {
+
7920 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
7921 0x00000000, 0x00, 0x00,
+
7922 0x00000000, 0x00, 0x00,
+
7923 0x00, NULL, 0x00,
+
7924 NULL, 0x00, 0x00); /* qspi write read */
+
7925 if (res != 0) /* check result */
+
7926 {
+
7927 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
7928
+
7929 return 1; /* return error */
+
7930 }
+
7931 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
7932 {
+
7933 if (handle->type >= W25Q256) /* >128Mb */
+
7934 {
+
7935 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
7936 res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
+
7937 0x00000000, 0x00, 0x00,
+
7938 0x00000000, 0x00, 0x00,
+
7939 0, (uint8_t *)buf, 0x01,
+
7940 NULL, 0x00, 4); /* spi write read */
+
7941 if (res != 0) /* check result */
+
7942 {
+
7943 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
7944
+
7945 return 1; /* return error */
+
7946 }
+
7947 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
7948 0x00000000, 0x00, 0x00,
+
7949 0x00000000, 0x00, 0x00,
+
7950 0x00, NULL, 0x00,
+
7951 NULL, 0x00, 0x00); /* qspi write read */
+
7952 if (res != 0) /* check result */
+
7953 {
+
7954 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
7955
+
7956 return 1; /* return error */
+
7957 }
+
7958 }
+
7959 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_SECTOR_ERASE_4K, 4,
+
7960 addr, 4, 3,
+
7961 0x00000000, 0x00, 0x00,
+
7962 0, NULL, 0x00,
+
7963 NULL, 0x00, 0x00); /* spi write read */
+
7964 if (res != 0) /* check result */
+
7965 {
+
7966 handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
+
7967
+
7968 return 1; /* return error */
+
7969 }
+
7970 }
+
7971 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
7972 {
+
7973 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_SECTOR_ERASE_4K, 4,
+
7974 addr, 4, 4,
+
7975 0x00000000, 0x00, 0x00,
+
7976 0, NULL, 0x00,
+
7977 NULL, 0x00, 0x00); /* spi write read */
+
7978 if (res != 0) /* check result */
+
7979 {
+
7980 handle->debug_print("w25qxx: sector erase 4k failed.\n"); /* sector erase 4k failed */
+
7981
+
7982 return 1; /* return error */
+
7983 }
+
7984 }
+
7985 else
+
7986 {
+
7987 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
7988
+
7989 return 1; /* return error */
+
7990 }
+
7991
+
7992 timeout = 400; /* max 400 ms */
+
7993 while (timeout != 0) /* check timeout */
+
7994 {
+
7995 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
+
7996 0x00000000, 0x00, 0x00,
+
7997 0x00000000, 0x00, 0x00,
+
7998 0, NULL, 0,
+
7999 (uint8_t *)&status, 1, 4); /* spi write read */
+
8000 if (res != 0) /* check result */
+
8001 {
+
8002 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
8003
+
8004 return 1; /* return error */
+
8005 }
+
8006 if ((status & 0x01) == 0x00) /* check status */
+
8007 {
+
8008 break; /* break */
+
8009 }
+
8010 timeout--; /* timeout-- */
+
8011 handle->delay_ms(1); /* delay 1 ms */
+
8012 }
+
8013 if (timeout == 0)
+
8014 {
+
8015 handle->debug_print("w25qxx: sector erase 4k timeout.\n"); /* sector erase 4k timeout */
+
8016
+
8017 return 1; /* return error */
+
8018 }
+
8019 }
+
8020
+
8021 return 0; /* success return 0 */
+
8022}
+
8023
+
8035static uint8_t a_w25qxx_page_program(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
+
8036{
+
8037 uint8_t res;
+
8038 uint8_t status;
+
8039 uint32_t timeout;
+
8040 uint8_t buf[2];
+
8041
+
8042 if (handle->spi_qspi == W25QXX_INTERFACE_SPI) /* spi interface */
+
8043 {
+
8044 if (handle->dual_quad_spi_enable != 0) /* enable dual quad spi */
+
8045 {
+
8046 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
8047 0x00000000, 0x00, 0x00,
+
8048 0x00000000, 0x00, 0x00,
+
8049 0x00, NULL, 0x00,
+
8050 NULL, 0x00, 0x00); /* qspi write read */
+
8051 if (res != 0) /* check result */
+
8052 {
+
8053 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
8054
+
8055 return 1; /* return error */
+
8056 }
+
8057 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
8058 {
+
8059 if (handle->type >= W25Q256) /* >128Mb */
+
8060 {
+
8061 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
8062 res = a_w25qxx_qspi_write_read(handle, 0xC5, 1,
+
8063 0x00000000, 0x00, 0x00,
+
8064 0x00000000, 0x00, 0x00,
+
8065 0, (uint8_t *)buf, 0x01,
+
8066 NULL, 0x00, 1); /* spi write read */
+
8067 if (res != 0) /* check result */
+
8068 {
+
8069 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
8070
+
8071 return 1; /* return error */
+
8072 }
+
8073 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 1,
+
8074 0x00000000, 0x00, 0x00,
+
8075 0x00000000, 0x00, 0x00,
+
8076 0x00, NULL, 0x00,
+
8077 NULL, 0x00, 0x00); /* qspi write read */
+
8078 if (res != 0) /* check result */
+
8079 {
+
8080 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
8081
+
8082 return 1; /* return error */
+
8083 }
+
8084 }
+
8085 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_PAGE_PROGRAM, 1,
+
8086 addr, 1, 3,
+
8087 0x00000000, 0x00, 0x00,
+
8088 0, data, len,
+
8089 NULL, 0x00, 1); /* spi write read */
+
8090 if (res != 0) /* check result */
+
8091 {
+
8092 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
8093
+
8094 return 1; /* return error */
+
8095 }
+
8096 }
+
8097 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
8098 {
+
8099 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_PAGE_PROGRAM, 1,
+
8100 addr, 1, 4,
+
8101 0x00000000, 0x00, 0x00,
+
8102 0, data, len,
+
8103 NULL, 0x00, 1); /* spi write read */
+
8104 if (res != 0) /* check result */
+
8105 {
+
8106 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
8107
+
8108 return 1; /* return error */
+
8109 }
+
8110 }
+
8111 else
+
8112 {
+
8113 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
8114
+
8115 return 1; /* return error */
+
8116 }
+
8117
+
8118 timeout = 3 * 100; /* max 3 ms */
+
8119 while (timeout != 0) /* check timeout */
+
8120 {
+
8121 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 1,
+
8122 0x00000000, 0x00, 0x00,
+
8123 0x00000000, 0x00, 0x00,
+
8124 0, NULL, 0,
+
8125 (uint8_t *)&status, 1, 1); /* spi write read */
+
8126 if (res != 0) /* check result */
+
8127 {
+
8128 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
8129
+
8130 return 1; /* return error */
+
8131 }
+
8132 if ((status & 0x01) == 0x00) /* check status */
+
8133 {
+
8134 break; /* break */
+
8135 }
+
8136 timeout--; /* timeout-- */
+
8137 handle->delay_us(10); /* delay 10 us */
+
8138 }
+
8139 if (timeout == 0)
+
8140 {
+
8141 handle->debug_print("w25qxx: page program timeout.\n"); /* page program timeout */
+
8142
+
8143 return 1; /* return error */
+
8144 }
+
8145 }
+
8146 else /* single spi */
+
8147 {
+
8148 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
8149 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
8150 if (res != 0) /* check result */
+
8151 {
+
8152 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
8153
+
8154 return 1; /* return error */
+
8155 }
+
8156 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
8157 {
+
8158 if (handle->type >= W25Q256) /* >128Mb */
+
8159 {
+
8160 buf[0] = 0xC5; /* write extended addr register command */
+
8161 buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
8162 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 2, NULL, 0); /* spi write read */
+
8163 if (res != 0) /* check result */
+
8164 {
+
8165 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
8166
+
8167 return 1; /* return error */
+
8168 }
+
8169 buf[0] = W25QXX_COMMAND_WRITE_ENABLE; /* write enable command */
+
8170 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, NULL, 0); /* spi write read */
+
8171 if (res != 0) /* check result */
+
8172 {
+
8173 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
8174
+
8175 return 1; /* return error */
+
8176 }
+
8177 }
+
8178 handle->buf[0] = W25QXX_COMMAND_PAGE_PROGRAM; /* page program command */
+
8179 handle->buf[1] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
8180 handle->buf[2] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
8181 handle->buf[3] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
8182 memcpy(&handle->buf[4], data, len); /* copy data */
+
8183 res = a_w25qxx_spi_write_read(handle, (uint8_t *)handle->buf, 4 + len, NULL, 0); /* spi write read */
+
8184 if (res != 0) /* check result */
+
8185 {
+
8186 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
8187
+
8188 return 1; /* return error */
+
8189 }
+
8190 }
+
8191 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE)
+
8192 && (handle->type >= W25Q256)) /* 4 address mode */
+
8193 {
+
8194 handle->buf[0] = W25QXX_COMMAND_PAGE_PROGRAM; /* page program command */
+
8195 handle->buf[1] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
8196 handle->buf[2] = (addr >> 16) & 0xFF; /* 23 - 16 bits */
+
8197 handle->buf[3] = (addr >> 8) & 0xFF; /* 15 - 8 bits */
+
8198 handle->buf[4] = (addr >> 0) & 0xFF; /* 7 - 0 bits */
+
8199 memcpy(&handle->buf[5], data, len); /* copy data */
+
8200 res = a_w25qxx_spi_write_read(handle, (uint8_t *)handle->buf, 5 + len, NULL, 0); /* spi write read */
+
8201 if (res != 0) /* check result */
+
8202 {
+
8203 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
8204
+
8205 return 1; /* return error */
+
8206 }
+
8207 }
+
8208 else
+
8209 {
+
8210 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
8211
+
8212 return 1; /* return error */
+
8213 }
+
8214
+
8215 timeout = 3 * 100; /* max 3 ms */
+
8216 while (timeout != 0) /* check timeout */
+
8217 {
+
8218 buf[0] = W25QXX_COMMAND_READ_STATUS_REG1; /* read status1 command */
+
8219 res = a_w25qxx_spi_write_read(handle, (uint8_t *)buf, 1, (uint8_t *)&status, 1); /* spi write read */
+
8220 if (res != 0) /* check result */
+
8221 {
+
8222 handle->debug_print("w25qxx: get status1 failed.\n"); /* get status1 failed */
+
8223
+
8224 return 1; /* return error */
+
8225 }
+
8226 if ((status & 0x01) == 0x00) /* check status */
+
8227 {
+
8228 break; /* break */
+
8229 }
+
8230 timeout--; /* timeout-- */
+
8231 handle->delay_us(10); /* delay 10 us */
+
8232 }
+
8233 if (timeout == 0)
+
8234 {
+
8235 handle->debug_print("w25qxx: page program timeout.\n"); /* page program timeout */
+
8236
+
8237 return 1; /* return error */
+
8238 }
+
8239 }
+
8240 }
+
8241 else
+
8242 {
+
8243 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
8244 0x00000000, 0x00, 0x00,
+
8245 0x00000000, 0x00, 0x00,
+
8246 0x00, NULL, 0x00,
+
8247 NULL, 0x00, 0x00); /* qspi write read */
+
8248 if (res != 0) /* check result */
+
8249 {
+
8250 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
8251
+
8252 return 1; /* return error */
+
8253 }
+
8254 if (handle->address_mode == W25QXX_ADDRESS_MODE_3_BYTE) /* 3 address mode */
+
8255 {
+
8256 if (handle->type >= W25Q256) /* >128Mb */
+
8257 {
+
8258 buf[0] = (addr >> 24) & 0xFF; /* 31 - 24 bits */
+
8259 res = a_w25qxx_qspi_write_read(handle, 0xC5, 4,
+
8260 0x00000000, 0x00, 0x00,
+
8261 0x00000000, 0x00, 0x00,
+
8262 0, (uint8_t *)buf, 0x01,
+
8263 NULL, 0x00, 4); /* spi write read */
+
8264 if (res != 0) /* check result */
+
8265 {
+
8266 handle->debug_print("w25qxx: write extended addr register failed.\n"); /* write extended addr register failed */
+
8267
+
8268 return 1; /* return error */
+
8269 }
+
8270 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_WRITE_ENABLE, 4,
+
8271 0x00000000, 0x00, 0x00,
+
8272 0x00000000, 0x00, 0x00,
+
8273 0x00, NULL, 0x00,
+
8274 NULL, 0x00, 0x00); /* qspi write read */
+
8275 if (res != 0) /* check result */
+
8276 {
+
8277 handle->debug_print("w25qxx: write enable failed.\n"); /* write enable failed */
+
8278
+
8279 return 1; /* return error */
+
8280 }
+
8281 }
+
8282 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_PAGE_PROGRAM, 4,
+
8283 addr, 4, 3,
+
8284 0x00000000, 0x00, 0x00,
+
8285 0, data, len,
+
8286 NULL, 0x00, 4); /* spi write read */
+
8287 if (res != 0) /* check result */
+
8288 {
+
8289 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
8290
+
8291 return 1; /* return error */
+
8292 }
+
8293 }
+
8294 else if ((handle->address_mode == W25QXX_ADDRESS_MODE_4_BYTE) && (handle->type >= W25Q256))
+
8295 {
+
8296 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_PAGE_PROGRAM, 4,
+
8297 addr, 4, 4,
+
8298 0x00000000, 0x00, 0x00,
+
8299 0, data, len,
+
8300 NULL, 0x00, 4); /* spi write read */
+
8301 if (res != 0) /* check result */
+
8302 {
+
8303 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
8304
+
8305 return 1; /* return error */
+
8306 }
+
8307 }
+
8308 else
+
8309 {
+
8310 handle->debug_print("w25qxx: address mode is invalid.\n"); /* address mode is invalid */
+
8311
+
8312 return 1; /* return error */
+
8313 }
+
8314
+
8315 timeout = 3 * 100; /* max 3 ms */
+
8316 while (timeout != 0) /* check timeout */
+
8317 {
+
8318 res = a_w25qxx_qspi_write_read(handle, W25QXX_COMMAND_READ_STATUS_REG1, 4,
+
8319 0x00000000, 0x00, 0x00,
+
8320 0x00000000, 0x00, 0x00,
+
8321 0, NULL, 0,
+
8322 (uint8_t *)&status, 1, 4); /* spi write read */
+
8323 if (res != 0) /* check result */
+
8324 {
+
8325 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
8326
+
8327 return 1; /* return error */
+
8328 }
+
8329 if ((status & 0x01) == 0x00) /* check status */
+
8330 {
+
8331 break; /* break */
+
8332 }
+
8333 timeout--; /* timeout-- */
+
8334 handle->delay_us(10); /* delay 10 us */
+
8335 }
+
8336 if (timeout == 0)
+
8337 {
+
8338 handle->debug_print("w25qxx: page program timeout.\n"); /* page program timeout */
+
8339
+
8340 return 1; /* return error */
+
8341 }
+
8342 }
+
8343
+
8344 return 0; /* success return 0 */
+
8345}
+
8346
+
8358static uint8_t a_w25qxx_write_no_check(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
+
8359{
+
8360 uint8_t res;
+
8361 uint16_t page_remain;
+
8362
+
8363 page_remain = 256 - addr % 256; /* get remain */
+
8364 if (len <= page_remain) /* check length */
+
8365 {
+
8366 page_remain = (uint16_t)len; /* page remain */
+
8367 }
+
8368 while( 1) /* loop */
+
8369 {
+
8370 res = a_w25qxx_page_program(handle, addr, data, page_remain); /* page program */
+
8371 if (res != 0)
+
8372 {
+
8373 handle->debug_print("w25qxx: page program failed.\n"); /* page program failed */
+
8374
+
8375 return 1; /* return error */
+
8376 }
+
8377 if (len == page_remain) /* check length */
+
8378 {
+
8379 break; /* break loop */
+
8380 }
+
8381 else
+
8382 {
+
8383 data += page_remain; /* data + page_remain */
+
8384 addr += page_remain; /* address + page_remain */
+
8385 len -= page_remain; /* length - page_remain */
+
8386 if (len > 256) /* check length */
+
8387 {
+
8388 page_remain = 256; /* set page remain */
+
8389 }
+
8390 else
+
8391 {
+
8392 page_remain = (uint16_t)len; /* set length */
+
8393 }
+
8394 }
+
8395 }
+
8396
+
8397 return 0; /* success return 0 */
+
8398}
+
8399
+
+
8415uint8_t w25qxx_write(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
+
8416{
+
8417 uint8_t res;
+
8418 uint32_t sec_pos;
+
8419 uint32_t sec_off;
+
8420 uint32_t sec_remain;
+
8421 uint32_t i;
+
8422
+
8423 if (handle == NULL) /* check handle */
+
8424 {
+
8425 return 2; /* return error */
+
8426 }
+
8427 if (handle->inited != 1) /* check handle initialization */
+
8428 {
+
8429 return 3; /* return error */
+
8430 }
+
8431
+
8432 sec_pos = addr / 4096; /* get sector position */
+
8433 sec_off = addr % 4096; /* get sector offset */
+
8434 sec_remain = 4096 - sec_off; /* get sector remain */
+
8435 if (len <= sec_remain) /* check length */
+
8436 {
+
8437 sec_remain = len; /* set remain */
+
8438 }
+
8439 while(1) /* loop */
+
8440 {
+
8441 res = a_w25qxx_read(handle, sec_pos * 4096, handle->buf_4k, 4096); /* read 4k data */
+
8442 if (res != 0)
+
8443 {
+
8444 handle->debug_print("w25qxx: read failed.\n"); /* read failed */
+
8445
+
8446 return 4; /* return error */
+
8447 }
+
8448 for (i = 0; i< sec_remain; i++) /* sec_remain length */
+
8449 {
+
8450 if (handle->buf_4k[sec_off + i] != 0xFF) /* check 0xFF */
+
8451 {
+
8452 break; /* break loop */
+
8453 }
+
8454 }
+
8455 if (i < sec_remain) /* not all is 0xFF */
+
8456 {
+
8457 res = a_w25qxx_erase_sector(handle, sec_pos * 4096); /* erase sector */
+
8458 if (res != 0)
+
8459 {
+
8460 handle->debug_print("w25qxx: erase sector failed.\n"); /* erase sector failed */
+
8461
+
8462 return 5; /* return error */
+
8463 }
+
8464 for (i = 0; i<sec_remain; i++) /* sec_remain length */
+
8465 {
+
8466 handle->buf_4k[i + sec_off] = data[i]; /* copy data */
+
8467 }
+
8468 res = a_w25qxx_write_no_check(handle, sec_pos * 4096, handle->buf_4k, 4096); /* write data no check */
+
8469 if (res != 0) /* check result */
+
8470 {
+
8471 handle->debug_print("w25qxx: write failed.\n"); /* write failed */
+
8472
+
8473 return 1; /* return error */
+
8474 }
+
8475 }
+
8476 else
+
8477 {
+
8478 res = a_w25qxx_write_no_check(handle, addr, data, sec_remain); /* write data */
+
8479 if (res != 0) /* check result */
+
8480 {
+
8481 handle->debug_print("w25qxx: write failed.\n"); /* write failed */
+
8482
+
8483 return 1; /* return error */
+
8484 }
+
8485 }
+
8486 if (len == sec_remain) /* check length length*/
+
8487 {
+
8488 break; /* break loop */
+
8489 }
+
8490 else
+
8491 {
+
8492 sec_pos++; /* sector++ */
+
8493 sec_off = 0; /* set offset */
+
8494 data += sec_remain; /* data + remain */
+
8495 addr += sec_remain; /* addr + remain */
+
8496 len -= sec_remain; /* len - remain */
+
8497 if (len > 4096) /* check length */
+
8498 {
+
8499 sec_remain = 4096; /* set 4096 */
+
8500 }
+
8501 else
+
8502 {
+
8503 sec_remain = len; /* set length */
+
8504 }
+
8505 }
+
8506 }
+
8507
+
8508 return 0; /* success return 0 */
+
8509}
+
+
8510
+
+
8535uint8_t w25qxx_write_read_reg(w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line,
+
8536 uint32_t address, uint8_t address_line, uint8_t address_len,
+
8537 uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len,
+
8538 uint8_t dummy, uint8_t *in_buf, uint32_t in_len,
+
8539 uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
+
8540{
+
8541
+
8542 if (handle == NULL) /* check handle */
+
8543 {
+
8544 return 2; /* return error */
+
8545 }
+
8546 if (handle->inited != 1) /* check handle initialization */
+
8547 {
+
8548 return 3; /* return error */
+
8549 }
+
8550
+
8551 return a_w25qxx_qspi_write_read(handle, instruction, instruction_line,
+
8552 address, address_line, address_len,
+
8553 alternate, alternate_line, alternate_len,
+
8554 dummy, in_buf, in_len,
+
8555 out_buf, out_len, data_line); /* write and read */
+
8556}
+
+
8557
+
+
8566uint8_t w25qxx_info(w25qxx_info_t *info)
+
8567{
+
8568 if (info == NULL) /* check handle */
+
8569 {
+
8570 return 2; /* return error */
+
8571 }
+
8572
+
8573 memset(info, 0, sizeof(w25qxx_info_t)); /* initialize w25qxx info structure */
+
8574 strncpy(info->chip_name, CHIP_NAME, 32); /* copy chip name */
+
8575 strncpy(info->manufacturer_name, MANUFACTURER_NAME, 32); /* copy manufacturer name */
+
8576 strncpy(info->interface, "SPI QSPI", 16); /* copy interface name */
+
8577 info->supply_voltage_min_v = SUPPLY_VOLTAGE_MIN; /* set minimal supply voltage */
+
8578 info->supply_voltage_max_v = SUPPLY_VOLTAGE_MAX; /* set maximum supply voltage */
+
8579 info->max_current_ma = MAX_CURRENT; /* set maximum current */
+
8580 info->temperature_max = TEMPERATURE_MAX; /* set minimal temperature */
+
8581 info->temperature_min = TEMPERATURE_MIN; /* set maximum temperature */
+
8582 info->driver_version = DRIVER_VERSION; /* set driver version */
+
8583
+
8584 return 0; /* success return 0 */
+
8585}
+
+
W25QXX_COMMAND_ENTER_QSPI_MODE
#define W25QXX_COMMAND_ENTER_QSPI_MODE
Definition driver_w25qxx.c:72
+
W25QXX_COMMAND_READ_STATUS_REG3
#define W25QXX_COMMAND_READ_STATUS_REG3
Definition driver_w25qxx.c:59
+
W25QXX_COMMAND_ERASE_PROGRAM_RESUME
#define W25QXX_COMMAND_ERASE_PROGRAM_RESUME
Definition driver_w25qxx.c:65
+
W25QXX_COMMAND_READ_BLOCK_LOCK
#define W25QXX_COMMAND_READ_BLOCK_LOCK
Definition driver_w25qxx.c:91
+
W25QXX_COMMAND_FAST_READ_DUAL_IO
#define W25QXX_COMMAND_FAST_READ_DUAL_IO
Definition driver_w25qxx.c:92
+
W25QXX_COMMAND_READ_DATA
#define W25QXX_COMMAND_READ_DATA
Definition driver_w25qxx.c:81
+
MAX_CURRENT
#define MAX_CURRENT
Definition driver_w25qxx.c:46
+
W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK
#define W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK
Definition driver_w25qxx.c:89
+
W25QXX_COMMAND_WRITE_DISABLE
#define W25QXX_COMMAND_WRITE_DISABLE
Definition driver_w25qxx.c:56
+
W25QXX_COMMAND_DEVICE_ID_DUAL_IO
#define W25QXX_COMMAND_DEVICE_ID_DUAL_IO
Definition driver_w25qxx.c:93
+
W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK
#define W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK
Definition driver_w25qxx.c:90
+
W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND
#define W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND
Definition driver_w25qxx.c:64
+
W25QXX_COMMAND_READ_STATUS_REG2
#define W25QXX_COMMAND_READ_STATUS_REG2
Definition driver_w25qxx.c:58
+
W25QXX_COMMAND_WRITE_STATUS_REG2
#define W25QXX_COMMAND_WRITE_STATUS_REG2
Definition driver_w25qxx.c:61
+
W25QXX_COMMAND_BLOCK_ERASE_64K
#define W25QXX_COMMAND_BLOCK_ERASE_64K
Definition driver_w25qxx.c:80
+
W25QXX_COMMAND_READ_SECURITY_REGISTER
#define W25QXX_COMMAND_READ_SECURITY_REGISTER
Definition driver_w25qxx.c:88
+
W25QXX_COMMAND_FAST_READ_QUAD_OUTPUT
#define W25QXX_COMMAND_FAST_READ_QUAD_OUTPUT
Definition driver_w25qxx.c:84
+
W25QXX_COMMAND_JEDEC_ID
#define W25QXX_COMMAND_JEDEC_ID
Definition driver_w25qxx.c:69
+
W25QXX_COMMAND_READ_SFDP_REGISTER
#define W25QXX_COMMAND_READ_SFDP_REGISTER
Definition driver_w25qxx.c:85
+
W25QXX_COMMAND_CHIP_ERASE
#define W25QXX_COMMAND_CHIP_ERASE
Definition driver_w25qxx.c:63
+
SUPPLY_VOLTAGE_MAX
#define SUPPLY_VOLTAGE_MAX
Definition driver_w25qxx.c:45
+
W25QXX_COMMAND_READ_UNIQUE_ID
#define W25QXX_COMMAND_READ_UNIQUE_ID
Definition driver_w25qxx.c:75
+
W25QXX_COMMAND_WRITE_STATUS_REG3
#define W25QXX_COMMAND_WRITE_STATUS_REG3
Definition driver_w25qxx.c:62
+
W25QXX_COMMAND_ENABLE_RESET
#define W25QXX_COMMAND_ENABLE_RESET
Definition driver_w25qxx.c:73
+
W25QXX_COMMAND_SECTOR_ERASE_4K
#define W25QXX_COMMAND_SECTOR_ERASE_4K
Definition driver_w25qxx.c:78
+
W25QXX_COMMAND_POWER_DOWN
#define W25QXX_COMMAND_POWER_DOWN
Definition driver_w25qxx.c:66
+
W25QXX_COMMAND_DEVICE_ID_QUAD_IO
#define W25QXX_COMMAND_DEVICE_ID_QUAD_IO
Definition driver_w25qxx.c:98
+
W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE
#define W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE
Definition driver_w25qxx.c:55
+
W25QXX_COMMAND_FAST_READ_QUAD_IO
#define W25QXX_COMMAND_FAST_READ_QUAD_IO
Definition driver_w25qxx.c:95
+
W25QXX_COMMAND_QUAD_PAGE_PROGRAM
#define W25QXX_COMMAND_QUAD_PAGE_PROGRAM
Definition driver_w25qxx.c:77
+
W25QXX_COMMAND_ERASE_SECURITY_REGISTER
#define W25QXX_COMMAND_ERASE_SECURITY_REGISTER
Definition driver_w25qxx.c:86
+
W25QXX_COMMAND_BLOCK_ERASE_32K
#define W25QXX_COMMAND_BLOCK_ERASE_32K
Definition driver_w25qxx.c:79
+
W25QXX_COMMAND_FAST_READ_DUAL_OUTPUT
#define W25QXX_COMMAND_FAST_READ_DUAL_OUTPUT
Definition driver_w25qxx.c:83
+
TEMPERATURE_MAX
#define TEMPERATURE_MAX
Definition driver_w25qxx.c:48
+
W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER
#define W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER
Definition driver_w25qxx.c:87
+
W25QXX_COMMAND_WRITE_STATUS_REG1
#define W25QXX_COMMAND_WRITE_STATUS_REG1
Definition driver_w25qxx.c:60
+
W25QXX_COMMAND_WORD_READ_QUAD_IO
#define W25QXX_COMMAND_WORD_READ_QUAD_IO
Definition driver_w25qxx.c:96
+
MANUFACTURER_NAME
#define MANUFACTURER_NAME
Definition driver_w25qxx.c:43
+
TEMPERATURE_MIN
#define TEMPERATURE_MIN
Definition driver_w25qxx.c:47
+
SUPPLY_VOLTAGE_MIN
#define SUPPLY_VOLTAGE_MIN
Definition driver_w25qxx.c:44
+
W25QXX_COMMAND_RESET_DEVICE
#define W25QXX_COMMAND_RESET_DEVICE
Definition driver_w25qxx.c:74
+
W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK
#define W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK
Definition driver_w25qxx.c:71
+
W25QXX_COMMAND_FAST_READ
#define W25QXX_COMMAND_FAST_READ
Definition driver_w25qxx.c:82
+
W25QXX_COMMAND_OCTAL_WORD_READ_QUAD_IO
#define W25QXX_COMMAND_OCTAL_WORD_READ_QUAD_IO
Definition driver_w25qxx.c:97
+
W25QXX_COMMAND_SET_BURST_WITH_WRAP
#define W25QXX_COMMAND_SET_BURST_WITH_WRAP
Definition driver_w25qxx.c:94
+
W25QXX_COMMAND_RELEASE_POWER_DOWN
#define W25QXX_COMMAND_RELEASE_POWER_DOWN
Definition driver_w25qxx.c:67
+
CHIP_NAME
#define CHIP_NAME
chip information definition
Definition driver_w25qxx.c:42
+
W25QXX_COMMAND_READ_STATUS_REG1
#define W25QXX_COMMAND_READ_STATUS_REG1
Definition driver_w25qxx.c:57
+
DRIVER_VERSION
#define DRIVER_VERSION
Definition driver_w25qxx.c:49
+
W25QXX_COMMAND_PAGE_PROGRAM
#define W25QXX_COMMAND_PAGE_PROGRAM
Definition driver_w25qxx.c:76
+
W25QXX_COMMAND_WRITE_ENABLE
#define W25QXX_COMMAND_WRITE_ENABLE
chip command definition
Definition driver_w25qxx.c:54
+
W25QXX_COMMAND_READ_MANUFACTURER
#define W25QXX_COMMAND_READ_MANUFACTURER
Definition driver_w25qxx.c:68
+
W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK
#define W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK
Definition driver_w25qxx.c:70
driver_w25qxx.h
driver w25qxx header file
-
w25qxx_erase_program_resume
uint8_t w25qxx_erase_program_resume(w25qxx_handle_t *handle)
resume erase or program
Definition: driver_w25qxx.c:1722
-
w25qxx_enable_volatile_sr_write
uint8_t w25qxx_enable_volatile_sr_write(w25qxx_handle_t *handle)
enable volatile sr writing
Definition: driver_w25qxx.c:501
-
w25qxx_get_unique_id
uint8_t w25qxx_get_unique_id(w25qxx_handle_t *handle, uint8_t id[8])
get the unique id
Definition: driver_w25qxx.c:2764
-
w25qxx_get_manufacturer_device_id_dual_io
uint8_t w25qxx_get_manufacturer_device_id_dual_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with dual io
Definition: driver_w25qxx.c:2038
-
w25qxx_page_program_quad_input
uint8_t w25qxx_page_program_quad_input(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
quad page program with quad input
Definition: driver_w25qxx.c:4920
-
w25qxx_get_sfdp
uint8_t w25qxx_get_sfdp(w25qxx_handle_t *handle, uint8_t sfdp[256])
get the sfdp
Definition: driver_w25qxx.c:2880
-
w25qxx_set_status1
uint8_t w25qxx_set_status1(w25qxx_handle_t *handle, uint8_t status)
set the status 1
Definition: driver_w25qxx.c:863
-
w25qxx_reset_device
uint8_t w25qxx_reset_device(w25qxx_handle_t *handle)
reset the device
Definition: driver_w25qxx.c:2690
-
w25qxx_qspi_read_wrap_length_t
w25qxx_qspi_read_wrap_length_t
w25qxx qspi read wrap length enumeration definition
Definition: driver_w25qxx.h:123
-
w25qxx_read_security_register
uint8_t w25qxx_read_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
read the security register
Definition: driver_w25qxx.c:3344
-
w25qxx_program_security_register
uint8_t w25qxx_program_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
program the security register
Definition: driver_w25qxx.c:3147
-
w25qxx_individual_block_lock
uint8_t w25qxx_individual_block_lock(w25qxx_handle_t *handle, uint32_t addr)
lock the individual block
Definition: driver_w25qxx.c:6094
-
w25qxx_read_block_lock
uint8_t w25qxx_read_block_lock(w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
read the block lock
Definition: driver_w25qxx.c:6529
-
w25qxx_get_manufacturer_device_id_quad_io
uint8_t w25qxx_get_manufacturer_device_id_quad_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with quad io
Definition: driver_w25qxx.c:2122
-
w25qxx_exit_qspi_mode
uint8_t w25qxx_exit_qspi_mode(w25qxx_handle_t *handle)
exit the qspi mode
Definition: driver_w25qxx.c:2572
-
w25qxx_global_block_unlock
uint8_t w25qxx_global_block_unlock(w25qxx_handle_t *handle)
unlock the whole block
Definition: driver_w25qxx.c:2354
-
w25qxx_qspi_read_dummy_t
w25qxx_qspi_read_dummy_t
w25qxx qspi read dummy enumeration definition
Definition: driver_w25qxx.h:112
-
w25qxx_fast_read_dual_output
uint8_t w25qxx_fast_read_dual_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual output in the fast mode
Definition: driver_w25qxx.c:3858
-
w25qxx_individual_block_unlock
uint8_t w25qxx_individual_block_unlock(w25qxx_handle_t *handle, uint32_t addr)
unlock the individual block
Definition: driver_w25qxx.c:6311
-
w25qxx_security_register_t
w25qxx_security_register_t
w25qxx security register enumeration definition
Definition: driver_w25qxx.h:135
-
w25qxx_octal_word_read_quad_io
uint8_t w25qxx_octal_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
octal word read with quad io
Definition: driver_w25qxx.c:4459
-
w25qxx_get_jedec_id
uint8_t w25qxx_get_jedec_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
get the jedec id information
Definition: driver_w25qxx.c:2203
-
w25qxx_burst_wrap_t
w25qxx_burst_wrap_t
w25qxx burst wrap enumeration definition
Definition: driver_w25qxx.h:145
-
w25qxx_get_status3
uint8_t w25qxx_get_status3(w25qxx_handle_t *handle, uint8_t *status)
get the status 3
Definition: driver_w25qxx.c:789
-
w25qxx_set_read_parameters
uint8_t w25qxx_set_read_parameters(w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
set the read parameters
Definition: driver_w25qxx.c:2427
-
w25qxx_get_status2
uint8_t w25qxx_get_status2(w25qxx_handle_t *handle, uint8_t *status)
get the status 2
Definition: driver_w25qxx.c:716
-
w25qxx_enter_qspi_mode
uint8_t w25qxx_enter_qspi_mode(w25qxx_handle_t *handle)
enter the qspi mode
Definition: driver_w25qxx.c:2494
-
w25qxx_get_status1
uint8_t w25qxx_get_status1(w25qxx_handle_t *handle, uint8_t *status)
get the status 1
Definition: driver_w25qxx.c:643
-
w25qxx_set_status2
uint8_t w25qxx_set_status2(w25qxx_handle_t *handle, uint8_t status)
set the status 2
Definition: driver_w25qxx.c:1062
-
w25qxx_global_block_lock
uint8_t w25qxx_global_block_lock(w25qxx_handle_t *handle)
lock the whole block
Definition: driver_w25qxx.c:2284
-
w25qxx_enable_reset
uint8_t w25qxx_enable_reset(w25qxx_handle_t *handle)
enable the reset
Definition: driver_w25qxx.c:2619
-
w25qxx_fast_read_quad_io
uint8_t w25qxx_fast_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad io in the fast mode
Definition: driver_w25qxx.c:4184
-
w25qxx_disable_write
uint8_t w25qxx_disable_write(w25qxx_handle_t *handle)
disable writing
Definition: driver_w25qxx.c:572
-
w25qxx_set_burst_with_wrap
uint8_t w25qxx_set_burst_with_wrap(w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
set the burst with wrap
Definition: driver_w25qxx.c:6746
-
w25qxx_erase_program_suspend
uint8_t w25qxx_erase_program_suspend(w25qxx_handle_t *handle)
suspend erase or program
Definition: driver_w25qxx.c:1650
-
w25qxx_fast_read_dual_io
uint8_t w25qxx_fast_read_dual_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual io in the fast mode
Definition: driver_w25qxx.c:4076
-
w25qxx_word_read_quad_io
uint8_t w25qxx_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
word read with quad io
Definition: driver_w25qxx.c:4350
-
w25qxx_set_status3
uint8_t w25qxx_set_status3(w25qxx_handle_t *handle, uint8_t status)
set the status 3
Definition: driver_w25qxx.c:1261
-
w25qxx_enable_write
uint8_t w25qxx_enable_write(w25qxx_handle_t *handle)
enable writing
Definition: driver_w25qxx.c:431
-
w25qxx_erase_security_register
uint8_t w25qxx_erase_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num)
erase the security register
Definition: driver_w25qxx.c:2952
-
w25qxx_fast_read_quad_output
uint8_t w25qxx_fast_read_quad_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad output in the fast mode
Definition: driver_w25qxx.c:3967
-
w25qxx_chip_erase
uint8_t w25qxx_chip_erase(w25qxx_handle_t *handle)
erase the chip
Definition: driver_w25qxx.c:1459
-
w25qxx_release_power_down
uint8_t w25qxx_release_power_down(w25qxx_handle_t *handle)
release power down
Definition: driver_w25qxx.c:1875
-
w25qxx_only_spi_read
uint8_t w25qxx_only_spi_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read only in the spi interface
Definition: driver_w25qxx.c:3465
-
w25qxx_block_erase_32k
uint8_t w25qxx_block_erase_32k(w25qxx_handle_t *handle, uint32_t addr)
erase the 32k block
Definition: driver_w25qxx.c:5419
-
w25qxx_get_address_mode
uint8_t w25qxx_get_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t *mode)
get the chip address mode
Definition: driver_w25qxx.c:405
-
w25qxx_set_interface
uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface)
set the chip interface
Definition: driver_w25qxx.c:259
-
w25qxx_page_program
uint8_t w25qxx_page_program(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
page program
Definition: driver_w25qxx.c:4569
-
w25qxx_set_dual_quad_spi
uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable)
enable or disable the dual quad spi
Definition: driver_w25qxx.c:175
-
w25qxx_get_type
uint8_t w25qxx_get_type(w25qxx_handle_t *handle, w25qxx_type_t *type)
get the chip type
Definition: driver_w25qxx.c:238
-
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition: driver_w25qxx.h:63
-
w25qxx_get_interface
uint8_t w25qxx_get_interface(w25qxx_handle_t *handle, w25qxx_interface_t *interface)
get the chip interface
Definition: driver_w25qxx.c:280
-
w25qxx_init
uint8_t w25qxx_init(w25qxx_handle_t *handle)
initialize the chip
Definition: driver_w25qxx.c:6819
-
w25qxx_get_manufacturer_device_id
uint8_t w25qxx_get_manufacturer_device_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information
Definition: driver_w25qxx.c:1952
-
w25qxx_info
uint8_t w25qxx_info(w25qxx_info_t *info)
get chip's information
Definition: driver_w25qxx.c:8566
-
w25qxx_sector_erase_4k
uint8_t w25qxx_sector_erase_4k(w25qxx_handle_t *handle, uint32_t addr)
erase the 4k sector
Definition: driver_w25qxx.c:5080
-
w25qxx_deinit
uint8_t w25qxx_deinit(w25qxx_handle_t *handle)
close the chip
Definition: driver_w25qxx.c:7195
-
w25qxx_address_mode_t
w25qxx_address_mode_t
w25qxx address mode enumeration definition
Definition: driver_w25qxx.h:94
-
w25qxx_set_type
uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type)
set the chip type
Definition: driver_w25qxx.c:217
-
w25qxx_write
uint8_t w25qxx_write(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
write data
Definition: driver_w25qxx.c:8415
-
w25qxx_fast_read
uint8_t w25qxx_fast_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read in the fast mode
Definition: driver_w25qxx.c:3634
-
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition: driver_w25qxx.h:76
-
w25qxx_set_address_mode
uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
set the chip address mode
Definition: driver_w25qxx.c:304
-
w25qxx_get_dual_quad_spi
uint8_t w25qxx_get_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t *enable)
get the dual quad spi status
Definition: driver_w25qxx.c:196
-
w25qxx_power_down
uint8_t w25qxx_power_down(w25qxx_handle_t *handle)
power down
Definition: driver_w25qxx.c:1792
-
w25qxx_read
uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read data
Definition: driver_w25qxx.c:7289
-
w25qxx_block_erase_64k
uint8_t w25qxx_block_erase_64k(w25qxx_handle_t *handle, uint32_t addr)
erase the 64k block
Definition: driver_w25qxx.c:5758
-
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition: driver_w25qxx.h:85
-
W25Q256
@ W25Q256
Definition: driver_w25qxx.h:69
-
W25QXX_ADDRESS_MODE_3_BYTE
@ W25QXX_ADDRESS_MODE_3_BYTE
Definition: driver_w25qxx.h:95
-
W25QXX_ADDRESS_MODE_4_BYTE
@ W25QXX_ADDRESS_MODE_4_BYTE
Definition: driver_w25qxx.h:96
-
W25QXX_INTERFACE_QSPI
@ W25QXX_INTERFACE_QSPI
Definition: driver_w25qxx.h:78
-
W25QXX_INTERFACE_SPI
@ W25QXX_INTERFACE_SPI
Definition: driver_w25qxx.h:77
-
w25qxx_write_read_reg
uint8_t w25qxx_write_read_reg(w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
write and read register
Definition: driver_w25qxx.c:8535
-
w25qxx_handle_s
w25qxx handle structure definition
Definition: driver_w25qxx.h:210
-
w25qxx_handle_s::inited
uint8_t inited
Definition: driver_w25qxx.h:221
-
w25qxx_handle_s::buf
uint8_t buf[256+6]
Definition: driver_w25qxx.h:228
-
w25qxx_handle_s::spi_qspi_write_read
uint8_t(* spi_qspi_write_read)(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
Definition: driver_w25qxx.h:213
-
w25qxx_handle_s::param
uint8_t param
Definition: driver_w25qxx.h:224
-
w25qxx_handle_s::delay_ms
void(* delay_ms)(uint32_t ms)
Definition: driver_w25qxx.h:218
-
w25qxx_handle_s::spi_qspi_deinit
uint8_t(* spi_qspi_deinit)(void)
Definition: driver_w25qxx.h:212
-
w25qxx_handle_s::address_mode
uint8_t address_mode
Definition: driver_w25qxx.h:223
-
w25qxx_handle_s::debug_print
void(* debug_print)(const char *const fmt,...)
Definition: driver_w25qxx.h:220
-
w25qxx_handle_s::delay_us
void(* delay_us)(uint32_t us)
Definition: driver_w25qxx.h:219
-
w25qxx_handle_s::spi_qspi
uint8_t spi_qspi
Definition: driver_w25qxx.h:227
-
w25qxx_handle_s::dual_quad_spi_enable
uint8_t dual_quad_spi_enable
Definition: driver_w25qxx.h:226
-
w25qxx_handle_s::buf_4k
uint8_t buf_4k[4096+1]
Definition: driver_w25qxx.h:229
-
w25qxx_handle_s::type
uint16_t type
Definition: driver_w25qxx.h:222
-
w25qxx_handle_s::spi_qspi_init
uint8_t(* spi_qspi_init)(void)
Definition: driver_w25qxx.h:211
-
w25qxx_handle_s::dummy
uint8_t dummy
Definition: driver_w25qxx.h:225
-
w25qxx_info_s
w25qxx information structure definition
Definition: driver_w25qxx.h:236
-
w25qxx_info_s::temperature_max
float temperature_max
Definition: driver_w25qxx.h:244
-
w25qxx_info_s::supply_voltage_max_v
float supply_voltage_max_v
Definition: driver_w25qxx.h:241
-
w25qxx_info_s::driver_version
uint32_t driver_version
Definition: driver_w25qxx.h:245
-
w25qxx_info_s::interface
char interface[16]
Definition: driver_w25qxx.h:239
-
w25qxx_info_s::temperature_min
float temperature_min
Definition: driver_w25qxx.h:243
-
w25qxx_info_s::max_current_ma
float max_current_ma
Definition: driver_w25qxx.h:242
-
w25qxx_info_s::manufacturer_name
char manufacturer_name[32]
Definition: driver_w25qxx.h:238
-
w25qxx_info_s::supply_voltage_min_v
float supply_voltage_min_v
Definition: driver_w25qxx.h:240
-
w25qxx_info_s::chip_name
char chip_name[32]
Definition: driver_w25qxx.h:237
+
w25qxx_erase_program_resume
uint8_t w25qxx_erase_program_resume(w25qxx_handle_t *handle)
resume erase or program
Definition driver_w25qxx.c:1722
+
w25qxx_enable_volatile_sr_write
uint8_t w25qxx_enable_volatile_sr_write(w25qxx_handle_t *handle)
enable volatile sr writing
Definition driver_w25qxx.c:501
+
w25qxx_get_unique_id
uint8_t w25qxx_get_unique_id(w25qxx_handle_t *handle, uint8_t id[8])
get the unique id
Definition driver_w25qxx.c:2764
+
w25qxx_get_manufacturer_device_id_dual_io
uint8_t w25qxx_get_manufacturer_device_id_dual_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with dual io
Definition driver_w25qxx.c:2038
+
w25qxx_page_program_quad_input
uint8_t w25qxx_page_program_quad_input(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
quad page program with quad input
Definition driver_w25qxx.c:4920
+
w25qxx_get_sfdp
uint8_t w25qxx_get_sfdp(w25qxx_handle_t *handle, uint8_t sfdp[256])
get the sfdp
Definition driver_w25qxx.c:2880
+
w25qxx_set_status1
uint8_t w25qxx_set_status1(w25qxx_handle_t *handle, uint8_t status)
set the status 1
Definition driver_w25qxx.c:863
+
w25qxx_reset_device
uint8_t w25qxx_reset_device(w25qxx_handle_t *handle)
reset the device
Definition driver_w25qxx.c:2690
+
w25qxx_qspi_read_wrap_length_t
w25qxx_qspi_read_wrap_length_t
w25qxx qspi read wrap length enumeration definition
Definition driver_w25qxx.h:123
+
w25qxx_read_security_register
uint8_t w25qxx_read_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
read the security register
Definition driver_w25qxx.c:3344
+
w25qxx_program_security_register
uint8_t w25qxx_program_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
program the security register
Definition driver_w25qxx.c:3147
+
w25qxx_individual_block_lock
uint8_t w25qxx_individual_block_lock(w25qxx_handle_t *handle, uint32_t addr)
lock the individual block
Definition driver_w25qxx.c:6094
+
w25qxx_read_block_lock
uint8_t w25qxx_read_block_lock(w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
read the block lock
Definition driver_w25qxx.c:6529
+
w25qxx_get_manufacturer_device_id_quad_io
uint8_t w25qxx_get_manufacturer_device_id_quad_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with quad io
Definition driver_w25qxx.c:2122
+
w25qxx_exit_qspi_mode
uint8_t w25qxx_exit_qspi_mode(w25qxx_handle_t *handle)
exit the qspi mode
Definition driver_w25qxx.c:2572
+
w25qxx_global_block_unlock
uint8_t w25qxx_global_block_unlock(w25qxx_handle_t *handle)
unlock the whole block
Definition driver_w25qxx.c:2354
+
w25qxx_qspi_read_dummy_t
w25qxx_qspi_read_dummy_t
w25qxx qspi read dummy enumeration definition
Definition driver_w25qxx.h:112
+
w25qxx_fast_read_dual_output
uint8_t w25qxx_fast_read_dual_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual output in the fast mode
Definition driver_w25qxx.c:3858
+
w25qxx_individual_block_unlock
uint8_t w25qxx_individual_block_unlock(w25qxx_handle_t *handle, uint32_t addr)
unlock the individual block
Definition driver_w25qxx.c:6311
+
w25qxx_security_register_t
w25qxx_security_register_t
w25qxx security register enumeration definition
Definition driver_w25qxx.h:135
+
w25qxx_octal_word_read_quad_io
uint8_t w25qxx_octal_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
octal word read with quad io
Definition driver_w25qxx.c:4459
+
w25qxx_get_jedec_id
uint8_t w25qxx_get_jedec_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
get the jedec id information
Definition driver_w25qxx.c:2203
+
w25qxx_burst_wrap_t
w25qxx_burst_wrap_t
w25qxx burst wrap enumeration definition
Definition driver_w25qxx.h:145
+
w25qxx_get_status3
uint8_t w25qxx_get_status3(w25qxx_handle_t *handle, uint8_t *status)
get the status 3
Definition driver_w25qxx.c:789
+
w25qxx_set_read_parameters
uint8_t w25qxx_set_read_parameters(w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
set the read parameters
Definition driver_w25qxx.c:2427
+
w25qxx_get_status2
uint8_t w25qxx_get_status2(w25qxx_handle_t *handle, uint8_t *status)
get the status 2
Definition driver_w25qxx.c:716
+
w25qxx_enter_qspi_mode
uint8_t w25qxx_enter_qspi_mode(w25qxx_handle_t *handle)
enter the qspi mode
Definition driver_w25qxx.c:2494
+
w25qxx_get_status1
uint8_t w25qxx_get_status1(w25qxx_handle_t *handle, uint8_t *status)
get the status 1
Definition driver_w25qxx.c:643
+
w25qxx_set_status2
uint8_t w25qxx_set_status2(w25qxx_handle_t *handle, uint8_t status)
set the status 2
Definition driver_w25qxx.c:1062
+
w25qxx_global_block_lock
uint8_t w25qxx_global_block_lock(w25qxx_handle_t *handle)
lock the whole block
Definition driver_w25qxx.c:2284
+
w25qxx_enable_reset
uint8_t w25qxx_enable_reset(w25qxx_handle_t *handle)
enable the reset
Definition driver_w25qxx.c:2619
+
w25qxx_fast_read_quad_io
uint8_t w25qxx_fast_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad io in the fast mode
Definition driver_w25qxx.c:4184
+
w25qxx_disable_write
uint8_t w25qxx_disable_write(w25qxx_handle_t *handle)
disable writing
Definition driver_w25qxx.c:572
+
w25qxx_set_burst_with_wrap
uint8_t w25qxx_set_burst_with_wrap(w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
set the burst with wrap
Definition driver_w25qxx.c:6746
+
w25qxx_erase_program_suspend
uint8_t w25qxx_erase_program_suspend(w25qxx_handle_t *handle)
suspend erase or program
Definition driver_w25qxx.c:1650
+
w25qxx_fast_read_dual_io
uint8_t w25qxx_fast_read_dual_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual io in the fast mode
Definition driver_w25qxx.c:4076
+
w25qxx_word_read_quad_io
uint8_t w25qxx_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
word read with quad io
Definition driver_w25qxx.c:4350
+
w25qxx_set_status3
uint8_t w25qxx_set_status3(w25qxx_handle_t *handle, uint8_t status)
set the status 3
Definition driver_w25qxx.c:1261
+
w25qxx_enable_write
uint8_t w25qxx_enable_write(w25qxx_handle_t *handle)
enable writing
Definition driver_w25qxx.c:431
+
w25qxx_erase_security_register
uint8_t w25qxx_erase_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num)
erase the security register
Definition driver_w25qxx.c:2952
+
w25qxx_fast_read_quad_output
uint8_t w25qxx_fast_read_quad_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad output in the fast mode
Definition driver_w25qxx.c:3967
+
w25qxx_chip_erase
uint8_t w25qxx_chip_erase(w25qxx_handle_t *handle)
erase the chip
Definition driver_w25qxx.c:1459
+
w25qxx_release_power_down
uint8_t w25qxx_release_power_down(w25qxx_handle_t *handle)
release power down
Definition driver_w25qxx.c:1875
+
w25qxx_only_spi_read
uint8_t w25qxx_only_spi_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read only in the spi interface
Definition driver_w25qxx.c:3465
+
w25qxx_block_erase_32k
uint8_t w25qxx_block_erase_32k(w25qxx_handle_t *handle, uint32_t addr)
erase the 32k block
Definition driver_w25qxx.c:5419
+
w25qxx_get_address_mode
uint8_t w25qxx_get_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t *mode)
get the chip address mode
Definition driver_w25qxx.c:405
+
w25qxx_set_interface
uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface)
set the chip interface
Definition driver_w25qxx.c:259
+
w25qxx_page_program
uint8_t w25qxx_page_program(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
page program
Definition driver_w25qxx.c:4569
+
w25qxx_set_dual_quad_spi
uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable)
enable or disable the dual quad spi
Definition driver_w25qxx.c:175
+
w25qxx_get_type
uint8_t w25qxx_get_type(w25qxx_handle_t *handle, w25qxx_type_t *type)
get the chip type
Definition driver_w25qxx.c:238
+
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition driver_w25qxx.h:63
+
w25qxx_get_interface
uint8_t w25qxx_get_interface(w25qxx_handle_t *handle, w25qxx_interface_t *interface)
get the chip interface
Definition driver_w25qxx.c:280
+
w25qxx_init
uint8_t w25qxx_init(w25qxx_handle_t *handle)
initialize the chip
Definition driver_w25qxx.c:6819
+
w25qxx_get_manufacturer_device_id
uint8_t w25qxx_get_manufacturer_device_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information
Definition driver_w25qxx.c:1952
+
w25qxx_info
uint8_t w25qxx_info(w25qxx_info_t *info)
get chip's information
Definition driver_w25qxx.c:8566
+
w25qxx_sector_erase_4k
uint8_t w25qxx_sector_erase_4k(w25qxx_handle_t *handle, uint32_t addr)
erase the 4k sector
Definition driver_w25qxx.c:5080
+
w25qxx_deinit
uint8_t w25qxx_deinit(w25qxx_handle_t *handle)
close the chip
Definition driver_w25qxx.c:7195
+
w25qxx_address_mode_t
w25qxx_address_mode_t
w25qxx address mode enumeration definition
Definition driver_w25qxx.h:94
+
w25qxx_set_type
uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type)
set the chip type
Definition driver_w25qxx.c:217
+
w25qxx_write
uint8_t w25qxx_write(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
write data
Definition driver_w25qxx.c:8415
+
w25qxx_fast_read
uint8_t w25qxx_fast_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read in the fast mode
Definition driver_w25qxx.c:3634
+
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition driver_w25qxx.h:76
+
w25qxx_set_address_mode
uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
set the chip address mode
Definition driver_w25qxx.c:304
+
w25qxx_get_dual_quad_spi
uint8_t w25qxx_get_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t *enable)
get the dual quad spi status
Definition driver_w25qxx.c:196
+
w25qxx_power_down
uint8_t w25qxx_power_down(w25qxx_handle_t *handle)
power down
Definition driver_w25qxx.c:1792
+
w25qxx_read
uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read data
Definition driver_w25qxx.c:7289
+
w25qxx_block_erase_64k
uint8_t w25qxx_block_erase_64k(w25qxx_handle_t *handle, uint32_t addr)
erase the 64k block
Definition driver_w25qxx.c:5758
+
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition driver_w25qxx.h:85
+
W25Q256
@ W25Q256
Definition driver_w25qxx.h:69
+
W25QXX_ADDRESS_MODE_3_BYTE
@ W25QXX_ADDRESS_MODE_3_BYTE
Definition driver_w25qxx.h:95
+
W25QXX_ADDRESS_MODE_4_BYTE
@ W25QXX_ADDRESS_MODE_4_BYTE
Definition driver_w25qxx.h:96
+
W25QXX_INTERFACE_QSPI
@ W25QXX_INTERFACE_QSPI
Definition driver_w25qxx.h:78
+
W25QXX_INTERFACE_SPI
@ W25QXX_INTERFACE_SPI
Definition driver_w25qxx.h:77
+
w25qxx_write_read_reg
uint8_t w25qxx_write_read_reg(w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
write and read register
Definition driver_w25qxx.c:8535
+
w25qxx_handle_s
w25qxx handle structure definition
Definition driver_w25qxx.h:210
+
w25qxx_handle_s::inited
uint8_t inited
Definition driver_w25qxx.h:221
+
w25qxx_handle_s::buf
uint8_t buf[256+6]
Definition driver_w25qxx.h:228
+
w25qxx_handle_s::spi_qspi_write_read
uint8_t(* spi_qspi_write_read)(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
Definition driver_w25qxx.h:213
+
w25qxx_handle_s::param
uint8_t param
Definition driver_w25qxx.h:224
+
w25qxx_handle_s::delay_ms
void(* delay_ms)(uint32_t ms)
Definition driver_w25qxx.h:218
+
w25qxx_handle_s::spi_qspi_deinit
uint8_t(* spi_qspi_deinit)(void)
Definition driver_w25qxx.h:212
+
w25qxx_handle_s::address_mode
uint8_t address_mode
Definition driver_w25qxx.h:223
+
w25qxx_handle_s::debug_print
void(* debug_print)(const char *const fmt,...)
Definition driver_w25qxx.h:220
+
w25qxx_handle_s::delay_us
void(* delay_us)(uint32_t us)
Definition driver_w25qxx.h:219
+
w25qxx_handle_s::spi_qspi
uint8_t spi_qspi
Definition driver_w25qxx.h:227
+
w25qxx_handle_s::dual_quad_spi_enable
uint8_t dual_quad_spi_enable
Definition driver_w25qxx.h:226
+
w25qxx_handle_s::buf_4k
uint8_t buf_4k[4096+1]
Definition driver_w25qxx.h:229
+
w25qxx_handle_s::type
uint16_t type
Definition driver_w25qxx.h:222
+
w25qxx_handle_s::spi_qspi_init
uint8_t(* spi_qspi_init)(void)
Definition driver_w25qxx.h:211
+
w25qxx_handle_s::dummy
uint8_t dummy
Definition driver_w25qxx.h:225
+
w25qxx_info_s
w25qxx information structure definition
Definition driver_w25qxx.h:236
+
w25qxx_info_s::temperature_max
float temperature_max
Definition driver_w25qxx.h:244
+
w25qxx_info_s::supply_voltage_max_v
float supply_voltage_max_v
Definition driver_w25qxx.h:241
+
w25qxx_info_s::driver_version
uint32_t driver_version
Definition driver_w25qxx.h:245
+
w25qxx_info_s::interface
char interface[16]
Definition driver_w25qxx.h:239
+
w25qxx_info_s::temperature_min
float temperature_min
Definition driver_w25qxx.h:243
+
w25qxx_info_s::max_current_ma
float max_current_ma
Definition driver_w25qxx.h:242
+
w25qxx_info_s::manufacturer_name
char manufacturer_name[32]
Definition driver_w25qxx.h:238
+
w25qxx_info_s::supply_voltage_min_v
float supply_voltage_min_v
Definition driver_w25qxx.h:240
+
w25qxx_info_s::chip_name
char chip_name[32]
Definition driver_w25qxx.h:237
diff --git a/doc/html/driver__w25qxx_8h.html b/doc/html/driver__w25qxx_8h.html index 82717b4..de578f4 100644 --- a/doc/html/driver__w25qxx_8h.html +++ b/doc/html/driver__w25qxx_8h.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: src/driver_w25qxx.h File Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +

@@ -64,7 +64,7 @@
@@ -78,9 +78,16 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
@@ -90,8 +97,7 @@ Typedefs | Enumerations | Functions
-
-
driver_w25qxx.h File Reference
+
driver_w25qxx.h File Reference

@@ -103,7 +109,7 @@

Go to the source code of this file.

- @@ -112,42 +118,42 @@

+

Data Structures

struct  w25qxx_handle_s
 w25qxx handle structure definition More...
 w25qxx information structure definition More...
 
- - - + + - - + + - - + + - - + + - - + + - - + + - - + +

+

Macros

#define DRIVER_W25QXX_LINK_INIT(HANDLE, STRUCTURE)   memset(HANDLE, 0, sizeof(STRUCTURE))
 initialize w25qxx_handle_t structure More...
#define DRIVER_W25QXX_LINK_INIT(HANDLE, STRUCTURE)   memset(HANDLE, 0, sizeof(STRUCTURE))
 initialize w25qxx_handle_t structure
 
#define DRIVER_W25QXX_LINK_SPI_QSPI_INIT(HANDLE, FUC)   (HANDLE)->spi_qspi_init = FUC
 link spi_qspi_init function More...
#define DRIVER_W25QXX_LINK_SPI_QSPI_INIT(HANDLE, FUC)   (HANDLE)->spi_qspi_init = FUC
 link spi_qspi_init function
 
#define DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(HANDLE, FUC)   (HANDLE)->spi_qspi_deinit = FUC
 link spi_qspi_deinit function More...
#define DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(HANDLE, FUC)   (HANDLE)->spi_qspi_deinit = FUC
 link spi_qspi_deinit function
 
#define DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(HANDLE, FUC)   (HANDLE)->spi_qspi_write_read = FUC
 link spi_qspi_write_read function More...
#define DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(HANDLE, FUC)   (HANDLE)->spi_qspi_write_read = FUC
 link spi_qspi_write_read function
 
#define DRIVER_W25QXX_LINK_DELAY_MS(HANDLE, FUC)   (HANDLE)->delay_ms = FUC
 link delay_ms function More...
#define DRIVER_W25QXX_LINK_DELAY_MS(HANDLE, FUC)   (HANDLE)->delay_ms = FUC
 link delay_ms function
 
#define DRIVER_W25QXX_LINK_DELAY_US(HANDLE, FUC)   (HANDLE)->delay_us = FUC
 link delay_us function More...
#define DRIVER_W25QXX_LINK_DELAY_US(HANDLE, FUC)   (HANDLE)->delay_us = FUC
 link delay_us function
 
#define DRIVER_W25QXX_LINK_DEBUG_PRINT(HANDLE, FUC)   (HANDLE)->debug_print = FUC
 link debug_print function More...
#define DRIVER_W25QXX_LINK_DEBUG_PRINT(HANDLE, FUC)   (HANDLE)->debug_print = FUC
 link debug_print function
 
- - - + + - - + +

+

Typedefs

typedef struct w25qxx_handle_s w25qxx_handle_t
 w25qxx handle structure definition More...
typedef struct w25qxx_handle_s w25qxx_handle_t
 w25qxx handle structure definition
 
typedef struct w25qxx_info_s w25qxx_info_t
 w25qxx information structure definition More...
typedef struct w25qxx_info_s w25qxx_info_t
 w25qxx information structure definition
 
- - - - - - - - - - - -

+

Enumerations

enum  w25qxx_type_t {
+
enum  w25qxx_type_t {
  W25Q80 = 0XEF13U , W25Q16 = 0XEF14U , W25Q32 = 0XEF15U @@ -159,42 +165,42 @@ }
 w25qxx type enumeration definition More...
 
enum  w25qxx_interface_t { W25QXX_INTERFACE_SPI = 0x00 +
enum  w25qxx_interface_t { W25QXX_INTERFACE_SPI = 0x00 , W25QXX_INTERFACE_QSPI = 0x01 }
 w25qxx interface enumeration definition More...
 
enum  w25qxx_bool_t { W25QXX_BOOL_FALSE = 0x00 +
enum  w25qxx_bool_t { W25QXX_BOOL_FALSE = 0x00 , W25QXX_BOOL_TRUE = 0x01 }
 w25qxx bool enumeration definition More...
 
enum  w25qxx_address_mode_t { W25QXX_ADDRESS_MODE_3_BYTE = 0x00 +
enum  w25qxx_address_mode_t { W25QXX_ADDRESS_MODE_3_BYTE = 0x00 , W25QXX_ADDRESS_MODE_4_BYTE = 0x01 }
 w25qxx address mode enumeration definition More...
 
enum  w25qxx_qspi_read_dummy_t { W25QXX_QSPI_READ_DUMMY_2_33MHZ = 0x00 +
enum  w25qxx_qspi_read_dummy_t { W25QXX_QSPI_READ_DUMMY_2_33MHZ = 0x00 , W25QXX_QSPI_READ_DUMMY_4_55MHZ = 0x01 , W25QXX_QSPI_READ_DUMMY_6_80MHZ = 0x02 , W25QXX_QSPI_READ_DUMMY_8_80MHZ = 0x03 }
 w25qxx qspi read dummy enumeration definition More...
 
enum  w25qxx_qspi_read_wrap_length_t { W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE = 0x00 +
enum  w25qxx_qspi_read_wrap_length_t { W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE = 0x00 , W25QXX_QSPI_READ_WRAP_LENGTH_16_BYTE = 0x01 , W25QXX_QSPI_READ_WRAP_LENGTH_32_BYTE = 0x02 , W25QXX_QSPI_READ_WRAP_LENGTH_64_BYTE = 0x03 }
 w25qxx qspi read wrap length enumeration definition More...
 
enum  w25qxx_security_register_t { W25QXX_SECURITY_REGISTER_1 = 0x1000 +
enum  w25qxx_security_register_t { W25QXX_SECURITY_REGISTER_1 = 0x1000 , W25QXX_SECURITY_REGISTER_2 = 0x2000 , W25QXX_SECURITY_REGISTER_3 = 0x3000 }
 w25qxx security register enumeration definition More...
 
enum  w25qxx_burst_wrap_t {
+
enum  w25qxx_burst_wrap_t {
  W25QXX_BURST_WRAP_NONE = 0x10 , W25QXX_BURST_WRAP_8_BYTE = 0x00 , W25QXX_BURST_WRAP_16_BYTE = 0x20 @@ -205,7 +211,7 @@ }
 w25qxx burst wrap enumeration definition More...
 
enum  w25qxx_status1_t {
+
enum  w25qxx_status1_t {
  W25QXX_STATUS1_STATUS_REGISTER_PROTECT_0 = (1 << 7) , W25QXX_STATUS1_SECTOR_PROTECT_OR_TOP_BOTTOM_PROTECT = (1 << 6) , W25QXX_STATUS1_TOP_BOTTOM_PROTECT_OR_BLOCK_PROTECT_3 = (1 << 5) @@ -219,7 +225,7 @@ }
 w25qxx status 1 enumeration definition More...
 
enum  w25qxx_status2_t {
+
enum  w25qxx_status2_t {
  W25QXX_STATUS2_SUSPEND_STATUS = (1 << 7) , W25QXX_STATUS2_COMPLEMENT_PROTECT = (1 << 6) , W25QXX_STATUS2_SECURITY_REGISTER_3_LOCK_BITS = (1 << 5) @@ -232,7 +238,7 @@ }
 w25qxx status 2 enumeration definition More...
 
enum  w25qxx_status3_t {
+
enum  w25qxx_status3_t {
  W25QXX_STATUS3_HOLD_RESET_FUNCTION = (1 << 7) , W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_100_PERCENTAGE = (0 << 5) , W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_75_PERCENTAGE = (1 << 5) @@ -247,190 +253,190 @@
 w25qxx status 3 enumeration definition More...
 
- - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + +

+

Functions

uint8_t w25qxx_info (w25qxx_info_t *info)
 get chip's information More...
uint8_t w25qxx_info (w25qxx_info_t *info)
 get chip's information
 
uint8_t w25qxx_set_dual_quad_spi (w25qxx_handle_t *handle, w25qxx_bool_t enable)
 enable or disable the dual quad spi More...
uint8_t w25qxx_set_dual_quad_spi (w25qxx_handle_t *handle, w25qxx_bool_t enable)
 enable or disable the dual quad spi
 
uint8_t w25qxx_get_dual_quad_spi (w25qxx_handle_t *handle, w25qxx_bool_t *enable)
 get the dual quad spi status More...
uint8_t w25qxx_get_dual_quad_spi (w25qxx_handle_t *handle, w25qxx_bool_t *enable)
 get the dual quad spi status
 
uint8_t w25qxx_set_type (w25qxx_handle_t *handle, w25qxx_type_t type)
 set the chip type More...
uint8_t w25qxx_set_type (w25qxx_handle_t *handle, w25qxx_type_t type)
 set the chip type
 
uint8_t w25qxx_get_type (w25qxx_handle_t *handle, w25qxx_type_t *type)
 get the chip type More...
uint8_t w25qxx_get_type (w25qxx_handle_t *handle, w25qxx_type_t *type)
 get the chip type
 
uint8_t w25qxx_set_interface (w25qxx_handle_t *handle, w25qxx_interface_t interface)
 set the chip interface More...
uint8_t w25qxx_set_interface (w25qxx_handle_t *handle, w25qxx_interface_t interface)
 set the chip interface
 
uint8_t w25qxx_get_interface (w25qxx_handle_t *handle, w25qxx_interface_t *interface)
 get the chip interface More...
uint8_t w25qxx_get_interface (w25qxx_handle_t *handle, w25qxx_interface_t *interface)
 get the chip interface
 
uint8_t w25qxx_set_address_mode (w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
 set the chip address mode More...
uint8_t w25qxx_set_address_mode (w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
 set the chip address mode
 
uint8_t w25qxx_get_address_mode (w25qxx_handle_t *handle, w25qxx_address_mode_t *mode)
 get the chip address mode More...
uint8_t w25qxx_get_address_mode (w25qxx_handle_t *handle, w25qxx_address_mode_t *mode)
 get the chip address mode
 
uint8_t w25qxx_init (w25qxx_handle_t *handle)
 initialize the chip More...
uint8_t w25qxx_init (w25qxx_handle_t *handle)
 initialize the chip
 
uint8_t w25qxx_deinit (w25qxx_handle_t *handle)
 close the chip More...
uint8_t w25qxx_deinit (w25qxx_handle_t *handle)
 close the chip
 
uint8_t w25qxx_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read data More...
uint8_t w25qxx_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read data
 
uint8_t w25qxx_write (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 write data More...
uint8_t w25qxx_write (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 write data
 
uint8_t w25qxx_only_spi_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read only in the spi interface More...
uint8_t w25qxx_only_spi_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read only in the spi interface
 
uint8_t w25qxx_fast_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read in the fast mode More...
uint8_t w25qxx_fast_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read in the fast mode
 
uint8_t w25qxx_page_program (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
 page program More...
uint8_t w25qxx_page_program (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
 page program
 
uint8_t w25qxx_sector_erase_4k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 4k sector More...
uint8_t w25qxx_sector_erase_4k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 4k sector
 
uint8_t w25qxx_block_erase_32k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 32k block More...
uint8_t w25qxx_block_erase_32k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 32k block
 
uint8_t w25qxx_block_erase_64k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 64k block More...
uint8_t w25qxx_block_erase_64k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 64k block
 
uint8_t w25qxx_chip_erase (w25qxx_handle_t *handle)
 erase the chip More...
uint8_t w25qxx_chip_erase (w25qxx_handle_t *handle)
 erase the chip
 
uint8_t w25qxx_power_down (w25qxx_handle_t *handle)
 power down More...
uint8_t w25qxx_power_down (w25qxx_handle_t *handle)
 power down
 
uint8_t w25qxx_release_power_down (w25qxx_handle_t *handle)
 release power down More...
uint8_t w25qxx_release_power_down (w25qxx_handle_t *handle)
 release power down
 
uint8_t w25qxx_get_manufacturer_device_id (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information More...
uint8_t w25qxx_get_manufacturer_device_id (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information
 
uint8_t w25qxx_fast_read_dual_output (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with dual output in the fast mode More...
uint8_t w25qxx_fast_read_dual_output (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with dual output in the fast mode
 
uint8_t w25qxx_fast_read_quad_output (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with quad output in the fast mode More...
uint8_t w25qxx_fast_read_quad_output (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with quad output in the fast mode
 
uint8_t w25qxx_fast_read_dual_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with dual io in the fast mode More...
uint8_t w25qxx_fast_read_dual_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with dual io in the fast mode
 
uint8_t w25qxx_fast_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with quad io in the fast mode More...
uint8_t w25qxx_fast_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with quad io in the fast mode
 
uint8_t w25qxx_word_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 word read with quad io More...
uint8_t w25qxx_word_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 word read with quad io
 
uint8_t w25qxx_octal_word_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 octal word read with quad io More...
uint8_t w25qxx_octal_word_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 octal word read with quad io
 
uint8_t w25qxx_page_program_quad_input (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
 quad page program with quad input More...
uint8_t w25qxx_page_program_quad_input (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
 quad page program with quad input
 
uint8_t w25qxx_enable_write (w25qxx_handle_t *handle)
 enable writing More...
uint8_t w25qxx_enable_write (w25qxx_handle_t *handle)
 enable writing
 
uint8_t w25qxx_enable_volatile_sr_write (w25qxx_handle_t *handle)
 enable volatile sr writing More...
uint8_t w25qxx_enable_volatile_sr_write (w25qxx_handle_t *handle)
 enable volatile sr writing
 
uint8_t w25qxx_disable_write (w25qxx_handle_t *handle)
 disable writing More...
uint8_t w25qxx_disable_write (w25qxx_handle_t *handle)
 disable writing
 
uint8_t w25qxx_get_status1 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 1 More...
uint8_t w25qxx_get_status1 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 1
 
uint8_t w25qxx_get_status2 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 2 More...
uint8_t w25qxx_get_status2 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 2
 
uint8_t w25qxx_get_status3 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 3 More...
uint8_t w25qxx_get_status3 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 3
 
uint8_t w25qxx_set_status1 (w25qxx_handle_t *handle, uint8_t status)
 set the status 1 More...
uint8_t w25qxx_set_status1 (w25qxx_handle_t *handle, uint8_t status)
 set the status 1
 
uint8_t w25qxx_set_status2 (w25qxx_handle_t *handle, uint8_t status)
 set the status 2 More...
uint8_t w25qxx_set_status2 (w25qxx_handle_t *handle, uint8_t status)
 set the status 2
 
uint8_t w25qxx_set_status3 (w25qxx_handle_t *handle, uint8_t status)
 set the status 3 More...
uint8_t w25qxx_set_status3 (w25qxx_handle_t *handle, uint8_t status)
 set the status 3
 
uint8_t w25qxx_erase_program_suspend (w25qxx_handle_t *handle)
 suspend erase or program More...
uint8_t w25qxx_erase_program_suspend (w25qxx_handle_t *handle)
 suspend erase or program
 
uint8_t w25qxx_erase_program_resume (w25qxx_handle_t *handle)
 resume erase or program More...
uint8_t w25qxx_erase_program_resume (w25qxx_handle_t *handle)
 resume erase or program
 
uint8_t w25qxx_get_manufacturer_device_id_dual_io (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information with dual io More...
uint8_t w25qxx_get_manufacturer_device_id_dual_io (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information with dual io
 
uint8_t w25qxx_get_manufacturer_device_id_quad_io (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information with quad io More...
uint8_t w25qxx_get_manufacturer_device_id_quad_io (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information with quad io
 
uint8_t w25qxx_get_jedec_id (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
 get the jedec id information More...
uint8_t w25qxx_get_jedec_id (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
 get the jedec id information
 
uint8_t w25qxx_global_block_lock (w25qxx_handle_t *handle)
 lock the whole block More...
uint8_t w25qxx_global_block_lock (w25qxx_handle_t *handle)
 lock the whole block
 
uint8_t w25qxx_global_block_unlock (w25qxx_handle_t *handle)
 unlock the whole block More...
uint8_t w25qxx_global_block_unlock (w25qxx_handle_t *handle)
 unlock the whole block
 
uint8_t w25qxx_set_read_parameters (w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
 set the read parameters More...
uint8_t w25qxx_set_read_parameters (w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
 set the read parameters
 
uint8_t w25qxx_enter_qspi_mode (w25qxx_handle_t *handle)
 enter the qspi mode More...
uint8_t w25qxx_enter_qspi_mode (w25qxx_handle_t *handle)
 enter the qspi mode
 
uint8_t w25qxx_exit_qspi_mode (w25qxx_handle_t *handle)
 exit the qspi mode More...
uint8_t w25qxx_exit_qspi_mode (w25qxx_handle_t *handle)
 exit the qspi mode
 
uint8_t w25qxx_enable_reset (w25qxx_handle_t *handle)
 enable the reset More...
uint8_t w25qxx_enable_reset (w25qxx_handle_t *handle)
 enable the reset
 
uint8_t w25qxx_reset_device (w25qxx_handle_t *handle)
 reset the device More...
uint8_t w25qxx_reset_device (w25qxx_handle_t *handle)
 reset the device
 
uint8_t w25qxx_get_unique_id (w25qxx_handle_t *handle, uint8_t id[8])
 get the unique id More...
uint8_t w25qxx_get_unique_id (w25qxx_handle_t *handle, uint8_t id[8])
 get the unique id
 
uint8_t w25qxx_get_sfdp (w25qxx_handle_t *handle, uint8_t sfdp[256])
 get the sfdp More...
uint8_t w25qxx_get_sfdp (w25qxx_handle_t *handle, uint8_t sfdp[256])
 get the sfdp
 
uint8_t w25qxx_erase_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num)
 erase the security register More...
uint8_t w25qxx_erase_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num)
 erase the security register
 
uint8_t w25qxx_program_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
 program the security register More...
uint8_t w25qxx_program_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
 program the security register
 
uint8_t w25qxx_read_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
 read the security register More...
uint8_t w25qxx_read_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
 read the security register
 
uint8_t w25qxx_individual_block_lock (w25qxx_handle_t *handle, uint32_t addr)
 lock the individual block More...
uint8_t w25qxx_individual_block_lock (w25qxx_handle_t *handle, uint32_t addr)
 lock the individual block
 
uint8_t w25qxx_individual_block_unlock (w25qxx_handle_t *handle, uint32_t addr)
 unlock the individual block More...
uint8_t w25qxx_individual_block_unlock (w25qxx_handle_t *handle, uint32_t addr)
 unlock the individual block
 
uint8_t w25qxx_read_block_lock (w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
 read the block lock More...
uint8_t w25qxx_read_block_lock (w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
 read the block lock
 
uint8_t w25qxx_set_burst_with_wrap (w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
 set the burst with wrap More...
uint8_t w25qxx_set_burst_with_wrap (w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
 set the burst with wrap
 
uint8_t w25qxx_write_read_reg (w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
 write and read register More...
uint8_t w25qxx_write_read_reg (w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
 write and read register
 

Detailed Description

@@ -458,7 +464,7 @@

history

diff --git a/doc/html/driver__w25qxx_8h_source.html b/doc/html/driver__w25qxx_8h_source.html index 4b72aee..3bd7f43 100644 --- a/doc/html/driver__w25qxx_8h_source.html +++ b/doc/html/driver__w25qxx_8h_source.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: src/driver_w25qxx.h Source File @@ -23,11 +23,10 @@
- + - @@ -36,22 +35,28 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ + +
@@ -78,463 +83,495 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
-
-
driver_w25qxx.h
+
driver_w25qxx.h
-Go to the documentation of this file.
1 
-
37 #ifndef DRIVER_W25QXX_H
-
38 #define DRIVER_W25QXX_H
-
39 
-
40 #include <stdint.h>
-
41 #include <stdio.h>
-
42 #include <string.h>
-
43 
-
44 #ifdef __cplusplus
-
45 extern "C"{
-
46 #endif
-
47 
-
62 typedef enum
-
63 {
-
64  W25Q80 = 0XEF13U,
-
65  W25Q16 = 0XEF14U,
-
66  W25Q32 = 0XEF15U,
-
67  W25Q64 = 0XEF16U,
-
68  W25Q128 = 0XEF17U,
-
69  W25Q256 = 0XEF18U,
-
70 } w25qxx_type_t;
-
71 
-
75 typedef enum
-
76 {
-
77  W25QXX_INTERFACE_SPI = 0x00,
-
78  W25QXX_INTERFACE_QSPI = 0x01,
-
79 } w25qxx_interface_t;
-
80 
-
84 typedef enum
-
85 {
-
86  W25QXX_BOOL_FALSE = 0x00,
-
87  W25QXX_BOOL_TRUE = 0x01,
-
88 } w25qxx_bool_t;
-
89 
-
93 typedef enum
-
94 {
-
95  W25QXX_ADDRESS_MODE_3_BYTE = 0x00,
-
96  W25QXX_ADDRESS_MODE_4_BYTE = 0x01,
-
97 } w25qxx_address_mode_t;
-
98 
-
111 typedef enum
-
112 {
-
113  W25QXX_QSPI_READ_DUMMY_2_33MHZ = 0x00,
-
114  W25QXX_QSPI_READ_DUMMY_4_55MHZ = 0x01,
-
115  W25QXX_QSPI_READ_DUMMY_6_80MHZ = 0x02,
-
116  W25QXX_QSPI_READ_DUMMY_8_80MHZ = 0x03,
-
117 } w25qxx_qspi_read_dummy_t;
-
118 
-
122 typedef enum
-
123 {
-
124  W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE = 0x00,
-
125  W25QXX_QSPI_READ_WRAP_LENGTH_16_BYTE = 0x01,
-
126  W25QXX_QSPI_READ_WRAP_LENGTH_32_BYTE = 0x02,
-
127  W25QXX_QSPI_READ_WRAP_LENGTH_64_BYTE = 0x03,
-
128 } w25qxx_qspi_read_wrap_length_t;
-
129 
-
130 
-
134 typedef enum
-
135 {
-
136  W25QXX_SECURITY_REGISTER_1 = 0x1000,
-
137  W25QXX_SECURITY_REGISTER_2 = 0x2000,
-
138  W25QXX_SECURITY_REGISTER_3 = 0x3000,
-
139 } w25qxx_security_register_t;
-
140 
-
144 typedef enum
-
145 {
-
146  W25QXX_BURST_WRAP_NONE = 0x10,
-
147  W25QXX_BURST_WRAP_8_BYTE = 0x00,
-
148  W25QXX_BURST_WRAP_16_BYTE = 0x20,
-
149  W25QXX_BURST_WRAP_32_BYTE = 0x40,
-
150  W25QXX_BURST_WRAP_64_BYTE = 0x60,
-
151 } w25qxx_burst_wrap_t;
-
152 
-
156 typedef enum
-
157 {
-
158  W25QXX_STATUS1_STATUS_REGISTER_PROTECT_0 = (1 << 7),
-
159  W25QXX_STATUS1_SECTOR_PROTECT_OR_TOP_BOTTOM_PROTECT = (1 << 6),
-
160  W25QXX_STATUS1_TOP_BOTTOM_PROTECT_OR_BLOCK_PROTECT_3 = (1 << 5),
-
161  W25QXX_STATUS1_BLOCK_PROTECT_2 = (1 << 4),
-
162  W25QXX_STATUS1_BLOCK_PROTECT_1 = (1 << 3),
-
163  W25QXX_STATUS1_BLOCK_PROTECT_0 = (1 << 2),
-
164  W25QXX_STATUS1_WRITE_ENABLE_LATCH = (1 << 1),
-
165  W25QXX_STATUS1_ERASE_WRITE_PROGRESS = (1 << 0),
-
166 } w25qxx_status1_t;
-
167 
-
171 typedef enum
-
172 {
-
173  W25QXX_STATUS2_SUSPEND_STATUS = (1 << 7),
-
174  W25QXX_STATUS2_COMPLEMENT_PROTECT = (1 << 6),
-
175  W25QXX_STATUS2_SECURITY_REGISTER_3_LOCK_BITS = (1 << 5),
-
176  W25QXX_STATUS2_SECURITY_REGISTER_2_LOCK_BITS = (1 << 4),
-
177  W25QXX_STATUS2_SECURITY_REGISTER_1_LOCK_BITS = (1 << 3),
-
178  W25QXX_STATUS2_QUAD_ENABLE = (1 << 1),
-
179  W25QXX_STATUS2_STATUS_REGISTER_PROTECT_1 = (1 << 0),
-
180 } w25qxx_status2_t;
-
181 
-
185 typedef enum
-
186 {
-
187  W25QXX_STATUS3_HOLD_RESET_FUNCTION = (1 << 7),
-
188  W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_100_PERCENTAGE = (0 << 5),
-
189  W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_75_PERCENTAGE = (1 << 5),
-
190  W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_50_PERCENTAGE = (2 << 5),
-
191  W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_25_PERCENTAGE = (3 << 5),
-
192  W25QXX_STATUS3_WRITE_PROTECT_SELECTION = (1 << 2),
-
193  W25QXX_STATUS3_POWER_UP_ADDRESS_MODE = (1 << 1),
-
194  W25QXX_STATUS3_CURRENT_ADDRESS_MODE = (1 << 0),
-
195 } w25qxx_status3_t;
-
196 
-
209 typedef struct w25qxx_handle_s
-
210 {
-
211  uint8_t (*spi_qspi_init)(void);
-
212  uint8_t (*spi_qspi_deinit)(void);
-
213  uint8_t (*spi_qspi_write_read)(uint8_t instruction, uint8_t instruction_line,
-
214  uint32_t address, uint8_t address_line, uint8_t address_len,
-
215  uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len,
-
216  uint8_t dummy, uint8_t *in_buf, uint32_t in_len,
-
217  uint8_t *out_buf, uint32_t out_len, uint8_t data_line);
-
218  void (*delay_ms)(uint32_t ms);
-
219  void (*delay_us)(uint32_t us);
-
220  void (*debug_print)(const char *const fmt, ...);
-
221  uint8_t inited;
-
222  uint16_t type;
-
223  uint8_t address_mode;
-
224  uint8_t param;
-
225  uint8_t dummy;
-
226  uint8_t dual_quad_spi_enable;
-
227  uint8_t spi_qspi;
-
228  uint8_t buf[256 + 6];
-
229  uint8_t buf_4k[4096 + 1];
-
230 } w25qxx_handle_t;
-
231 
-
235 typedef struct w25qxx_info_s
-
236 {
-
237  char chip_name[32];
-
238  char manufacturer_name[32];
-
239  char interface[16];
-
240  float supply_voltage_min_v;
-
241  float supply_voltage_max_v;
-
242  float max_current_ma;
-
243  float temperature_min;
-
244  float temperature_max;
-
245  uint32_t driver_version;
-
246 } w25qxx_info_t;
-
247 
-
265 #define DRIVER_W25QXX_LINK_INIT(HANDLE, STRUCTURE) memset(HANDLE, 0, sizeof(STRUCTURE))
-
266 
-
273 #define DRIVER_W25QXX_LINK_SPI_QSPI_INIT(HANDLE, FUC) (HANDLE)->spi_qspi_init = FUC
-
274 
-
281 #define DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(HANDLE, FUC) (HANDLE)->spi_qspi_deinit = FUC
-
282 
-
289 #define DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(HANDLE, FUC) (HANDLE)->spi_qspi_write_read = FUC
-
290 
-
297 #define DRIVER_W25QXX_LINK_DELAY_MS(HANDLE, FUC) (HANDLE)->delay_ms = FUC
-
298 
-
305 #define DRIVER_W25QXX_LINK_DELAY_US(HANDLE, FUC) (HANDLE)->delay_us = FUC
-
306 
-
313 #define DRIVER_W25QXX_LINK_DEBUG_PRINT(HANDLE, FUC) (HANDLE)->debug_print = FUC
-
314 
-
334 uint8_t w25qxx_info(w25qxx_info_t *info);
-
335 
-
345 uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable);
-
346 
-
356 uint8_t w25qxx_get_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t *enable);
-
357 
-
367 uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type);
-
368 
-
378 uint8_t w25qxx_get_type(w25qxx_handle_t *handle, w25qxx_type_t *type);
-
379 
-
389 uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface);
-
390 
-
400 uint8_t w25qxx_get_interface(w25qxx_handle_t *handle, w25qxx_interface_t *interface);
-
401 
-
414 uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode);
-
415 
-
426 uint8_t w25qxx_get_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t *mode);
-
427 
-
443 uint8_t w25qxx_init(w25qxx_handle_t *handle);
-
444 
-
456 uint8_t w25qxx_deinit(w25qxx_handle_t *handle);
-
457 
-
472 uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
-
473 
-
489 uint8_t w25qxx_write(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
-
490 
-
506 uint8_t w25qxx_only_spi_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
-
507 
-
522 uint8_t w25qxx_fast_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
-
523 
-
541 uint8_t w25qxx_page_program(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len);
-
542 
-
557 uint8_t w25qxx_sector_erase_4k(w25qxx_handle_t *handle, uint32_t addr);
-
558 
-
573 uint8_t w25qxx_block_erase_32k(w25qxx_handle_t *handle, uint32_t addr);
-
574 
-
589 uint8_t w25qxx_block_erase_64k(w25qxx_handle_t *handle, uint32_t addr);
-
590 
-
602 uint8_t w25qxx_chip_erase(w25qxx_handle_t *handle);
-
603 
-
614 uint8_t w25qxx_power_down(w25qxx_handle_t *handle);
-
615 
-
626 uint8_t w25qxx_release_power_down(w25qxx_handle_t *handle);
-
627 
-
640 uint8_t w25qxx_get_manufacturer_device_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id);
-
641 
-
669 uint8_t w25qxx_fast_read_dual_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
-
670 
-
687 uint8_t w25qxx_fast_read_quad_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
-
688 
-
705 uint8_t w25qxx_fast_read_dual_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
-
706 
-
722 uint8_t w25qxx_fast_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
-
723 
-
740 uint8_t w25qxx_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
-
741 
-
758 uint8_t w25qxx_octal_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
-
759 
-
778 uint8_t w25qxx_page_program_quad_input(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len);
-
779 
-
790 uint8_t w25qxx_enable_write(w25qxx_handle_t *handle);
-
791 
-
802 uint8_t w25qxx_enable_volatile_sr_write(w25qxx_handle_t *handle);
-
803 
-
814 uint8_t w25qxx_disable_write(w25qxx_handle_t *handle);
-
815 
-
827 uint8_t w25qxx_get_status1(w25qxx_handle_t *handle, uint8_t *status);
-
828 
-
840 uint8_t w25qxx_get_status2(w25qxx_handle_t *handle, uint8_t *status);
-
841 
-
853 uint8_t w25qxx_get_status3(w25qxx_handle_t *handle, uint8_t *status);
-
854 
-
867 uint8_t w25qxx_set_status1(w25qxx_handle_t *handle, uint8_t status);
-
868 
-
881 uint8_t w25qxx_set_status2(w25qxx_handle_t *handle, uint8_t status);
-
882 
-
895 uint8_t w25qxx_set_status3(w25qxx_handle_t *handle, uint8_t status);
-
896 
-
907 uint8_t w25qxx_erase_program_suspend(w25qxx_handle_t *handle);
-
908 
-
919 uint8_t w25qxx_erase_program_resume(w25qxx_handle_t *handle);
-
920 
-
936 uint8_t w25qxx_get_manufacturer_device_id_dual_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id);
-
937 
-
953 uint8_t w25qxx_get_manufacturer_device_id_quad_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id);
-
954 
-
967 uint8_t w25qxx_get_jedec_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2]);
-
968 
-
979 uint8_t w25qxx_global_block_lock(w25qxx_handle_t *handle);
-
980 
-
991 uint8_t w25qxx_global_block_unlock(w25qxx_handle_t *handle);
-
992 
-
1006 uint8_t w25qxx_set_read_parameters(w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length);
-
1007 
-
1019 uint8_t w25qxx_enter_qspi_mode(w25qxx_handle_t *handle);
-
1020 
-
1032 uint8_t w25qxx_exit_qspi_mode(w25qxx_handle_t *handle);
-
1033 
-
1044 uint8_t w25qxx_enable_reset(w25qxx_handle_t *handle);
-
1045 
-
1056 uint8_t w25qxx_reset_device(w25qxx_handle_t *handle);
-
1057 
-
1071 uint8_t w25qxx_get_unique_id(w25qxx_handle_t *handle, uint8_t id[8]);
-
1072 
-
1085 uint8_t w25qxx_get_sfdp(w25qxx_handle_t *handle, uint8_t sfdp[256]);
-
1086 
-
1101 uint8_t w25qxx_erase_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num);
-
1102 
-
1118 uint8_t w25qxx_program_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256]);
-
1119 
-
1135 uint8_t w25qxx_read_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256]);
-
1136 
-
1149 uint8_t w25qxx_individual_block_lock(w25qxx_handle_t *handle, uint32_t addr);
-
1150 
-
1163 uint8_t w25qxx_individual_block_unlock(w25qxx_handle_t *handle, uint32_t addr);
-
1164 
-
1178 uint8_t w25qxx_read_block_lock(w25qxx_handle_t *handle, uint32_t addr, uint8_t *value);
-
1179 
-
1192 uint8_t w25qxx_set_burst_with_wrap(w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap);
-
1193 
-
1229 uint8_t w25qxx_write_read_reg(w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line,
-
1230  uint32_t address, uint8_t address_line, uint8_t address_len,
-
1231  uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len,
-
1232  uint8_t dummy, uint8_t *in_buf, uint32_t in_len,
-
1233  uint8_t *out_buf, uint32_t out_len, uint8_t data_line);
-
1234 
-
1243 #ifdef __cplusplus
-
1244 }
-
1245 #endif
-
1246 
-
1247 #endif
-
w25qxx_erase_program_resume
uint8_t w25qxx_erase_program_resume(w25qxx_handle_t *handle)
resume erase or program
Definition: driver_w25qxx.c:1722
-
w25qxx_status2_t
w25qxx_status2_t
w25qxx status 2 enumeration definition
Definition: driver_w25qxx.h:172
-
w25qxx_enable_volatile_sr_write
uint8_t w25qxx_enable_volatile_sr_write(w25qxx_handle_t *handle)
enable volatile sr writing
Definition: driver_w25qxx.c:501
-
w25qxx_get_unique_id
uint8_t w25qxx_get_unique_id(w25qxx_handle_t *handle, uint8_t id[8])
get the unique id
Definition: driver_w25qxx.c:2764
-
w25qxx_get_manufacturer_device_id_dual_io
uint8_t w25qxx_get_manufacturer_device_id_dual_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with dual io
Definition: driver_w25qxx.c:2038
-
w25qxx_page_program_quad_input
uint8_t w25qxx_page_program_quad_input(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
quad page program with quad input
Definition: driver_w25qxx.c:4920
-
w25qxx_get_sfdp
uint8_t w25qxx_get_sfdp(w25qxx_handle_t *handle, uint8_t sfdp[256])
get the sfdp
Definition: driver_w25qxx.c:2880
-
w25qxx_set_status1
uint8_t w25qxx_set_status1(w25qxx_handle_t *handle, uint8_t status)
set the status 1
Definition: driver_w25qxx.c:863
-
w25qxx_reset_device
uint8_t w25qxx_reset_device(w25qxx_handle_t *handle)
reset the device
Definition: driver_w25qxx.c:2690
-
w25qxx_qspi_read_wrap_length_t
w25qxx_qspi_read_wrap_length_t
w25qxx qspi read wrap length enumeration definition
Definition: driver_w25qxx.h:123
-
w25qxx_read_security_register
uint8_t w25qxx_read_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
read the security register
Definition: driver_w25qxx.c:3344
-
w25qxx_program_security_register
uint8_t w25qxx_program_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
program the security register
Definition: driver_w25qxx.c:3147
-
w25qxx_individual_block_lock
uint8_t w25qxx_individual_block_lock(w25qxx_handle_t *handle, uint32_t addr)
lock the individual block
Definition: driver_w25qxx.c:6094
-
w25qxx_read_block_lock
uint8_t w25qxx_read_block_lock(w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
read the block lock
Definition: driver_w25qxx.c:6529
-
w25qxx_get_manufacturer_device_id_quad_io
uint8_t w25qxx_get_manufacturer_device_id_quad_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with quad io
Definition: driver_w25qxx.c:2122
-
w25qxx_exit_qspi_mode
uint8_t w25qxx_exit_qspi_mode(w25qxx_handle_t *handle)
exit the qspi mode
Definition: driver_w25qxx.c:2572
-
w25qxx_global_block_unlock
uint8_t w25qxx_global_block_unlock(w25qxx_handle_t *handle)
unlock the whole block
Definition: driver_w25qxx.c:2354
-
w25qxx_qspi_read_dummy_t
w25qxx_qspi_read_dummy_t
w25qxx qspi read dummy enumeration definition
Definition: driver_w25qxx.h:112
-
w25qxx_fast_read_dual_output
uint8_t w25qxx_fast_read_dual_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual output in the fast mode
Definition: driver_w25qxx.c:3858
-
w25qxx_individual_block_unlock
uint8_t w25qxx_individual_block_unlock(w25qxx_handle_t *handle, uint32_t addr)
unlock the individual block
Definition: driver_w25qxx.c:6311
-
w25qxx_security_register_t
w25qxx_security_register_t
w25qxx security register enumeration definition
Definition: driver_w25qxx.h:135
-
w25qxx_octal_word_read_quad_io
uint8_t w25qxx_octal_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
octal word read with quad io
Definition: driver_w25qxx.c:4459
-
w25qxx_get_jedec_id
uint8_t w25qxx_get_jedec_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
get the jedec id information
Definition: driver_w25qxx.c:2203
-
w25qxx_burst_wrap_t
w25qxx_burst_wrap_t
w25qxx burst wrap enumeration definition
Definition: driver_w25qxx.h:145
-
w25qxx_get_status3
uint8_t w25qxx_get_status3(w25qxx_handle_t *handle, uint8_t *status)
get the status 3
Definition: driver_w25qxx.c:789
-
w25qxx_set_read_parameters
uint8_t w25qxx_set_read_parameters(w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
set the read parameters
Definition: driver_w25qxx.c:2427
-
w25qxx_status1_t
w25qxx_status1_t
w25qxx status 1 enumeration definition
Definition: driver_w25qxx.h:157
-
w25qxx_get_status2
uint8_t w25qxx_get_status2(w25qxx_handle_t *handle, uint8_t *status)
get the status 2
Definition: driver_w25qxx.c:716
-
w25qxx_enter_qspi_mode
uint8_t w25qxx_enter_qspi_mode(w25qxx_handle_t *handle)
enter the qspi mode
Definition: driver_w25qxx.c:2494
-
w25qxx_get_status1
uint8_t w25qxx_get_status1(w25qxx_handle_t *handle, uint8_t *status)
get the status 1
Definition: driver_w25qxx.c:643
-
w25qxx_set_status2
uint8_t w25qxx_set_status2(w25qxx_handle_t *handle, uint8_t status)
set the status 2
Definition: driver_w25qxx.c:1062
-
w25qxx_global_block_lock
uint8_t w25qxx_global_block_lock(w25qxx_handle_t *handle)
lock the whole block
Definition: driver_w25qxx.c:2284
-
w25qxx_enable_reset
uint8_t w25qxx_enable_reset(w25qxx_handle_t *handle)
enable the reset
Definition: driver_w25qxx.c:2619
-
w25qxx_fast_read_quad_io
uint8_t w25qxx_fast_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad io in the fast mode
Definition: driver_w25qxx.c:4184
-
w25qxx_disable_write
uint8_t w25qxx_disable_write(w25qxx_handle_t *handle)
disable writing
Definition: driver_w25qxx.c:572
-
w25qxx_set_burst_with_wrap
uint8_t w25qxx_set_burst_with_wrap(w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
set the burst with wrap
Definition: driver_w25qxx.c:6746
-
w25qxx_erase_program_suspend
uint8_t w25qxx_erase_program_suspend(w25qxx_handle_t *handle)
suspend erase or program
Definition: driver_w25qxx.c:1650
-
w25qxx_fast_read_dual_io
uint8_t w25qxx_fast_read_dual_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual io in the fast mode
Definition: driver_w25qxx.c:4076
-
w25qxx_status3_t
w25qxx_status3_t
w25qxx status 3 enumeration definition
Definition: driver_w25qxx.h:186
-
w25qxx_word_read_quad_io
uint8_t w25qxx_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
word read with quad io
Definition: driver_w25qxx.c:4350
-
w25qxx_set_status3
uint8_t w25qxx_set_status3(w25qxx_handle_t *handle, uint8_t status)
set the status 3
Definition: driver_w25qxx.c:1261
-
w25qxx_enable_write
uint8_t w25qxx_enable_write(w25qxx_handle_t *handle)
enable writing
Definition: driver_w25qxx.c:431
-
w25qxx_erase_security_register
uint8_t w25qxx_erase_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num)
erase the security register
Definition: driver_w25qxx.c:2952
-
w25qxx_fast_read_quad_output
uint8_t w25qxx_fast_read_quad_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad output in the fast mode
Definition: driver_w25qxx.c:3967
-
W25QXX_STATUS2_SECURITY_REGISTER_3_LOCK_BITS
@ W25QXX_STATUS2_SECURITY_REGISTER_3_LOCK_BITS
Definition: driver_w25qxx.h:175
-
W25QXX_STATUS2_SECURITY_REGISTER_2_LOCK_BITS
@ W25QXX_STATUS2_SECURITY_REGISTER_2_LOCK_BITS
Definition: driver_w25qxx.h:176
-
W25QXX_STATUS2_SUSPEND_STATUS
@ W25QXX_STATUS2_SUSPEND_STATUS
Definition: driver_w25qxx.h:173
-
W25QXX_STATUS2_COMPLEMENT_PROTECT
@ W25QXX_STATUS2_COMPLEMENT_PROTECT
Definition: driver_w25qxx.h:174
-
W25QXX_STATUS2_STATUS_REGISTER_PROTECT_1
@ W25QXX_STATUS2_STATUS_REGISTER_PROTECT_1
Definition: driver_w25qxx.h:179
-
W25QXX_STATUS2_SECURITY_REGISTER_1_LOCK_BITS
@ W25QXX_STATUS2_SECURITY_REGISTER_1_LOCK_BITS
Definition: driver_w25qxx.h:177
-
W25QXX_STATUS2_QUAD_ENABLE
@ W25QXX_STATUS2_QUAD_ENABLE
Definition: driver_w25qxx.h:178
-
W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE
@ W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE
Definition: driver_w25qxx.h:124
-
W25QXX_QSPI_READ_WRAP_LENGTH_64_BYTE
@ W25QXX_QSPI_READ_WRAP_LENGTH_64_BYTE
Definition: driver_w25qxx.h:127
-
W25QXX_QSPI_READ_WRAP_LENGTH_32_BYTE
@ W25QXX_QSPI_READ_WRAP_LENGTH_32_BYTE
Definition: driver_w25qxx.h:126
-
W25QXX_QSPI_READ_WRAP_LENGTH_16_BYTE
@ W25QXX_QSPI_READ_WRAP_LENGTH_16_BYTE
Definition: driver_w25qxx.h:125
-
W25QXX_QSPI_READ_DUMMY_4_55MHZ
@ W25QXX_QSPI_READ_DUMMY_4_55MHZ
Definition: driver_w25qxx.h:114
-
W25QXX_QSPI_READ_DUMMY_6_80MHZ
@ W25QXX_QSPI_READ_DUMMY_6_80MHZ
Definition: driver_w25qxx.h:115
-
W25QXX_QSPI_READ_DUMMY_2_33MHZ
@ W25QXX_QSPI_READ_DUMMY_2_33MHZ
Definition: driver_w25qxx.h:113
-
W25QXX_QSPI_READ_DUMMY_8_80MHZ
@ W25QXX_QSPI_READ_DUMMY_8_80MHZ
Definition: driver_w25qxx.h:116
-
W25QXX_SECURITY_REGISTER_2
@ W25QXX_SECURITY_REGISTER_2
Definition: driver_w25qxx.h:137
-
W25QXX_SECURITY_REGISTER_3
@ W25QXX_SECURITY_REGISTER_3
Definition: driver_w25qxx.h:138
-
W25QXX_SECURITY_REGISTER_1
@ W25QXX_SECURITY_REGISTER_1
Definition: driver_w25qxx.h:136
-
W25QXX_BURST_WRAP_64_BYTE
@ W25QXX_BURST_WRAP_64_BYTE
Definition: driver_w25qxx.h:150
-
W25QXX_BURST_WRAP_8_BYTE
@ W25QXX_BURST_WRAP_8_BYTE
Definition: driver_w25qxx.h:147
-
W25QXX_BURST_WRAP_32_BYTE
@ W25QXX_BURST_WRAP_32_BYTE
Definition: driver_w25qxx.h:149
-
W25QXX_BURST_WRAP_NONE
@ W25QXX_BURST_WRAP_NONE
Definition: driver_w25qxx.h:146
-
W25QXX_BURST_WRAP_16_BYTE
@ W25QXX_BURST_WRAP_16_BYTE
Definition: driver_w25qxx.h:148
-
W25QXX_STATUS1_STATUS_REGISTER_PROTECT_0
@ W25QXX_STATUS1_STATUS_REGISTER_PROTECT_0
Definition: driver_w25qxx.h:158
-
W25QXX_STATUS1_WRITE_ENABLE_LATCH
@ W25QXX_STATUS1_WRITE_ENABLE_LATCH
Definition: driver_w25qxx.h:164
-
W25QXX_STATUS1_BLOCK_PROTECT_1
@ W25QXX_STATUS1_BLOCK_PROTECT_1
Definition: driver_w25qxx.h:162
-
W25QXX_STATUS1_TOP_BOTTOM_PROTECT_OR_BLOCK_PROTECT_3
@ W25QXX_STATUS1_TOP_BOTTOM_PROTECT_OR_BLOCK_PROTECT_3
Definition: driver_w25qxx.h:160
-
W25QXX_STATUS1_BLOCK_PROTECT_0
@ W25QXX_STATUS1_BLOCK_PROTECT_0
Definition: driver_w25qxx.h:163
-
W25QXX_STATUS1_SECTOR_PROTECT_OR_TOP_BOTTOM_PROTECT
@ W25QXX_STATUS1_SECTOR_PROTECT_OR_TOP_BOTTOM_PROTECT
Definition: driver_w25qxx.h:159
-
W25QXX_STATUS1_BLOCK_PROTECT_2
@ W25QXX_STATUS1_BLOCK_PROTECT_2
Definition: driver_w25qxx.h:161
-
W25QXX_STATUS1_ERASE_WRITE_PROGRESS
@ W25QXX_STATUS1_ERASE_WRITE_PROGRESS
Definition: driver_w25qxx.h:165
-
W25QXX_STATUS3_CURRENT_ADDRESS_MODE
@ W25QXX_STATUS3_CURRENT_ADDRESS_MODE
Definition: driver_w25qxx.h:194
-
W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_75_PERCENTAGE
@ W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_75_PERCENTAGE
Definition: driver_w25qxx.h:189
-
W25QXX_STATUS3_WRITE_PROTECT_SELECTION
@ W25QXX_STATUS3_WRITE_PROTECT_SELECTION
Definition: driver_w25qxx.h:192
-
W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_50_PERCENTAGE
@ W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_50_PERCENTAGE
Definition: driver_w25qxx.h:190
-
W25QXX_STATUS3_HOLD_RESET_FUNCTION
@ W25QXX_STATUS3_HOLD_RESET_FUNCTION
Definition: driver_w25qxx.h:187
-
W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_100_PERCENTAGE
@ W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_100_PERCENTAGE
Definition: driver_w25qxx.h:188
-
W25QXX_STATUS3_POWER_UP_ADDRESS_MODE
@ W25QXX_STATUS3_POWER_UP_ADDRESS_MODE
Definition: driver_w25qxx.h:193
-
W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_25_PERCENTAGE
@ W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_25_PERCENTAGE
Definition: driver_w25qxx.h:191
-
w25qxx_chip_erase
uint8_t w25qxx_chip_erase(w25qxx_handle_t *handle)
erase the chip
Definition: driver_w25qxx.c:1459
-
w25qxx_release_power_down
uint8_t w25qxx_release_power_down(w25qxx_handle_t *handle)
release power down
Definition: driver_w25qxx.c:1875
-
w25qxx_only_spi_read
uint8_t w25qxx_only_spi_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read only in the spi interface
Definition: driver_w25qxx.c:3465
-
w25qxx_block_erase_32k
uint8_t w25qxx_block_erase_32k(w25qxx_handle_t *handle, uint32_t addr)
erase the 32k block
Definition: driver_w25qxx.c:5419
-
w25qxx_get_address_mode
uint8_t w25qxx_get_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t *mode)
get the chip address mode
Definition: driver_w25qxx.c:405
-
w25qxx_set_interface
uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface)
set the chip interface
Definition: driver_w25qxx.c:259
+Go to the documentation of this file.
1
+
37#ifndef DRIVER_W25QXX_H
+
38#define DRIVER_W25QXX_H
+
39
+
40#include <stdint.h>
+
41#include <stdio.h>
+
42#include <string.h>
+
43
+
44#ifdef __cplusplus
+
45extern "C"{
+
46#endif
+
47
+
+
62typedef enum
+
63{
+
64 W25Q80 = 0XEF13U,
+
65 W25Q16 = 0XEF14U,
+
66 W25Q32 = 0XEF15U,
+
67 W25Q64 = 0XEF16U,
+
68 W25Q128 = 0XEF17U,
+
69 W25Q256 = 0XEF18U,
+
70} w25qxx_type_t;
+
+
71
+
+
75typedef enum
+
76{
+
77 W25QXX_INTERFACE_SPI = 0x00,
+
78 W25QXX_INTERFACE_QSPI = 0x01,
+
79} w25qxx_interface_t;
+
+
80
+
+
84typedef enum
+
85{
+
86 W25QXX_BOOL_FALSE = 0x00,
+
87 W25QXX_BOOL_TRUE = 0x01,
+
88} w25qxx_bool_t;
+
+
89
+ +
98
+ +
118
+ +
129
+
130
+ +
140
+ +
152
+ +
167
+ +
181
+ +
196
+
+
209typedef struct w25qxx_handle_s
+
210{
+
211 uint8_t (*spi_qspi_init)(void);
+
212 uint8_t (*spi_qspi_deinit)(void);
+
213 uint8_t (*spi_qspi_write_read)(uint8_t instruction, uint8_t instruction_line,
+
214 uint32_t address, uint8_t address_line, uint8_t address_len,
+
215 uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len,
+
216 uint8_t dummy, uint8_t *in_buf, uint32_t in_len,
+
217 uint8_t *out_buf, uint32_t out_len, uint8_t data_line);
+
218 void (*delay_ms)(uint32_t ms);
+
219 void (*delay_us)(uint32_t us);
+
220 void (*debug_print)(const char *const fmt, ...);
+
221 uint8_t inited;
+
222 uint16_t type;
+
223 uint8_t address_mode;
+
224 uint8_t param;
+
225 uint8_t dummy;
+
226 uint8_t dual_quad_spi_enable;
+
227 uint8_t spi_qspi;
+
228 uint8_t buf[256 + 6];
+
229 uint8_t buf_4k[4096 + 1];
+
230} w25qxx_handle_t;
+
+
231
+ +
247
+
265#define DRIVER_W25QXX_LINK_INIT(HANDLE, STRUCTURE) memset(HANDLE, 0, sizeof(STRUCTURE))
+
266
+
273#define DRIVER_W25QXX_LINK_SPI_QSPI_INIT(HANDLE, FUC) (HANDLE)->spi_qspi_init = FUC
+
274
+
281#define DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(HANDLE, FUC) (HANDLE)->spi_qspi_deinit = FUC
+
282
+
289#define DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(HANDLE, FUC) (HANDLE)->spi_qspi_write_read = FUC
+
290
+
297#define DRIVER_W25QXX_LINK_DELAY_MS(HANDLE, FUC) (HANDLE)->delay_ms = FUC
+
298
+
305#define DRIVER_W25QXX_LINK_DELAY_US(HANDLE, FUC) (HANDLE)->delay_us = FUC
+
306
+
313#define DRIVER_W25QXX_LINK_DEBUG_PRINT(HANDLE, FUC) (HANDLE)->debug_print = FUC
+
314
+
334uint8_t w25qxx_info(w25qxx_info_t *info);
+
335
+
345uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable);
+
346
+
356uint8_t w25qxx_get_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t *enable);
+
357
+
367uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type);
+
368
+
378uint8_t w25qxx_get_type(w25qxx_handle_t *handle, w25qxx_type_t *type);
+
379
+
389uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface);
+
390
+
400uint8_t w25qxx_get_interface(w25qxx_handle_t *handle, w25qxx_interface_t *interface);
+
401
+
414uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode);
+
415
+
426uint8_t w25qxx_get_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t *mode);
+
427
+
443uint8_t w25qxx_init(w25qxx_handle_t *handle);
+
444
+
456uint8_t w25qxx_deinit(w25qxx_handle_t *handle);
+
457
+
472uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
+
473
+
489uint8_t w25qxx_write(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
+
490
+
506uint8_t w25qxx_only_spi_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
+
507
+
522uint8_t w25qxx_fast_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
+
523
+
541uint8_t w25qxx_page_program(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len);
+
542
+
557uint8_t w25qxx_sector_erase_4k(w25qxx_handle_t *handle, uint32_t addr);
+
558
+
573uint8_t w25qxx_block_erase_32k(w25qxx_handle_t *handle, uint32_t addr);
+
574
+
589uint8_t w25qxx_block_erase_64k(w25qxx_handle_t *handle, uint32_t addr);
+
590
+
602uint8_t w25qxx_chip_erase(w25qxx_handle_t *handle);
+
603
+
614uint8_t w25qxx_power_down(w25qxx_handle_t *handle);
+
615
+
626uint8_t w25qxx_release_power_down(w25qxx_handle_t *handle);
+
627
+
640uint8_t w25qxx_get_manufacturer_device_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id);
+
641
+
669uint8_t w25qxx_fast_read_dual_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
+
670
+
687uint8_t w25qxx_fast_read_quad_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
+
688
+
705uint8_t w25qxx_fast_read_dual_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
+
706
+
722uint8_t w25qxx_fast_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
+
723
+
740uint8_t w25qxx_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
+
741
+
758uint8_t w25qxx_octal_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
+
759
+
778uint8_t w25qxx_page_program_quad_input(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len);
+
779
+
790uint8_t w25qxx_enable_write(w25qxx_handle_t *handle);
+
791
+
802uint8_t w25qxx_enable_volatile_sr_write(w25qxx_handle_t *handle);
+
803
+
814uint8_t w25qxx_disable_write(w25qxx_handle_t *handle);
+
815
+
827uint8_t w25qxx_get_status1(w25qxx_handle_t *handle, uint8_t *status);
+
828
+
840uint8_t w25qxx_get_status2(w25qxx_handle_t *handle, uint8_t *status);
+
841
+
853uint8_t w25qxx_get_status3(w25qxx_handle_t *handle, uint8_t *status);
+
854
+
867uint8_t w25qxx_set_status1(w25qxx_handle_t *handle, uint8_t status);
+
868
+
881uint8_t w25qxx_set_status2(w25qxx_handle_t *handle, uint8_t status);
+
882
+
895uint8_t w25qxx_set_status3(w25qxx_handle_t *handle, uint8_t status);
+
896
+
907uint8_t w25qxx_erase_program_suspend(w25qxx_handle_t *handle);
+
908
+
919uint8_t w25qxx_erase_program_resume(w25qxx_handle_t *handle);
+
920
+
936uint8_t w25qxx_get_manufacturer_device_id_dual_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id);
+
937
+
953uint8_t w25qxx_get_manufacturer_device_id_quad_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id);
+
954
+
967uint8_t w25qxx_get_jedec_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2]);
+
968
+
979uint8_t w25qxx_global_block_lock(w25qxx_handle_t *handle);
+
980
+
991uint8_t w25qxx_global_block_unlock(w25qxx_handle_t *handle);
+
992
+
1006uint8_t w25qxx_set_read_parameters(w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length);
+
1007
+
1019uint8_t w25qxx_enter_qspi_mode(w25qxx_handle_t *handle);
+
1020
+
1032uint8_t w25qxx_exit_qspi_mode(w25qxx_handle_t *handle);
+
1033
+
1044uint8_t w25qxx_enable_reset(w25qxx_handle_t *handle);
+
1045
+
1056uint8_t w25qxx_reset_device(w25qxx_handle_t *handle);
+
1057
+
1071uint8_t w25qxx_get_unique_id(w25qxx_handle_t *handle, uint8_t id[8]);
+
1072
+
1085uint8_t w25qxx_get_sfdp(w25qxx_handle_t *handle, uint8_t sfdp[256]);
+
1086
+
1101uint8_t w25qxx_erase_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num);
+
1102
+
1118uint8_t w25qxx_program_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256]);
+
1119
+
1135uint8_t w25qxx_read_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256]);
+
1136
+
1149uint8_t w25qxx_individual_block_lock(w25qxx_handle_t *handle, uint32_t addr);
+
1150
+
1163uint8_t w25qxx_individual_block_unlock(w25qxx_handle_t *handle, uint32_t addr);
+
1164
+
1178uint8_t w25qxx_read_block_lock(w25qxx_handle_t *handle, uint32_t addr, uint8_t *value);
+
1179
+
1192uint8_t w25qxx_set_burst_with_wrap(w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap);
+
1193
+
1229uint8_t w25qxx_write_read_reg(w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line,
+
1230 uint32_t address, uint8_t address_line, uint8_t address_len,
+
1231 uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len,
+
1232 uint8_t dummy, uint8_t *in_buf, uint32_t in_len,
+
1233 uint8_t *out_buf, uint32_t out_len, uint8_t data_line);
+
1234
+
1243#ifdef __cplusplus
+
1244}
+
1245#endif
+
1246
+
1247#endif
+
w25qxx_erase_program_resume
uint8_t w25qxx_erase_program_resume(w25qxx_handle_t *handle)
resume erase or program
Definition driver_w25qxx.c:1722
+
w25qxx_status2_t
w25qxx_status2_t
w25qxx status 2 enumeration definition
Definition driver_w25qxx.h:172
+
w25qxx_enable_volatile_sr_write
uint8_t w25qxx_enable_volatile_sr_write(w25qxx_handle_t *handle)
enable volatile sr writing
Definition driver_w25qxx.c:501
+
w25qxx_get_unique_id
uint8_t w25qxx_get_unique_id(w25qxx_handle_t *handle, uint8_t id[8])
get the unique id
Definition driver_w25qxx.c:2764
+
w25qxx_get_manufacturer_device_id_dual_io
uint8_t w25qxx_get_manufacturer_device_id_dual_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with dual io
Definition driver_w25qxx.c:2038
+
w25qxx_page_program_quad_input
uint8_t w25qxx_page_program_quad_input(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
quad page program with quad input
Definition driver_w25qxx.c:4920
+
w25qxx_get_sfdp
uint8_t w25qxx_get_sfdp(w25qxx_handle_t *handle, uint8_t sfdp[256])
get the sfdp
Definition driver_w25qxx.c:2880
+
w25qxx_set_status1
uint8_t w25qxx_set_status1(w25qxx_handle_t *handle, uint8_t status)
set the status 1
Definition driver_w25qxx.c:863
+
w25qxx_reset_device
uint8_t w25qxx_reset_device(w25qxx_handle_t *handle)
reset the device
Definition driver_w25qxx.c:2690
+
w25qxx_qspi_read_wrap_length_t
w25qxx_qspi_read_wrap_length_t
w25qxx qspi read wrap length enumeration definition
Definition driver_w25qxx.h:123
+
w25qxx_read_security_register
uint8_t w25qxx_read_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
read the security register
Definition driver_w25qxx.c:3344
+
w25qxx_program_security_register
uint8_t w25qxx_program_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
program the security register
Definition driver_w25qxx.c:3147
+
w25qxx_individual_block_lock
uint8_t w25qxx_individual_block_lock(w25qxx_handle_t *handle, uint32_t addr)
lock the individual block
Definition driver_w25qxx.c:6094
+
w25qxx_read_block_lock
uint8_t w25qxx_read_block_lock(w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
read the block lock
Definition driver_w25qxx.c:6529
+
w25qxx_get_manufacturer_device_id_quad_io
uint8_t w25qxx_get_manufacturer_device_id_quad_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with quad io
Definition driver_w25qxx.c:2122
+
w25qxx_exit_qspi_mode
uint8_t w25qxx_exit_qspi_mode(w25qxx_handle_t *handle)
exit the qspi mode
Definition driver_w25qxx.c:2572
+
w25qxx_global_block_unlock
uint8_t w25qxx_global_block_unlock(w25qxx_handle_t *handle)
unlock the whole block
Definition driver_w25qxx.c:2354
+
w25qxx_qspi_read_dummy_t
w25qxx_qspi_read_dummy_t
w25qxx qspi read dummy enumeration definition
Definition driver_w25qxx.h:112
+
w25qxx_fast_read_dual_output
uint8_t w25qxx_fast_read_dual_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual output in the fast mode
Definition driver_w25qxx.c:3858
+
w25qxx_individual_block_unlock
uint8_t w25qxx_individual_block_unlock(w25qxx_handle_t *handle, uint32_t addr)
unlock the individual block
Definition driver_w25qxx.c:6311
+
w25qxx_security_register_t
w25qxx_security_register_t
w25qxx security register enumeration definition
Definition driver_w25qxx.h:135
+
w25qxx_octal_word_read_quad_io
uint8_t w25qxx_octal_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
octal word read with quad io
Definition driver_w25qxx.c:4459
+
w25qxx_get_jedec_id
uint8_t w25qxx_get_jedec_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
get the jedec id information
Definition driver_w25qxx.c:2203
+
w25qxx_burst_wrap_t
w25qxx_burst_wrap_t
w25qxx burst wrap enumeration definition
Definition driver_w25qxx.h:145
+
w25qxx_get_status3
uint8_t w25qxx_get_status3(w25qxx_handle_t *handle, uint8_t *status)
get the status 3
Definition driver_w25qxx.c:789
+
w25qxx_set_read_parameters
uint8_t w25qxx_set_read_parameters(w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
set the read parameters
Definition driver_w25qxx.c:2427
+
w25qxx_status1_t
w25qxx_status1_t
w25qxx status 1 enumeration definition
Definition driver_w25qxx.h:157
+
w25qxx_get_status2
uint8_t w25qxx_get_status2(w25qxx_handle_t *handle, uint8_t *status)
get the status 2
Definition driver_w25qxx.c:716
+
w25qxx_enter_qspi_mode
uint8_t w25qxx_enter_qspi_mode(w25qxx_handle_t *handle)
enter the qspi mode
Definition driver_w25qxx.c:2494
+
w25qxx_get_status1
uint8_t w25qxx_get_status1(w25qxx_handle_t *handle, uint8_t *status)
get the status 1
Definition driver_w25qxx.c:643
+
w25qxx_set_status2
uint8_t w25qxx_set_status2(w25qxx_handle_t *handle, uint8_t status)
set the status 2
Definition driver_w25qxx.c:1062
+
w25qxx_global_block_lock
uint8_t w25qxx_global_block_lock(w25qxx_handle_t *handle)
lock the whole block
Definition driver_w25qxx.c:2284
+
w25qxx_enable_reset
uint8_t w25qxx_enable_reset(w25qxx_handle_t *handle)
enable the reset
Definition driver_w25qxx.c:2619
+
w25qxx_fast_read_quad_io
uint8_t w25qxx_fast_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad io in the fast mode
Definition driver_w25qxx.c:4184
+
w25qxx_disable_write
uint8_t w25qxx_disable_write(w25qxx_handle_t *handle)
disable writing
Definition driver_w25qxx.c:572
+
w25qxx_set_burst_with_wrap
uint8_t w25qxx_set_burst_with_wrap(w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
set the burst with wrap
Definition driver_w25qxx.c:6746
+
w25qxx_erase_program_suspend
uint8_t w25qxx_erase_program_suspend(w25qxx_handle_t *handle)
suspend erase or program
Definition driver_w25qxx.c:1650
+
w25qxx_fast_read_dual_io
uint8_t w25qxx_fast_read_dual_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual io in the fast mode
Definition driver_w25qxx.c:4076
+
w25qxx_status3_t
w25qxx_status3_t
w25qxx status 3 enumeration definition
Definition driver_w25qxx.h:186
+
w25qxx_word_read_quad_io
uint8_t w25qxx_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
word read with quad io
Definition driver_w25qxx.c:4350
+
w25qxx_set_status3
uint8_t w25qxx_set_status3(w25qxx_handle_t *handle, uint8_t status)
set the status 3
Definition driver_w25qxx.c:1261
+
w25qxx_enable_write
uint8_t w25qxx_enable_write(w25qxx_handle_t *handle)
enable writing
Definition driver_w25qxx.c:431
+
w25qxx_erase_security_register
uint8_t w25qxx_erase_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num)
erase the security register
Definition driver_w25qxx.c:2952
+
w25qxx_fast_read_quad_output
uint8_t w25qxx_fast_read_quad_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad output in the fast mode
Definition driver_w25qxx.c:3967
+
W25QXX_STATUS2_SECURITY_REGISTER_3_LOCK_BITS
@ W25QXX_STATUS2_SECURITY_REGISTER_3_LOCK_BITS
Definition driver_w25qxx.h:175
+
W25QXX_STATUS2_SECURITY_REGISTER_2_LOCK_BITS
@ W25QXX_STATUS2_SECURITY_REGISTER_2_LOCK_BITS
Definition driver_w25qxx.h:176
+
W25QXX_STATUS2_SUSPEND_STATUS
@ W25QXX_STATUS2_SUSPEND_STATUS
Definition driver_w25qxx.h:173
+
W25QXX_STATUS2_COMPLEMENT_PROTECT
@ W25QXX_STATUS2_COMPLEMENT_PROTECT
Definition driver_w25qxx.h:174
+
W25QXX_STATUS2_STATUS_REGISTER_PROTECT_1
@ W25QXX_STATUS2_STATUS_REGISTER_PROTECT_1
Definition driver_w25qxx.h:179
+
W25QXX_STATUS2_SECURITY_REGISTER_1_LOCK_BITS
@ W25QXX_STATUS2_SECURITY_REGISTER_1_LOCK_BITS
Definition driver_w25qxx.h:177
+
W25QXX_STATUS2_QUAD_ENABLE
@ W25QXX_STATUS2_QUAD_ENABLE
Definition driver_w25qxx.h:178
+
W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE
@ W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE
Definition driver_w25qxx.h:124
+
W25QXX_QSPI_READ_WRAP_LENGTH_64_BYTE
@ W25QXX_QSPI_READ_WRAP_LENGTH_64_BYTE
Definition driver_w25qxx.h:127
+
W25QXX_QSPI_READ_WRAP_LENGTH_32_BYTE
@ W25QXX_QSPI_READ_WRAP_LENGTH_32_BYTE
Definition driver_w25qxx.h:126
+
W25QXX_QSPI_READ_WRAP_LENGTH_16_BYTE
@ W25QXX_QSPI_READ_WRAP_LENGTH_16_BYTE
Definition driver_w25qxx.h:125
+
W25QXX_QSPI_READ_DUMMY_4_55MHZ
@ W25QXX_QSPI_READ_DUMMY_4_55MHZ
Definition driver_w25qxx.h:114
+
W25QXX_QSPI_READ_DUMMY_6_80MHZ
@ W25QXX_QSPI_READ_DUMMY_6_80MHZ
Definition driver_w25qxx.h:115
+
W25QXX_QSPI_READ_DUMMY_2_33MHZ
@ W25QXX_QSPI_READ_DUMMY_2_33MHZ
Definition driver_w25qxx.h:113
+
W25QXX_QSPI_READ_DUMMY_8_80MHZ
@ W25QXX_QSPI_READ_DUMMY_8_80MHZ
Definition driver_w25qxx.h:116
+
W25QXX_SECURITY_REGISTER_2
@ W25QXX_SECURITY_REGISTER_2
Definition driver_w25qxx.h:137
+
W25QXX_SECURITY_REGISTER_3
@ W25QXX_SECURITY_REGISTER_3
Definition driver_w25qxx.h:138
+
W25QXX_SECURITY_REGISTER_1
@ W25QXX_SECURITY_REGISTER_1
Definition driver_w25qxx.h:136
+
W25QXX_BURST_WRAP_64_BYTE
@ W25QXX_BURST_WRAP_64_BYTE
Definition driver_w25qxx.h:150
+
W25QXX_BURST_WRAP_8_BYTE
@ W25QXX_BURST_WRAP_8_BYTE
Definition driver_w25qxx.h:147
+
W25QXX_BURST_WRAP_32_BYTE
@ W25QXX_BURST_WRAP_32_BYTE
Definition driver_w25qxx.h:149
+
W25QXX_BURST_WRAP_NONE
@ W25QXX_BURST_WRAP_NONE
Definition driver_w25qxx.h:146
+
W25QXX_BURST_WRAP_16_BYTE
@ W25QXX_BURST_WRAP_16_BYTE
Definition driver_w25qxx.h:148
+
W25QXX_STATUS1_STATUS_REGISTER_PROTECT_0
@ W25QXX_STATUS1_STATUS_REGISTER_PROTECT_0
Definition driver_w25qxx.h:158
+
W25QXX_STATUS1_WRITE_ENABLE_LATCH
@ W25QXX_STATUS1_WRITE_ENABLE_LATCH
Definition driver_w25qxx.h:164
+
W25QXX_STATUS1_BLOCK_PROTECT_1
@ W25QXX_STATUS1_BLOCK_PROTECT_1
Definition driver_w25qxx.h:162
+
W25QXX_STATUS1_TOP_BOTTOM_PROTECT_OR_BLOCK_PROTECT_3
@ W25QXX_STATUS1_TOP_BOTTOM_PROTECT_OR_BLOCK_PROTECT_3
Definition driver_w25qxx.h:160
+
W25QXX_STATUS1_BLOCK_PROTECT_0
@ W25QXX_STATUS1_BLOCK_PROTECT_0
Definition driver_w25qxx.h:163
+
W25QXX_STATUS1_SECTOR_PROTECT_OR_TOP_BOTTOM_PROTECT
@ W25QXX_STATUS1_SECTOR_PROTECT_OR_TOP_BOTTOM_PROTECT
Definition driver_w25qxx.h:159
+
W25QXX_STATUS1_BLOCK_PROTECT_2
@ W25QXX_STATUS1_BLOCK_PROTECT_2
Definition driver_w25qxx.h:161
+
W25QXX_STATUS1_ERASE_WRITE_PROGRESS
@ W25QXX_STATUS1_ERASE_WRITE_PROGRESS
Definition driver_w25qxx.h:165
+
W25QXX_STATUS3_CURRENT_ADDRESS_MODE
@ W25QXX_STATUS3_CURRENT_ADDRESS_MODE
Definition driver_w25qxx.h:194
+
W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_75_PERCENTAGE
@ W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_75_PERCENTAGE
Definition driver_w25qxx.h:189
+
W25QXX_STATUS3_WRITE_PROTECT_SELECTION
@ W25QXX_STATUS3_WRITE_PROTECT_SELECTION
Definition driver_w25qxx.h:192
+
W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_50_PERCENTAGE
@ W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_50_PERCENTAGE
Definition driver_w25qxx.h:190
+
W25QXX_STATUS3_HOLD_RESET_FUNCTION
@ W25QXX_STATUS3_HOLD_RESET_FUNCTION
Definition driver_w25qxx.h:187
+
W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_100_PERCENTAGE
@ W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_100_PERCENTAGE
Definition driver_w25qxx.h:188
+
W25QXX_STATUS3_POWER_UP_ADDRESS_MODE
@ W25QXX_STATUS3_POWER_UP_ADDRESS_MODE
Definition driver_w25qxx.h:193
+
W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_25_PERCENTAGE
@ W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_25_PERCENTAGE
Definition driver_w25qxx.h:191
+
w25qxx_chip_erase
uint8_t w25qxx_chip_erase(w25qxx_handle_t *handle)
erase the chip
Definition driver_w25qxx.c:1459
+
w25qxx_release_power_down
uint8_t w25qxx_release_power_down(w25qxx_handle_t *handle)
release power down
Definition driver_w25qxx.c:1875
+
w25qxx_only_spi_read
uint8_t w25qxx_only_spi_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read only in the spi interface
Definition driver_w25qxx.c:3465
+
w25qxx_block_erase_32k
uint8_t w25qxx_block_erase_32k(w25qxx_handle_t *handle, uint32_t addr)
erase the 32k block
Definition driver_w25qxx.c:5419
+
w25qxx_get_address_mode
uint8_t w25qxx_get_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t *mode)
get the chip address mode
Definition driver_w25qxx.c:405
+
w25qxx_set_interface
uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface)
set the chip interface
Definition driver_w25qxx.c:259
w25qxx_handle_t
struct w25qxx_handle_s w25qxx_handle_t
w25qxx handle structure definition
w25qxx_info_t
struct w25qxx_info_s w25qxx_info_t
w25qxx information structure definition
-
w25qxx_page_program
uint8_t w25qxx_page_program(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
page program
Definition: driver_w25qxx.c:4569
-
w25qxx_set_dual_quad_spi
uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable)
enable or disable the dual quad spi
Definition: driver_w25qxx.c:175
-
w25qxx_get_type
uint8_t w25qxx_get_type(w25qxx_handle_t *handle, w25qxx_type_t *type)
get the chip type
Definition: driver_w25qxx.c:238
-
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition: driver_w25qxx.h:63
-
w25qxx_get_interface
uint8_t w25qxx_get_interface(w25qxx_handle_t *handle, w25qxx_interface_t *interface)
get the chip interface
Definition: driver_w25qxx.c:280
-
w25qxx_init
uint8_t w25qxx_init(w25qxx_handle_t *handle)
initialize the chip
Definition: driver_w25qxx.c:6819
-
w25qxx_get_manufacturer_device_id
uint8_t w25qxx_get_manufacturer_device_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information
Definition: driver_w25qxx.c:1952
-
w25qxx_info
uint8_t w25qxx_info(w25qxx_info_t *info)
get chip's information
Definition: driver_w25qxx.c:8566
-
w25qxx_sector_erase_4k
uint8_t w25qxx_sector_erase_4k(w25qxx_handle_t *handle, uint32_t addr)
erase the 4k sector
Definition: driver_w25qxx.c:5080
-
w25qxx_deinit
uint8_t w25qxx_deinit(w25qxx_handle_t *handle)
close the chip
Definition: driver_w25qxx.c:7195
-
w25qxx_address_mode_t
w25qxx_address_mode_t
w25qxx address mode enumeration definition
Definition: driver_w25qxx.h:94
-
w25qxx_set_type
uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type)
set the chip type
Definition: driver_w25qxx.c:217
-
w25qxx_write
uint8_t w25qxx_write(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
write data
Definition: driver_w25qxx.c:8415
-
w25qxx_fast_read
uint8_t w25qxx_fast_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read in the fast mode
Definition: driver_w25qxx.c:3634
-
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition: driver_w25qxx.h:76
-
w25qxx_set_address_mode
uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
set the chip address mode
Definition: driver_w25qxx.c:304
-
w25qxx_get_dual_quad_spi
uint8_t w25qxx_get_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t *enable)
get the dual quad spi status
Definition: driver_w25qxx.c:196
-
w25qxx_power_down
uint8_t w25qxx_power_down(w25qxx_handle_t *handle)
power down
Definition: driver_w25qxx.c:1792
-
w25qxx_read
uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read data
Definition: driver_w25qxx.c:7289
-
w25qxx_block_erase_64k
uint8_t w25qxx_block_erase_64k(w25qxx_handle_t *handle, uint32_t addr)
erase the 64k block
Definition: driver_w25qxx.c:5758
-
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition: driver_w25qxx.h:85
-
W25Q80
@ W25Q80
Definition: driver_w25qxx.h:64
-
W25Q64
@ W25Q64
Definition: driver_w25qxx.h:67
-
W25Q32
@ W25Q32
Definition: driver_w25qxx.h:66
-
W25Q16
@ W25Q16
Definition: driver_w25qxx.h:65
-
W25Q128
@ W25Q128
Definition: driver_w25qxx.h:68
-
W25Q256
@ W25Q256
Definition: driver_w25qxx.h:69
-
W25QXX_ADDRESS_MODE_3_BYTE
@ W25QXX_ADDRESS_MODE_3_BYTE
Definition: driver_w25qxx.h:95
-
W25QXX_ADDRESS_MODE_4_BYTE
@ W25QXX_ADDRESS_MODE_4_BYTE
Definition: driver_w25qxx.h:96
-
W25QXX_INTERFACE_QSPI
@ W25QXX_INTERFACE_QSPI
Definition: driver_w25qxx.h:78
-
W25QXX_INTERFACE_SPI
@ W25QXX_INTERFACE_SPI
Definition: driver_w25qxx.h:77
-
W25QXX_BOOL_FALSE
@ W25QXX_BOOL_FALSE
Definition: driver_w25qxx.h:86
-
W25QXX_BOOL_TRUE
@ W25QXX_BOOL_TRUE
Definition: driver_w25qxx.h:87
-
w25qxx_write_read_reg
uint8_t w25qxx_write_read_reg(w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
write and read register
Definition: driver_w25qxx.c:8535
-
w25qxx_handle_s
w25qxx handle structure definition
Definition: driver_w25qxx.h:210
-
w25qxx_handle_s::inited
uint8_t inited
Definition: driver_w25qxx.h:221
-
w25qxx_handle_s::buf
uint8_t buf[256+6]
Definition: driver_w25qxx.h:228
-
w25qxx_handle_s::spi_qspi_write_read
uint8_t(* spi_qspi_write_read)(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
Definition: driver_w25qxx.h:213
-
w25qxx_handle_s::param
uint8_t param
Definition: driver_w25qxx.h:224
-
w25qxx_handle_s::delay_ms
void(* delay_ms)(uint32_t ms)
Definition: driver_w25qxx.h:218
-
w25qxx_handle_s::spi_qspi_deinit
uint8_t(* spi_qspi_deinit)(void)
Definition: driver_w25qxx.h:212
-
w25qxx_handle_s::address_mode
uint8_t address_mode
Definition: driver_w25qxx.h:223
-
w25qxx_handle_s::debug_print
void(* debug_print)(const char *const fmt,...)
Definition: driver_w25qxx.h:220
-
w25qxx_handle_s::delay_us
void(* delay_us)(uint32_t us)
Definition: driver_w25qxx.h:219
-
w25qxx_handle_s::spi_qspi
uint8_t spi_qspi
Definition: driver_w25qxx.h:227
-
w25qxx_handle_s::dual_quad_spi_enable
uint8_t dual_quad_spi_enable
Definition: driver_w25qxx.h:226
-
w25qxx_handle_s::buf_4k
uint8_t buf_4k[4096+1]
Definition: driver_w25qxx.h:229
-
w25qxx_handle_s::type
uint16_t type
Definition: driver_w25qxx.h:222
-
w25qxx_handle_s::spi_qspi_init
uint8_t(* spi_qspi_init)(void)
Definition: driver_w25qxx.h:211
-
w25qxx_handle_s::dummy
uint8_t dummy
Definition: driver_w25qxx.h:225
-
w25qxx_info_s
w25qxx information structure definition
Definition: driver_w25qxx.h:236
-
w25qxx_info_s::temperature_max
float temperature_max
Definition: driver_w25qxx.h:244
-
w25qxx_info_s::supply_voltage_max_v
float supply_voltage_max_v
Definition: driver_w25qxx.h:241
-
w25qxx_info_s::driver_version
uint32_t driver_version
Definition: driver_w25qxx.h:245
-
w25qxx_info_s::interface
char interface[16]
Definition: driver_w25qxx.h:239
-
w25qxx_info_s::temperature_min
float temperature_min
Definition: driver_w25qxx.h:243
-
w25qxx_info_s::max_current_ma
float max_current_ma
Definition: driver_w25qxx.h:242
-
w25qxx_info_s::manufacturer_name
char manufacturer_name[32]
Definition: driver_w25qxx.h:238
-
w25qxx_info_s::supply_voltage_min_v
float supply_voltage_min_v
Definition: driver_w25qxx.h:240
-
w25qxx_info_s::chip_name
char chip_name[32]
Definition: driver_w25qxx.h:237
+
w25qxx_page_program
uint8_t w25qxx_page_program(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
page program
Definition driver_w25qxx.c:4569
+
w25qxx_set_dual_quad_spi
uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable)
enable or disable the dual quad spi
Definition driver_w25qxx.c:175
+
w25qxx_get_type
uint8_t w25qxx_get_type(w25qxx_handle_t *handle, w25qxx_type_t *type)
get the chip type
Definition driver_w25qxx.c:238
+
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition driver_w25qxx.h:63
+
w25qxx_get_interface
uint8_t w25qxx_get_interface(w25qxx_handle_t *handle, w25qxx_interface_t *interface)
get the chip interface
Definition driver_w25qxx.c:280
+
w25qxx_init
uint8_t w25qxx_init(w25qxx_handle_t *handle)
initialize the chip
Definition driver_w25qxx.c:6819
+
w25qxx_get_manufacturer_device_id
uint8_t w25qxx_get_manufacturer_device_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information
Definition driver_w25qxx.c:1952
+
w25qxx_info
uint8_t w25qxx_info(w25qxx_info_t *info)
get chip's information
Definition driver_w25qxx.c:8566
+
w25qxx_sector_erase_4k
uint8_t w25qxx_sector_erase_4k(w25qxx_handle_t *handle, uint32_t addr)
erase the 4k sector
Definition driver_w25qxx.c:5080
+
w25qxx_deinit
uint8_t w25qxx_deinit(w25qxx_handle_t *handle)
close the chip
Definition driver_w25qxx.c:7195
+
w25qxx_address_mode_t
w25qxx_address_mode_t
w25qxx address mode enumeration definition
Definition driver_w25qxx.h:94
+
w25qxx_set_type
uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type)
set the chip type
Definition driver_w25qxx.c:217
+
w25qxx_write
uint8_t w25qxx_write(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
write data
Definition driver_w25qxx.c:8415
+
w25qxx_fast_read
uint8_t w25qxx_fast_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read in the fast mode
Definition driver_w25qxx.c:3634
+
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition driver_w25qxx.h:76
+
w25qxx_set_address_mode
uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
set the chip address mode
Definition driver_w25qxx.c:304
+
w25qxx_get_dual_quad_spi
uint8_t w25qxx_get_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t *enable)
get the dual quad spi status
Definition driver_w25qxx.c:196
+
w25qxx_power_down
uint8_t w25qxx_power_down(w25qxx_handle_t *handle)
power down
Definition driver_w25qxx.c:1792
+
w25qxx_read
uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read data
Definition driver_w25qxx.c:7289
+
w25qxx_block_erase_64k
uint8_t w25qxx_block_erase_64k(w25qxx_handle_t *handle, uint32_t addr)
erase the 64k block
Definition driver_w25qxx.c:5758
+
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition driver_w25qxx.h:85
+
W25Q80
@ W25Q80
Definition driver_w25qxx.h:64
+
W25Q64
@ W25Q64
Definition driver_w25qxx.h:67
+
W25Q32
@ W25Q32
Definition driver_w25qxx.h:66
+
W25Q16
@ W25Q16
Definition driver_w25qxx.h:65
+
W25Q128
@ W25Q128
Definition driver_w25qxx.h:68
+
W25Q256
@ W25Q256
Definition driver_w25qxx.h:69
+
W25QXX_ADDRESS_MODE_3_BYTE
@ W25QXX_ADDRESS_MODE_3_BYTE
Definition driver_w25qxx.h:95
+
W25QXX_ADDRESS_MODE_4_BYTE
@ W25QXX_ADDRESS_MODE_4_BYTE
Definition driver_w25qxx.h:96
+
W25QXX_INTERFACE_QSPI
@ W25QXX_INTERFACE_QSPI
Definition driver_w25qxx.h:78
+
W25QXX_INTERFACE_SPI
@ W25QXX_INTERFACE_SPI
Definition driver_w25qxx.h:77
+
W25QXX_BOOL_FALSE
@ W25QXX_BOOL_FALSE
Definition driver_w25qxx.h:86
+
W25QXX_BOOL_TRUE
@ W25QXX_BOOL_TRUE
Definition driver_w25qxx.h:87
+
w25qxx_write_read_reg
uint8_t w25qxx_write_read_reg(w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
write and read register
Definition driver_w25qxx.c:8535
+
w25qxx_handle_s
w25qxx handle structure definition
Definition driver_w25qxx.h:210
+
w25qxx_handle_s::inited
uint8_t inited
Definition driver_w25qxx.h:221
+
w25qxx_handle_s::buf
uint8_t buf[256+6]
Definition driver_w25qxx.h:228
+
w25qxx_handle_s::spi_qspi_write_read
uint8_t(* spi_qspi_write_read)(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
Definition driver_w25qxx.h:213
+
w25qxx_handle_s::param
uint8_t param
Definition driver_w25qxx.h:224
+
w25qxx_handle_s::delay_ms
void(* delay_ms)(uint32_t ms)
Definition driver_w25qxx.h:218
+
w25qxx_handle_s::spi_qspi_deinit
uint8_t(* spi_qspi_deinit)(void)
Definition driver_w25qxx.h:212
+
w25qxx_handle_s::address_mode
uint8_t address_mode
Definition driver_w25qxx.h:223
+
w25qxx_handle_s::debug_print
void(* debug_print)(const char *const fmt,...)
Definition driver_w25qxx.h:220
+
w25qxx_handle_s::delay_us
void(* delay_us)(uint32_t us)
Definition driver_w25qxx.h:219
+
w25qxx_handle_s::spi_qspi
uint8_t spi_qspi
Definition driver_w25qxx.h:227
+
w25qxx_handle_s::dual_quad_spi_enable
uint8_t dual_quad_spi_enable
Definition driver_w25qxx.h:226
+
w25qxx_handle_s::buf_4k
uint8_t buf_4k[4096+1]
Definition driver_w25qxx.h:229
+
w25qxx_handle_s::type
uint16_t type
Definition driver_w25qxx.h:222
+
w25qxx_handle_s::spi_qspi_init
uint8_t(* spi_qspi_init)(void)
Definition driver_w25qxx.h:211
+
w25qxx_handle_s::dummy
uint8_t dummy
Definition driver_w25qxx.h:225
+
w25qxx_info_s
w25qxx information structure definition
Definition driver_w25qxx.h:236
+
w25qxx_info_s::temperature_max
float temperature_max
Definition driver_w25qxx.h:244
+
w25qxx_info_s::supply_voltage_max_v
float supply_voltage_max_v
Definition driver_w25qxx.h:241
+
w25qxx_info_s::driver_version
uint32_t driver_version
Definition driver_w25qxx.h:245
+
w25qxx_info_s::interface
char interface[16]
Definition driver_w25qxx.h:239
+
w25qxx_info_s::temperature_min
float temperature_min
Definition driver_w25qxx.h:243
+
w25qxx_info_s::max_current_ma
float max_current_ma
Definition driver_w25qxx.h:242
+
w25qxx_info_s::manufacturer_name
char manufacturer_name[32]
Definition driver_w25qxx.h:238
+
w25qxx_info_s::supply_voltage_min_v
float supply_voltage_min_v
Definition driver_w25qxx.h:240
+
w25qxx_info_s::chip_name
char chip_name[32]
Definition driver_w25qxx.h:237
diff --git a/doc/html/driver__w25qxx__advance_8c.html b/doc/html/driver__w25qxx__advance_8c.html index f3e6536..f997ab0 100644 --- a/doc/html/driver__w25qxx__advance_8c.html +++ b/doc/html/driver__w25qxx__advance_8c.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: example/driver_w25qxx_advance.c File Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +

@@ -64,7 +64,7 @@
@@ -78,16 +78,22 @@
- +
+
+
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+
Loading...
+
Searching...
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Functions
-
-
driver_w25qxx_advance.c File Reference
+
driver_w25qxx_advance.c File Reference
@@ -97,133 +103,133 @@

Go to the source code of this file.

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+

Functions

uint8_t w25qxx_advance_init (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 advance example init More...
uint8_t w25qxx_advance_init (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 advance example init
 
uint8_t w25qxx_advance_deinit (void)
 advance example deinit More...
uint8_t w25qxx_advance_deinit (void)
 advance example deinit
 
uint8_t w25qxx_advance_write (uint32_t addr, uint8_t *data, uint32_t len)
 advance example write More...
uint8_t w25qxx_advance_write (uint32_t addr, uint8_t *data, uint32_t len)
 advance example write
 
uint8_t w25qxx_advance_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read More...
uint8_t w25qxx_advance_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read
 
uint8_t w25qxx_advance_power_down (void)
 advance example power down More...
uint8_t w25qxx_advance_power_down (void)
 advance example power down
 
uint8_t w25qxx_advance_wake_up (void)
 advance example wake up More...
uint8_t w25qxx_advance_wake_up (void)
 advance example wake up
 
uint8_t w25qxx_advance_chip_erase (void)
 advance example chip erase More...
uint8_t w25qxx_advance_chip_erase (void)
 advance example chip erase
 
uint8_t w25qxx_advance_get_id (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information More...
uint8_t w25qxx_advance_get_id (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information
 
uint8_t w25qxx_advance_page_program (uint32_t addr, uint8_t *data, uint16_t len)
 advance example page program More...
uint8_t w25qxx_advance_page_program (uint32_t addr, uint8_t *data, uint16_t len)
 advance example page program
 
uint8_t w25qxx_advance_sector_erase_4k (uint32_t addr)
 advance example erase the 4k sector More...
uint8_t w25qxx_advance_sector_erase_4k (uint32_t addr)
 advance example erase the 4k sector
 
uint8_t w25qxx_advance_block_erase_32k (uint32_t addr)
 advance example erase the 32k block More...
uint8_t w25qxx_advance_block_erase_32k (uint32_t addr)
 advance example erase the 32k block
 
uint8_t w25qxx_advance_block_erase_64k (uint32_t addr)
 advance example erase the 64k block More...
uint8_t w25qxx_advance_block_erase_64k (uint32_t addr)
 advance example erase the 64k block
 
uint8_t w25qxx_advance_fast_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read in the fast mode More...
uint8_t w25qxx_advance_fast_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read in the fast mode
 
uint8_t w25qxx_advance_only_spi_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read only in the spi interface More...
uint8_t w25qxx_advance_only_spi_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read only in the spi interface
 
uint8_t w25qxx_advance_only_spi_fast_read_dual_output (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi dual output interface More...
uint8_t w25qxx_advance_only_spi_fast_read_dual_output (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi dual output interface
 
uint8_t w25qxx_advance_only_spi_fast_read_quad_output (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi quad output interface More...
uint8_t w25qxx_advance_only_spi_fast_read_quad_output (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi quad output interface
 
uint8_t w25qxx_advance_only_spi_fast_read_dual_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi dual io interface More...
uint8_t w25qxx_advance_only_spi_fast_read_dual_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi dual io interface
 
uint8_t w25qxx_advance_only_spi_fast_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi quad io interface More...
uint8_t w25qxx_advance_only_spi_fast_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi quad io interface
 
uint8_t w25qxx_advance_only_spi_word_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example word read only in the spi quad io interface More...
uint8_t w25qxx_advance_only_spi_word_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example word read only in the spi quad io interface
 
uint8_t w25qxx_advance_only_spi_octal_word_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example octal word read only in the spi quad io interface More...
uint8_t w25qxx_advance_only_spi_octal_word_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example octal word read only in the spi quad io interface
 
uint8_t w25qxx_advance_only_spi_page_program_quad_input (uint32_t addr, uint8_t *data, uint16_t len)
 advance example quad page program only in the spi quad input interface More...
uint8_t w25qxx_advance_only_spi_page_program_quad_input (uint32_t addr, uint8_t *data, uint16_t len)
 advance example quad page program only in the spi quad input interface
 
uint8_t w25qxx_advance_get_status1 (uint8_t *status)
 advance example get the status 1 More...
uint8_t w25qxx_advance_get_status1 (uint8_t *status)
 advance example get the status 1
 
uint8_t w25qxx_advance_get_status2 (uint8_t *status)
 advance example get the status 2 More...
uint8_t w25qxx_advance_get_status2 (uint8_t *status)
 advance example get the status 2
 
uint8_t w25qxx_advance_get_status3 (uint8_t *status)
 advance example get the status 3 More...
uint8_t w25qxx_advance_get_status3 (uint8_t *status)
 advance example get the status 3
 
uint8_t w25qxx_advance_set_status1 (uint8_t status)
 advance example set the status 1 More...
uint8_t w25qxx_advance_set_status1 (uint8_t status)
 advance example set the status 1
 
uint8_t w25qxx_advance_set_status2 (uint8_t status)
 advance example set the status 2 More...
uint8_t w25qxx_advance_set_status2 (uint8_t status)
 advance example set the status 2
 
uint8_t w25qxx_advance_set_status3 (uint8_t status)
 advance example set the status 3 More...
uint8_t w25qxx_advance_set_status3 (uint8_t status)
 advance example set the status 3
 
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information only in the spi dual io interface More...
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information only in the spi dual io interface
 
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information only in the spi quad io interface More...
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information only in the spi quad io interface
 
uint8_t w25qxx_advance_get_get_jedec_id (uint8_t *manufacturer, uint8_t device_id[2])
 advance example get the jedec id information More...
uint8_t w25qxx_advance_get_get_jedec_id (uint8_t *manufacturer, uint8_t device_id[2])
 advance example get the jedec id information
 
uint8_t w25qxx_advance_global_block_lock (void)
 advance example global block lock More...
uint8_t w25qxx_advance_global_block_lock (void)
 advance example global block lock
 
uint8_t w25qxx_advance_global_block_unlock (void)
 advance example global block unlock More...
uint8_t w25qxx_advance_global_block_unlock (void)
 advance example global block unlock
 
uint8_t w25qxx_advance_individual_block_lock (uint32_t addr)
 advance example lock the individual block More...
uint8_t w25qxx_advance_individual_block_lock (uint32_t addr)
 advance example lock the individual block
 
uint8_t w25qxx_advance_individual_block_unlock (uint32_t addr)
 advance example unlock the individual block More...
uint8_t w25qxx_advance_individual_block_unlock (uint32_t addr)
 advance example unlock the individual block
 
uint8_t w25qxx_advance_read_block_lock (uint32_t addr, uint8_t *value)
 advance example read the block lock More...
uint8_t w25qxx_advance_read_block_lock (uint32_t addr, uint8_t *value)
 advance example read the block lock
 
uint8_t w25qxx_advance_reset (void)
 advance example reset More...
uint8_t w25qxx_advance_reset (void)
 advance example reset
 
uint8_t w25qxx_advance_only_qspi_set_read_parameters (w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
 advance example set the read parameters only in the qspi interface More...
uint8_t w25qxx_advance_only_qspi_set_read_parameters (w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
 advance example set the read parameters only in the qspi interface
 
uint8_t w25qxx_advance_only_spi_get_unique_id (uint8_t id[8])
 advance example get the unique id only in the spi interface More...
uint8_t w25qxx_advance_only_spi_get_unique_id (uint8_t id[8])
 advance example get the unique id only in the spi interface
 
uint8_t w25qxx_advance_only_spi_get_sfdp (uint8_t sfdp[256])
 advance example get the sfdp only in the spi interface More...
uint8_t w25qxx_advance_only_spi_get_sfdp (uint8_t sfdp[256])
 advance example get the sfdp only in the spi interface
 
uint8_t w25qxx_advance_only_spi_write_security_register (w25qxx_security_register_t num, uint8_t data[256])
 advance example write the security register only in the spi interface More...
uint8_t w25qxx_advance_only_spi_write_security_register (w25qxx_security_register_t num, uint8_t data[256])
 advance example write the security register only in the spi interface
 
uint8_t w25qxx_advance_only_spi_read_security_register (w25qxx_security_register_t num, uint8_t data[256])
 advance example read the security register only in the spi interface More...
uint8_t w25qxx_advance_only_spi_read_security_register (w25qxx_security_register_t num, uint8_t data[256])
 advance example read the security register only in the spi interface
 
uint8_t w25qxx_advance_only_spi_set_burst_with_wrap (w25qxx_burst_wrap_t wrap)
 advance example set the burst with wrap only in the spi interface More...
uint8_t w25qxx_advance_only_spi_set_burst_with_wrap (w25qxx_burst_wrap_t wrap)
 advance example set the burst with wrap only in the spi interface
 

Detailed Description

@@ -251,7 +257,7 @@

history

diff --git a/doc/html/driver__w25qxx__advance_8c_source.html b/doc/html/driver__w25qxx__advance_8c_source.html index e177ed2..448f091 100644 --- a/doc/html/driver__w25qxx__advance_8c_source.html +++ b/doc/html/driver__w25qxx__advance_8c_source.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: example/driver_w25qxx_advance.c Source File @@ -23,11 +23,10 @@
- + - @@ -36,22 +35,28 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ + +

@@ -78,707 +83,797 @@
- +
+
+
+
+
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+
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+
+
-
-
driver_w25qxx_advance.c
+
driver_w25qxx_advance.c
-Go to the documentation of this file.
1 
-
37 #include "driver_w25qxx_advance.h"
-
38 
-
39 static w25qxx_handle_t gs_handle;
-
51 uint8_t w25qxx_advance_init(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
-
52 {
-
53  uint8_t res;
-
54 
-
55  /* link interface function */
-
56  DRIVER_W25QXX_LINK_INIT(&gs_handle, w25qxx_handle_t);
-
57  DRIVER_W25QXX_LINK_SPI_QSPI_INIT(&gs_handle, w25qxx_interface_spi_qspi_init);
-
58  DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(&gs_handle, w25qxx_interface_spi_qspi_deinit);
-
59  DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(&gs_handle, w25qxx_interface_spi_qspi_write_read);
-
60  DRIVER_W25QXX_LINK_DELAY_MS(&gs_handle, w25qxx_interface_delay_ms);
-
61  DRIVER_W25QXX_LINK_DELAY_US(&gs_handle, w25qxx_interface_delay_us);
-
62  DRIVER_W25QXX_LINK_DEBUG_PRINT(&gs_handle, w25qxx_interface_debug_print);
-
63 
-
64  /* set chip type */
-
65  res = w25qxx_set_type(&gs_handle, type);
-
66  if (res != 0)
-
67  {
-
68  w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
69 
-
70  return 1;
-
71  }
-
72 
-
73  /* set chip interface */
-
74  res = w25qxx_set_interface(&gs_handle, interface);
-
75  if (res != 0)
-
76  {
-
77  w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
-
78 
-
79  return 1;
-
80  }
-
81 
-
82  /* set dual quad spi */
-
83  res = w25qxx_set_dual_quad_spi(&gs_handle, dual_quad_spi_enable);
-
84  if (res != 0)
-
85  {
-
86  w25qxx_interface_debug_print("w25qxx: set dual quad spi failed.\n");
-
87  (void)w25qxx_deinit(&gs_handle);
-
88 
-
89  return 1;
-
90  }
-
91 
-
92  /* chip init */
-
93  res = w25qxx_init(&gs_handle);
-
94  if (res != 0)
-
95  {
-
96  w25qxx_interface_debug_print("w25qxx: init failed.\n");
-
97 
-
98  return 1;
-
99  }
-
100  else
-
101  {
-
102  if (type >= W25Q256)
-
103  {
-
104  res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
-
105  if (res != 0)
-
106  {
-
107  w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
108  (void)w25qxx_deinit(&gs_handle);
-
109 
-
110  return 1;
-
111  }
-
112  }
-
113 
-
114  return 0;
-
115  }
-
116 }
-
117 
-
125 uint8_t w25qxx_advance_deinit(void)
-
126 {
-
127  if (w25qxx_deinit(&gs_handle) != 0)
-
128  {
-
129  return 1;
-
130  }
-
131  else
-
132  {
-
133  return 0;
-
134  }
-
135 }
-
136 
-
147 uint8_t w25qxx_advance_write(uint32_t addr, uint8_t *data, uint32_t len)
-
148 {
-
149  if (w25qxx_write(&gs_handle, addr, data, len) != 0)
-
150  {
-
151  return 1;
-
152  }
-
153  else
-
154  {
-
155  return 0;
-
156  }
-
157 }
-
158 
-
169 uint8_t w25qxx_advance_read(uint32_t addr, uint8_t *data, uint32_t len)
-
170 {
-
171  if (w25qxx_read(&gs_handle, addr, data, len) != 0)
-
172  {
-
173  return 1;
-
174  }
-
175  else
-
176  {
-
177  return 0;
-
178  }
-
179 }
-
180 
-
188 uint8_t w25qxx_advance_power_down(void)
-
189 {
-
190  if (w25qxx_power_down(&gs_handle) != 0)
-
191  {
-
192  return 1;
-
193  }
-
194  else
-
195  {
-
196  return 0;
-
197  }
-
198 }
-
199 
-
207 uint8_t w25qxx_advance_wake_up(void)
-
208 {
-
209  if (w25qxx_release_power_down(&gs_handle) != 0)
-
210  {
-
211  return 1;
-
212  }
-
213  else
-
214  {
-
215  return 0;
-
216  }
-
217 }
-
218 
-
226 uint8_t w25qxx_advance_chip_erase(void)
-
227 {
-
228  if (w25qxx_chip_erase(&gs_handle) != 0)
-
229  {
-
230  return 1;
-
231  }
-
232  else
-
233  {
-
234  return 0;
-
235  }
-
236 }
-
237 
-
247 uint8_t w25qxx_advance_get_id(uint8_t *manufacturer, uint8_t *device_id)
-
248 {
-
249  if (w25qxx_get_manufacturer_device_id(&gs_handle, manufacturer, device_id) != 0)
-
250  {
-
251  return 1;
-
252  }
-
253  else
-
254  {
-
255  return 0;
-
256  }
-
257 }
-
258 
-
269 uint8_t w25qxx_advance_page_program(uint32_t addr, uint8_t *data, uint16_t len)
-
270 {
-
271  if (w25qxx_page_program(&gs_handle, addr, data, len) != 0)
-
272  {
-
273  return 1;
-
274  }
-
275  else
-
276  {
-
277  return 0;
-
278  }
-
279 }
-
280 
-
289 uint8_t w25qxx_advance_sector_erase_4k(uint32_t addr)
-
290 {
-
291  if (w25qxx_sector_erase_4k(&gs_handle, addr) != 0)
-
292  {
-
293  return 1;
-
294  }
-
295  else
-
296  {
-
297  return 0;
-
298  }
-
299 }
-
300 
-
309 uint8_t w25qxx_advance_block_erase_32k(uint32_t addr)
-
310 {
-
311  if (w25qxx_block_erase_32k(&gs_handle, addr) != 0)
-
312  {
-
313  return 1;
-
314  }
-
315  else
-
316  {
-
317  return 0;
-
318  }
-
319 }
-
320 
-
329 uint8_t w25qxx_advance_block_erase_64k(uint32_t addr)
-
330 {
-
331  if (w25qxx_block_erase_64k(&gs_handle, addr) != 0)
-
332  {
-
333  return 1;
-
334  }
-
335  else
-
336  {
-
337  return 0;
-
338  }
-
339 }
-
340 
-
351 uint8_t w25qxx_advance_fast_read(uint32_t addr, uint8_t *data, uint32_t len)
-
352 {
-
353  if (w25qxx_fast_read(&gs_handle, addr, data, len) != 0)
-
354  {
-
355  return 1;
-
356  }
-
357  else
-
358  {
-
359  return 0;
-
360  }
-
361 }
-
362 
-
373 uint8_t w25qxx_advance_only_spi_read(uint32_t addr, uint8_t *data, uint32_t len)
-
374 {
-
375  if (w25qxx_only_spi_read(&gs_handle, addr, data, len) != 0)
-
376  {
-
377  return 1;
-
378  }
-
379  else
-
380  {
-
381  return 0;
-
382  }
-
383 }
-
384 
-
395 uint8_t w25qxx_advance_only_spi_fast_read_dual_output(uint32_t addr, uint8_t *data, uint32_t len)
-
396 {
-
397  if (w25qxx_fast_read_dual_output(&gs_handle, addr, data, len) != 0)
-
398  {
-
399  return 1;
-
400  }
-
401  else
-
402  {
-
403  return 0;
-
404  }
-
405 }
-
406 
-
417 uint8_t w25qxx_advance_only_spi_fast_read_quad_output(uint32_t addr, uint8_t *data, uint32_t len)
-
418 {
-
419  if (w25qxx_fast_read_quad_output(&gs_handle, addr, data, len) != 0)
-
420  {
-
421  return 1;
-
422  }
-
423  else
-
424  {
-
425  return 0;
-
426  }
-
427 }
-
428 
-
439 uint8_t w25qxx_advance_only_spi_fast_read_dual_io(uint32_t addr, uint8_t *data, uint32_t len)
-
440 {
-
441  if (w25qxx_fast_read_dual_io(&gs_handle, addr, data, len) != 0)
-
442  {
-
443  return 1;
-
444  }
-
445  else
-
446  {
-
447  return 0;
-
448  }
-
449 }
-
450 
-
461 uint8_t w25qxx_advance_only_spi_fast_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
-
462 {
-
463  if (w25qxx_fast_read_quad_io(&gs_handle, addr, data, len) != 0)
-
464  {
-
465  return 1;
-
466  }
-
467  else
-
468  {
-
469  return 0;
-
470  }
-
471 }
-
472 
-
483 uint8_t w25qxx_advance_only_spi_word_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
-
484 {
-
485  if (w25qxx_word_read_quad_io(&gs_handle, addr, data, len) != 0)
-
486  {
-
487  return 1;
-
488  }
-
489  else
-
490  {
-
491  return 0;
-
492  }
-
493 }
-
494 
-
505 uint8_t w25qxx_advance_only_spi_octal_word_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
-
506 {
-
507  if (w25qxx_octal_word_read_quad_io(&gs_handle, addr, data, len) != 0)
-
508  {
-
509  return 1;
-
510  }
-
511  else
-
512  {
-
513  return 0;
-
514  }
-
515 }
-
516 
-
527 uint8_t w25qxx_advance_only_spi_page_program_quad_input(uint32_t addr, uint8_t *data, uint16_t len)
-
528 {
-
529  if (w25qxx_page_program_quad_input(&gs_handle, addr, data, len) != 0)
-
530  {
-
531  return 1;
-
532  }
-
533  else
-
534  {
-
535  return 0;
-
536  }
-
537 }
-
538 
-
547 uint8_t w25qxx_advance_get_status1(uint8_t *status)
-
548 {
-
549  if (w25qxx_get_status1(&gs_handle, status) != 0)
-
550  {
-
551  return 1;
-
552  }
-
553  else
-
554  {
-
555  return 0;
-
556  }
-
557 }
-
558 
-
567 uint8_t w25qxx_advance_get_status2(uint8_t *status)
-
568 {
-
569  if (w25qxx_get_status2(&gs_handle, status) != 0)
-
570  {
-
571  return 1;
-
572  }
-
573  else
-
574  {
-
575  return 0;
-
576  }
-
577 }
-
578 
-
587 uint8_t w25qxx_advance_get_status3(uint8_t *status)
-
588 {
-
589  if (w25qxx_get_status3(&gs_handle, status) != 0)
-
590  {
-
591  return 1;
-
592  }
-
593  else
-
594  {
-
595  return 0;
-
596  }
-
597 }
-
598 
-
607 uint8_t w25qxx_advance_set_status1(uint8_t status)
-
608 {
-
609  if (w25qxx_set_status1(&gs_handle, status) != 0)
-
610  {
-
611  return 1;
-
612  }
-
613  else
-
614  {
-
615  return 0;
-
616  }
-
617 }
-
618 
-
627 uint8_t w25qxx_advance_set_status2(uint8_t status)
-
628 {
-
629  if (w25qxx_set_status2(&gs_handle, status) != 0)
-
630  {
-
631  return 1;
-
632  }
-
633  else
-
634  {
-
635  return 0;
-
636  }
-
637 }
-
638 
-
647 uint8_t w25qxx_advance_set_status3(uint8_t status)
-
648 {
-
649  if (w25qxx_set_status3(&gs_handle, status) != 0)
-
650  {
-
651  return 1;
-
652  }
-
653  else
-
654  {
-
655  return 0;
-
656  }
-
657 }
-
658 
-
668 uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io(uint8_t *manufacturer, uint8_t *device_id)
-
669 {
-
670  if (w25qxx_get_manufacturer_device_id_dual_io(&gs_handle, manufacturer, device_id) != 0)
-
671  {
-
672  return 1;
-
673  }
-
674  else
-
675  {
-
676  return 0;
-
677  }
-
678 }
-
679 
-
689 uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io(uint8_t *manufacturer, uint8_t *device_id)
-
690 {
-
691  if (w25qxx_get_manufacturer_device_id_quad_io(&gs_handle, manufacturer, device_id) != 0)
-
692  {
-
693  return 1;
-
694  }
-
695  else
-
696  {
-
697  return 0;
-
698  }
-
699 }
-
700 
-
710 uint8_t w25qxx_advance_get_get_jedec_id(uint8_t *manufacturer, uint8_t device_id[2])
-
711 {
-
712  if (w25qxx_get_jedec_id(&gs_handle, manufacturer, device_id) != 0)
-
713  {
-
714  return 1;
-
715  }
-
716  else
-
717  {
-
718  return 0;
-
719  }
-
720 }
-
721 
-
729 uint8_t w25qxx_advance_global_block_lock(void)
-
730 {
-
731  if (w25qxx_global_block_lock(&gs_handle) != 0)
-
732  {
-
733  return 1;
-
734  }
-
735  else
-
736  {
-
737  return 0;
-
738  }
-
739 }
-
740 
-
748 uint8_t w25qxx_advance_global_block_unlock(void)
-
749 {
-
750  if (w25qxx_global_block_unlock(&gs_handle) != 0)
-
751  {
-
752  return 1;
-
753  }
-
754  else
-
755  {
-
756  return 0;
-
757  }
-
758 }
-
759 
-
768 uint8_t w25qxx_advance_individual_block_lock(uint32_t addr)
-
769 {
-
770  if (w25qxx_individual_block_lock(&gs_handle, addr) != 0)
-
771  {
-
772  return 1;
-
773  }
-
774  else
-
775  {
-
776  return 0;
-
777  }
-
778 }
-
779 
-
788 uint8_t w25qxx_advance_individual_block_unlock(uint32_t addr)
-
789 {
-
790  if (w25qxx_individual_block_unlock(&gs_handle, addr) != 0)
-
791  {
-
792  return 1;
-
793  }
-
794  else
-
795  {
-
796  return 0;
-
797  }
-
798 }
-
799 
-
809 uint8_t w25qxx_advance_read_block_lock(uint32_t addr, uint8_t *value)
-
810 {
-
811  if (w25qxx_read_block_lock(&gs_handle, addr, value) != 0)
-
812  {
-
813  return 1;
-
814  }
-
815  else
-
816  {
-
817  return 0;
-
818  }
-
819 }
-
820 
-
828 uint8_t w25qxx_advance_reset(void)
-
829 {
-
830  if (w25qxx_enable_reset(&gs_handle) != 0)
-
831  {
-
832  return 1;
-
833  }
-
834  if (w25qxx_reset_device(&gs_handle) != 0)
-
835  {
-
836  return 1;
-
837  }
-
838  else
-
839  {
-
840  return 0;
-
841  }
-
842 }
-
843 
-
853 uint8_t w25qxx_advance_only_qspi_set_read_parameters(w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
-
854 {
-
855  if (w25qxx_set_read_parameters(&gs_handle, dummy, length) != 0)
-
856  {
-
857  return 1;
-
858  }
-
859  else
-
860  {
-
861  return 0;
-
862  }
-
863 }
-
864 
-
873 uint8_t w25qxx_advance_only_spi_get_unique_id(uint8_t id[8])
-
874 {
-
875  if (w25qxx_get_unique_id(&gs_handle, id) != 0)
-
876  {
-
877  return 1;
-
878  }
-
879  else
-
880  {
-
881  return 0;
-
882  }
-
883 }
-
884 
-
893 uint8_t w25qxx_advance_only_spi_get_sfdp(uint8_t sfdp[256])
-
894 {
-
895  if (w25qxx_get_sfdp(&gs_handle, sfdp) != 0)
-
896  {
-
897  return 1;
-
898  }
-
899  else
-
900  {
-
901  return 0;
-
902  }
-
903 }
-
904 
-
914 uint8_t w25qxx_advance_only_spi_write_security_register(w25qxx_security_register_t num, uint8_t data[256])
-
915 {
-
916  if (w25qxx_erase_security_register(&gs_handle, num) != 0)
-
917  {
-
918  return 1;
-
919  }
-
920  if (w25qxx_program_security_register(&gs_handle, num, data) != 0)
-
921  {
-
922  return 1;
-
923  }
-
924  else
-
925  {
-
926  return 0;
-
927  }
-
928 }
-
929 
-
939 uint8_t w25qxx_advance_only_spi_read_security_register(w25qxx_security_register_t num, uint8_t data[256])
-
940 {
-
941  if (w25qxx_read_security_register(&gs_handle, num, data) != 0)
-
942  {
-
943  return 1;
-
944  }
-
945  else
-
946  {
-
947  return 0;
-
948  }
-
949 }
-
950 
-
959 uint8_t w25qxx_advance_only_spi_set_burst_with_wrap(w25qxx_burst_wrap_t wrap)
-
960 {
-
961  if (w25qxx_set_burst_with_wrap(&gs_handle, wrap) != 0)
-
962  {
-
963  return 1;
-
964  }
-
965  else
-
966  {
-
967  return 0;
-
968  }
-
969 }
+Go to the documentation of this file.
1
+
37#include "driver_w25qxx_advance.h"
+
38
+
39static w25qxx_handle_t gs_handle;
+
+
51uint8_t w25qxx_advance_init(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
+
52{
+
53 uint8_t res;
+
54
+
55 /* link interface function */
+
56 DRIVER_W25QXX_LINK_INIT(&gs_handle, w25qxx_handle_t);
+
57 DRIVER_W25QXX_LINK_SPI_QSPI_INIT(&gs_handle, w25qxx_interface_spi_qspi_init);
+
58 DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(&gs_handle, w25qxx_interface_spi_qspi_deinit);
+
59 DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(&gs_handle, w25qxx_interface_spi_qspi_write_read);
+
60 DRIVER_W25QXX_LINK_DELAY_MS(&gs_handle, w25qxx_interface_delay_ms);
+
61 DRIVER_W25QXX_LINK_DELAY_US(&gs_handle, w25qxx_interface_delay_us);
+
62 DRIVER_W25QXX_LINK_DEBUG_PRINT(&gs_handle, w25qxx_interface_debug_print);
+
63
+
64 /* set chip type */
+
65 res = w25qxx_set_type(&gs_handle, type);
+
66 if (res != 0)
+
67 {
+
68 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
69
+
70 return 1;
+
71 }
+
72
+
73 /* set chip interface */
+
74 res = w25qxx_set_interface(&gs_handle, interface);
+
75 if (res != 0)
+
76 {
+
77 w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
+
78
+
79 return 1;
+
80 }
+
81
+
82 /* set dual quad spi */
+
83 res = w25qxx_set_dual_quad_spi(&gs_handle, dual_quad_spi_enable);
+
84 if (res != 0)
+
85 {
+
86 w25qxx_interface_debug_print("w25qxx: set dual quad spi failed.\n");
+
87 (void)w25qxx_deinit(&gs_handle);
+
88
+
89 return 1;
+
90 }
+
91
+
92 /* chip init */
+
93 res = w25qxx_init(&gs_handle);
+
94 if (res != 0)
+
95 {
+
96 w25qxx_interface_debug_print("w25qxx: init failed.\n");
+
97
+
98 return 1;
+
99 }
+
100 else
+
101 {
+
102 if (type >= W25Q256)
+
103 {
+
104 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
+
105 if (res != 0)
+
106 {
+
107 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
108 (void)w25qxx_deinit(&gs_handle);
+
109
+
110 return 1;
+
111 }
+
112 }
+
113
+
114 return 0;
+
115 }
+
116}
+
+
117
+
+
125uint8_t w25qxx_advance_deinit(void)
+
126{
+
127 if (w25qxx_deinit(&gs_handle) != 0)
+
128 {
+
129 return 1;
+
130 }
+
131 else
+
132 {
+
133 return 0;
+
134 }
+
135}
+
+
136
+
+
147uint8_t w25qxx_advance_write(uint32_t addr, uint8_t *data, uint32_t len)
+
148{
+
149 if (w25qxx_write(&gs_handle, addr, data, len) != 0)
+
150 {
+
151 return 1;
+
152 }
+
153 else
+
154 {
+
155 return 0;
+
156 }
+
157}
+
+
158
+
+
169uint8_t w25qxx_advance_read(uint32_t addr, uint8_t *data, uint32_t len)
+
170{
+
171 if (w25qxx_read(&gs_handle, addr, data, len) != 0)
+
172 {
+
173 return 1;
+
174 }
+
175 else
+
176 {
+
177 return 0;
+
178 }
+
179}
+
+
180
+
+
188uint8_t w25qxx_advance_power_down(void)
+
189{
+
190 if (w25qxx_power_down(&gs_handle) != 0)
+
191 {
+
192 return 1;
+
193 }
+
194 else
+
195 {
+
196 return 0;
+
197 }
+
198}
+
+
199
+
+
207uint8_t w25qxx_advance_wake_up(void)
+
208{
+
209 if (w25qxx_release_power_down(&gs_handle) != 0)
+
210 {
+
211 return 1;
+
212 }
+
213 else
+
214 {
+
215 return 0;
+
216 }
+
217}
+
+
218
+
+
226uint8_t w25qxx_advance_chip_erase(void)
+
227{
+
228 if (w25qxx_chip_erase(&gs_handle) != 0)
+
229 {
+
230 return 1;
+
231 }
+
232 else
+
233 {
+
234 return 0;
+
235 }
+
236}
+
+
237
+
+
247uint8_t w25qxx_advance_get_id(uint8_t *manufacturer, uint8_t *device_id)
+
248{
+
249 if (w25qxx_get_manufacturer_device_id(&gs_handle, manufacturer, device_id) != 0)
+
250 {
+
251 return 1;
+
252 }
+
253 else
+
254 {
+
255 return 0;
+
256 }
+
257}
+
+
258
+
+
269uint8_t w25qxx_advance_page_program(uint32_t addr, uint8_t *data, uint16_t len)
+
270{
+
271 if (w25qxx_page_program(&gs_handle, addr, data, len) != 0)
+
272 {
+
273 return 1;
+
274 }
+
275 else
+
276 {
+
277 return 0;
+
278 }
+
279}
+
+
280
+
+
289uint8_t w25qxx_advance_sector_erase_4k(uint32_t addr)
+
290{
+
291 if (w25qxx_sector_erase_4k(&gs_handle, addr) != 0)
+
292 {
+
293 return 1;
+
294 }
+
295 else
+
296 {
+
297 return 0;
+
298 }
+
299}
+
+
300
+
+
309uint8_t w25qxx_advance_block_erase_32k(uint32_t addr)
+
310{
+
311 if (w25qxx_block_erase_32k(&gs_handle, addr) != 0)
+
312 {
+
313 return 1;
+
314 }
+
315 else
+
316 {
+
317 return 0;
+
318 }
+
319}
+
+
320
+
+
329uint8_t w25qxx_advance_block_erase_64k(uint32_t addr)
+
330{
+
331 if (w25qxx_block_erase_64k(&gs_handle, addr) != 0)
+
332 {
+
333 return 1;
+
334 }
+
335 else
+
336 {
+
337 return 0;
+
338 }
+
339}
+
+
340
+
+
351uint8_t w25qxx_advance_fast_read(uint32_t addr, uint8_t *data, uint32_t len)
+
352{
+
353 if (w25qxx_fast_read(&gs_handle, addr, data, len) != 0)
+
354 {
+
355 return 1;
+
356 }
+
357 else
+
358 {
+
359 return 0;
+
360 }
+
361}
+
+
362
+
+
373uint8_t w25qxx_advance_only_spi_read(uint32_t addr, uint8_t *data, uint32_t len)
+
374{
+
375 if (w25qxx_only_spi_read(&gs_handle, addr, data, len) != 0)
+
376 {
+
377 return 1;
+
378 }
+
379 else
+
380 {
+
381 return 0;
+
382 }
+
383}
+
+
384
+
+
395uint8_t w25qxx_advance_only_spi_fast_read_dual_output(uint32_t addr, uint8_t *data, uint32_t len)
+
396{
+
397 if (w25qxx_fast_read_dual_output(&gs_handle, addr, data, len) != 0)
+
398 {
+
399 return 1;
+
400 }
+
401 else
+
402 {
+
403 return 0;
+
404 }
+
405}
+
+
406
+
+
417uint8_t w25qxx_advance_only_spi_fast_read_quad_output(uint32_t addr, uint8_t *data, uint32_t len)
+
418{
+
419 if (w25qxx_fast_read_quad_output(&gs_handle, addr, data, len) != 0)
+
420 {
+
421 return 1;
+
422 }
+
423 else
+
424 {
+
425 return 0;
+
426 }
+
427}
+
+
428
+
+
439uint8_t w25qxx_advance_only_spi_fast_read_dual_io(uint32_t addr, uint8_t *data, uint32_t len)
+
440{
+
441 if (w25qxx_fast_read_dual_io(&gs_handle, addr, data, len) != 0)
+
442 {
+
443 return 1;
+
444 }
+
445 else
+
446 {
+
447 return 0;
+
448 }
+
449}
+
+
450
+
+
461uint8_t w25qxx_advance_only_spi_fast_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
+
462{
+
463 if (w25qxx_fast_read_quad_io(&gs_handle, addr, data, len) != 0)
+
464 {
+
465 return 1;
+
466 }
+
467 else
+
468 {
+
469 return 0;
+
470 }
+
471}
+
+
472
+
+
483uint8_t w25qxx_advance_only_spi_word_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
+
484{
+
485 if (w25qxx_word_read_quad_io(&gs_handle, addr, data, len) != 0)
+
486 {
+
487 return 1;
+
488 }
+
489 else
+
490 {
+
491 return 0;
+
492 }
+
493}
+
+
494
+
+
505uint8_t w25qxx_advance_only_spi_octal_word_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
+
506{
+
507 if (w25qxx_octal_word_read_quad_io(&gs_handle, addr, data, len) != 0)
+
508 {
+
509 return 1;
+
510 }
+
511 else
+
512 {
+
513 return 0;
+
514 }
+
515}
+
+
516
+
+
527uint8_t w25qxx_advance_only_spi_page_program_quad_input(uint32_t addr, uint8_t *data, uint16_t len)
+
528{
+
529 if (w25qxx_page_program_quad_input(&gs_handle, addr, data, len) != 0)
+
530 {
+
531 return 1;
+
532 }
+
533 else
+
534 {
+
535 return 0;
+
536 }
+
537}
+
+
538
+
+
547uint8_t w25qxx_advance_get_status1(uint8_t *status)
+
548{
+
549 if (w25qxx_get_status1(&gs_handle, status) != 0)
+
550 {
+
551 return 1;
+
552 }
+
553 else
+
554 {
+
555 return 0;
+
556 }
+
557}
+
+
558
+
+
567uint8_t w25qxx_advance_get_status2(uint8_t *status)
+
568{
+
569 if (w25qxx_get_status2(&gs_handle, status) != 0)
+
570 {
+
571 return 1;
+
572 }
+
573 else
+
574 {
+
575 return 0;
+
576 }
+
577}
+
+
578
+
+
587uint8_t w25qxx_advance_get_status3(uint8_t *status)
+
588{
+
589 if (w25qxx_get_status3(&gs_handle, status) != 0)
+
590 {
+
591 return 1;
+
592 }
+
593 else
+
594 {
+
595 return 0;
+
596 }
+
597}
+
+
598
+
+
607uint8_t w25qxx_advance_set_status1(uint8_t status)
+
608{
+
609 if (w25qxx_set_status1(&gs_handle, status) != 0)
+
610 {
+
611 return 1;
+
612 }
+
613 else
+
614 {
+
615 return 0;
+
616 }
+
617}
+
+
618
+
+
627uint8_t w25qxx_advance_set_status2(uint8_t status)
+
628{
+
629 if (w25qxx_set_status2(&gs_handle, status) != 0)
+
630 {
+
631 return 1;
+
632 }
+
633 else
+
634 {
+
635 return 0;
+
636 }
+
637}
+
+
638
+
+
647uint8_t w25qxx_advance_set_status3(uint8_t status)
+
648{
+
649 if (w25qxx_set_status3(&gs_handle, status) != 0)
+
650 {
+
651 return 1;
+
652 }
+
653 else
+
654 {
+
655 return 0;
+
656 }
+
657}
+
+
658
+
+
668uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io(uint8_t *manufacturer, uint8_t *device_id)
+
669{
+
670 if (w25qxx_get_manufacturer_device_id_dual_io(&gs_handle, manufacturer, device_id) != 0)
+
671 {
+
672 return 1;
+
673 }
+
674 else
+
675 {
+
676 return 0;
+
677 }
+
678}
+
+
679
+
+
689uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io(uint8_t *manufacturer, uint8_t *device_id)
+
690{
+
691 if (w25qxx_get_manufacturer_device_id_quad_io(&gs_handle, manufacturer, device_id) != 0)
+
692 {
+
693 return 1;
+
694 }
+
695 else
+
696 {
+
697 return 0;
+
698 }
+
699}
+
+
700
+
+
710uint8_t w25qxx_advance_get_get_jedec_id(uint8_t *manufacturer, uint8_t device_id[2])
+
711{
+
712 if (w25qxx_get_jedec_id(&gs_handle, manufacturer, device_id) != 0)
+
713 {
+
714 return 1;
+
715 }
+
716 else
+
717 {
+
718 return 0;
+
719 }
+
720}
+
+
721
+
+
729uint8_t w25qxx_advance_global_block_lock(void)
+
730{
+
731 if (w25qxx_global_block_lock(&gs_handle) != 0)
+
732 {
+
733 return 1;
+
734 }
+
735 else
+
736 {
+
737 return 0;
+
738 }
+
739}
+
+
740
+
+
748uint8_t w25qxx_advance_global_block_unlock(void)
+
749{
+
750 if (w25qxx_global_block_unlock(&gs_handle) != 0)
+
751 {
+
752 return 1;
+
753 }
+
754 else
+
755 {
+
756 return 0;
+
757 }
+
758}
+
+
759
+
+
768uint8_t w25qxx_advance_individual_block_lock(uint32_t addr)
+
769{
+
770 if (w25qxx_individual_block_lock(&gs_handle, addr) != 0)
+
771 {
+
772 return 1;
+
773 }
+
774 else
+
775 {
+
776 return 0;
+
777 }
+
778}
+
+
779
+
+
788uint8_t w25qxx_advance_individual_block_unlock(uint32_t addr)
+
789{
+
790 if (w25qxx_individual_block_unlock(&gs_handle, addr) != 0)
+
791 {
+
792 return 1;
+
793 }
+
794 else
+
795 {
+
796 return 0;
+
797 }
+
798}
+
+
799
+
+
809uint8_t w25qxx_advance_read_block_lock(uint32_t addr, uint8_t *value)
+
810{
+
811 if (w25qxx_read_block_lock(&gs_handle, addr, value) != 0)
+
812 {
+
813 return 1;
+
814 }
+
815 else
+
816 {
+
817 return 0;
+
818 }
+
819}
+
+
820
+
+
828uint8_t w25qxx_advance_reset(void)
+
829{
+
830 if (w25qxx_enable_reset(&gs_handle) != 0)
+
831 {
+
832 return 1;
+
833 }
+
834 if (w25qxx_reset_device(&gs_handle) != 0)
+
835 {
+
836 return 1;
+
837 }
+
838 else
+
839 {
+
840 return 0;
+
841 }
+
842}
+
+
843
+
+
853uint8_t w25qxx_advance_only_qspi_set_read_parameters(w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
+
854{
+
855 if (w25qxx_set_read_parameters(&gs_handle, dummy, length) != 0)
+
856 {
+
857 return 1;
+
858 }
+
859 else
+
860 {
+
861 return 0;
+
862 }
+
863}
+
+
864
+
+
873uint8_t w25qxx_advance_only_spi_get_unique_id(uint8_t id[8])
+
874{
+
875 if (w25qxx_get_unique_id(&gs_handle, id) != 0)
+
876 {
+
877 return 1;
+
878 }
+
879 else
+
880 {
+
881 return 0;
+
882 }
+
883}
+
+
884
+
+
893uint8_t w25qxx_advance_only_spi_get_sfdp(uint8_t sfdp[256])
+
894{
+
895 if (w25qxx_get_sfdp(&gs_handle, sfdp) != 0)
+
896 {
+
897 return 1;
+
898 }
+
899 else
+
900 {
+
901 return 0;
+
902 }
+
903}
+
+
904
+
+
914uint8_t w25qxx_advance_only_spi_write_security_register(w25qxx_security_register_t num, uint8_t data[256])
+
915{
+
916 if (w25qxx_erase_security_register(&gs_handle, num) != 0)
+
917 {
+
918 return 1;
+
919 }
+
920 if (w25qxx_program_security_register(&gs_handle, num, data) != 0)
+
921 {
+
922 return 1;
+
923 }
+
924 else
+
925 {
+
926 return 0;
+
927 }
+
928}
+
+
929
+
+
939uint8_t w25qxx_advance_only_spi_read_security_register(w25qxx_security_register_t num, uint8_t data[256])
+
940{
+
941 if (w25qxx_read_security_register(&gs_handle, num, data) != 0)
+
942 {
+
943 return 1;
+
944 }
+
945 else
+
946 {
+
947 return 0;
+
948 }
+
949}
+
+
950
+
+
959uint8_t w25qxx_advance_only_spi_set_burst_with_wrap(w25qxx_burst_wrap_t wrap)
+
960{
+
961 if (w25qxx_set_burst_with_wrap(&gs_handle, wrap) != 0)
+
962 {
+
963 return 1;
+
964 }
+
965 else
+
966 {
+
967 return 0;
+
968 }
+
969}
+
driver_w25qxx_advance.h
driver w25qxx advance header file
-
w25qxx_get_unique_id
uint8_t w25qxx_get_unique_id(w25qxx_handle_t *handle, uint8_t id[8])
get the unique id
Definition: driver_w25qxx.c:2764
-
w25qxx_get_manufacturer_device_id_dual_io
uint8_t w25qxx_get_manufacturer_device_id_dual_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with dual io
Definition: driver_w25qxx.c:2038
-
w25qxx_page_program_quad_input
uint8_t w25qxx_page_program_quad_input(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
quad page program with quad input
Definition: driver_w25qxx.c:4920
-
w25qxx_get_sfdp
uint8_t w25qxx_get_sfdp(w25qxx_handle_t *handle, uint8_t sfdp[256])
get the sfdp
Definition: driver_w25qxx.c:2880
-
w25qxx_set_status1
uint8_t w25qxx_set_status1(w25qxx_handle_t *handle, uint8_t status)
set the status 1
Definition: driver_w25qxx.c:863
-
w25qxx_reset_device
uint8_t w25qxx_reset_device(w25qxx_handle_t *handle)
reset the device
Definition: driver_w25qxx.c:2690
-
w25qxx_qspi_read_wrap_length_t
w25qxx_qspi_read_wrap_length_t
w25qxx qspi read wrap length enumeration definition
Definition: driver_w25qxx.h:123
-
w25qxx_read_security_register
uint8_t w25qxx_read_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
read the security register
Definition: driver_w25qxx.c:3344
-
w25qxx_program_security_register
uint8_t w25qxx_program_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
program the security register
Definition: driver_w25qxx.c:3147
-
w25qxx_individual_block_lock
uint8_t w25qxx_individual_block_lock(w25qxx_handle_t *handle, uint32_t addr)
lock the individual block
Definition: driver_w25qxx.c:6094
-
w25qxx_read_block_lock
uint8_t w25qxx_read_block_lock(w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
read the block lock
Definition: driver_w25qxx.c:6529
-
w25qxx_get_manufacturer_device_id_quad_io
uint8_t w25qxx_get_manufacturer_device_id_quad_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with quad io
Definition: driver_w25qxx.c:2122
-
w25qxx_global_block_unlock
uint8_t w25qxx_global_block_unlock(w25qxx_handle_t *handle)
unlock the whole block
Definition: driver_w25qxx.c:2354
-
w25qxx_qspi_read_dummy_t
w25qxx_qspi_read_dummy_t
w25qxx qspi read dummy enumeration definition
Definition: driver_w25qxx.h:112
-
w25qxx_fast_read_dual_output
uint8_t w25qxx_fast_read_dual_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual output in the fast mode
Definition: driver_w25qxx.c:3858
-
w25qxx_individual_block_unlock
uint8_t w25qxx_individual_block_unlock(w25qxx_handle_t *handle, uint32_t addr)
unlock the individual block
Definition: driver_w25qxx.c:6311
-
w25qxx_security_register_t
w25qxx_security_register_t
w25qxx security register enumeration definition
Definition: driver_w25qxx.h:135
-
w25qxx_octal_word_read_quad_io
uint8_t w25qxx_octal_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
octal word read with quad io
Definition: driver_w25qxx.c:4459
-
w25qxx_get_jedec_id
uint8_t w25qxx_get_jedec_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
get the jedec id information
Definition: driver_w25qxx.c:2203
-
w25qxx_burst_wrap_t
w25qxx_burst_wrap_t
w25qxx burst wrap enumeration definition
Definition: driver_w25qxx.h:145
-
w25qxx_get_status3
uint8_t w25qxx_get_status3(w25qxx_handle_t *handle, uint8_t *status)
get the status 3
Definition: driver_w25qxx.c:789
-
w25qxx_set_read_parameters
uint8_t w25qxx_set_read_parameters(w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
set the read parameters
Definition: driver_w25qxx.c:2427
-
w25qxx_get_status2
uint8_t w25qxx_get_status2(w25qxx_handle_t *handle, uint8_t *status)
get the status 2
Definition: driver_w25qxx.c:716
-
w25qxx_get_status1
uint8_t w25qxx_get_status1(w25qxx_handle_t *handle, uint8_t *status)
get the status 1
Definition: driver_w25qxx.c:643
-
w25qxx_set_status2
uint8_t w25qxx_set_status2(w25qxx_handle_t *handle, uint8_t status)
set the status 2
Definition: driver_w25qxx.c:1062
-
w25qxx_global_block_lock
uint8_t w25qxx_global_block_lock(w25qxx_handle_t *handle)
lock the whole block
Definition: driver_w25qxx.c:2284
-
w25qxx_enable_reset
uint8_t w25qxx_enable_reset(w25qxx_handle_t *handle)
enable the reset
Definition: driver_w25qxx.c:2619
-
w25qxx_fast_read_quad_io
uint8_t w25qxx_fast_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad io in the fast mode
Definition: driver_w25qxx.c:4184
-
w25qxx_set_burst_with_wrap
uint8_t w25qxx_set_burst_with_wrap(w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
set the burst with wrap
Definition: driver_w25qxx.c:6746
-
w25qxx_fast_read_dual_io
uint8_t w25qxx_fast_read_dual_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual io in the fast mode
Definition: driver_w25qxx.c:4076
-
w25qxx_word_read_quad_io
uint8_t w25qxx_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
word read with quad io
Definition: driver_w25qxx.c:4350
-
w25qxx_set_status3
uint8_t w25qxx_set_status3(w25qxx_handle_t *handle, uint8_t status)
set the status 3
Definition: driver_w25qxx.c:1261
-
w25qxx_erase_security_register
uint8_t w25qxx_erase_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num)
erase the security register
Definition: driver_w25qxx.c:2952
-
w25qxx_fast_read_quad_output
uint8_t w25qxx_fast_read_quad_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad output in the fast mode
Definition: driver_w25qxx.c:3967
-
w25qxx_chip_erase
uint8_t w25qxx_chip_erase(w25qxx_handle_t *handle)
erase the chip
Definition: driver_w25qxx.c:1459
-
w25qxx_release_power_down
uint8_t w25qxx_release_power_down(w25qxx_handle_t *handle)
release power down
Definition: driver_w25qxx.c:1875
-
w25qxx_only_spi_read
uint8_t w25qxx_only_spi_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read only in the spi interface
Definition: driver_w25qxx.c:3465
-
w25qxx_block_erase_32k
uint8_t w25qxx_block_erase_32k(w25qxx_handle_t *handle, uint32_t addr)
erase the 32k block
Definition: driver_w25qxx.c:5419
-
w25qxx_set_interface
uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface)
set the chip interface
Definition: driver_w25qxx.c:259
-
w25qxx_page_program
uint8_t w25qxx_page_program(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
page program
Definition: driver_w25qxx.c:4569
-
w25qxx_set_dual_quad_spi
uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable)
enable or disable the dual quad spi
Definition: driver_w25qxx.c:175
-
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition: driver_w25qxx.h:63
-
w25qxx_init
uint8_t w25qxx_init(w25qxx_handle_t *handle)
initialize the chip
Definition: driver_w25qxx.c:6819
-
w25qxx_get_manufacturer_device_id
uint8_t w25qxx_get_manufacturer_device_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information
Definition: driver_w25qxx.c:1952
-
w25qxx_sector_erase_4k
uint8_t w25qxx_sector_erase_4k(w25qxx_handle_t *handle, uint32_t addr)
erase the 4k sector
Definition: driver_w25qxx.c:5080
-
w25qxx_deinit
uint8_t w25qxx_deinit(w25qxx_handle_t *handle)
close the chip
Definition: driver_w25qxx.c:7195
-
w25qxx_set_type
uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type)
set the chip type
Definition: driver_w25qxx.c:217
-
w25qxx_write
uint8_t w25qxx_write(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
write data
Definition: driver_w25qxx.c:8415
-
w25qxx_fast_read
uint8_t w25qxx_fast_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read in the fast mode
Definition: driver_w25qxx.c:3634
-
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition: driver_w25qxx.h:76
-
w25qxx_set_address_mode
uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
set the chip address mode
Definition: driver_w25qxx.c:304
-
w25qxx_power_down
uint8_t w25qxx_power_down(w25qxx_handle_t *handle)
power down
Definition: driver_w25qxx.c:1792
-
w25qxx_read
uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read data
Definition: driver_w25qxx.c:7289
-
w25qxx_block_erase_64k
uint8_t w25qxx_block_erase_64k(w25qxx_handle_t *handle, uint32_t addr)
erase the 64k block
Definition: driver_w25qxx.c:5758
-
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition: driver_w25qxx.h:85
-
W25Q256
@ W25Q256
Definition: driver_w25qxx.h:69
-
W25QXX_ADDRESS_MODE_4_BYTE
@ W25QXX_ADDRESS_MODE_4_BYTE
Definition: driver_w25qxx.h:96
-
w25qxx_advance_read
uint8_t w25qxx_advance_read(uint32_t addr, uint8_t *data, uint32_t len)
advance example read
Definition: driver_w25qxx_advance.c:169
-
w25qxx_advance_only_spi_read_security_register
uint8_t w25qxx_advance_only_spi_read_security_register(w25qxx_security_register_t num, uint8_t data[256])
advance example read the security register only in the spi interface
Definition: driver_w25qxx_advance.c:939
-
w25qxx_advance_get_id
uint8_t w25qxx_advance_get_id(uint8_t *manufacturer, uint8_t *device_id)
advance example get the manufacturer && device id information
Definition: driver_w25qxx_advance.c:247
-
w25qxx_advance_reset
uint8_t w25qxx_advance_reset(void)
advance example reset
Definition: driver_w25qxx_advance.c:828
-
w25qxx_advance_chip_erase
uint8_t w25qxx_advance_chip_erase(void)
advance example chip erase
Definition: driver_w25qxx_advance.c:226
-
w25qxx_advance_only_spi_set_burst_with_wrap
uint8_t w25qxx_advance_only_spi_set_burst_with_wrap(w25qxx_burst_wrap_t wrap)
advance example set the burst with wrap only in the spi interface
Definition: driver_w25qxx_advance.c:959
-
w25qxx_advance_global_block_lock
uint8_t w25qxx_advance_global_block_lock(void)
advance example global block lock
Definition: driver_w25qxx_advance.c:729
-
w25qxx_advance_get_status3
uint8_t w25qxx_advance_get_status3(uint8_t *status)
advance example get the status 3
Definition: driver_w25qxx_advance.c:587
-
w25qxx_advance_only_spi_fast_read_dual_output
uint8_t w25qxx_advance_only_spi_fast_read_dual_output(uint32_t addr, uint8_t *data, uint32_t len)
advance example fast read only in the spi dual output interface
Definition: driver_w25qxx_advance.c:395
-
w25qxx_advance_only_spi_get_unique_id
uint8_t w25qxx_advance_only_spi_get_unique_id(uint8_t id[8])
advance example get the unique id only in the spi interface
Definition: driver_w25qxx_advance.c:873
-
w25qxx_advance_only_spi_fast_read_quad_io
uint8_t w25qxx_advance_only_spi_fast_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
advance example fast read only in the spi quad io interface
Definition: driver_w25qxx_advance.c:461
-
w25qxx_advance_page_program
uint8_t w25qxx_advance_page_program(uint32_t addr, uint8_t *data, uint16_t len)
advance example page program
Definition: driver_w25qxx_advance.c:269
-
w25qxx_advance_init
uint8_t w25qxx_advance_init(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
advance example init
Definition: driver_w25qxx_advance.c:51
-
w25qxx_advance_only_spi_fast_read_dual_io
uint8_t w25qxx_advance_only_spi_fast_read_dual_io(uint32_t addr, uint8_t *data, uint32_t len)
advance example fast read only in the spi dual io interface
Definition: driver_w25qxx_advance.c:439
-
w25qxx_advance_get_status1
uint8_t w25qxx_advance_get_status1(uint8_t *status)
advance example get the status 1
Definition: driver_w25qxx_advance.c:547
-
w25qxx_advance_power_down
uint8_t w25qxx_advance_power_down(void)
advance example power down
Definition: driver_w25qxx_advance.c:188
-
w25qxx_advance_set_status1
uint8_t w25qxx_advance_set_status1(uint8_t status)
advance example set the status 1
Definition: driver_w25qxx_advance.c:607
-
w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io(uint8_t *manufacturer, uint8_t *device_id)
advance example get the manufacturer && device id information only in the spi quad io interface
Definition: driver_w25qxx_advance.c:689
-
w25qxx_advance_write
uint8_t w25qxx_advance_write(uint32_t addr, uint8_t *data, uint32_t len)
advance example write
Definition: driver_w25qxx_advance.c:147
-
w25qxx_advance_individual_block_unlock
uint8_t w25qxx_advance_individual_block_unlock(uint32_t addr)
advance example unlock the individual block
Definition: driver_w25qxx_advance.c:788
-
w25qxx_advance_global_block_unlock
uint8_t w25qxx_advance_global_block_unlock(void)
advance example global block unlock
Definition: driver_w25qxx_advance.c:748
-
w25qxx_advance_fast_read
uint8_t w25qxx_advance_fast_read(uint32_t addr, uint8_t *data, uint32_t len)
advance example read in the fast mode
Definition: driver_w25qxx_advance.c:351
-
w25qxx_advance_only_spi_octal_word_read_quad_io
uint8_t w25qxx_advance_only_spi_octal_word_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
advance example octal word read only in the spi quad io interface
Definition: driver_w25qxx_advance.c:505
-
w25qxx_advance_wake_up
uint8_t w25qxx_advance_wake_up(void)
advance example wake up
Definition: driver_w25qxx_advance.c:207
-
w25qxx_advance_sector_erase_4k
uint8_t w25qxx_advance_sector_erase_4k(uint32_t addr)
advance example erase the 4k sector
Definition: driver_w25qxx_advance.c:289
-
w25qxx_advance_only_spi_get_sfdp
uint8_t w25qxx_advance_only_spi_get_sfdp(uint8_t sfdp[256])
advance example get the sfdp only in the spi interface
Definition: driver_w25qxx_advance.c:893
-
w25qxx_advance_set_status2
uint8_t w25qxx_advance_set_status2(uint8_t status)
advance example set the status 2
Definition: driver_w25qxx_advance.c:627
-
w25qxx_advance_only_spi_write_security_register
uint8_t w25qxx_advance_only_spi_write_security_register(w25qxx_security_register_t num, uint8_t data[256])
advance example write the security register only in the spi interface
Definition: driver_w25qxx_advance.c:914
-
w25qxx_advance_individual_block_lock
uint8_t w25qxx_advance_individual_block_lock(uint32_t addr)
advance example lock the individual block
Definition: driver_w25qxx_advance.c:768
-
w25qxx_advance_set_status3
uint8_t w25qxx_advance_set_status3(uint8_t status)
advance example set the status 3
Definition: driver_w25qxx_advance.c:647
-
w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io(uint8_t *manufacturer, uint8_t *device_id)
advance example get the manufacturer && device id information only in the spi dual io interface
Definition: driver_w25qxx_advance.c:668
-
w25qxx_advance_read_block_lock
uint8_t w25qxx_advance_read_block_lock(uint32_t addr, uint8_t *value)
advance example read the block lock
Definition: driver_w25qxx_advance.c:809
-
w25qxx_advance_only_spi_read
uint8_t w25qxx_advance_only_spi_read(uint32_t addr, uint8_t *data, uint32_t len)
advance example read only in the spi interface
Definition: driver_w25qxx_advance.c:373
-
w25qxx_advance_only_spi_word_read_quad_io
uint8_t w25qxx_advance_only_spi_word_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
advance example word read only in the spi quad io interface
Definition: driver_w25qxx_advance.c:483
-
w25qxx_advance_get_get_jedec_id
uint8_t w25qxx_advance_get_get_jedec_id(uint8_t *manufacturer, uint8_t device_id[2])
advance example get the jedec id information
Definition: driver_w25qxx_advance.c:710
-
w25qxx_advance_only_qspi_set_read_parameters
uint8_t w25qxx_advance_only_qspi_set_read_parameters(w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
advance example set the read parameters only in the qspi interface
Definition: driver_w25qxx_advance.c:853
-
w25qxx_advance_only_spi_page_program_quad_input
uint8_t w25qxx_advance_only_spi_page_program_quad_input(uint32_t addr, uint8_t *data, uint16_t len)
advance example quad page program only in the spi quad input interface
Definition: driver_w25qxx_advance.c:527
-
w25qxx_advance_block_erase_64k
uint8_t w25qxx_advance_block_erase_64k(uint32_t addr)
advance example erase the 64k block
Definition: driver_w25qxx_advance.c:329
-
w25qxx_advance_block_erase_32k
uint8_t w25qxx_advance_block_erase_32k(uint32_t addr)
advance example erase the 32k block
Definition: driver_w25qxx_advance.c:309
-
w25qxx_advance_deinit
uint8_t w25qxx_advance_deinit(void)
advance example deinit
Definition: driver_w25qxx_advance.c:125
-
w25qxx_advance_get_status2
uint8_t w25qxx_advance_get_status2(uint8_t *status)
advance example get the status 2
Definition: driver_w25qxx_advance.c:567
-
w25qxx_advance_only_spi_fast_read_quad_output
uint8_t w25qxx_advance_only_spi_fast_read_quad_output(uint32_t addr, uint8_t *data, uint32_t len)
advance example fast read only in the spi quad output interface
Definition: driver_w25qxx_advance.c:417
-
w25qxx_interface_spi_qspi_deinit
uint8_t w25qxx_interface_spi_qspi_deinit(void)
interface spi qspi bus deinit
Definition: driver_w25qxx_interface_template.c:58
-
w25qxx_interface_spi_qspi_init
uint8_t w25qxx_interface_spi_qspi_init(void)
interface spi qspi bus init
Definition: driver_w25qxx_interface_template.c:46
-
w25qxx_interface_delay_us
void w25qxx_interface_delay_us(uint32_t us)
interface delay us
Definition: driver_w25qxx_interface_template.c:108
-
w25qxx_interface_spi_qspi_write_read
uint8_t w25qxx_interface_spi_qspi_write_read(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
interface spi qspi bus write read
Definition: driver_w25qxx_interface_template.c:84
-
w25qxx_interface_debug_print
void w25qxx_interface_debug_print(const char *const fmt,...)
interface print format data
Definition: driver_w25qxx_interface_template.c:118
-
w25qxx_interface_delay_ms
void w25qxx_interface_delay_ms(uint32_t ms)
interface delay ms
Definition: driver_w25qxx_interface_template.c:98
-
DRIVER_W25QXX_LINK_DELAY_MS
#define DRIVER_W25QXX_LINK_DELAY_MS(HANDLE, FUC)
link delay_ms function
Definition: driver_w25qxx.h:297
-
DRIVER_W25QXX_LINK_INIT
#define DRIVER_W25QXX_LINK_INIT(HANDLE, STRUCTURE)
initialize w25qxx_handle_t structure
Definition: driver_w25qxx.h:265
-
DRIVER_W25QXX_LINK_SPI_QSPI_INIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_INIT(HANDLE, FUC)
link spi_qspi_init function
Definition: driver_w25qxx.h:273
-
DRIVER_W25QXX_LINK_DEBUG_PRINT
#define DRIVER_W25QXX_LINK_DEBUG_PRINT(HANDLE, FUC)
link debug_print function
Definition: driver_w25qxx.h:313
-
DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ
#define DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(HANDLE, FUC)
link spi_qspi_write_read function
Definition: driver_w25qxx.h:289
-
DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(HANDLE, FUC)
link spi_qspi_deinit function
Definition: driver_w25qxx.h:281
-
DRIVER_W25QXX_LINK_DELAY_US
#define DRIVER_W25QXX_LINK_DELAY_US(HANDLE, FUC)
link delay_us function
Definition: driver_w25qxx.h:305
-
w25qxx_handle_s
w25qxx handle structure definition
Definition: driver_w25qxx.h:210
+
w25qxx_get_unique_id
uint8_t w25qxx_get_unique_id(w25qxx_handle_t *handle, uint8_t id[8])
get the unique id
Definition driver_w25qxx.c:2764
+
w25qxx_get_manufacturer_device_id_dual_io
uint8_t w25qxx_get_manufacturer_device_id_dual_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with dual io
Definition driver_w25qxx.c:2038
+
w25qxx_page_program_quad_input
uint8_t w25qxx_page_program_quad_input(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
quad page program with quad input
Definition driver_w25qxx.c:4920
+
w25qxx_get_sfdp
uint8_t w25qxx_get_sfdp(w25qxx_handle_t *handle, uint8_t sfdp[256])
get the sfdp
Definition driver_w25qxx.c:2880
+
w25qxx_set_status1
uint8_t w25qxx_set_status1(w25qxx_handle_t *handle, uint8_t status)
set the status 1
Definition driver_w25qxx.c:863
+
w25qxx_reset_device
uint8_t w25qxx_reset_device(w25qxx_handle_t *handle)
reset the device
Definition driver_w25qxx.c:2690
+
w25qxx_qspi_read_wrap_length_t
w25qxx_qspi_read_wrap_length_t
w25qxx qspi read wrap length enumeration definition
Definition driver_w25qxx.h:123
+
w25qxx_read_security_register
uint8_t w25qxx_read_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
read the security register
Definition driver_w25qxx.c:3344
+
w25qxx_program_security_register
uint8_t w25qxx_program_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
program the security register
Definition driver_w25qxx.c:3147
+
w25qxx_individual_block_lock
uint8_t w25qxx_individual_block_lock(w25qxx_handle_t *handle, uint32_t addr)
lock the individual block
Definition driver_w25qxx.c:6094
+
w25qxx_read_block_lock
uint8_t w25qxx_read_block_lock(w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
read the block lock
Definition driver_w25qxx.c:6529
+
w25qxx_get_manufacturer_device_id_quad_io
uint8_t w25qxx_get_manufacturer_device_id_quad_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with quad io
Definition driver_w25qxx.c:2122
+
w25qxx_global_block_unlock
uint8_t w25qxx_global_block_unlock(w25qxx_handle_t *handle)
unlock the whole block
Definition driver_w25qxx.c:2354
+
w25qxx_qspi_read_dummy_t
w25qxx_qspi_read_dummy_t
w25qxx qspi read dummy enumeration definition
Definition driver_w25qxx.h:112
+
w25qxx_fast_read_dual_output
uint8_t w25qxx_fast_read_dual_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual output in the fast mode
Definition driver_w25qxx.c:3858
+
w25qxx_individual_block_unlock
uint8_t w25qxx_individual_block_unlock(w25qxx_handle_t *handle, uint32_t addr)
unlock the individual block
Definition driver_w25qxx.c:6311
+
w25qxx_security_register_t
w25qxx_security_register_t
w25qxx security register enumeration definition
Definition driver_w25qxx.h:135
+
w25qxx_octal_word_read_quad_io
uint8_t w25qxx_octal_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
octal word read with quad io
Definition driver_w25qxx.c:4459
+
w25qxx_get_jedec_id
uint8_t w25qxx_get_jedec_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
get the jedec id information
Definition driver_w25qxx.c:2203
+
w25qxx_burst_wrap_t
w25qxx_burst_wrap_t
w25qxx burst wrap enumeration definition
Definition driver_w25qxx.h:145
+
w25qxx_get_status3
uint8_t w25qxx_get_status3(w25qxx_handle_t *handle, uint8_t *status)
get the status 3
Definition driver_w25qxx.c:789
+
w25qxx_set_read_parameters
uint8_t w25qxx_set_read_parameters(w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
set the read parameters
Definition driver_w25qxx.c:2427
+
w25qxx_get_status2
uint8_t w25qxx_get_status2(w25qxx_handle_t *handle, uint8_t *status)
get the status 2
Definition driver_w25qxx.c:716
+
w25qxx_get_status1
uint8_t w25qxx_get_status1(w25qxx_handle_t *handle, uint8_t *status)
get the status 1
Definition driver_w25qxx.c:643
+
w25qxx_set_status2
uint8_t w25qxx_set_status2(w25qxx_handle_t *handle, uint8_t status)
set the status 2
Definition driver_w25qxx.c:1062
+
w25qxx_global_block_lock
uint8_t w25qxx_global_block_lock(w25qxx_handle_t *handle)
lock the whole block
Definition driver_w25qxx.c:2284
+
w25qxx_enable_reset
uint8_t w25qxx_enable_reset(w25qxx_handle_t *handle)
enable the reset
Definition driver_w25qxx.c:2619
+
w25qxx_fast_read_quad_io
uint8_t w25qxx_fast_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad io in the fast mode
Definition driver_w25qxx.c:4184
+
w25qxx_set_burst_with_wrap
uint8_t w25qxx_set_burst_with_wrap(w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
set the burst with wrap
Definition driver_w25qxx.c:6746
+
w25qxx_fast_read_dual_io
uint8_t w25qxx_fast_read_dual_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual io in the fast mode
Definition driver_w25qxx.c:4076
+
w25qxx_word_read_quad_io
uint8_t w25qxx_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
word read with quad io
Definition driver_w25qxx.c:4350
+
w25qxx_set_status3
uint8_t w25qxx_set_status3(w25qxx_handle_t *handle, uint8_t status)
set the status 3
Definition driver_w25qxx.c:1261
+
w25qxx_erase_security_register
uint8_t w25qxx_erase_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num)
erase the security register
Definition driver_w25qxx.c:2952
+
w25qxx_fast_read_quad_output
uint8_t w25qxx_fast_read_quad_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad output in the fast mode
Definition driver_w25qxx.c:3967
+
w25qxx_chip_erase
uint8_t w25qxx_chip_erase(w25qxx_handle_t *handle)
erase the chip
Definition driver_w25qxx.c:1459
+
w25qxx_release_power_down
uint8_t w25qxx_release_power_down(w25qxx_handle_t *handle)
release power down
Definition driver_w25qxx.c:1875
+
w25qxx_only_spi_read
uint8_t w25qxx_only_spi_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read only in the spi interface
Definition driver_w25qxx.c:3465
+
w25qxx_block_erase_32k
uint8_t w25qxx_block_erase_32k(w25qxx_handle_t *handle, uint32_t addr)
erase the 32k block
Definition driver_w25qxx.c:5419
+
w25qxx_set_interface
uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface)
set the chip interface
Definition driver_w25qxx.c:259
+
w25qxx_page_program
uint8_t w25qxx_page_program(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
page program
Definition driver_w25qxx.c:4569
+
w25qxx_set_dual_quad_spi
uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable)
enable or disable the dual quad spi
Definition driver_w25qxx.c:175
+
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition driver_w25qxx.h:63
+
w25qxx_init
uint8_t w25qxx_init(w25qxx_handle_t *handle)
initialize the chip
Definition driver_w25qxx.c:6819
+
w25qxx_get_manufacturer_device_id
uint8_t w25qxx_get_manufacturer_device_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information
Definition driver_w25qxx.c:1952
+
w25qxx_sector_erase_4k
uint8_t w25qxx_sector_erase_4k(w25qxx_handle_t *handle, uint32_t addr)
erase the 4k sector
Definition driver_w25qxx.c:5080
+
w25qxx_deinit
uint8_t w25qxx_deinit(w25qxx_handle_t *handle)
close the chip
Definition driver_w25qxx.c:7195
+
w25qxx_set_type
uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type)
set the chip type
Definition driver_w25qxx.c:217
+
w25qxx_write
uint8_t w25qxx_write(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
write data
Definition driver_w25qxx.c:8415
+
w25qxx_fast_read
uint8_t w25qxx_fast_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read in the fast mode
Definition driver_w25qxx.c:3634
+
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition driver_w25qxx.h:76
+
w25qxx_set_address_mode
uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
set the chip address mode
Definition driver_w25qxx.c:304
+
w25qxx_power_down
uint8_t w25qxx_power_down(w25qxx_handle_t *handle)
power down
Definition driver_w25qxx.c:1792
+
w25qxx_read
uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read data
Definition driver_w25qxx.c:7289
+
w25qxx_block_erase_64k
uint8_t w25qxx_block_erase_64k(w25qxx_handle_t *handle, uint32_t addr)
erase the 64k block
Definition driver_w25qxx.c:5758
+
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition driver_w25qxx.h:85
+
W25Q256
@ W25Q256
Definition driver_w25qxx.h:69
+
W25QXX_ADDRESS_MODE_4_BYTE
@ W25QXX_ADDRESS_MODE_4_BYTE
Definition driver_w25qxx.h:96
+
w25qxx_advance_read
uint8_t w25qxx_advance_read(uint32_t addr, uint8_t *data, uint32_t len)
advance example read
Definition driver_w25qxx_advance.c:169
+
w25qxx_advance_only_spi_read_security_register
uint8_t w25qxx_advance_only_spi_read_security_register(w25qxx_security_register_t num, uint8_t data[256])
advance example read the security register only in the spi interface
Definition driver_w25qxx_advance.c:939
+
w25qxx_advance_get_id
uint8_t w25qxx_advance_get_id(uint8_t *manufacturer, uint8_t *device_id)
advance example get the manufacturer && device id information
Definition driver_w25qxx_advance.c:247
+
w25qxx_advance_reset
uint8_t w25qxx_advance_reset(void)
advance example reset
Definition driver_w25qxx_advance.c:828
+
w25qxx_advance_chip_erase
uint8_t w25qxx_advance_chip_erase(void)
advance example chip erase
Definition driver_w25qxx_advance.c:226
+
w25qxx_advance_only_spi_set_burst_with_wrap
uint8_t w25qxx_advance_only_spi_set_burst_with_wrap(w25qxx_burst_wrap_t wrap)
advance example set the burst with wrap only in the spi interface
Definition driver_w25qxx_advance.c:959
+
w25qxx_advance_global_block_lock
uint8_t w25qxx_advance_global_block_lock(void)
advance example global block lock
Definition driver_w25qxx_advance.c:729
+
w25qxx_advance_get_status3
uint8_t w25qxx_advance_get_status3(uint8_t *status)
advance example get the status 3
Definition driver_w25qxx_advance.c:587
+
w25qxx_advance_only_spi_fast_read_dual_output
uint8_t w25qxx_advance_only_spi_fast_read_dual_output(uint32_t addr, uint8_t *data, uint32_t len)
advance example fast read only in the spi dual output interface
Definition driver_w25qxx_advance.c:395
+
w25qxx_advance_only_spi_get_unique_id
uint8_t w25qxx_advance_only_spi_get_unique_id(uint8_t id[8])
advance example get the unique id only in the spi interface
Definition driver_w25qxx_advance.c:873
+
w25qxx_advance_only_spi_fast_read_quad_io
uint8_t w25qxx_advance_only_spi_fast_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
advance example fast read only in the spi quad io interface
Definition driver_w25qxx_advance.c:461
+
w25qxx_advance_page_program
uint8_t w25qxx_advance_page_program(uint32_t addr, uint8_t *data, uint16_t len)
advance example page program
Definition driver_w25qxx_advance.c:269
+
w25qxx_advance_init
uint8_t w25qxx_advance_init(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
advance example init
Definition driver_w25qxx_advance.c:51
+
w25qxx_advance_only_spi_fast_read_dual_io
uint8_t w25qxx_advance_only_spi_fast_read_dual_io(uint32_t addr, uint8_t *data, uint32_t len)
advance example fast read only in the spi dual io interface
Definition driver_w25qxx_advance.c:439
+
w25qxx_advance_get_status1
uint8_t w25qxx_advance_get_status1(uint8_t *status)
advance example get the status 1
Definition driver_w25qxx_advance.c:547
+
w25qxx_advance_power_down
uint8_t w25qxx_advance_power_down(void)
advance example power down
Definition driver_w25qxx_advance.c:188
+
w25qxx_advance_set_status1
uint8_t w25qxx_advance_set_status1(uint8_t status)
advance example set the status 1
Definition driver_w25qxx_advance.c:607
+
w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io(uint8_t *manufacturer, uint8_t *device_id)
advance example get the manufacturer && device id information only in the spi quad io interface
Definition driver_w25qxx_advance.c:689
+
w25qxx_advance_write
uint8_t w25qxx_advance_write(uint32_t addr, uint8_t *data, uint32_t len)
advance example write
Definition driver_w25qxx_advance.c:147
+
w25qxx_advance_individual_block_unlock
uint8_t w25qxx_advance_individual_block_unlock(uint32_t addr)
advance example unlock the individual block
Definition driver_w25qxx_advance.c:788
+
w25qxx_advance_global_block_unlock
uint8_t w25qxx_advance_global_block_unlock(void)
advance example global block unlock
Definition driver_w25qxx_advance.c:748
+
w25qxx_advance_fast_read
uint8_t w25qxx_advance_fast_read(uint32_t addr, uint8_t *data, uint32_t len)
advance example read in the fast mode
Definition driver_w25qxx_advance.c:351
+
w25qxx_advance_only_spi_octal_word_read_quad_io
uint8_t w25qxx_advance_only_spi_octal_word_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
advance example octal word read only in the spi quad io interface
Definition driver_w25qxx_advance.c:505
+
w25qxx_advance_wake_up
uint8_t w25qxx_advance_wake_up(void)
advance example wake up
Definition driver_w25qxx_advance.c:207
+
w25qxx_advance_sector_erase_4k
uint8_t w25qxx_advance_sector_erase_4k(uint32_t addr)
advance example erase the 4k sector
Definition driver_w25qxx_advance.c:289
+
w25qxx_advance_only_spi_get_sfdp
uint8_t w25qxx_advance_only_spi_get_sfdp(uint8_t sfdp[256])
advance example get the sfdp only in the spi interface
Definition driver_w25qxx_advance.c:893
+
w25qxx_advance_set_status2
uint8_t w25qxx_advance_set_status2(uint8_t status)
advance example set the status 2
Definition driver_w25qxx_advance.c:627
+
w25qxx_advance_only_spi_write_security_register
uint8_t w25qxx_advance_only_spi_write_security_register(w25qxx_security_register_t num, uint8_t data[256])
advance example write the security register only in the spi interface
Definition driver_w25qxx_advance.c:914
+
w25qxx_advance_individual_block_lock
uint8_t w25qxx_advance_individual_block_lock(uint32_t addr)
advance example lock the individual block
Definition driver_w25qxx_advance.c:768
+
w25qxx_advance_set_status3
uint8_t w25qxx_advance_set_status3(uint8_t status)
advance example set the status 3
Definition driver_w25qxx_advance.c:647
+
w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io(uint8_t *manufacturer, uint8_t *device_id)
advance example get the manufacturer && device id information only in the spi dual io interface
Definition driver_w25qxx_advance.c:668
+
w25qxx_advance_read_block_lock
uint8_t w25qxx_advance_read_block_lock(uint32_t addr, uint8_t *value)
advance example read the block lock
Definition driver_w25qxx_advance.c:809
+
w25qxx_advance_only_spi_read
uint8_t w25qxx_advance_only_spi_read(uint32_t addr, uint8_t *data, uint32_t len)
advance example read only in the spi interface
Definition driver_w25qxx_advance.c:373
+
w25qxx_advance_only_spi_word_read_quad_io
uint8_t w25qxx_advance_only_spi_word_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
advance example word read only in the spi quad io interface
Definition driver_w25qxx_advance.c:483
+
w25qxx_advance_get_get_jedec_id
uint8_t w25qxx_advance_get_get_jedec_id(uint8_t *manufacturer, uint8_t device_id[2])
advance example get the jedec id information
Definition driver_w25qxx_advance.c:710
+
w25qxx_advance_only_qspi_set_read_parameters
uint8_t w25qxx_advance_only_qspi_set_read_parameters(w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
advance example set the read parameters only in the qspi interface
Definition driver_w25qxx_advance.c:853
+
w25qxx_advance_only_spi_page_program_quad_input
uint8_t w25qxx_advance_only_spi_page_program_quad_input(uint32_t addr, uint8_t *data, uint16_t len)
advance example quad page program only in the spi quad input interface
Definition driver_w25qxx_advance.c:527
+
w25qxx_advance_block_erase_64k
uint8_t w25qxx_advance_block_erase_64k(uint32_t addr)
advance example erase the 64k block
Definition driver_w25qxx_advance.c:329
+
w25qxx_advance_block_erase_32k
uint8_t w25qxx_advance_block_erase_32k(uint32_t addr)
advance example erase the 32k block
Definition driver_w25qxx_advance.c:309
+
w25qxx_advance_deinit
uint8_t w25qxx_advance_deinit(void)
advance example deinit
Definition driver_w25qxx_advance.c:125
+
w25qxx_advance_get_status2
uint8_t w25qxx_advance_get_status2(uint8_t *status)
advance example get the status 2
Definition driver_w25qxx_advance.c:567
+
w25qxx_advance_only_spi_fast_read_quad_output
uint8_t w25qxx_advance_only_spi_fast_read_quad_output(uint32_t addr, uint8_t *data, uint32_t len)
advance example fast read only in the spi quad output interface
Definition driver_w25qxx_advance.c:417
+
w25qxx_interface_spi_qspi_deinit
uint8_t w25qxx_interface_spi_qspi_deinit(void)
interface spi qspi bus deinit
Definition driver_w25qxx_interface_template.c:58
+
w25qxx_interface_spi_qspi_init
uint8_t w25qxx_interface_spi_qspi_init(void)
interface spi qspi bus init
Definition driver_w25qxx_interface_template.c:46
+
w25qxx_interface_delay_us
void w25qxx_interface_delay_us(uint32_t us)
interface delay us
Definition driver_w25qxx_interface_template.c:108
+
w25qxx_interface_spi_qspi_write_read
uint8_t w25qxx_interface_spi_qspi_write_read(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
interface spi qspi bus write read
Definition driver_w25qxx_interface_template.c:84
+
w25qxx_interface_debug_print
void w25qxx_interface_debug_print(const char *const fmt,...)
interface print format data
Definition driver_w25qxx_interface_template.c:118
+
w25qxx_interface_delay_ms
void w25qxx_interface_delay_ms(uint32_t ms)
interface delay ms
Definition driver_w25qxx_interface_template.c:98
+
DRIVER_W25QXX_LINK_DELAY_MS
#define DRIVER_W25QXX_LINK_DELAY_MS(HANDLE, FUC)
link delay_ms function
Definition driver_w25qxx.h:297
+
DRIVER_W25QXX_LINK_INIT
#define DRIVER_W25QXX_LINK_INIT(HANDLE, STRUCTURE)
initialize w25qxx_handle_t structure
Definition driver_w25qxx.h:265
+
DRIVER_W25QXX_LINK_SPI_QSPI_INIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_INIT(HANDLE, FUC)
link spi_qspi_init function
Definition driver_w25qxx.h:273
+
DRIVER_W25QXX_LINK_DEBUG_PRINT
#define DRIVER_W25QXX_LINK_DEBUG_PRINT(HANDLE, FUC)
link debug_print function
Definition driver_w25qxx.h:313
+
DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ
#define DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(HANDLE, FUC)
link spi_qspi_write_read function
Definition driver_w25qxx.h:289
+
DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(HANDLE, FUC)
link spi_qspi_deinit function
Definition driver_w25qxx.h:281
+
DRIVER_W25QXX_LINK_DELAY_US
#define DRIVER_W25QXX_LINK_DELAY_US(HANDLE, FUC)
link delay_us function
Definition driver_w25qxx.h:305
+
w25qxx_handle_s
w25qxx handle structure definition
Definition driver_w25qxx.h:210
diff --git a/doc/html/driver__w25qxx__advance_8h.html b/doc/html/driver__w25qxx__advance_8h.html index bdb6a50..ab8cbff 100644 --- a/doc/html/driver__w25qxx__advance_8h.html +++ b/doc/html/driver__w25qxx__advance_8h.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: example/driver_w25qxx_advance.h File Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@

@@ -78,16 +78,22 @@
- +
+
+
+
+
Loading...
+
Searching...
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+
+
+
Functions
-
-
driver_w25qxx_advance.h File Reference
+
driver_w25qxx_advance.h File Reference
@@ -97,133 +103,133 @@

Go to the source code of this file.

- - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + +

+

Functions

uint8_t w25qxx_advance_init (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 advance example init More...
uint8_t w25qxx_advance_init (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 advance example init
 
uint8_t w25qxx_advance_deinit (void)
 advance example deinit More...
uint8_t w25qxx_advance_deinit (void)
 advance example deinit
 
uint8_t w25qxx_advance_power_down (void)
 advance example power down More...
uint8_t w25qxx_advance_power_down (void)
 advance example power down
 
uint8_t w25qxx_advance_wake_up (void)
 advance example wake up More...
uint8_t w25qxx_advance_wake_up (void)
 advance example wake up
 
uint8_t w25qxx_advance_chip_erase (void)
 advance example chip erase More...
uint8_t w25qxx_advance_chip_erase (void)
 advance example chip erase
 
uint8_t w25qxx_advance_get_id (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information More...
uint8_t w25qxx_advance_get_id (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information
 
uint8_t w25qxx_advance_write (uint32_t addr, uint8_t *data, uint32_t len)
 advance example write More...
uint8_t w25qxx_advance_write (uint32_t addr, uint8_t *data, uint32_t len)
 advance example write
 
uint8_t w25qxx_advance_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read More...
uint8_t w25qxx_advance_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read
 
uint8_t w25qxx_advance_page_program (uint32_t addr, uint8_t *data, uint16_t len)
 advance example page program More...
uint8_t w25qxx_advance_page_program (uint32_t addr, uint8_t *data, uint16_t len)
 advance example page program
 
uint8_t w25qxx_advance_sector_erase_4k (uint32_t addr)
 advance example erase the 4k sector More...
uint8_t w25qxx_advance_sector_erase_4k (uint32_t addr)
 advance example erase the 4k sector
 
uint8_t w25qxx_advance_block_erase_32k (uint32_t addr)
 advance example erase the 32k block More...
uint8_t w25qxx_advance_block_erase_32k (uint32_t addr)
 advance example erase the 32k block
 
uint8_t w25qxx_advance_block_erase_64k (uint32_t addr)
 advance example erase the 64k block More...
uint8_t w25qxx_advance_block_erase_64k (uint32_t addr)
 advance example erase the 64k block
 
uint8_t w25qxx_advance_fast_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read in the fast mode More...
uint8_t w25qxx_advance_fast_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read in the fast mode
 
uint8_t w25qxx_advance_get_status1 (uint8_t *status)
 advance example get the status 1 More...
uint8_t w25qxx_advance_get_status1 (uint8_t *status)
 advance example get the status 1
 
uint8_t w25qxx_advance_get_status2 (uint8_t *status)
 advance example get the status 2 More...
uint8_t w25qxx_advance_get_status2 (uint8_t *status)
 advance example get the status 2
 
uint8_t w25qxx_advance_get_status3 (uint8_t *status)
 advance example get the status 3 More...
uint8_t w25qxx_advance_get_status3 (uint8_t *status)
 advance example get the status 3
 
uint8_t w25qxx_advance_set_status1 (uint8_t status)
 advance example set the status 1 More...
uint8_t w25qxx_advance_set_status1 (uint8_t status)
 advance example set the status 1
 
uint8_t w25qxx_advance_set_status2 (uint8_t status)
 advance example set the status 2 More...
uint8_t w25qxx_advance_set_status2 (uint8_t status)
 advance example set the status 2
 
uint8_t w25qxx_advance_set_status3 (uint8_t status)
 advance example set the status 3 More...
uint8_t w25qxx_advance_set_status3 (uint8_t status)
 advance example set the status 3
 
uint8_t w25qxx_advance_get_get_jedec_id (uint8_t *manufacturer, uint8_t device_id[2])
 advance example get the jedec id information More...
uint8_t w25qxx_advance_get_get_jedec_id (uint8_t *manufacturer, uint8_t device_id[2])
 advance example get the jedec id information
 
uint8_t w25qxx_advance_global_block_lock (void)
 advance example global block lock More...
uint8_t w25qxx_advance_global_block_lock (void)
 advance example global block lock
 
uint8_t w25qxx_advance_global_block_unlock (void)
 advance example global block unlock More...
uint8_t w25qxx_advance_global_block_unlock (void)
 advance example global block unlock
 
uint8_t w25qxx_advance_individual_block_lock (uint32_t addr)
 advance example lock the individual block More...
uint8_t w25qxx_advance_individual_block_lock (uint32_t addr)
 advance example lock the individual block
 
uint8_t w25qxx_advance_individual_block_unlock (uint32_t addr)
 advance example unlock the individual block More...
uint8_t w25qxx_advance_individual_block_unlock (uint32_t addr)
 advance example unlock the individual block
 
uint8_t w25qxx_advance_read_block_lock (uint32_t addr, uint8_t *value)
 advance example read the block lock More...
uint8_t w25qxx_advance_read_block_lock (uint32_t addr, uint8_t *value)
 advance example read the block lock
 
uint8_t w25qxx_advance_reset (void)
 advance example reset More...
uint8_t w25qxx_advance_reset (void)
 advance example reset
 
uint8_t w25qxx_advance_only_spi_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read only in the spi interface More...
uint8_t w25qxx_advance_only_spi_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read only in the spi interface
 
uint8_t w25qxx_advance_only_spi_fast_read_dual_output (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi dual output interface More...
uint8_t w25qxx_advance_only_spi_fast_read_dual_output (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi dual output interface
 
uint8_t w25qxx_advance_only_spi_fast_read_quad_output (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi quad output interface More...
uint8_t w25qxx_advance_only_spi_fast_read_quad_output (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi quad output interface
 
uint8_t w25qxx_advance_only_spi_fast_read_dual_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi dual io interface More...
uint8_t w25qxx_advance_only_spi_fast_read_dual_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi dual io interface
 
uint8_t w25qxx_advance_only_spi_fast_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi quad io interface More...
uint8_t w25qxx_advance_only_spi_fast_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi quad io interface
 
uint8_t w25qxx_advance_only_spi_word_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example word read only in the spi quad io interface More...
uint8_t w25qxx_advance_only_spi_word_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example word read only in the spi quad io interface
 
uint8_t w25qxx_advance_only_spi_octal_word_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example octal word read only in the spi quad io interface More...
uint8_t w25qxx_advance_only_spi_octal_word_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example octal word read only in the spi quad io interface
 
uint8_t w25qxx_advance_only_spi_page_program_quad_input (uint32_t addr, uint8_t *data, uint16_t len)
 advance example quad page program only in the spi quad input interface More...
uint8_t w25qxx_advance_only_spi_page_program_quad_input (uint32_t addr, uint8_t *data, uint16_t len)
 advance example quad page program only in the spi quad input interface
 
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information only in the spi dual io interface More...
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information only in the spi dual io interface
 
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information only in the spi quad io interface More...
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information only in the spi quad io interface
 
uint8_t w25qxx_advance_only_spi_get_unique_id (uint8_t id[8])
 advance example get the unique id only in the spi interface More...
uint8_t w25qxx_advance_only_spi_get_unique_id (uint8_t id[8])
 advance example get the unique id only in the spi interface
 
uint8_t w25qxx_advance_only_spi_get_sfdp (uint8_t sfdp[256])
 advance example get the sfdp only in the spi interface More...
uint8_t w25qxx_advance_only_spi_get_sfdp (uint8_t sfdp[256])
 advance example get the sfdp only in the spi interface
 
uint8_t w25qxx_advance_only_spi_write_security_register (w25qxx_security_register_t num, uint8_t data[256])
 advance example write the security register only in the spi interface More...
uint8_t w25qxx_advance_only_spi_write_security_register (w25qxx_security_register_t num, uint8_t data[256])
 advance example write the security register only in the spi interface
 
uint8_t w25qxx_advance_only_spi_read_security_register (w25qxx_security_register_t num, uint8_t data[256])
 advance example read the security register only in the spi interface More...
uint8_t w25qxx_advance_only_spi_read_security_register (w25qxx_security_register_t num, uint8_t data[256])
 advance example read the security register only in the spi interface
 
uint8_t w25qxx_advance_only_spi_set_burst_with_wrap (w25qxx_burst_wrap_t wrap)
 advance example set the burst with wrap only in the spi interface More...
uint8_t w25qxx_advance_only_spi_set_burst_with_wrap (w25qxx_burst_wrap_t wrap)
 advance example set the burst with wrap only in the spi interface
 
uint8_t w25qxx_advance_only_qspi_set_read_parameters (w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
 advance example set the read parameters only in the qspi interface More...
uint8_t w25qxx_advance_only_qspi_set_read_parameters (w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
 advance example set the read parameters only in the qspi interface
 

Detailed Description

@@ -251,7 +257,7 @@

history

diff --git a/doc/html/driver__w25qxx__advance_8h_source.html b/doc/html/driver__w25qxx__advance_8h_source.html index 2a2cfcc..f6da107 100644 --- a/doc/html/driver__w25qxx__advance_8h_source.html +++ b/doc/html/driver__w25qxx__advance_8h_source.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: example/driver_w25qxx_advance.h Source File @@ -23,11 +23,10 @@
- + - @@ -36,22 +35,28 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ + +
@@ -78,172 +83,178 @@
- +
+
+
+
+
Loading...
+
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+
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+
+
+
-
-
driver_w25qxx_advance.h
+
driver_w25qxx_advance.h
-Go to the documentation of this file.
1 
-
37 #ifndef DRIVER_W25QXX_ADVANCE_H
-
38 #define DRIVER_W25QXX_ADVANCE_H
-
39 
-
40 #include "driver_w25qxx_interface.h"
-
41 
-
42 #ifdef __cplusplus
-
43 extern "C"{
-
44 #endif
-
45 
-
61 uint8_t w25qxx_advance_init(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable);
-
62 
-
70 uint8_t w25qxx_advance_deinit(void);
-
71 
-
79 uint8_t w25qxx_advance_power_down(void);
-
80 
-
88 uint8_t w25qxx_advance_wake_up(void);
-
89 
-
97 uint8_t w25qxx_advance_chip_erase(void);
-
98 
-
108 uint8_t w25qxx_advance_get_id(uint8_t *manufacturer, uint8_t *device_id);
-
109 
-
120 uint8_t w25qxx_advance_write(uint32_t addr, uint8_t *data, uint32_t len);
-
121 
-
132 uint8_t w25qxx_advance_read(uint32_t addr, uint8_t *data, uint32_t len);
-
133 
-
144 uint8_t w25qxx_advance_page_program(uint32_t addr, uint8_t *data, uint16_t len);
-
145 
-
154 uint8_t w25qxx_advance_sector_erase_4k(uint32_t addr);
-
155 
-
164 uint8_t w25qxx_advance_block_erase_32k(uint32_t addr);
-
165 
-
174 uint8_t w25qxx_advance_block_erase_64k(uint32_t addr);
-
175 
-
186 uint8_t w25qxx_advance_fast_read(uint32_t addr, uint8_t *data, uint32_t len);
-
187 
-
196 uint8_t w25qxx_advance_get_status1(uint8_t *status);
-
197 
-
206 uint8_t w25qxx_advance_get_status2(uint8_t *status);
-
207 
-
216 uint8_t w25qxx_advance_get_status3(uint8_t *status);
-
217 
-
226 uint8_t w25qxx_advance_set_status1(uint8_t status);
-
227 
-
236 uint8_t w25qxx_advance_set_status2(uint8_t status);
-
237 
-
246 uint8_t w25qxx_advance_set_status3(uint8_t status);
-
247 
-
257 uint8_t w25qxx_advance_get_get_jedec_id(uint8_t *manufacturer, uint8_t device_id[2]);
-
258 
-
266 uint8_t w25qxx_advance_global_block_lock(void);
-
267 
-
275 uint8_t w25qxx_advance_global_block_unlock(void);
-
276 
-
285 uint8_t w25qxx_advance_individual_block_lock(uint32_t addr);
-
286 
-
295 uint8_t w25qxx_advance_individual_block_unlock(uint32_t addr);
-
296 
-
306 uint8_t w25qxx_advance_read_block_lock(uint32_t addr, uint8_t *value);
-
307 
-
315 uint8_t w25qxx_advance_reset(void);
-
316 
-
327 uint8_t w25qxx_advance_only_spi_read(uint32_t addr, uint8_t *data, uint32_t len);
-
328 
-
339 uint8_t w25qxx_advance_only_spi_fast_read_dual_output(uint32_t addr, uint8_t *data, uint32_t len);
-
340 
-
351 uint8_t w25qxx_advance_only_spi_fast_read_quad_output(uint32_t addr, uint8_t *data, uint32_t len);
-
352 
-
363 uint8_t w25qxx_advance_only_spi_fast_read_dual_io(uint32_t addr, uint8_t *data, uint32_t len);
-
364 
-
375 uint8_t w25qxx_advance_only_spi_fast_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len);
-
376 
-
387 uint8_t w25qxx_advance_only_spi_word_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len);
-
388 
-
399 uint8_t w25qxx_advance_only_spi_octal_word_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len);
-
400 
-
411 uint8_t w25qxx_advance_only_spi_page_program_quad_input(uint32_t addr, uint8_t *data, uint16_t len);
-
412 
-
422 uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io(uint8_t *manufacturer, uint8_t *device_id);
-
423 
-
433 uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io(uint8_t *manufacturer, uint8_t *device_id);
-
434 
-
443 uint8_t w25qxx_advance_only_spi_get_unique_id(uint8_t id[8]);
-
444 
-
453 uint8_t w25qxx_advance_only_spi_get_sfdp(uint8_t sfdp[256]);
-
454 
-
464 uint8_t w25qxx_advance_only_spi_write_security_register(w25qxx_security_register_t num, uint8_t data[256]);
-
465 
-
475 uint8_t w25qxx_advance_only_spi_read_security_register(w25qxx_security_register_t num, uint8_t data[256]);
-
476 
-
485 uint8_t w25qxx_advance_only_spi_set_burst_with_wrap(w25qxx_burst_wrap_t wrap);
-
486 
-
496 uint8_t w25qxx_advance_only_qspi_set_read_parameters(w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length);
-
497 
-
502 #ifdef __cplusplus
-
503 }
-
504 #endif
-
505 
-
506 #endif
+Go to the documentation of this file.
1
+
37#ifndef DRIVER_W25QXX_ADVANCE_H
+
38#define DRIVER_W25QXX_ADVANCE_H
+
39
+
40#include "driver_w25qxx_interface.h"
+
41
+
42#ifdef __cplusplus
+
43extern "C"{
+
44#endif
+
45
+
61uint8_t w25qxx_advance_init(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable);
+
62
+
70uint8_t w25qxx_advance_deinit(void);
+
71
+
79uint8_t w25qxx_advance_power_down(void);
+
80
+
88uint8_t w25qxx_advance_wake_up(void);
+
89
+
97uint8_t w25qxx_advance_chip_erase(void);
+
98
+
108uint8_t w25qxx_advance_get_id(uint8_t *manufacturer, uint8_t *device_id);
+
109
+
120uint8_t w25qxx_advance_write(uint32_t addr, uint8_t *data, uint32_t len);
+
121
+
132uint8_t w25qxx_advance_read(uint32_t addr, uint8_t *data, uint32_t len);
+
133
+
144uint8_t w25qxx_advance_page_program(uint32_t addr, uint8_t *data, uint16_t len);
+
145
+
154uint8_t w25qxx_advance_sector_erase_4k(uint32_t addr);
+
155
+
164uint8_t w25qxx_advance_block_erase_32k(uint32_t addr);
+
165
+
174uint8_t w25qxx_advance_block_erase_64k(uint32_t addr);
+
175
+
186uint8_t w25qxx_advance_fast_read(uint32_t addr, uint8_t *data, uint32_t len);
+
187
+
196uint8_t w25qxx_advance_get_status1(uint8_t *status);
+
197
+
206uint8_t w25qxx_advance_get_status2(uint8_t *status);
+
207
+
216uint8_t w25qxx_advance_get_status3(uint8_t *status);
+
217
+
226uint8_t w25qxx_advance_set_status1(uint8_t status);
+
227
+
236uint8_t w25qxx_advance_set_status2(uint8_t status);
+
237
+
246uint8_t w25qxx_advance_set_status3(uint8_t status);
+
247
+
257uint8_t w25qxx_advance_get_get_jedec_id(uint8_t *manufacturer, uint8_t device_id[2]);
+
258
+
266uint8_t w25qxx_advance_global_block_lock(void);
+
267
+
275uint8_t w25qxx_advance_global_block_unlock(void);
+
276
+
285uint8_t w25qxx_advance_individual_block_lock(uint32_t addr);
+
286
+
295uint8_t w25qxx_advance_individual_block_unlock(uint32_t addr);
+
296
+
306uint8_t w25qxx_advance_read_block_lock(uint32_t addr, uint8_t *value);
+
307
+
315uint8_t w25qxx_advance_reset(void);
+
316
+
327uint8_t w25qxx_advance_only_spi_read(uint32_t addr, uint8_t *data, uint32_t len);
+
328
+
339uint8_t w25qxx_advance_only_spi_fast_read_dual_output(uint32_t addr, uint8_t *data, uint32_t len);
+
340
+
351uint8_t w25qxx_advance_only_spi_fast_read_quad_output(uint32_t addr, uint8_t *data, uint32_t len);
+
352
+
363uint8_t w25qxx_advance_only_spi_fast_read_dual_io(uint32_t addr, uint8_t *data, uint32_t len);
+
364
+
375uint8_t w25qxx_advance_only_spi_fast_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len);
+
376
+
387uint8_t w25qxx_advance_only_spi_word_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len);
+
388
+
399uint8_t w25qxx_advance_only_spi_octal_word_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len);
+
400
+
411uint8_t w25qxx_advance_only_spi_page_program_quad_input(uint32_t addr, uint8_t *data, uint16_t len);
+
412
+
422uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io(uint8_t *manufacturer, uint8_t *device_id);
+
423
+
433uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io(uint8_t *manufacturer, uint8_t *device_id);
+
434
+
443uint8_t w25qxx_advance_only_spi_get_unique_id(uint8_t id[8]);
+
444
+
453uint8_t w25qxx_advance_only_spi_get_sfdp(uint8_t sfdp[256]);
+
454
+
464uint8_t w25qxx_advance_only_spi_write_security_register(w25qxx_security_register_t num, uint8_t data[256]);
+
465
+
475uint8_t w25qxx_advance_only_spi_read_security_register(w25qxx_security_register_t num, uint8_t data[256]);
+
476
+
485uint8_t w25qxx_advance_only_spi_set_burst_with_wrap(w25qxx_burst_wrap_t wrap);
+
486
+
496uint8_t w25qxx_advance_only_qspi_set_read_parameters(w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length);
+
497
+
502#ifdef __cplusplus
+
503}
+
504#endif
+
505
+
506#endif
driver_w25qxx_interface.h
driver w25qxx interface header file
-
w25qxx_qspi_read_wrap_length_t
w25qxx_qspi_read_wrap_length_t
w25qxx qspi read wrap length enumeration definition
Definition: driver_w25qxx.h:123
-
w25qxx_qspi_read_dummy_t
w25qxx_qspi_read_dummy_t
w25qxx qspi read dummy enumeration definition
Definition: driver_w25qxx.h:112
-
w25qxx_security_register_t
w25qxx_security_register_t
w25qxx security register enumeration definition
Definition: driver_w25qxx.h:135
-
w25qxx_burst_wrap_t
w25qxx_burst_wrap_t
w25qxx burst wrap enumeration definition
Definition: driver_w25qxx.h:145
-
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition: driver_w25qxx.h:63
-
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition: driver_w25qxx.h:76
-
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition: driver_w25qxx.h:85
-
w25qxx_advance_read
uint8_t w25qxx_advance_read(uint32_t addr, uint8_t *data, uint32_t len)
advance example read
Definition: driver_w25qxx_advance.c:169
-
w25qxx_advance_only_spi_read_security_register
uint8_t w25qxx_advance_only_spi_read_security_register(w25qxx_security_register_t num, uint8_t data[256])
advance example read the security register only in the spi interface
Definition: driver_w25qxx_advance.c:939
-
w25qxx_advance_get_id
uint8_t w25qxx_advance_get_id(uint8_t *manufacturer, uint8_t *device_id)
advance example get the manufacturer && device id information
Definition: driver_w25qxx_advance.c:247
-
w25qxx_advance_reset
uint8_t w25qxx_advance_reset(void)
advance example reset
Definition: driver_w25qxx_advance.c:828
-
w25qxx_advance_chip_erase
uint8_t w25qxx_advance_chip_erase(void)
advance example chip erase
Definition: driver_w25qxx_advance.c:226
-
w25qxx_advance_only_spi_set_burst_with_wrap
uint8_t w25qxx_advance_only_spi_set_burst_with_wrap(w25qxx_burst_wrap_t wrap)
advance example set the burst with wrap only in the spi interface
Definition: driver_w25qxx_advance.c:959
-
w25qxx_advance_global_block_lock
uint8_t w25qxx_advance_global_block_lock(void)
advance example global block lock
Definition: driver_w25qxx_advance.c:729
-
w25qxx_advance_get_status3
uint8_t w25qxx_advance_get_status3(uint8_t *status)
advance example get the status 3
Definition: driver_w25qxx_advance.c:587
-
w25qxx_advance_only_spi_fast_read_dual_output
uint8_t w25qxx_advance_only_spi_fast_read_dual_output(uint32_t addr, uint8_t *data, uint32_t len)
advance example fast read only in the spi dual output interface
Definition: driver_w25qxx_advance.c:395
-
w25qxx_advance_only_spi_get_unique_id
uint8_t w25qxx_advance_only_spi_get_unique_id(uint8_t id[8])
advance example get the unique id only in the spi interface
Definition: driver_w25qxx_advance.c:873
-
w25qxx_advance_only_spi_fast_read_quad_io
uint8_t w25qxx_advance_only_spi_fast_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
advance example fast read only in the spi quad io interface
Definition: driver_w25qxx_advance.c:461
-
w25qxx_advance_page_program
uint8_t w25qxx_advance_page_program(uint32_t addr, uint8_t *data, uint16_t len)
advance example page program
Definition: driver_w25qxx_advance.c:269
-
w25qxx_advance_init
uint8_t w25qxx_advance_init(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
advance example init
Definition: driver_w25qxx_advance.c:51
-
w25qxx_advance_only_spi_fast_read_dual_io
uint8_t w25qxx_advance_only_spi_fast_read_dual_io(uint32_t addr, uint8_t *data, uint32_t len)
advance example fast read only in the spi dual io interface
Definition: driver_w25qxx_advance.c:439
-
w25qxx_advance_get_status1
uint8_t w25qxx_advance_get_status1(uint8_t *status)
advance example get the status 1
Definition: driver_w25qxx_advance.c:547
-
w25qxx_advance_power_down
uint8_t w25qxx_advance_power_down(void)
advance example power down
Definition: driver_w25qxx_advance.c:188
-
w25qxx_advance_set_status1
uint8_t w25qxx_advance_set_status1(uint8_t status)
advance example set the status 1
Definition: driver_w25qxx_advance.c:607
-
w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io(uint8_t *manufacturer, uint8_t *device_id)
advance example get the manufacturer && device id information only in the spi quad io interface
Definition: driver_w25qxx_advance.c:689
-
w25qxx_advance_write
uint8_t w25qxx_advance_write(uint32_t addr, uint8_t *data, uint32_t len)
advance example write
Definition: driver_w25qxx_advance.c:147
-
w25qxx_advance_individual_block_unlock
uint8_t w25qxx_advance_individual_block_unlock(uint32_t addr)
advance example unlock the individual block
Definition: driver_w25qxx_advance.c:788
-
w25qxx_advance_global_block_unlock
uint8_t w25qxx_advance_global_block_unlock(void)
advance example global block unlock
Definition: driver_w25qxx_advance.c:748
-
w25qxx_advance_fast_read
uint8_t w25qxx_advance_fast_read(uint32_t addr, uint8_t *data, uint32_t len)
advance example read in the fast mode
Definition: driver_w25qxx_advance.c:351
-
w25qxx_advance_only_spi_octal_word_read_quad_io
uint8_t w25qxx_advance_only_spi_octal_word_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
advance example octal word read only in the spi quad io interface
Definition: driver_w25qxx_advance.c:505
-
w25qxx_advance_wake_up
uint8_t w25qxx_advance_wake_up(void)
advance example wake up
Definition: driver_w25qxx_advance.c:207
-
w25qxx_advance_sector_erase_4k
uint8_t w25qxx_advance_sector_erase_4k(uint32_t addr)
advance example erase the 4k sector
Definition: driver_w25qxx_advance.c:289
-
w25qxx_advance_only_spi_get_sfdp
uint8_t w25qxx_advance_only_spi_get_sfdp(uint8_t sfdp[256])
advance example get the sfdp only in the spi interface
Definition: driver_w25qxx_advance.c:893
-
w25qxx_advance_set_status2
uint8_t w25qxx_advance_set_status2(uint8_t status)
advance example set the status 2
Definition: driver_w25qxx_advance.c:627
-
w25qxx_advance_only_spi_write_security_register
uint8_t w25qxx_advance_only_spi_write_security_register(w25qxx_security_register_t num, uint8_t data[256])
advance example write the security register only in the spi interface
Definition: driver_w25qxx_advance.c:914
-
w25qxx_advance_individual_block_lock
uint8_t w25qxx_advance_individual_block_lock(uint32_t addr)
advance example lock the individual block
Definition: driver_w25qxx_advance.c:768
-
w25qxx_advance_set_status3
uint8_t w25qxx_advance_set_status3(uint8_t status)
advance example set the status 3
Definition: driver_w25qxx_advance.c:647
-
w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io(uint8_t *manufacturer, uint8_t *device_id)
advance example get the manufacturer && device id information only in the spi dual io interface
Definition: driver_w25qxx_advance.c:668
-
w25qxx_advance_read_block_lock
uint8_t w25qxx_advance_read_block_lock(uint32_t addr, uint8_t *value)
advance example read the block lock
Definition: driver_w25qxx_advance.c:809
-
w25qxx_advance_only_spi_read
uint8_t w25qxx_advance_only_spi_read(uint32_t addr, uint8_t *data, uint32_t len)
advance example read only in the spi interface
Definition: driver_w25qxx_advance.c:373
-
w25qxx_advance_only_spi_word_read_quad_io
uint8_t w25qxx_advance_only_spi_word_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
advance example word read only in the spi quad io interface
Definition: driver_w25qxx_advance.c:483
-
w25qxx_advance_get_get_jedec_id
uint8_t w25qxx_advance_get_get_jedec_id(uint8_t *manufacturer, uint8_t device_id[2])
advance example get the jedec id information
Definition: driver_w25qxx_advance.c:710
-
w25qxx_advance_only_qspi_set_read_parameters
uint8_t w25qxx_advance_only_qspi_set_read_parameters(w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
advance example set the read parameters only in the qspi interface
Definition: driver_w25qxx_advance.c:853
-
w25qxx_advance_only_spi_page_program_quad_input
uint8_t w25qxx_advance_only_spi_page_program_quad_input(uint32_t addr, uint8_t *data, uint16_t len)
advance example quad page program only in the spi quad input interface
Definition: driver_w25qxx_advance.c:527
-
w25qxx_advance_block_erase_64k
uint8_t w25qxx_advance_block_erase_64k(uint32_t addr)
advance example erase the 64k block
Definition: driver_w25qxx_advance.c:329
-
w25qxx_advance_block_erase_32k
uint8_t w25qxx_advance_block_erase_32k(uint32_t addr)
advance example erase the 32k block
Definition: driver_w25qxx_advance.c:309
-
w25qxx_advance_deinit
uint8_t w25qxx_advance_deinit(void)
advance example deinit
Definition: driver_w25qxx_advance.c:125
-
w25qxx_advance_get_status2
uint8_t w25qxx_advance_get_status2(uint8_t *status)
advance example get the status 2
Definition: driver_w25qxx_advance.c:567
-
w25qxx_advance_only_spi_fast_read_quad_output
uint8_t w25qxx_advance_only_spi_fast_read_quad_output(uint32_t addr, uint8_t *data, uint32_t len)
advance example fast read only in the spi quad output interface
Definition: driver_w25qxx_advance.c:417
+
w25qxx_qspi_read_wrap_length_t
w25qxx_qspi_read_wrap_length_t
w25qxx qspi read wrap length enumeration definition
Definition driver_w25qxx.h:123
+
w25qxx_qspi_read_dummy_t
w25qxx_qspi_read_dummy_t
w25qxx qspi read dummy enumeration definition
Definition driver_w25qxx.h:112
+
w25qxx_security_register_t
w25qxx_security_register_t
w25qxx security register enumeration definition
Definition driver_w25qxx.h:135
+
w25qxx_burst_wrap_t
w25qxx_burst_wrap_t
w25qxx burst wrap enumeration definition
Definition driver_w25qxx.h:145
+
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition driver_w25qxx.h:63
+
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition driver_w25qxx.h:76
+
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition driver_w25qxx.h:85
+
w25qxx_advance_read
uint8_t w25qxx_advance_read(uint32_t addr, uint8_t *data, uint32_t len)
advance example read
Definition driver_w25qxx_advance.c:169
+
w25qxx_advance_only_spi_read_security_register
uint8_t w25qxx_advance_only_spi_read_security_register(w25qxx_security_register_t num, uint8_t data[256])
advance example read the security register only in the spi interface
Definition driver_w25qxx_advance.c:939
+
w25qxx_advance_get_id
uint8_t w25qxx_advance_get_id(uint8_t *manufacturer, uint8_t *device_id)
advance example get the manufacturer && device id information
Definition driver_w25qxx_advance.c:247
+
w25qxx_advance_reset
uint8_t w25qxx_advance_reset(void)
advance example reset
Definition driver_w25qxx_advance.c:828
+
w25qxx_advance_chip_erase
uint8_t w25qxx_advance_chip_erase(void)
advance example chip erase
Definition driver_w25qxx_advance.c:226
+
w25qxx_advance_only_spi_set_burst_with_wrap
uint8_t w25qxx_advance_only_spi_set_burst_with_wrap(w25qxx_burst_wrap_t wrap)
advance example set the burst with wrap only in the spi interface
Definition driver_w25qxx_advance.c:959
+
w25qxx_advance_global_block_lock
uint8_t w25qxx_advance_global_block_lock(void)
advance example global block lock
Definition driver_w25qxx_advance.c:729
+
w25qxx_advance_get_status3
uint8_t w25qxx_advance_get_status3(uint8_t *status)
advance example get the status 3
Definition driver_w25qxx_advance.c:587
+
w25qxx_advance_only_spi_fast_read_dual_output
uint8_t w25qxx_advance_only_spi_fast_read_dual_output(uint32_t addr, uint8_t *data, uint32_t len)
advance example fast read only in the spi dual output interface
Definition driver_w25qxx_advance.c:395
+
w25qxx_advance_only_spi_get_unique_id
uint8_t w25qxx_advance_only_spi_get_unique_id(uint8_t id[8])
advance example get the unique id only in the spi interface
Definition driver_w25qxx_advance.c:873
+
w25qxx_advance_only_spi_fast_read_quad_io
uint8_t w25qxx_advance_only_spi_fast_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
advance example fast read only in the spi quad io interface
Definition driver_w25qxx_advance.c:461
+
w25qxx_advance_page_program
uint8_t w25qxx_advance_page_program(uint32_t addr, uint8_t *data, uint16_t len)
advance example page program
Definition driver_w25qxx_advance.c:269
+
w25qxx_advance_init
uint8_t w25qxx_advance_init(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
advance example init
Definition driver_w25qxx_advance.c:51
+
w25qxx_advance_only_spi_fast_read_dual_io
uint8_t w25qxx_advance_only_spi_fast_read_dual_io(uint32_t addr, uint8_t *data, uint32_t len)
advance example fast read only in the spi dual io interface
Definition driver_w25qxx_advance.c:439
+
w25qxx_advance_get_status1
uint8_t w25qxx_advance_get_status1(uint8_t *status)
advance example get the status 1
Definition driver_w25qxx_advance.c:547
+
w25qxx_advance_power_down
uint8_t w25qxx_advance_power_down(void)
advance example power down
Definition driver_w25qxx_advance.c:188
+
w25qxx_advance_set_status1
uint8_t w25qxx_advance_set_status1(uint8_t status)
advance example set the status 1
Definition driver_w25qxx_advance.c:607
+
w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io(uint8_t *manufacturer, uint8_t *device_id)
advance example get the manufacturer && device id information only in the spi quad io interface
Definition driver_w25qxx_advance.c:689
+
w25qxx_advance_write
uint8_t w25qxx_advance_write(uint32_t addr, uint8_t *data, uint32_t len)
advance example write
Definition driver_w25qxx_advance.c:147
+
w25qxx_advance_individual_block_unlock
uint8_t w25qxx_advance_individual_block_unlock(uint32_t addr)
advance example unlock the individual block
Definition driver_w25qxx_advance.c:788
+
w25qxx_advance_global_block_unlock
uint8_t w25qxx_advance_global_block_unlock(void)
advance example global block unlock
Definition driver_w25qxx_advance.c:748
+
w25qxx_advance_fast_read
uint8_t w25qxx_advance_fast_read(uint32_t addr, uint8_t *data, uint32_t len)
advance example read in the fast mode
Definition driver_w25qxx_advance.c:351
+
w25qxx_advance_only_spi_octal_word_read_quad_io
uint8_t w25qxx_advance_only_spi_octal_word_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
advance example octal word read only in the spi quad io interface
Definition driver_w25qxx_advance.c:505
+
w25qxx_advance_wake_up
uint8_t w25qxx_advance_wake_up(void)
advance example wake up
Definition driver_w25qxx_advance.c:207
+
w25qxx_advance_sector_erase_4k
uint8_t w25qxx_advance_sector_erase_4k(uint32_t addr)
advance example erase the 4k sector
Definition driver_w25qxx_advance.c:289
+
w25qxx_advance_only_spi_get_sfdp
uint8_t w25qxx_advance_only_spi_get_sfdp(uint8_t sfdp[256])
advance example get the sfdp only in the spi interface
Definition driver_w25qxx_advance.c:893
+
w25qxx_advance_set_status2
uint8_t w25qxx_advance_set_status2(uint8_t status)
advance example set the status 2
Definition driver_w25qxx_advance.c:627
+
w25qxx_advance_only_spi_write_security_register
uint8_t w25qxx_advance_only_spi_write_security_register(w25qxx_security_register_t num, uint8_t data[256])
advance example write the security register only in the spi interface
Definition driver_w25qxx_advance.c:914
+
w25qxx_advance_individual_block_lock
uint8_t w25qxx_advance_individual_block_lock(uint32_t addr)
advance example lock the individual block
Definition driver_w25qxx_advance.c:768
+
w25qxx_advance_set_status3
uint8_t w25qxx_advance_set_status3(uint8_t status)
advance example set the status 3
Definition driver_w25qxx_advance.c:647
+
w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io(uint8_t *manufacturer, uint8_t *device_id)
advance example get the manufacturer && device id information only in the spi dual io interface
Definition driver_w25qxx_advance.c:668
+
w25qxx_advance_read_block_lock
uint8_t w25qxx_advance_read_block_lock(uint32_t addr, uint8_t *value)
advance example read the block lock
Definition driver_w25qxx_advance.c:809
+
w25qxx_advance_only_spi_read
uint8_t w25qxx_advance_only_spi_read(uint32_t addr, uint8_t *data, uint32_t len)
advance example read only in the spi interface
Definition driver_w25qxx_advance.c:373
+
w25qxx_advance_only_spi_word_read_quad_io
uint8_t w25qxx_advance_only_spi_word_read_quad_io(uint32_t addr, uint8_t *data, uint32_t len)
advance example word read only in the spi quad io interface
Definition driver_w25qxx_advance.c:483
+
w25qxx_advance_get_get_jedec_id
uint8_t w25qxx_advance_get_get_jedec_id(uint8_t *manufacturer, uint8_t device_id[2])
advance example get the jedec id information
Definition driver_w25qxx_advance.c:710
+
w25qxx_advance_only_qspi_set_read_parameters
uint8_t w25qxx_advance_only_qspi_set_read_parameters(w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
advance example set the read parameters only in the qspi interface
Definition driver_w25qxx_advance.c:853
+
w25qxx_advance_only_spi_page_program_quad_input
uint8_t w25qxx_advance_only_spi_page_program_quad_input(uint32_t addr, uint8_t *data, uint16_t len)
advance example quad page program only in the spi quad input interface
Definition driver_w25qxx_advance.c:527
+
w25qxx_advance_block_erase_64k
uint8_t w25qxx_advance_block_erase_64k(uint32_t addr)
advance example erase the 64k block
Definition driver_w25qxx_advance.c:329
+
w25qxx_advance_block_erase_32k
uint8_t w25qxx_advance_block_erase_32k(uint32_t addr)
advance example erase the 32k block
Definition driver_w25qxx_advance.c:309
+
w25qxx_advance_deinit
uint8_t w25qxx_advance_deinit(void)
advance example deinit
Definition driver_w25qxx_advance.c:125
+
w25qxx_advance_get_status2
uint8_t w25qxx_advance_get_status2(uint8_t *status)
advance example get the status 2
Definition driver_w25qxx_advance.c:567
+
w25qxx_advance_only_spi_fast_read_quad_output
uint8_t w25qxx_advance_only_spi_fast_read_quad_output(uint32_t addr, uint8_t *data, uint32_t len)
advance example fast read only in the spi quad output interface
Definition driver_w25qxx_advance.c:417
diff --git a/doc/html/driver__w25qxx__basic_8c.html b/doc/html/driver__w25qxx__basic_8c.html index 06e05a7..1d0550e 100644 --- a/doc/html/driver__w25qxx__basic_8c.html +++ b/doc/html/driver__w25qxx__basic_8c.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: example/driver_w25qxx_basic.c File Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +

@@ -64,7 +64,7 @@
@@ -78,16 +78,22 @@
- +
+
+
+
+
Loading...
+
Searching...
+
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+
+
+
Functions
-
-
driver_w25qxx_basic.c File Reference
+
driver_w25qxx_basic.c File Reference
@@ -97,31 +103,31 @@

Go to the source code of this file.

- - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + +

+

Functions

uint8_t w25qxx_basic_init (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 basic example init More...
uint8_t w25qxx_basic_init (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 basic example init
 
uint8_t w25qxx_basic_deinit (void)
 basic example deinit More...
uint8_t w25qxx_basic_deinit (void)
 basic example deinit
 
uint8_t w25qxx_basic_power_down (void)
 basic example power down More...
uint8_t w25qxx_basic_power_down (void)
 basic example power down
 
uint8_t w25qxx_basic_wake_up (void)
 basic example wake up More...
uint8_t w25qxx_basic_wake_up (void)
 basic example wake up
 
uint8_t w25qxx_basic_chip_erase (void)
 basic example chip erase More...
uint8_t w25qxx_basic_chip_erase (void)
 basic example chip erase
 
uint8_t w25qxx_basic_get_id (uint8_t *manufacturer, uint8_t *device_id)
 basic example get the manufacturer && device id information More...
uint8_t w25qxx_basic_get_id (uint8_t *manufacturer, uint8_t *device_id)
 basic example get the manufacturer && device id information
 
uint8_t w25qxx_basic_write (uint32_t addr, uint8_t *data, uint32_t len)
 basic example write More...
uint8_t w25qxx_basic_write (uint32_t addr, uint8_t *data, uint32_t len)
 basic example write
 
uint8_t w25qxx_basic_read (uint32_t addr, uint8_t *data, uint32_t len)
 basic example read More...
uint8_t w25qxx_basic_read (uint32_t addr, uint8_t *data, uint32_t len)
 basic example read
 

Detailed Description

@@ -149,7 +155,7 @@

history

diff --git a/doc/html/driver__w25qxx__basic_8c_source.html b/doc/html/driver__w25qxx__basic_8c_source.html index 88c33b0..f0abaac 100644 --- a/doc/html/driver__w25qxx__basic_8c_source.html +++ b/doc/html/driver__w25qxx__basic_8c_source.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: example/driver_w25qxx_basic.c Source File @@ -23,11 +23,10 @@
- + - @@ -36,22 +35,28 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ + +

@@ -78,217 +83,239 @@
- +
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+
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+
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+
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+
+
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-
-
driver_w25qxx_basic.c
+
driver_w25qxx_basic.c
-Go to the documentation of this file.
1 
-
37 #include "driver_w25qxx_basic.h"
-
38 
-
39 static w25qxx_handle_t gs_handle;
-
51 uint8_t w25qxx_basic_init(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
-
52 {
-
53  uint8_t res;
-
54 
-
55  /* link interface function */
-
56  DRIVER_W25QXX_LINK_INIT(&gs_handle, w25qxx_handle_t);
-
57  DRIVER_W25QXX_LINK_SPI_QSPI_INIT(&gs_handle, w25qxx_interface_spi_qspi_init);
-
58  DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(&gs_handle, w25qxx_interface_spi_qspi_deinit);
-
59  DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(&gs_handle, w25qxx_interface_spi_qspi_write_read);
-
60  DRIVER_W25QXX_LINK_DELAY_MS(&gs_handle, w25qxx_interface_delay_ms);
-
61  DRIVER_W25QXX_LINK_DELAY_US(&gs_handle, w25qxx_interface_delay_us);
-
62  DRIVER_W25QXX_LINK_DEBUG_PRINT(&gs_handle, w25qxx_interface_debug_print);
-
63 
-
64  /* set chip type */
-
65  res = w25qxx_set_type(&gs_handle, type);
-
66  if (res != 0)
-
67  {
-
68  w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
69 
-
70  return 1;
-
71  }
-
72 
-
73  /* set chip interface */
-
74  res = w25qxx_set_interface(&gs_handle, interface);
-
75  if (res != 0)
-
76  {
-
77  w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
-
78 
-
79  return 1;
-
80  }
-
81 
-
82  /* set dual quad spi */
-
83  res = w25qxx_set_dual_quad_spi(&gs_handle, dual_quad_spi_enable);
-
84  if (res != 0)
-
85  {
-
86  w25qxx_interface_debug_print("w25qxx: set dual quad spi failed.\n");
-
87  (void)w25qxx_deinit(&gs_handle);
-
88 
-
89  return 1;
-
90  }
-
91 
-
92  /* chip init */
-
93  res = w25qxx_init(&gs_handle);
-
94  if (res != 0)
-
95  {
-
96  w25qxx_interface_debug_print("w25qxx: init failed.\n");
-
97 
-
98  return 1;
-
99  }
-
100  else
-
101  {
-
102  if (type >= W25Q256)
-
103  {
-
104  res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
-
105  if (res != 0)
-
106  {
-
107  w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
108  (void)w25qxx_deinit(&gs_handle);
-
109 
-
110  return 1;
-
111  }
-
112  }
-
113 
-
114  return 0;
-
115  }
-
116 }
-
117 
-
125 uint8_t w25qxx_basic_deinit(void)
-
126 {
-
127  if (w25qxx_deinit(&gs_handle) != 0)
-
128  {
-
129  return 1;
-
130  }
-
131  else
-
132  {
-
133  return 0;
-
134  }
-
135 }
-
136 
-
144 uint8_t w25qxx_basic_power_down(void)
-
145 {
-
146  if (w25qxx_power_down(&gs_handle) != 0)
-
147  {
-
148  return 1;
-
149  }
-
150  else
-
151  {
-
152  return 0;
-
153  }
-
154 }
-
155 
-
163 uint8_t w25qxx_basic_wake_up(void)
-
164 {
-
165  if (w25qxx_release_power_down(&gs_handle) != 0)
-
166  {
-
167  return 1;
-
168  }
-
169  else
-
170  {
-
171  return 0;
-
172  }
-
173 }
-
174 
-
182 uint8_t w25qxx_basic_chip_erase(void)
-
183 {
-
184  if (w25qxx_chip_erase(&gs_handle) != 0)
-
185  {
-
186  return 1;
-
187  }
-
188  else
-
189  {
-
190  return 0;
-
191  }
-
192 }
-
193 
-
203 uint8_t w25qxx_basic_get_id(uint8_t *manufacturer, uint8_t *device_id)
-
204 {
-
205  if (w25qxx_get_manufacturer_device_id(&gs_handle, manufacturer, device_id) != 0)
-
206  {
-
207  return 1;
-
208  }
-
209  else
-
210  {
-
211  return 0;
-
212  }
-
213 }
-
214 
-
225 uint8_t w25qxx_basic_write(uint32_t addr, uint8_t *data, uint32_t len)
-
226 {
-
227  if (w25qxx_write(&gs_handle, addr, data, len) != 0)
-
228  {
-
229  return 1;
-
230  }
-
231  else
-
232  {
-
233  return 0;
-
234  }
-
235 }
-
236 
-
247 uint8_t w25qxx_basic_read(uint32_t addr, uint8_t *data, uint32_t len)
-
248 {
-
249  if (w25qxx_read(&gs_handle, addr, data, len) != 0)
-
250  {
-
251  return 1;
-
252  }
-
253  else
-
254  {
-
255  return 0;
-
256  }
-
257 }
+Go to the documentation of this file.
1
+
37#include "driver_w25qxx_basic.h"
+
38
+
39static w25qxx_handle_t gs_handle;
+
+
51uint8_t w25qxx_basic_init(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
+
52{
+
53 uint8_t res;
+
54
+
55 /* link interface function */
+
56 DRIVER_W25QXX_LINK_INIT(&gs_handle, w25qxx_handle_t);
+
57 DRIVER_W25QXX_LINK_SPI_QSPI_INIT(&gs_handle, w25qxx_interface_spi_qspi_init);
+
58 DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(&gs_handle, w25qxx_interface_spi_qspi_deinit);
+
59 DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(&gs_handle, w25qxx_interface_spi_qspi_write_read);
+
60 DRIVER_W25QXX_LINK_DELAY_MS(&gs_handle, w25qxx_interface_delay_ms);
+
61 DRIVER_W25QXX_LINK_DELAY_US(&gs_handle, w25qxx_interface_delay_us);
+
62 DRIVER_W25QXX_LINK_DEBUG_PRINT(&gs_handle, w25qxx_interface_debug_print);
+
63
+
64 /* set chip type */
+
65 res = w25qxx_set_type(&gs_handle, type);
+
66 if (res != 0)
+
67 {
+
68 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
69
+
70 return 1;
+
71 }
+
72
+
73 /* set chip interface */
+
74 res = w25qxx_set_interface(&gs_handle, interface);
+
75 if (res != 0)
+
76 {
+
77 w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
+
78
+
79 return 1;
+
80 }
+
81
+
82 /* set dual quad spi */
+
83 res = w25qxx_set_dual_quad_spi(&gs_handle, dual_quad_spi_enable);
+
84 if (res != 0)
+
85 {
+
86 w25qxx_interface_debug_print("w25qxx: set dual quad spi failed.\n");
+
87 (void)w25qxx_deinit(&gs_handle);
+
88
+
89 return 1;
+
90 }
+
91
+
92 /* chip init */
+
93 res = w25qxx_init(&gs_handle);
+
94 if (res != 0)
+
95 {
+
96 w25qxx_interface_debug_print("w25qxx: init failed.\n");
+
97
+
98 return 1;
+
99 }
+
100 else
+
101 {
+
102 if (type >= W25Q256)
+
103 {
+
104 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
+
105 if (res != 0)
+
106 {
+
107 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
108 (void)w25qxx_deinit(&gs_handle);
+
109
+
110 return 1;
+
111 }
+
112 }
+
113
+
114 return 0;
+
115 }
+
116}
+
+
117
+
+
125uint8_t w25qxx_basic_deinit(void)
+
126{
+
127 if (w25qxx_deinit(&gs_handle) != 0)
+
128 {
+
129 return 1;
+
130 }
+
131 else
+
132 {
+
133 return 0;
+
134 }
+
135}
+
+
136
+
+
144uint8_t w25qxx_basic_power_down(void)
+
145{
+
146 if (w25qxx_power_down(&gs_handle) != 0)
+
147 {
+
148 return 1;
+
149 }
+
150 else
+
151 {
+
152 return 0;
+
153 }
+
154}
+
+
155
+
+
163uint8_t w25qxx_basic_wake_up(void)
+
164{
+
165 if (w25qxx_release_power_down(&gs_handle) != 0)
+
166 {
+
167 return 1;
+
168 }
+
169 else
+
170 {
+
171 return 0;
+
172 }
+
173}
+
+
174
+
+
182uint8_t w25qxx_basic_chip_erase(void)
+
183{
+
184 if (w25qxx_chip_erase(&gs_handle) != 0)
+
185 {
+
186 return 1;
+
187 }
+
188 else
+
189 {
+
190 return 0;
+
191 }
+
192}
+
+
193
+
+
203uint8_t w25qxx_basic_get_id(uint8_t *manufacturer, uint8_t *device_id)
+
204{
+
205 if (w25qxx_get_manufacturer_device_id(&gs_handle, manufacturer, device_id) != 0)
+
206 {
+
207 return 1;
+
208 }
+
209 else
+
210 {
+
211 return 0;
+
212 }
+
213}
+
+
214
+
+
225uint8_t w25qxx_basic_write(uint32_t addr, uint8_t *data, uint32_t len)
+
226{
+
227 if (w25qxx_write(&gs_handle, addr, data, len) != 0)
+
228 {
+
229 return 1;
+
230 }
+
231 else
+
232 {
+
233 return 0;
+
234 }
+
235}
+
+
236
+
+
247uint8_t w25qxx_basic_read(uint32_t addr, uint8_t *data, uint32_t len)
+
248{
+
249 if (w25qxx_read(&gs_handle, addr, data, len) != 0)
+
250 {
+
251 return 1;
+
252 }
+
253 else
+
254 {
+
255 return 0;
+
256 }
+
257}
+
driver_w25qxx_basic.h
driver w25qxx basic header file
-
w25qxx_chip_erase
uint8_t w25qxx_chip_erase(w25qxx_handle_t *handle)
erase the chip
Definition: driver_w25qxx.c:1459
-
w25qxx_release_power_down
uint8_t w25qxx_release_power_down(w25qxx_handle_t *handle)
release power down
Definition: driver_w25qxx.c:1875
-
w25qxx_set_interface
uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface)
set the chip interface
Definition: driver_w25qxx.c:259
-
w25qxx_set_dual_quad_spi
uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable)
enable or disable the dual quad spi
Definition: driver_w25qxx.c:175
-
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition: driver_w25qxx.h:63
-
w25qxx_init
uint8_t w25qxx_init(w25qxx_handle_t *handle)
initialize the chip
Definition: driver_w25qxx.c:6819
-
w25qxx_get_manufacturer_device_id
uint8_t w25qxx_get_manufacturer_device_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information
Definition: driver_w25qxx.c:1952
-
w25qxx_deinit
uint8_t w25qxx_deinit(w25qxx_handle_t *handle)
close the chip
Definition: driver_w25qxx.c:7195
-
w25qxx_set_type
uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type)
set the chip type
Definition: driver_w25qxx.c:217
-
w25qxx_write
uint8_t w25qxx_write(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
write data
Definition: driver_w25qxx.c:8415
-
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition: driver_w25qxx.h:76
-
w25qxx_set_address_mode
uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
set the chip address mode
Definition: driver_w25qxx.c:304
-
w25qxx_power_down
uint8_t w25qxx_power_down(w25qxx_handle_t *handle)
power down
Definition: driver_w25qxx.c:1792
-
w25qxx_read
uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read data
Definition: driver_w25qxx.c:7289
-
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition: driver_w25qxx.h:85
-
W25Q256
@ W25Q256
Definition: driver_w25qxx.h:69
-
W25QXX_ADDRESS_MODE_4_BYTE
@ W25QXX_ADDRESS_MODE_4_BYTE
Definition: driver_w25qxx.h:96
-
w25qxx_basic_wake_up
uint8_t w25qxx_basic_wake_up(void)
basic example wake up
Definition: driver_w25qxx_basic.c:163
-
w25qxx_basic_read
uint8_t w25qxx_basic_read(uint32_t addr, uint8_t *data, uint32_t len)
basic example read
Definition: driver_w25qxx_basic.c:247
-
w25qxx_basic_init
uint8_t w25qxx_basic_init(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
basic example init
Definition: driver_w25qxx_basic.c:51
-
w25qxx_basic_power_down
uint8_t w25qxx_basic_power_down(void)
basic example power down
Definition: driver_w25qxx_basic.c:144
-
w25qxx_basic_write
uint8_t w25qxx_basic_write(uint32_t addr, uint8_t *data, uint32_t len)
basic example write
Definition: driver_w25qxx_basic.c:225
-
w25qxx_basic_get_id
uint8_t w25qxx_basic_get_id(uint8_t *manufacturer, uint8_t *device_id)
basic example get the manufacturer && device id information
Definition: driver_w25qxx_basic.c:203
-
w25qxx_basic_deinit
uint8_t w25qxx_basic_deinit(void)
basic example deinit
Definition: driver_w25qxx_basic.c:125
-
w25qxx_basic_chip_erase
uint8_t w25qxx_basic_chip_erase(void)
basic example chip erase
Definition: driver_w25qxx_basic.c:182
-
w25qxx_interface_spi_qspi_deinit
uint8_t w25qxx_interface_spi_qspi_deinit(void)
interface spi qspi bus deinit
Definition: driver_w25qxx_interface_template.c:58
-
w25qxx_interface_spi_qspi_init
uint8_t w25qxx_interface_spi_qspi_init(void)
interface spi qspi bus init
Definition: driver_w25qxx_interface_template.c:46
-
w25qxx_interface_delay_us
void w25qxx_interface_delay_us(uint32_t us)
interface delay us
Definition: driver_w25qxx_interface_template.c:108
-
w25qxx_interface_spi_qspi_write_read
uint8_t w25qxx_interface_spi_qspi_write_read(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
interface spi qspi bus write read
Definition: driver_w25qxx_interface_template.c:84
-
w25qxx_interface_debug_print
void w25qxx_interface_debug_print(const char *const fmt,...)
interface print format data
Definition: driver_w25qxx_interface_template.c:118
-
w25qxx_interface_delay_ms
void w25qxx_interface_delay_ms(uint32_t ms)
interface delay ms
Definition: driver_w25qxx_interface_template.c:98
-
DRIVER_W25QXX_LINK_DELAY_MS
#define DRIVER_W25QXX_LINK_DELAY_MS(HANDLE, FUC)
link delay_ms function
Definition: driver_w25qxx.h:297
-
DRIVER_W25QXX_LINK_INIT
#define DRIVER_W25QXX_LINK_INIT(HANDLE, STRUCTURE)
initialize w25qxx_handle_t structure
Definition: driver_w25qxx.h:265
-
DRIVER_W25QXX_LINK_SPI_QSPI_INIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_INIT(HANDLE, FUC)
link spi_qspi_init function
Definition: driver_w25qxx.h:273
-
DRIVER_W25QXX_LINK_DEBUG_PRINT
#define DRIVER_W25QXX_LINK_DEBUG_PRINT(HANDLE, FUC)
link debug_print function
Definition: driver_w25qxx.h:313
-
DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ
#define DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(HANDLE, FUC)
link spi_qspi_write_read function
Definition: driver_w25qxx.h:289
-
DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(HANDLE, FUC)
link spi_qspi_deinit function
Definition: driver_w25qxx.h:281
-
DRIVER_W25QXX_LINK_DELAY_US
#define DRIVER_W25QXX_LINK_DELAY_US(HANDLE, FUC)
link delay_us function
Definition: driver_w25qxx.h:305
-
w25qxx_handle_s
w25qxx handle structure definition
Definition: driver_w25qxx.h:210
+
w25qxx_chip_erase
uint8_t w25qxx_chip_erase(w25qxx_handle_t *handle)
erase the chip
Definition driver_w25qxx.c:1459
+
w25qxx_release_power_down
uint8_t w25qxx_release_power_down(w25qxx_handle_t *handle)
release power down
Definition driver_w25qxx.c:1875
+
w25qxx_set_interface
uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface)
set the chip interface
Definition driver_w25qxx.c:259
+
w25qxx_set_dual_quad_spi
uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable)
enable or disable the dual quad spi
Definition driver_w25qxx.c:175
+
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition driver_w25qxx.h:63
+
w25qxx_init
uint8_t w25qxx_init(w25qxx_handle_t *handle)
initialize the chip
Definition driver_w25qxx.c:6819
+
w25qxx_get_manufacturer_device_id
uint8_t w25qxx_get_manufacturer_device_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information
Definition driver_w25qxx.c:1952
+
w25qxx_deinit
uint8_t w25qxx_deinit(w25qxx_handle_t *handle)
close the chip
Definition driver_w25qxx.c:7195
+
w25qxx_set_type
uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type)
set the chip type
Definition driver_w25qxx.c:217
+
w25qxx_write
uint8_t w25qxx_write(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
write data
Definition driver_w25qxx.c:8415
+
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition driver_w25qxx.h:76
+
w25qxx_set_address_mode
uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
set the chip address mode
Definition driver_w25qxx.c:304
+
w25qxx_power_down
uint8_t w25qxx_power_down(w25qxx_handle_t *handle)
power down
Definition driver_w25qxx.c:1792
+
w25qxx_read
uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read data
Definition driver_w25qxx.c:7289
+
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition driver_w25qxx.h:85
+
W25Q256
@ W25Q256
Definition driver_w25qxx.h:69
+
W25QXX_ADDRESS_MODE_4_BYTE
@ W25QXX_ADDRESS_MODE_4_BYTE
Definition driver_w25qxx.h:96
+
w25qxx_basic_wake_up
uint8_t w25qxx_basic_wake_up(void)
basic example wake up
Definition driver_w25qxx_basic.c:163
+
w25qxx_basic_read
uint8_t w25qxx_basic_read(uint32_t addr, uint8_t *data, uint32_t len)
basic example read
Definition driver_w25qxx_basic.c:247
+
w25qxx_basic_init
uint8_t w25qxx_basic_init(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
basic example init
Definition driver_w25qxx_basic.c:51
+
w25qxx_basic_power_down
uint8_t w25qxx_basic_power_down(void)
basic example power down
Definition driver_w25qxx_basic.c:144
+
w25qxx_basic_write
uint8_t w25qxx_basic_write(uint32_t addr, uint8_t *data, uint32_t len)
basic example write
Definition driver_w25qxx_basic.c:225
+
w25qxx_basic_get_id
uint8_t w25qxx_basic_get_id(uint8_t *manufacturer, uint8_t *device_id)
basic example get the manufacturer && device id information
Definition driver_w25qxx_basic.c:203
+
w25qxx_basic_deinit
uint8_t w25qxx_basic_deinit(void)
basic example deinit
Definition driver_w25qxx_basic.c:125
+
w25qxx_basic_chip_erase
uint8_t w25qxx_basic_chip_erase(void)
basic example chip erase
Definition driver_w25qxx_basic.c:182
+
w25qxx_interface_spi_qspi_deinit
uint8_t w25qxx_interface_spi_qspi_deinit(void)
interface spi qspi bus deinit
Definition driver_w25qxx_interface_template.c:58
+
w25qxx_interface_spi_qspi_init
uint8_t w25qxx_interface_spi_qspi_init(void)
interface spi qspi bus init
Definition driver_w25qxx_interface_template.c:46
+
w25qxx_interface_delay_us
void w25qxx_interface_delay_us(uint32_t us)
interface delay us
Definition driver_w25qxx_interface_template.c:108
+
w25qxx_interface_spi_qspi_write_read
uint8_t w25qxx_interface_spi_qspi_write_read(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
interface spi qspi bus write read
Definition driver_w25qxx_interface_template.c:84
+
w25qxx_interface_debug_print
void w25qxx_interface_debug_print(const char *const fmt,...)
interface print format data
Definition driver_w25qxx_interface_template.c:118
+
w25qxx_interface_delay_ms
void w25qxx_interface_delay_ms(uint32_t ms)
interface delay ms
Definition driver_w25qxx_interface_template.c:98
+
DRIVER_W25QXX_LINK_DELAY_MS
#define DRIVER_W25QXX_LINK_DELAY_MS(HANDLE, FUC)
link delay_ms function
Definition driver_w25qxx.h:297
+
DRIVER_W25QXX_LINK_INIT
#define DRIVER_W25QXX_LINK_INIT(HANDLE, STRUCTURE)
initialize w25qxx_handle_t structure
Definition driver_w25qxx.h:265
+
DRIVER_W25QXX_LINK_SPI_QSPI_INIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_INIT(HANDLE, FUC)
link spi_qspi_init function
Definition driver_w25qxx.h:273
+
DRIVER_W25QXX_LINK_DEBUG_PRINT
#define DRIVER_W25QXX_LINK_DEBUG_PRINT(HANDLE, FUC)
link debug_print function
Definition driver_w25qxx.h:313
+
DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ
#define DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(HANDLE, FUC)
link spi_qspi_write_read function
Definition driver_w25qxx.h:289
+
DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(HANDLE, FUC)
link spi_qspi_deinit function
Definition driver_w25qxx.h:281
+
DRIVER_W25QXX_LINK_DELAY_US
#define DRIVER_W25QXX_LINK_DELAY_US(HANDLE, FUC)
link delay_us function
Definition driver_w25qxx.h:305
+
w25qxx_handle_s
w25qxx handle structure definition
Definition driver_w25qxx.h:210
diff --git a/doc/html/driver__w25qxx__basic_8h.html b/doc/html/driver__w25qxx__basic_8h.html index 9ee0b4c..3c8a4d6 100644 --- a/doc/html/driver__w25qxx__basic_8h.html +++ b/doc/html/driver__w25qxx__basic_8h.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: example/driver_w25qxx_basic.h File Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@

@@ -78,16 +78,22 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
Functions
-
-
driver_w25qxx_basic.h File Reference
+
driver_w25qxx_basic.h File Reference
@@ -97,31 +103,31 @@

Go to the source code of this file.

- - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + +

+

Functions

uint8_t w25qxx_basic_init (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 basic example init More...
uint8_t w25qxx_basic_init (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 basic example init
 
uint8_t w25qxx_basic_deinit (void)
 basic example deinit More...
uint8_t w25qxx_basic_deinit (void)
 basic example deinit
 
uint8_t w25qxx_basic_power_down (void)
 basic example power down More...
uint8_t w25qxx_basic_power_down (void)
 basic example power down
 
uint8_t w25qxx_basic_wake_up (void)
 basic example wake up More...
uint8_t w25qxx_basic_wake_up (void)
 basic example wake up
 
uint8_t w25qxx_basic_chip_erase (void)
 basic example chip erase More...
uint8_t w25qxx_basic_chip_erase (void)
 basic example chip erase
 
uint8_t w25qxx_basic_get_id (uint8_t *manufacturer, uint8_t *device_id)
 basic example get the manufacturer && device id information More...
uint8_t w25qxx_basic_get_id (uint8_t *manufacturer, uint8_t *device_id)
 basic example get the manufacturer && device id information
 
uint8_t w25qxx_basic_write (uint32_t addr, uint8_t *data, uint32_t len)
 basic example write More...
uint8_t w25qxx_basic_write (uint32_t addr, uint8_t *data, uint32_t len)
 basic example write
 
uint8_t w25qxx_basic_read (uint32_t addr, uint8_t *data, uint32_t len)
 basic example read More...
uint8_t w25qxx_basic_read (uint32_t addr, uint8_t *data, uint32_t len)
 basic example read
 

Detailed Description

@@ -149,7 +155,7 @@

history

diff --git a/doc/html/driver__w25qxx__basic_8h_source.html b/doc/html/driver__w25qxx__basic_8h_source.html index 766ad7a..07f053f 100644 --- a/doc/html/driver__w25qxx__basic_8h_source.html +++ b/doc/html/driver__w25qxx__basic_8h_source.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: example/driver_w25qxx_basic.h Source File @@ -23,11 +23,10 @@
- + - @@ -36,22 +35,28 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ + +
@@ -78,66 +83,72 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
-
-
driver_w25qxx_basic.h
+
driver_w25qxx_basic.h
-Go to the documentation of this file.
1 
-
37 #ifndef DRIVER_W25QXX_BASIC_H
-
38 #define DRIVER_W25QXX_BASIC_H
-
39 
-
40 #include "driver_w25qxx_interface.h"
-
41 
-
42 #ifdef __cplusplus
-
43 extern "C"{
-
44 #endif
-
45 
-
63 uint8_t w25qxx_basic_init(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable);
-
64 
-
72 uint8_t w25qxx_basic_deinit(void);
-
73 
-
81 uint8_t w25qxx_basic_power_down(void);
-
82 
-
90 uint8_t w25qxx_basic_wake_up(void);
-
91 
-
99 uint8_t w25qxx_basic_chip_erase(void);
-
100 
-
110 uint8_t w25qxx_basic_get_id(uint8_t *manufacturer, uint8_t *device_id);
-
111 
-
122 uint8_t w25qxx_basic_write(uint32_t addr, uint8_t *data, uint32_t len);
-
123 
-
134 uint8_t w25qxx_basic_read(uint32_t addr, uint8_t *data, uint32_t len);
-
135 
-
140 #ifdef __cplusplus
-
141 }
-
142 #endif
-
143 
-
144 #endif
+Go to the documentation of this file.
1
+
37#ifndef DRIVER_W25QXX_BASIC_H
+
38#define DRIVER_W25QXX_BASIC_H
+
39
+
40#include "driver_w25qxx_interface.h"
+
41
+
42#ifdef __cplusplus
+
43extern "C"{
+
44#endif
+
45
+
63uint8_t w25qxx_basic_init(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable);
+
64
+
72uint8_t w25qxx_basic_deinit(void);
+
73
+
81uint8_t w25qxx_basic_power_down(void);
+
82
+
90uint8_t w25qxx_basic_wake_up(void);
+
91
+
99uint8_t w25qxx_basic_chip_erase(void);
+
100
+
110uint8_t w25qxx_basic_get_id(uint8_t *manufacturer, uint8_t *device_id);
+
111
+
122uint8_t w25qxx_basic_write(uint32_t addr, uint8_t *data, uint32_t len);
+
123
+
134uint8_t w25qxx_basic_read(uint32_t addr, uint8_t *data, uint32_t len);
+
135
+
140#ifdef __cplusplus
+
141}
+
142#endif
+
143
+
144#endif
driver_w25qxx_interface.h
driver w25qxx interface header file
-
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition: driver_w25qxx.h:63
-
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition: driver_w25qxx.h:76
-
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition: driver_w25qxx.h:85
-
w25qxx_basic_wake_up
uint8_t w25qxx_basic_wake_up(void)
basic example wake up
Definition: driver_w25qxx_basic.c:163
-
w25qxx_basic_read
uint8_t w25qxx_basic_read(uint32_t addr, uint8_t *data, uint32_t len)
basic example read
Definition: driver_w25qxx_basic.c:247
-
w25qxx_basic_init
uint8_t w25qxx_basic_init(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
basic example init
Definition: driver_w25qxx_basic.c:51
-
w25qxx_basic_power_down
uint8_t w25qxx_basic_power_down(void)
basic example power down
Definition: driver_w25qxx_basic.c:144
-
w25qxx_basic_write
uint8_t w25qxx_basic_write(uint32_t addr, uint8_t *data, uint32_t len)
basic example write
Definition: driver_w25qxx_basic.c:225
-
w25qxx_basic_get_id
uint8_t w25qxx_basic_get_id(uint8_t *manufacturer, uint8_t *device_id)
basic example get the manufacturer && device id information
Definition: driver_w25qxx_basic.c:203
-
w25qxx_basic_deinit
uint8_t w25qxx_basic_deinit(void)
basic example deinit
Definition: driver_w25qxx_basic.c:125
-
w25qxx_basic_chip_erase
uint8_t w25qxx_basic_chip_erase(void)
basic example chip erase
Definition: driver_w25qxx_basic.c:182
+
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition driver_w25qxx.h:63
+
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition driver_w25qxx.h:76
+
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition driver_w25qxx.h:85
+
w25qxx_basic_wake_up
uint8_t w25qxx_basic_wake_up(void)
basic example wake up
Definition driver_w25qxx_basic.c:163
+
w25qxx_basic_read
uint8_t w25qxx_basic_read(uint32_t addr, uint8_t *data, uint32_t len)
basic example read
Definition driver_w25qxx_basic.c:247
+
w25qxx_basic_init
uint8_t w25qxx_basic_init(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
basic example init
Definition driver_w25qxx_basic.c:51
+
w25qxx_basic_power_down
uint8_t w25qxx_basic_power_down(void)
basic example power down
Definition driver_w25qxx_basic.c:144
+
w25qxx_basic_write
uint8_t w25qxx_basic_write(uint32_t addr, uint8_t *data, uint32_t len)
basic example write
Definition driver_w25qxx_basic.c:225
+
w25qxx_basic_get_id
uint8_t w25qxx_basic_get_id(uint8_t *manufacturer, uint8_t *device_id)
basic example get the manufacturer && device id information
Definition driver_w25qxx_basic.c:203
+
w25qxx_basic_deinit
uint8_t w25qxx_basic_deinit(void)
basic example deinit
Definition driver_w25qxx_basic.c:125
+
w25qxx_basic_chip_erase
uint8_t w25qxx_basic_chip_erase(void)
basic example chip erase
Definition driver_w25qxx_basic.c:182
diff --git a/doc/html/driver__w25qxx__interface_8h.html b/doc/html/driver__w25qxx__interface_8h.html index 6b775ac..00a4d36 100644 --- a/doc/html/driver__w25qxx__interface_8h.html +++ b/doc/html/driver__w25qxx__interface_8h.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: interface/driver_w25qxx_interface.h File Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +

@@ -64,7 +64,7 @@
@@ -78,16 +78,22 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
Functions
-
-
driver_w25qxx_interface.h File Reference
+
driver_w25qxx_interface.h File Reference
@@ -97,25 +103,25 @@

Go to the source code of this file.

- - - + + - - + + - - + + - - + + - - + + - - + +

+

Functions

uint8_t w25qxx_interface_spi_qspi_init (void)
 interface spi qspi bus init More...
uint8_t w25qxx_interface_spi_qspi_init (void)
 interface spi qspi bus init
 
uint8_t w25qxx_interface_spi_qspi_deinit (void)
 interface spi qspi bus deinit More...
uint8_t w25qxx_interface_spi_qspi_deinit (void)
 interface spi qspi bus deinit
 
uint8_t w25qxx_interface_spi_qspi_write_read (uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
 interface spi qspi bus write read More...
uint8_t w25qxx_interface_spi_qspi_write_read (uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
 interface spi qspi bus write read
 
void w25qxx_interface_delay_ms (uint32_t ms)
 interface delay ms More...
void w25qxx_interface_delay_ms (uint32_t ms)
 interface delay ms
 
void w25qxx_interface_delay_us (uint32_t us)
 interface delay us More...
void w25qxx_interface_delay_us (uint32_t us)
 interface delay us
 
void w25qxx_interface_debug_print (const char *const fmt,...)
 interface print format data More...
void w25qxx_interface_debug_print (const char *const fmt,...)
 interface print format data
 

Detailed Description

@@ -143,7 +149,7 @@

history

diff --git a/doc/html/driver__w25qxx__interface_8h_source.html b/doc/html/driver__w25qxx__interface_8h_source.html index 082ac78..4af1d60 100644 --- a/doc/html/driver__w25qxx__interface_8h_source.html +++ b/doc/html/driver__w25qxx__interface_8h_source.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: interface/driver_w25qxx_interface.h Source File @@ -23,11 +23,10 @@
- + - @@ -36,22 +35,28 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ + +

@@ -78,60 +83,66 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
-
-
driver_w25qxx_interface.h
+
driver_w25qxx_interface.h
-Go to the documentation of this file.
1 
-
37 #ifndef DRIVER_W25QXX_INTERFACE_H
-
38 #define DRIVER_W25QXX_INTERFACE_H
-
39 
-
40 #include "driver_w25qxx.h"
-
41 
-
42 #ifdef __cplusplus
-
43 extern "C"{
-
44 #endif
-
45 
-
60 uint8_t w25qxx_interface_spi_qspi_init(void);
-
61 
-
69 uint8_t w25qxx_interface_spi_qspi_deinit(void);
-
70 
-
92 uint8_t w25qxx_interface_spi_qspi_write_read(uint8_t instruction, uint8_t instruction_line,
-
93  uint32_t address, uint8_t address_line, uint8_t address_len,
-
94  uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len,
-
95  uint8_t dummy, uint8_t *in_buf, uint32_t in_len,
-
96  uint8_t *out_buf, uint32_t out_len, uint8_t data_line);
-
97 
-
103 void w25qxx_interface_delay_ms(uint32_t ms);
-
104 
-
110 void w25qxx_interface_delay_us(uint32_t us);
-
111 
-
117 void w25qxx_interface_debug_print(const char *const fmt, ...);
-
122 #ifdef __cplusplus
-
123 }
-
124 #endif
-
125 
-
126 #endif
+Go to the documentation of this file.
1
+
37#ifndef DRIVER_W25QXX_INTERFACE_H
+
38#define DRIVER_W25QXX_INTERFACE_H
+
39
+
40#include "driver_w25qxx.h"
+
41
+
42#ifdef __cplusplus
+
43extern "C"{
+
44#endif
+
45
+
60uint8_t w25qxx_interface_spi_qspi_init(void);
+
61
+
69uint8_t w25qxx_interface_spi_qspi_deinit(void);
+
70
+
92uint8_t w25qxx_interface_spi_qspi_write_read(uint8_t instruction, uint8_t instruction_line,
+
93 uint32_t address, uint8_t address_line, uint8_t address_len,
+
94 uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len,
+
95 uint8_t dummy, uint8_t *in_buf, uint32_t in_len,
+
96 uint8_t *out_buf, uint32_t out_len, uint8_t data_line);
+
97
+
103void w25qxx_interface_delay_ms(uint32_t ms);
+
104
+
110void w25qxx_interface_delay_us(uint32_t us);
+
111
+
117void w25qxx_interface_debug_print(const char *const fmt, ...);
+
122#ifdef __cplusplus
+
123}
+
124#endif
+
125
+
126#endif
driver_w25qxx.h
driver w25qxx header file
-
w25qxx_interface_spi_qspi_deinit
uint8_t w25qxx_interface_spi_qspi_deinit(void)
interface spi qspi bus deinit
Definition: driver_w25qxx_interface_template.c:58
-
w25qxx_interface_spi_qspi_init
uint8_t w25qxx_interface_spi_qspi_init(void)
interface spi qspi bus init
Definition: driver_w25qxx_interface_template.c:46
-
w25qxx_interface_delay_us
void w25qxx_interface_delay_us(uint32_t us)
interface delay us
Definition: driver_w25qxx_interface_template.c:108
-
w25qxx_interface_spi_qspi_write_read
uint8_t w25qxx_interface_spi_qspi_write_read(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
interface spi qspi bus write read
Definition: driver_w25qxx_interface_template.c:84
-
w25qxx_interface_debug_print
void w25qxx_interface_debug_print(const char *const fmt,...)
interface print format data
Definition: driver_w25qxx_interface_template.c:118
-
w25qxx_interface_delay_ms
void w25qxx_interface_delay_ms(uint32_t ms)
interface delay ms
Definition: driver_w25qxx_interface_template.c:98
+
w25qxx_interface_spi_qspi_deinit
uint8_t w25qxx_interface_spi_qspi_deinit(void)
interface spi qspi bus deinit
Definition driver_w25qxx_interface_template.c:58
+
w25qxx_interface_spi_qspi_init
uint8_t w25qxx_interface_spi_qspi_init(void)
interface spi qspi bus init
Definition driver_w25qxx_interface_template.c:46
+
w25qxx_interface_delay_us
void w25qxx_interface_delay_us(uint32_t us)
interface delay us
Definition driver_w25qxx_interface_template.c:108
+
w25qxx_interface_spi_qspi_write_read
uint8_t w25qxx_interface_spi_qspi_write_read(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
interface spi qspi bus write read
Definition driver_w25qxx_interface_template.c:84
+
w25qxx_interface_debug_print
void w25qxx_interface_debug_print(const char *const fmt,...)
interface print format data
Definition driver_w25qxx_interface_template.c:118
+
w25qxx_interface_delay_ms
void w25qxx_interface_delay_ms(uint32_t ms)
interface delay ms
Definition driver_w25qxx_interface_template.c:98
diff --git a/doc/html/driver__w25qxx__interface__template_8c.html b/doc/html/driver__w25qxx__interface__template_8c.html index 2148d98..078636d 100644 --- a/doc/html/driver__w25qxx__interface__template_8c.html +++ b/doc/html/driver__w25qxx__interface__template_8c.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: interface/driver_w25qxx_interface_template.c File Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@

@@ -78,16 +78,22 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
Functions
-
-
driver_w25qxx_interface_template.c File Reference
+
driver_w25qxx_interface_template.c File Reference
@@ -97,25 +103,25 @@

Go to the source code of this file.

- - - + + - - + + - - + + - - + + - - + + - - + +

+

Functions

uint8_t w25qxx_interface_spi_qspi_init (void)
 interface spi qspi bus init More...
uint8_t w25qxx_interface_spi_qspi_init (void)
 interface spi qspi bus init
 
uint8_t w25qxx_interface_spi_qspi_deinit (void)
 interface spi qspi bus deinit More...
uint8_t w25qxx_interface_spi_qspi_deinit (void)
 interface spi qspi bus deinit
 
uint8_t w25qxx_interface_spi_qspi_write_read (uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
 interface spi qspi bus write read More...
uint8_t w25qxx_interface_spi_qspi_write_read (uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
 interface spi qspi bus write read
 
void w25qxx_interface_delay_ms (uint32_t ms)
 interface delay ms More...
void w25qxx_interface_delay_ms (uint32_t ms)
 interface delay ms
 
void w25qxx_interface_delay_us (uint32_t us)
 interface delay us More...
void w25qxx_interface_delay_us (uint32_t us)
 interface delay us
 
void w25qxx_interface_debug_print (const char *const fmt,...)
 interface print format data More...
void w25qxx_interface_debug_print (const char *const fmt,...)
 interface print format data
 

Detailed Description

@@ -143,7 +149,7 @@

history

diff --git a/doc/html/driver__w25qxx__interface__template_8c_source.html b/doc/html/driver__w25qxx__interface__template_8c_source.html index 09f49c6..1d81725 100644 --- a/doc/html/driver__w25qxx__interface__template_8c_source.html +++ b/doc/html/driver__w25qxx__interface__template_8c_source.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: interface/driver_w25qxx_interface_template.c Source File @@ -23,11 +23,10 @@
- + - @@ -36,22 +35,28 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ + +
@@ -78,66 +83,84 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
-
-
driver_w25qxx_interface_template.c
+
driver_w25qxx_interface_template.c
-Go to the documentation of this file.
1 
-
37 #include "driver_w25qxx_interface.h"
-
38 
-
46 uint8_t w25qxx_interface_spi_qspi_init(void)
-
47 {
-
48  return 0;
-
49 }
-
50 
-
58 uint8_t w25qxx_interface_spi_qspi_deinit(void)
-
59 {
-
60  return 0;
-
61 }
-
62 
-
84 uint8_t w25qxx_interface_spi_qspi_write_read(uint8_t instruction, uint8_t instruction_line,
-
85  uint32_t address, uint8_t address_line, uint8_t address_len,
-
86  uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len,
-
87  uint8_t dummy, uint8_t *in_buf, uint32_t in_len,
-
88  uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
-
89 {
-
90  return 0;
-
91 }
-
92 
-
98 void w25qxx_interface_delay_ms(uint32_t ms)
-
99 {
-
100 
-
101 }
-
102 
-
108 void w25qxx_interface_delay_us(uint32_t us)
-
109 {
-
110 
-
111 }
-
112 
-
118 void w25qxx_interface_debug_print(const char *const fmt, ...)
-
119 {
-
120 
-
121 }
+Go to the documentation of this file.
1
+
37#include "driver_w25qxx_interface.h"
+
38
+
+
46uint8_t w25qxx_interface_spi_qspi_init(void)
+
47{
+
48 return 0;
+
49}
+
+
50
+
+
58uint8_t w25qxx_interface_spi_qspi_deinit(void)
+
59{
+
60 return 0;
+
61}
+
+
62
+
+
84uint8_t w25qxx_interface_spi_qspi_write_read(uint8_t instruction, uint8_t instruction_line,
+
85 uint32_t address, uint8_t address_line, uint8_t address_len,
+
86 uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len,
+
87 uint8_t dummy, uint8_t *in_buf, uint32_t in_len,
+
88 uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
+
89{
+
90 return 0;
+
91}
+
+
92
+
+
98void w25qxx_interface_delay_ms(uint32_t ms)
+
99{
+
100
+
101}
+
+
102
+
+
108void w25qxx_interface_delay_us(uint32_t us)
+
109{
+
110
+
111}
+
+
112
+
+
118void w25qxx_interface_debug_print(const char *const fmt, ...)
+
119{
+
120
+
121}
+
driver_w25qxx_interface.h
driver w25qxx interface header file
-
w25qxx_interface_spi_qspi_deinit
uint8_t w25qxx_interface_spi_qspi_deinit(void)
interface spi qspi bus deinit
Definition: driver_w25qxx_interface_template.c:58
-
w25qxx_interface_spi_qspi_init
uint8_t w25qxx_interface_spi_qspi_init(void)
interface spi qspi bus init
Definition: driver_w25qxx_interface_template.c:46
-
w25qxx_interface_delay_us
void w25qxx_interface_delay_us(uint32_t us)
interface delay us
Definition: driver_w25qxx_interface_template.c:108
-
w25qxx_interface_spi_qspi_write_read
uint8_t w25qxx_interface_spi_qspi_write_read(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
interface spi qspi bus write read
Definition: driver_w25qxx_interface_template.c:84
-
w25qxx_interface_debug_print
void w25qxx_interface_debug_print(const char *const fmt,...)
interface print format data
Definition: driver_w25qxx_interface_template.c:118
-
w25qxx_interface_delay_ms
void w25qxx_interface_delay_ms(uint32_t ms)
interface delay ms
Definition: driver_w25qxx_interface_template.c:98
+
w25qxx_interface_spi_qspi_deinit
uint8_t w25qxx_interface_spi_qspi_deinit(void)
interface spi qspi bus deinit
Definition driver_w25qxx_interface_template.c:58
+
w25qxx_interface_spi_qspi_init
uint8_t w25qxx_interface_spi_qspi_init(void)
interface spi qspi bus init
Definition driver_w25qxx_interface_template.c:46
+
w25qxx_interface_delay_us
void w25qxx_interface_delay_us(uint32_t us)
interface delay us
Definition driver_w25qxx_interface_template.c:108
+
w25qxx_interface_spi_qspi_write_read
uint8_t w25qxx_interface_spi_qspi_write_read(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
interface spi qspi bus write read
Definition driver_w25qxx_interface_template.c:84
+
w25qxx_interface_debug_print
void w25qxx_interface_debug_print(const char *const fmt,...)
interface print format data
Definition driver_w25qxx_interface_template.c:118
+
w25qxx_interface_delay_ms
void w25qxx_interface_delay_ms(uint32_t ms)
interface delay ms
Definition driver_w25qxx_interface_template.c:98
diff --git a/doc/html/driver__w25qxx__read__test_8c.html b/doc/html/driver__w25qxx__read__test_8c.html index 0d7a42f..bba0764 100644 --- a/doc/html/driver__w25qxx__read__test_8c.html +++ b/doc/html/driver__w25qxx__read__test_8c.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: test/driver_w25qxx_read_test.c File Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +

@@ -64,7 +64,7 @@
@@ -78,16 +78,22 @@
- +
+
+
+
+
Loading...
+
Searching...
+
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+
Functions
-
-
driver_w25qxx_read_test.c File Reference
+
driver_w25qxx_read_test.c File Reference
@@ -98,10 +104,10 @@

Go to the source code of this file.

- - - + +

+

Functions

uint8_t w25qxx_read_test (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 read test More...
uint8_t w25qxx_read_test (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 read test
 

Detailed Description

@@ -129,7 +135,7 @@

history

diff --git a/doc/html/driver__w25qxx__read__test_8c_source.html b/doc/html/driver__w25qxx__read__test_8c_source.html index d3fa830..8656a98 100644 --- a/doc/html/driver__w25qxx__read__test_8c_source.html +++ b/doc/html/driver__w25qxx__read__test_8c_source.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: test/driver_w25qxx_read_test.c Source File @@ -23,11 +23,10 @@
- + - @@ -36,22 +35,28 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ + +

@@ -78,2102 +83,2110 @@
- +
+
+
+
+
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-
-
driver_w25qxx_read_test.c
+
driver_w25qxx_read_test.c
-Go to the documentation of this file.
1 
-
37 #include "driver_w25qxx_read_test.h"
-
38 #include <stdlib.h>
-
39 
-
40 static w25qxx_handle_t gs_handle;
-
41 static uint8_t gs_buffer_input[600];
-
42 static uint8_t gs_buffer_output[600];
-
43 static const uint32_t gsc_size[] = {0x100000, 0x200000, 0x400000, 0x800000, 0x1000000, 0x2000000};
-
55 uint8_t w25qxx_read_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
-
56 {
-
57  uint8_t res;
-
58  w25qxx_info_t info;
-
59 
-
60  /* link interface function */
-
61  DRIVER_W25QXX_LINK_INIT(&gs_handle, w25qxx_handle_t);
-
62  DRIVER_W25QXX_LINK_SPI_QSPI_INIT(&gs_handle, w25qxx_interface_spi_qspi_init);
-
63  DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(&gs_handle, w25qxx_interface_spi_qspi_deinit);
-
64  DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(&gs_handle, w25qxx_interface_spi_qspi_write_read);
-
65  DRIVER_W25QXX_LINK_DELAY_MS(&gs_handle, w25qxx_interface_delay_ms);
-
66  DRIVER_W25QXX_LINK_DELAY_US(&gs_handle, w25qxx_interface_delay_us);
-
67  DRIVER_W25QXX_LINK_DEBUG_PRINT(&gs_handle, w25qxx_interface_debug_print);
-
68 
-
69  /* get information */
-
70  res = w25qxx_info(&info);
-
71  if (res != 0)
-
72  {
-
73  w25qxx_interface_debug_print("w25qxx: get info failed.\n");
-
74 
-
75  return 1;
-
76  }
-
77  else
-
78  {
-
79  /* print chip information */
-
80  w25qxx_interface_debug_print("w25qxx: chip is %s.\n", info.chip_name);
-
81  w25qxx_interface_debug_print("w25qxx: manufacturer is %s.\n", info.manufacturer_name);
-
82  w25qxx_interface_debug_print("w25qxx: interface is %s.\n", info.interface);
-
83  w25qxx_interface_debug_print("w25qxx: driver version is %d.%d.\n", info.driver_version / 1000, (info.driver_version % 1000) / 100);
-
84  w25qxx_interface_debug_print("w25qxx: min supply voltage is %0.1fV.\n", info.supply_voltage_min_v);
-
85  w25qxx_interface_debug_print("w25qxx: max supply voltage is %0.1fV.\n", info.supply_voltage_max_v);
-
86  w25qxx_interface_debug_print("w25qxx: max current is %0.2fmA.\n", info.max_current_ma);
-
87  w25qxx_interface_debug_print("w25qxx: max temperature is %0.1fC.\n", info.temperature_max);
-
88  w25qxx_interface_debug_print("w25qxx: min temperature is %0.1fC.\n", info.temperature_min);
-
89  }
-
90 
-
91  /* set chip type */
-
92  res = w25qxx_set_type(&gs_handle, type);
-
93  if (res != 0)
-
94  {
-
95  w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
96 
-
97  return 1;
-
98  }
-
99 
-
100  /* set chip interface */
-
101  res = w25qxx_set_interface(&gs_handle, interface);
-
102  if (res != 0)
-
103  {
-
104  w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
-
105 
-
106  return 1;
-
107  }
-
108 
-
109  /* set dual quad spi */
-
110  res = w25qxx_set_dual_quad_spi(&gs_handle, dual_quad_spi_enable);
-
111  if (res != 0)
-
112  {
-
113  w25qxx_interface_debug_print("w25qxx: set dual quad spi failed.\n");
-
114  (void)w25qxx_deinit(&gs_handle);
-
115 
-
116  return 1;
-
117  }
-
118 
-
119  /* chip init */
-
120  res = w25qxx_init(&gs_handle);
-
121  if (res != 0)
-
122  {
-
123  w25qxx_interface_debug_print("w25qxx: init failed.\n");
-
124 
-
125  return 1;
-
126  }
-
127 
-
128  /* start read test */
-
129  w25qxx_interface_debug_print("w25qxx: start read test.\n");
-
130 
-
131  if (interface == W25QXX_INTERFACE_SPI)
-
132  {
-
133  uint32_t size;
-
134  uint32_t addr, step, j;
-
135 
-
136  size = gsc_size[type - W25Q80];
-
137  step = size / 16;
-
138 
-
139  /* w25qxx_write/w25qxx_read test */
-
140  w25qxx_interface_debug_print("w25qxx: w25qxx_write/w25qxx_read test.\n");
-
141 
-
142  for (addr = 0; addr < size; addr += step)
-
143  {
-
144  for (j = 0; j < 600; j++)
-
145  {
-
146  gs_buffer_input[j] = rand() %256;
-
147  }
-
148  res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
-
149  if (res != 0)
-
150  {
-
151  w25qxx_interface_debug_print("w25qxx: write failed.\n");
-
152  (void)w25qxx_deinit(&gs_handle);
-
153 
-
154  return 1;
-
155  }
-
156  res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
-
157  if (res != 0)
-
158  {
-
159  w25qxx_interface_debug_print("w25qxx: read failed.\n");
-
160  (void)w25qxx_deinit(&gs_handle);
-
161 
-
162  return 1;
-
163  }
-
164  for (j = 0; j < 600; j++)
-
165  {
-
166  if (gs_buffer_input[j] != gs_buffer_output[j])
-
167  {
-
168  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
169  (void)w25qxx_deinit(&gs_handle);
-
170 
-
171  return 1;
-
172  }
-
173  }
-
174  w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
-
175  }
-
176 
-
177  /* w25qxx_sector_erase_4k test */
-
178  addr = (rand() % 10) * 4 * 1024;
-
179  w25qxx_interface_debug_print("w25qxx: w25qxx_sector_erase_4k test with address 0x%X.\n", addr);
-
180  res = w25qxx_sector_erase_4k(&gs_handle, addr);
-
181  if (res != 0)
-
182  {
-
183  w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
-
184  (void)w25qxx_deinit(&gs_handle);
-
185 
-
186  return 1;
-
187  }
-
188  for (j = 0; j < 256; j++)
-
189  {
-
190  gs_buffer_input[j] = rand() %256;
-
191  }
-
192 
-
193  /* w25qxx_page_program */
-
194  res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
195  if (res != 0)
-
196  {
-
197  w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
198  (void)w25qxx_deinit(&gs_handle);
-
199 
-
200  return 1;
-
201  }
-
202 
-
203  /* w25qxx_only_spi_read */
-
204  res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
-
205  if (res != 0)
-
206  {
-
207  w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
-
208  (void)w25qxx_deinit(&gs_handle);
-
209 
-
210  return 1;
-
211  }
-
212  for (j = 0; j < 256; j++)
-
213  {
-
214  if (gs_buffer_input[j] != gs_buffer_output[j])
-
215  {
-
216  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
217  (void)w25qxx_deinit(&gs_handle);
-
218 
-
219  return 1;
-
220  }
-
221  }
-
222  w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
-
223 
-
224  /* w25qxx_fast_read */
-
225  res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
226  if (res != 0)
-
227  {
-
228  w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
229  (void)w25qxx_deinit(&gs_handle);
-
230 
-
231  return 1;
-
232  }
-
233  for (j = 0; j < 256; j++)
-
234  {
-
235  if (gs_buffer_input[j] != gs_buffer_output[j])
-
236  {
-
237  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
238  (void)w25qxx_deinit(&gs_handle);
-
239 
-
240  return 1;
-
241  }
-
242  }
-
243  w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
244 
-
245  /* w25qxx_block_erase_32k test */
-
246  addr = (rand() % 10) * 32 * 1024;
-
247  w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_32k test with address 0x%X.\n", addr);
-
248  res = w25qxx_block_erase_32k(&gs_handle, addr);
-
249  if (res != 0)
-
250  {
-
251  w25qxx_interface_debug_print("w25qxx: sector erase 32k failed.\n");
-
252  (void)w25qxx_deinit(&gs_handle);
-
253 
-
254  return 1;
-
255  }
-
256  for (j = 0; j < 256; j++)
-
257  {
-
258  gs_buffer_input[j] = rand() %256;
-
259  }
-
260 
-
261  /* w25qxx_page_program */
-
262  res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
263  if (res != 0)
-
264  {
-
265  w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
266  (void)w25qxx_deinit(&gs_handle);
-
267 
-
268  return 1;
-
269  }
-
270 
-
271  /* w25qxx_only_spi_read */
-
272  res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
-
273  if (res != 0)
-
274  {
-
275  w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
-
276  (void)w25qxx_deinit(&gs_handle);
-
277 
-
278  return 1;
-
279  }
-
280  for (j = 0; j < 256; j++)
-
281  {
-
282  if (gs_buffer_input[j] != gs_buffer_output[j])
-
283  {
-
284  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
285  (void)w25qxx_deinit(&gs_handle);
-
286 
-
287  return 1;
-
288  }
-
289  }
-
290  w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
-
291 
-
292  /* w25qxx_fast_read */
-
293  res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
294  if (res != 0)
-
295  {
-
296  w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
297  (void)w25qxx_deinit(&gs_handle);
-
298 
-
299  return 1;
-
300  }
-
301  for (j = 0; j < 256; j++)
-
302  {
-
303  if (gs_buffer_input[j] != gs_buffer_output[j])
-
304  {
-
305  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
306  (void)w25qxx_deinit(&gs_handle);
-
307 
-
308  return 1;
-
309  }
-
310  }
-
311  w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
312 
-
313  /* w25qxx_block_erase_64k test */
-
314  addr = (rand() % 10) * 64 * 1024;
-
315  w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_64k test with address 0x%X.\n", addr);
-
316  res = w25qxx_block_erase_64k(&gs_handle, addr);
-
317  if (res != 0)
-
318  {
-
319  w25qxx_interface_debug_print("w25qxx: sector erase 64k failed.\n");
-
320  (void)w25qxx_deinit(&gs_handle);
-
321 
-
322  return 1;
-
323  }
-
324  for (j = 0; j < 256; j++)
-
325  {
-
326  gs_buffer_input[j] = rand() %256;
-
327  }
-
328 
-
329  /* w25qxx_page_program */
-
330  res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
331  if (res != 0)
-
332  {
-
333  w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
334  (void)w25qxx_deinit(&gs_handle);
-
335 
-
336  return 1;
-
337  }
-
338 
-
339  /* w25qxx_only_spi_read */
-
340  res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
-
341  if (res != 0)
-
342  {
-
343  w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
-
344  (void)w25qxx_deinit(&gs_handle);
-
345 
-
346  return 1;
-
347  }
-
348  for (j = 0; j < 256; j++)
-
349  {
-
350  if (gs_buffer_input[j] != gs_buffer_output[j])
-
351  {
-
352  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
353  (void)w25qxx_deinit(&gs_handle);
-
354 
-
355  return 1;
-
356  }
-
357  }
-
358  w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
-
359 
-
360  /* w25qxx_fast_read */
-
361  res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
362  if (res != 0)
-
363  {
-
364  w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
365  (void)w25qxx_deinit(&gs_handle);
-
366 
-
367  return 1;
-
368  }
-
369  for (j = 0; j < 256; j++)
-
370  {
-
371  if (gs_buffer_input[j] != gs_buffer_output[j])
-
372  {
-
373  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
374  (void)w25qxx_deinit(&gs_handle);
-
375 
-
376  return 1;
-
377  }
-
378  }
-
379  w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
380 
-
381  /* get sfdp */
-
382  w25qxx_interface_debug_print("w25qxx: get sfdp.\n");
-
383  memset(gs_buffer_output, 0, sizeof(uint8_t) * 256);
-
384  res = w25qxx_get_sfdp(&gs_handle, (uint8_t *)gs_buffer_output);
-
385  if (res != 0)
-
386  {
-
387  w25qxx_interface_debug_print("w25qxx: get sfdp failed.\n");
-
388  (void)w25qxx_deinit(&gs_handle);
-
389 
-
390  return 1;
-
391  }
-
392  for (j = 0; j < 256; j += 8)
-
393  {
-
394  w25qxx_interface_debug_print("w25qxx: sdfp[%d-%d] is 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X.\n",
-
395  j , j + 7,
-
396  gs_buffer_output[j + 0], gs_buffer_output[j + 1], gs_buffer_output[j + 2],
-
397  gs_buffer_output[j + 3], gs_buffer_output[j + 4], gs_buffer_output[j + 5],
-
398  gs_buffer_output[j + 6], gs_buffer_output[j + 7]);
-
399  }
-
400 
-
401  /* security register1 write and read test */
-
402  w25qxx_interface_debug_print("w25qxx: security register1 write and read test.\n");
-
403 
-
404  /* security register1 write and read test */
-
405  res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1);
-
406  if (res != 0)
-
407  {
-
408  w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
-
409  (void)w25qxx_deinit(&gs_handle);
-
410 
-
411  return 1;
-
412  }
-
413  for (j = 0; j < 256; j++)
-
414  {
-
415  gs_buffer_input[j] = rand() %256;
-
416  }
-
417  res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1, gs_buffer_input);
-
418  if (res != 0)
-
419  {
-
420  w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
-
421  (void)w25qxx_deinit(&gs_handle);
-
422 
-
423  return 1;
-
424  }
-
425  res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1, gs_buffer_output);
-
426  if (res != 0)
-
427  {
-
428  w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
-
429  (void)w25qxx_deinit(&gs_handle);
-
430 
-
431  return 1;
-
432  }
-
433  for (j = 0; j < 256; j++)
-
434  {
-
435  if (gs_buffer_input[j] != gs_buffer_output[j])
-
436  {
-
437  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
438  (void)w25qxx_deinit(&gs_handle);
-
439 
-
440  return 1;
-
441  }
-
442  }
-
443  w25qxx_interface_debug_print("w25qxx: security register1 check passed.\n");
-
444 
-
445  /* security register2 write and read test */
-
446  w25qxx_interface_debug_print("w25qxx: security register2 write and read test.\n");
-
447 
-
448  /* security register2 write and read test */
-
449  res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2);
-
450  if (res != 0)
-
451  {
-
452  w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
-
453  (void)w25qxx_deinit(&gs_handle);
-
454 
-
455  return 1;
-
456  }
-
457  for (j = 0; j < 256; j++)
-
458  {
-
459  gs_buffer_input[j] = rand() %256;
-
460  }
-
461  res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2, gs_buffer_input);
-
462  if (res != 0)
-
463  {
-
464  w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
-
465  (void)w25qxx_deinit(&gs_handle);
-
466 
-
467  return 1;
-
468  }
-
469  res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2, gs_buffer_output);
-
470  if (res != 0)
-
471  {
-
472  w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
-
473  (void)w25qxx_deinit(&gs_handle);
-
474 
-
475  return 1;
-
476  }
-
477  for (j = 0; j < 256; j++)
-
478  {
-
479  if (gs_buffer_input[j] != gs_buffer_output[j])
-
480  {
-
481  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
482  (void)w25qxx_deinit(&gs_handle);
-
483 
-
484  return 1;
-
485  }
-
486  }
-
487  w25qxx_interface_debug_print("w25qxx: security register2 check passed.\n");
-
488 
-
489  /* security register3 write and read test */
-
490  w25qxx_interface_debug_print("w25qxx: security register3 write and read test.\n");
-
491 
-
492  /* security register3 write and read test */
-
493  res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3);
-
494  if (res != 0)
-
495  {
-
496  w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
-
497  (void)w25qxx_deinit(&gs_handle);
-
498 
-
499  return 1;
-
500  }
-
501  for (j = 0; j < 256; j++)
-
502  {
-
503  gs_buffer_input[j] = rand() %256;
-
504  }
-
505  res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3, gs_buffer_input);
-
506  if (res != 0)
-
507  {
-
508  w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
-
509  (void)w25qxx_deinit(&gs_handle);
-
510 
-
511  return 1;
-
512  }
-
513  res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3, gs_buffer_output);
-
514  if (res != 0)
-
515  {
-
516  w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
-
517  (void)w25qxx_deinit(&gs_handle);
-
518 
-
519  return 1;
-
520  }
-
521  for (j = 0; j < 256; j++)
-
522  {
-
523  if (gs_buffer_input[j] != gs_buffer_output[j])
-
524  {
-
525  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
526  (void)w25qxx_deinit(&gs_handle);
-
527 
-
528  return 1;
-
529  }
-
530  }
-
531  w25qxx_interface_debug_print("w25qxx: security register3 check passed.\n");
-
532 
-
533  #if (W25QXX_ENABLE_ERASE_READ_TEST == 1)
-
534  /* start chip erasing */
-
535  w25qxx_interface_debug_print("w25qxx: start chip erasing.\n");
-
536 
-
537  /* chip erase */
-
538  w25qxx_interface_debug_print("w25qxx: w25qxx_chip_erase test.\n");
-
539  res = w25qxx_chip_erase(&gs_handle);
-
540  if (res != 0)
-
541  {
-
542  w25qxx_interface_debug_print("w25qxx: chip erase failed.\n");
-
543  (void)w25qxx_deinit(&gs_handle);
-
544 
-
545  return 1;
-
546  }
-
547  w25qxx_interface_debug_print("w25qxx: chip erase successful.\n");
-
548  #endif
-
549 
-
550  if (type >= W25Q256)
-
551  {
-
552  /* set address mode 4 byte */
-
553  w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
-
554 
-
555  /* set address mode 4 byte */
-
556  res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
-
557  if (res != 0)
-
558  {
-
559  w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
560  (void)w25qxx_deinit(&gs_handle);
-
561 
-
562  return 1;
-
563  }
-
564 
-
565  /* w25qxx_write/w25qxx_read test */
-
566  w25qxx_interface_debug_print("w25qxx: w25qxx_write/w25qxx_read test.\n");
-
567 
-
568  for (addr = 0; addr < size; addr += step)
-
569  {
-
570  for (j = 0; j < 600; j++)
-
571  {
-
572  gs_buffer_input[j] = rand() %256;
-
573  }
-
574  res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
-
575  if (res != 0)
-
576  {
-
577  w25qxx_interface_debug_print("w25qxx: write failed.\n");
-
578  (void)w25qxx_deinit(&gs_handle);
-
579 
-
580  return 1;
-
581  }
-
582  res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
-
583  if (res != 0)
-
584  {
-
585  w25qxx_interface_debug_print("w25qxx: read failed.\n");
-
586  (void)w25qxx_deinit(&gs_handle);
-
587 
-
588  return 1;
-
589  }
-
590  for (j = 0; j < 600; j++)
-
591  {
-
592  if (gs_buffer_input[j] != gs_buffer_output[j])
-
593  {
-
594  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
595  (void)w25qxx_deinit(&gs_handle);
-
596 
-
597  return 1;
-
598  }
-
599  }
-
600  w25qxx_interface_debug_print("w25qxx: %d/%d successful.\n", addr, size);
-
601  }
-
602 
-
603  /* w25qxx_sector_erase_4k test */
-
604  addr = (rand() % 10) * 4 * 1024;
-
605  w25qxx_interface_debug_print("w25qxx: w25qxx_sector_erase_4k test with address 0x%X.\n", addr);
-
606  res = w25qxx_sector_erase_4k(&gs_handle, addr);
-
607  if (res != 0)
-
608  {
-
609  w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
-
610  (void)w25qxx_deinit(&gs_handle);
-
611 
-
612  return 1;
-
613  }
-
614  for (j = 0; j < 256; j++)
-
615  {
-
616  gs_buffer_input[j] = rand() %256;
-
617  }
-
618 
-
619  /* w25qxx_page_program */
-
620  res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
621  if (res != 0)
-
622  {
-
623  w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
624  (void)w25qxx_deinit(&gs_handle);
-
625 
-
626  return 1;
-
627  }
-
628 
-
629  /* w25qxx_only_spi_read */
-
630  res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
-
631  if (res != 0)
-
632  {
-
633  w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
-
634  (void)w25qxx_deinit(&gs_handle);
-
635 
-
636  return 1;
-
637  }
-
638  for (j = 0; j < 256; j++)
-
639  {
-
640  if (gs_buffer_input[j] != gs_buffer_output[j])
-
641  {
-
642  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
643  (void)w25qxx_deinit(&gs_handle);
-
644 
-
645  return 1;
-
646  }
-
647  }
-
648  w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
-
649 
-
650  /* w25qxx_fast_read */
-
651  res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
652  if (res != 0)
-
653  {
-
654  w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
655  (void)w25qxx_deinit(&gs_handle);
-
656 
-
657  return 1;
-
658  }
-
659  for (j = 0; j < 256; j++)
-
660  {
-
661  if (gs_buffer_input[j] != gs_buffer_output[j])
-
662  {
-
663  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
664  (void)w25qxx_deinit(&gs_handle);
-
665 
-
666  return 1;
-
667  }
-
668  }
-
669  w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
670 
-
671  /* w25qxx_block_erase_32k test */
-
672  addr = (rand() % 10) * 32 * 1024;
-
673  w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_32k test with address 0x%X.\n", addr);
-
674  res = w25qxx_block_erase_32k(&gs_handle, addr);
-
675  if (res != 0)
-
676  {
-
677  w25qxx_interface_debug_print("w25qxx: sector erase 32k failed.\n");
-
678  (void)w25qxx_deinit(&gs_handle);
-
679 
-
680  return 1;
-
681  }
-
682  for (j = 0; j < 256; j++)
-
683  {
-
684  gs_buffer_input[j] = rand() %256;
-
685  }
-
686 
-
687  /* w25qxx_page_program */
-
688  res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
689  if (res != 0)
-
690  {
-
691  w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
692  (void)w25qxx_deinit(&gs_handle);
-
693 
-
694  return 1;
-
695  }
-
696 
-
697  /* w25qxx_only_spi_read */
-
698  res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
-
699  if (res != 0)
-
700  {
-
701  w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
-
702  (void)w25qxx_deinit(&gs_handle);
-
703 
-
704  return 1;
-
705  }
-
706  for (j = 0; j < 256; j++)
-
707  {
-
708  if (gs_buffer_input[j] != gs_buffer_output[j])
-
709  {
-
710  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
711  (void)w25qxx_deinit(&gs_handle);
-
712 
-
713  return 1;
-
714  }
-
715  }
-
716  w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
-
717 
-
718  /* w25qxx_fast_read */
-
719  res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
720  if (res != 0)
-
721  {
-
722  w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
723  (void)w25qxx_deinit(&gs_handle);
-
724 
-
725  return 1;
-
726  }
-
727  for (j = 0; j < 256; j++)
-
728  {
-
729  if (gs_buffer_input[j] != gs_buffer_output[j])
-
730  {
-
731  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
732  (void)w25qxx_deinit(&gs_handle);
-
733 
-
734  return 1;
-
735  }
-
736  }
-
737  w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
738 
-
739  /* w25qxx_block_erase_64k test */
-
740  addr = (rand() % 10) * 64 * 1024;
-
741  w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_64k test with address 0x%X.\n", addr);
-
742  res = w25qxx_block_erase_64k(&gs_handle, addr);
-
743  if (res != 0)
-
744  {
-
745  w25qxx_interface_debug_print("w25qxx: sector erase 64k failed.\n");
-
746  (void)w25qxx_deinit(&gs_handle);
-
747 
-
748  return 1;
-
749  }
-
750  for (j = 0; j < 256; j++)
-
751  {
-
752  gs_buffer_input[j] = rand() %256;
-
753  }
-
754 
-
755  /* w25qxx_page_program */
-
756  res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
757  if (res != 0)
-
758  {
-
759  w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
760  (void)w25qxx_deinit(&gs_handle);
-
761 
-
762  return 1;
-
763  }
-
764 
-
765  /* w25qxx_only_spi_read */
-
766  res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
-
767  if (res != 0)
-
768  {
-
769  w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
-
770  (void)w25qxx_deinit(&gs_handle);
-
771 
-
772  return 1;
-
773  }
-
774  for (j = 0; j < 256; j++)
-
775  {
-
776  if (gs_buffer_input[j] != gs_buffer_output[j])
-
777  {
-
778  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
779  (void)w25qxx_deinit(&gs_handle);
-
780 
-
781  return 1;
-
782  }
-
783  }
-
784  w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
-
785 
-
786  /* w25qxx_fast_read */
-
787  res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
788  if (res != 0)
-
789  {
-
790  w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
791  (void)w25qxx_deinit(&gs_handle);
-
792 
-
793  return 1;
-
794  }
-
795  for (j = 0; j < 256; j++)
-
796  {
-
797  if (gs_buffer_input[j] != gs_buffer_output[j])
-
798  {
-
799  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
800  (void)w25qxx_deinit(&gs_handle);
-
801 
-
802  return 1;
-
803  }
-
804  }
-
805  w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
806 
-
807  /* get sfdp */
-
808  w25qxx_interface_debug_print("w25qxx: get sfdp.\n");
-
809  memset(gs_buffer_output, 0, sizeof(uint8_t) * 256);
-
810  res = w25qxx_get_sfdp(&gs_handle, (uint8_t *)gs_buffer_output);
-
811  if (res != 0)
-
812  {
-
813  w25qxx_interface_debug_print("w25qxx: get sfdp failed.\n");
-
814  (void)w25qxx_deinit(&gs_handle);
-
815 
-
816  return 1;
-
817  }
-
818  for (j = 0; j < 256; j += 8)
-
819  {
-
820  w25qxx_interface_debug_print("w25qxx: sdfp[%d-%d] is 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X.\n",
-
821  j , j + 7,
-
822  gs_buffer_output[j + 0], gs_buffer_output[j + 1], gs_buffer_output[j + 2],
-
823  gs_buffer_output[j + 3], gs_buffer_output[j + 4], gs_buffer_output[j + 5],
-
824  gs_buffer_output[j + 6], gs_buffer_output[j + 7]);
-
825  }
-
826 
-
827  /* security register1 write and read test */
-
828  w25qxx_interface_debug_print("w25qxx: security register1 write and read test.\n");
-
829 
-
830  /* security register1 write and read test */
-
831  res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1);
-
832  if (res != 0)
-
833  {
-
834  w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
-
835  (void)w25qxx_deinit(&gs_handle);
-
836 
-
837  return 1;
-
838  }
-
839  for (j = 0; j < 256; j++)
-
840  {
-
841  gs_buffer_input[j] = rand() %256;
-
842  }
-
843  res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1, gs_buffer_input);
-
844  if (res != 0)
-
845  {
-
846  w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
-
847  (void)w25qxx_deinit(&gs_handle);
-
848 
-
849  return 1;
-
850  }
-
851  res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1, gs_buffer_output);
-
852  if (res != 0)
-
853  {
-
854  w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
-
855  (void)w25qxx_deinit(&gs_handle);
-
856 
-
857  return 1;
-
858  }
-
859  for (j = 0; j < 256; j++)
-
860  {
-
861  if (gs_buffer_input[j] != gs_buffer_output[j])
-
862  {
-
863  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
864  (void)w25qxx_deinit(&gs_handle);
-
865 
-
866  return 1;
-
867  }
-
868  }
-
869  w25qxx_interface_debug_print("w25qxx: security register1 check passed.\n");
-
870 
-
871  /* security register2 write and read test */
-
872  w25qxx_interface_debug_print("w25qxx: security register2 write and read test.\n");
-
873 
-
874  /* security register2 write and read test */
-
875  res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2);
-
876  if (res != 0)
-
877  {
-
878  w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
-
879  (void)w25qxx_deinit(&gs_handle);
-
880 
-
881  return 1;
-
882  }
-
883  for (j = 0; j < 256; j++)
-
884  {
-
885  gs_buffer_input[j] = rand() %256;
-
886  }
-
887  res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2, gs_buffer_input);
-
888  if (res != 0)
-
889  {
-
890  w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
-
891  (void)w25qxx_deinit(&gs_handle);
-
892 
-
893  return 1;
-
894  }
-
895  res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2, gs_buffer_output);
-
896  if (res != 0)
-
897  {
-
898  w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
-
899  (void)w25qxx_deinit(&gs_handle);
-
900 
-
901  return 1;
-
902  }
-
903  for (j = 0; j < 256; j++)
-
904  {
-
905  if (gs_buffer_input[j] != gs_buffer_output[j])
-
906  {
-
907  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
908  (void)w25qxx_deinit(&gs_handle);
-
909 
-
910  return 1;
-
911  }
-
912  }
-
913  w25qxx_interface_debug_print("w25qxx: security register2 check passed.\n");
-
914 
-
915  /* security register3 write and read test */
-
916  w25qxx_interface_debug_print("w25qxx: security register3 write and read test.\n");
-
917 
-
918  /* security register3 write and read test */
-
919  res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3);
-
920  if (res != 0)
-
921  {
-
922  w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
-
923  (void)w25qxx_deinit(&gs_handle);
-
924 
-
925  return 1;
-
926  }
-
927  for (j = 0; j < 256; j++)
-
928  {
-
929  gs_buffer_input[j] = rand() %256;
-
930  }
-
931  res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3, gs_buffer_input);
-
932  if (res != 0)
-
933  {
-
934  w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
-
935  (void)w25qxx_deinit(&gs_handle);
-
936 
-
937  return 1;
-
938  }
-
939  res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3, gs_buffer_output);
-
940  if (res != 0)
-
941  {
-
942  w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
-
943  (void)w25qxx_deinit(&gs_handle);
-
944 
-
945  return 1;
-
946  }
-
947  for (j = 0; j < 256; j++)
-
948  {
-
949  if (gs_buffer_input[j] != gs_buffer_output[j])
-
950  {
-
951  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
952  (void)w25qxx_deinit(&gs_handle);
-
953 
-
954  return 1;
-
955  }
-
956  }
-
957  w25qxx_interface_debug_print("w25qxx: security register3 check passed.\n");
-
958 
-
959  /* set address mode 3 byte */
-
960  w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
-
961 
-
962  /* set address mode 3 byte */
-
963  res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
-
964  if (res != 0)
-
965  {
-
966  w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
967  (void)w25qxx_deinit(&gs_handle);
-
968 
-
969  return 1;
-
970  }
-
971  }
-
972  }
-
973  else
-
974  {
-
975  uint32_t size;
-
976  uint32_t addr, step, j;
-
977 
-
978  size = gsc_size[type - W25Q80];
-
979  step = size / 16;
-
980 
-
981  /* w25qxx_write/w25qxx_read test */
-
982  w25qxx_interface_debug_print("w25qxx: w25qxx_write/w25qxx_read test.\n");
-
983 
-
984  for (addr = 0; addr < size; addr += step)
-
985  {
-
986  for (j = 0; j < 600; j++)
-
987  {
-
988  gs_buffer_input[j] = rand() %256;
-
989  }
-
990  res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
-
991  if (res != 0)
-
992  {
-
993  w25qxx_interface_debug_print("w25qxx: write failed.\n");
-
994  (void)w25qxx_deinit(&gs_handle);
-
995 
-
996  return 1;
-
997  }
-
998  res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
-
999  if (res != 0)
-
1000  {
-
1001  w25qxx_interface_debug_print("w25qxx: read failed.\n");
-
1002  (void)w25qxx_deinit(&gs_handle);
-
1003 
-
1004  return 1;
-
1005  }
-
1006  for (j = 0; j < 600; j++)
-
1007  {
-
1008  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1009  {
-
1010  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1011  (void)w25qxx_deinit(&gs_handle);
-
1012 
-
1013  return 1;
-
1014  }
-
1015  }
-
1016  w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
-
1017  }
-
1018 
-
1019  /* w25qxx_sector_erase_4k test */
-
1020  addr = (rand() % 10) * 4 * 1024;
-
1021  w25qxx_interface_debug_print("w25qxx: w25qxx_sector_erase_4k test with address 0x%X.\n", addr);
-
1022  res = w25qxx_sector_erase_4k(&gs_handle, addr);
-
1023  if (res != 0)
-
1024  {
-
1025  w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
-
1026  (void)w25qxx_deinit(&gs_handle);
-
1027 
-
1028  return 1;
-
1029  }
-
1030  for (j = 0; j < 256; j++)
-
1031  {
-
1032  gs_buffer_input[j] = rand() %256;
-
1033  }
-
1034 
-
1035  /* w25qxx_page_program */
-
1036  res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
1037  if (res != 0)
-
1038  {
-
1039  w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
1040  (void)w25qxx_deinit(&gs_handle);
-
1041 
-
1042  return 1;
-
1043  }
-
1044 
-
1045  /* w25qxx_fast_read */
-
1046  res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
1047  if (res != 0)
-
1048  {
-
1049  w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
1050  (void)w25qxx_deinit(&gs_handle);
-
1051 
-
1052  return 1;
-
1053  }
-
1054  for (j = 0; j < 256; j++)
-
1055  {
-
1056  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1057  {
-
1058  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1059  (void)w25qxx_deinit(&gs_handle);
-
1060 
-
1061  return 1;
-
1062  }
-
1063  }
-
1064  w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
1065 
-
1066  /* w25qxx_block_erase_32k test */
-
1067  addr = (rand() % 10) * 32 * 1024;
-
1068  w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_32k test with address 0x%X.\n", addr);
-
1069  res = w25qxx_block_erase_32k(&gs_handle, addr);
-
1070  if (res != 0)
-
1071  {
-
1072  w25qxx_interface_debug_print("w25qxx: sector erase 32k failed.\n");
-
1073  (void)w25qxx_deinit(&gs_handle);
-
1074 
-
1075  return 1;
-
1076  }
-
1077  for (j = 0; j < 256; j++)
-
1078  {
-
1079  gs_buffer_input[j] = rand() %256;
-
1080  }
-
1081 
-
1082  /* w25qxx_page_program */
-
1083  res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
1084  if (res != 0)
-
1085  {
-
1086  w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
1087  (void)w25qxx_deinit(&gs_handle);
-
1088 
-
1089  return 1;
-
1090  }
-
1091 
-
1092  /* w25qxx_fast_read */
-
1093  res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
1094  if (res != 0)
-
1095  {
-
1096  w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
1097  (void)w25qxx_deinit(&gs_handle);
-
1098 
-
1099  return 1;
-
1100  }
-
1101  for (j = 0; j < 256; j++)
-
1102  {
-
1103  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1104  {
-
1105  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1106  (void)w25qxx_deinit(&gs_handle);
-
1107 
-
1108  return 1;
-
1109  }
-
1110  }
-
1111  w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
1112 
-
1113  /* w25qxx_block_erase_64k test */
-
1114  addr = (rand() % 10) * 64 * 1024;
-
1115  w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_64k test with address 0x%X.\n", addr);
-
1116  res = w25qxx_block_erase_64k(&gs_handle, addr);
-
1117  if (res != 0)
-
1118  {
-
1119  w25qxx_interface_debug_print("w25qxx: sector erase 64k failed.\n");
-
1120  (void)w25qxx_deinit(&gs_handle);
-
1121 
-
1122  return 1;
-
1123  }
-
1124  for (j = 0; j < 256; j++)
-
1125  {
-
1126  gs_buffer_input[j] = rand() %256;
-
1127  }
-
1128 
-
1129  /* w25qxx_page_program */
-
1130  res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
1131  if (res != 0)
-
1132  {
-
1133  w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
1134  (void)w25qxx_deinit(&gs_handle);
-
1135 
-
1136  return 1;
-
1137  }
-
1138 
-
1139  /* w25qxx_fast_read */
-
1140  res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
1141  if (res != 0)
-
1142  {
-
1143  w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
1144  (void)w25qxx_deinit(&gs_handle);
-
1145 
-
1146  return 1;
-
1147  }
-
1148  for (j = 0; j < 256; j++)
-
1149  {
-
1150  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1151  {
-
1152  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1153  (void)w25qxx_deinit(&gs_handle);
-
1154 
-
1155  return 1;
-
1156  }
-
1157  }
-
1158  w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
1159 
-
1160  #if (W25QXX_ENABLE_ERASE_READ_TEST == 1)
-
1161  /* start chip erasing */
-
1162  w25qxx_interface_debug_print("w25qxx: start chip erasing.\n");
-
1163 
-
1164  /* chip erase */
-
1165  w25qxx_interface_debug_print("w25qxx: w25qxx_chip_erase test.\n");
-
1166  res = w25qxx_chip_erase(&gs_handle);
-
1167  if (res != 0)
-
1168  {
-
1169  w25qxx_interface_debug_print("w25qxx: chip erase failed.\n");
-
1170  (void)w25qxx_deinit(&gs_handle);
-
1171 
-
1172  return 1;
-
1173  }
-
1174  w25qxx_interface_debug_print("w25qxx: chip erase successful.\n");
-
1175  #endif
-
1176 
-
1177  if (type >= W25Q256)
-
1178  {
-
1179  /* set address mode 4 byte */
-
1180  w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
-
1181 
-
1182  /* set address mode 4 byte */
-
1183  res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
-
1184  if (res != 0)
-
1185  {
-
1186  w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
1187  (void)w25qxx_deinit(&gs_handle);
-
1188 
-
1189  return 1;
-
1190  }
-
1191 
-
1192  /* w25qxx_write/w25qxx_read test */
-
1193  w25qxx_interface_debug_print("w25qxx: w25qxx_write/w25qxx_read test.\n");
-
1194 
-
1195  for (addr = 0; addr < size; addr += step)
-
1196  {
-
1197  for (j = 0; j < 600; j++)
-
1198  {
-
1199  gs_buffer_input[j] = rand() %256;
-
1200  }
-
1201  res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
-
1202  if (res != 0)
-
1203  {
-
1204  w25qxx_interface_debug_print("w25qxx: write failed.\n");
-
1205  (void)w25qxx_deinit(&gs_handle);
-
1206 
-
1207  return 1;
-
1208  }
-
1209  res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
-
1210  if (res != 0)
-
1211  {
-
1212  w25qxx_interface_debug_print("w25qxx: read failed.\n");
-
1213  (void)w25qxx_deinit(&gs_handle);
-
1214 
-
1215  return 1;
-
1216  }
-
1217  for (j = 0; j < 600; j++)
-
1218  {
-
1219  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1220  {
-
1221  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1222  (void)w25qxx_deinit(&gs_handle);
-
1223 
-
1224  return 1;
-
1225  }
-
1226  }
-
1227  w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
-
1228  }
-
1229 
-
1230  /* w25qxx_sector_erase_4k test */
-
1231  addr = (rand() % 10) * 4 * 1024;
-
1232  w25qxx_interface_debug_print("w25qxx: w25qxx_sector_erase_4k test with address 0x%X.\n", addr);
-
1233  res = w25qxx_sector_erase_4k(&gs_handle, addr);
-
1234  if (res != 0)
-
1235  {
-
1236  w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
-
1237  (void)w25qxx_deinit(&gs_handle);
-
1238 
-
1239  return 1;
-
1240  }
-
1241  for (j = 0; j < 256; j++)
-
1242  {
-
1243  gs_buffer_input[j] = rand() %256;
-
1244  }
-
1245 
-
1246  /* w25qxx_page_program */
-
1247  res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
1248  if (res != 0)
-
1249  {
-
1250  w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
1251  (void)w25qxx_deinit(&gs_handle);
-
1252 
-
1253  return 1;
-
1254  }
-
1255 
-
1256  /* w25qxx_fast_read */
-
1257  res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
1258  if (res != 0)
-
1259  {
-
1260  w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
1261  (void)w25qxx_deinit(&gs_handle);
-
1262 
-
1263  return 1;
-
1264  }
-
1265  for (j = 0; j < 256; j++)
-
1266  {
-
1267  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1268  {
-
1269  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1270  (void)w25qxx_deinit(&gs_handle);
-
1271 
-
1272  return 1;
-
1273  }
-
1274  }
-
1275  w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
1276 
-
1277  /* w25qxx_block_erase_32k test */
-
1278  addr = (rand() % 10) * 32 * 1024;
-
1279  w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_32k test with address 0x%X.\n", addr);
-
1280  res = w25qxx_block_erase_32k(&gs_handle, addr);
-
1281  if (res != 0)
-
1282  {
-
1283  w25qxx_interface_debug_print("w25qxx: sector erase 32k failed.\n");
-
1284  (void)w25qxx_deinit(&gs_handle);
-
1285 
-
1286  return 1;
-
1287  }
-
1288  for (j = 0; j < 256; j++)
-
1289  {
-
1290  gs_buffer_input[j] = rand() %256;
-
1291  }
-
1292 
-
1293  /* w25qxx_page_program */
-
1294  res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
1295  if (res != 0)
-
1296  {
-
1297  w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
1298  (void)w25qxx_deinit(&gs_handle);
-
1299 
-
1300  return 1;
-
1301  }
-
1302 
-
1303  /* w25qxx_fast_read */
-
1304  res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
1305  if (res != 0)
-
1306  {
-
1307  w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
1308  (void)w25qxx_deinit(&gs_handle);
-
1309 
-
1310  return 1;
-
1311  }
-
1312  for (j = 0; j < 256; j++)
-
1313  {
-
1314  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1315  {
-
1316  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1317  (void)w25qxx_deinit(&gs_handle);
-
1318 
-
1319  return 1;
-
1320  }
-
1321  }
-
1322  w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
1323 
-
1324  /* w25qxx_block_erase_64k test */
-
1325  addr = (rand() % 10) * 64 * 1024;
-
1326  w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_64k test with address 0x%X.\n", addr);
-
1327  res = w25qxx_block_erase_64k(&gs_handle, addr);
-
1328  if (res != 0)
-
1329  {
-
1330  w25qxx_interface_debug_print("w25qxx: sector erase 64k failed.\n");
-
1331  (void)w25qxx_deinit(&gs_handle);
-
1332 
-
1333  return 1;
-
1334  }
-
1335  for (j = 0; j < 256; j++)
-
1336  {
-
1337  gs_buffer_input[j] = rand() %256;
-
1338  }
-
1339 
-
1340  /* w25qxx_page_program */
-
1341  res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
1342  if (res != 0)
-
1343  {
-
1344  w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
1345  (void)w25qxx_deinit(&gs_handle);
-
1346 
-
1347  return 1;
-
1348  }
-
1349 
-
1350  /* w25qxx_fast_read */
-
1351  res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
1352  if (res != 0)
-
1353  {
-
1354  w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
1355  (void)w25qxx_deinit(&gs_handle);
-
1356 
-
1357  return 1;
-
1358  }
-
1359  for (j = 0; j < 256; j++)
-
1360  {
-
1361  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1362  {
-
1363  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1364  (void)w25qxx_deinit(&gs_handle);
-
1365 
-
1366  return 1;
-
1367  }
-
1368  }
-
1369  w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
1370 
-
1371  /* set address mode 3 byte */
-
1372  w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
-
1373 
-
1374  /* set address mode 3 byte */
-
1375  res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
-
1376  if (res != 0)
-
1377  {
-
1378  w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
1379  (void)w25qxx_deinit(&gs_handle);
-
1380 
-
1381  return 1;
-
1382  }
-
1383  }
-
1384 
-
1385  if (dual_quad_spi_enable != 0)
-
1386  {
-
1387  /* enter to spi mode */
-
1388  w25qxx_interface_debug_print("w25qxx: enter to spi mode.\n");
-
1389 
-
1390  /* exit qspi */
-
1391  res = w25qxx_exit_qspi_mode(&gs_handle);
-
1392  if (res != 0)
-
1393  {
-
1394  w25qxx_interface_debug_print("w25qxx: exit qspi mode failed.\n");
-
1395  (void)w25qxx_deinit(&gs_handle);
-
1396 
-
1397  return 1;
-
1398  }
-
1399 
-
1400  /* set chip interface spi */
-
1401  res = w25qxx_set_interface(&gs_handle, W25QXX_INTERFACE_SPI);
-
1402  if (res != 0)
-
1403  {
-
1404  w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
-
1405 
-
1406  return 1;
-
1407  }
-
1408 
-
1409  /* random data */
-
1410  for (j = 0; j < 256; j++)
-
1411  {
-
1412  gs_buffer_input[j] = rand() %256;
-
1413  }
-
1414 
-
1415  /* w25qxx_sector_erase_4k */
-
1416  res = w25qxx_sector_erase_4k(&gs_handle, 0x00000000);
-
1417  if (res != 0)
-
1418  {
-
1419  w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
-
1420  (void)w25qxx_deinit(&gs_handle);
-
1421 
-
1422  return 1;
-
1423  }
-
1424 
-
1425  /* w25qxx_page_program */
-
1426  res = w25qxx_page_program(&gs_handle, 0x00000000, gs_buffer_input, 256);
-
1427  if (res != 0)
-
1428  {
-
1429  w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
1430  (void)w25qxx_deinit(&gs_handle);
-
1431 
-
1432  return 1;
-
1433  }
-
1434 
-
1435  /* fast read dual output */
-
1436  res = w25qxx_fast_read_dual_output(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1437  if (res != 0)
-
1438  {
-
1439  w25qxx_interface_debug_print("w25qxx: fast read dual output failed.\n");
-
1440  (void)w25qxx_deinit(&gs_handle);
-
1441 
-
1442  return 1;
-
1443  }
-
1444  for (j = 0; j < 256; j++)
-
1445  {
-
1446  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1447  {
-
1448  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1449  (void)w25qxx_deinit(&gs_handle);
-
1450 
-
1451  return 1;
-
1452  }
-
1453  }
-
1454  w25qxx_interface_debug_print("w25qxx: fast_read_dual_output check passed.\n");
-
1455 
-
1456  /* fast read quad output */
-
1457  res = w25qxx_fast_read_quad_output(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1458  if (res != 0)
-
1459  {
-
1460  w25qxx_interface_debug_print("w25qxx: fast read quad output failed.\n");
-
1461  (void)w25qxx_deinit(&gs_handle);
-
1462 
-
1463  return 1;
-
1464  }
-
1465  for (j = 0; j < 256; j++)
-
1466  {
-
1467  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1468  {
-
1469  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1470  (void)w25qxx_deinit(&gs_handle);
-
1471 
-
1472  return 1;
-
1473  }
-
1474  }
-
1475  w25qxx_interface_debug_print("w25qxx: fast_read_quad_output check passed.\n");
-
1476 
-
1477  /* fast read dual io */
-
1478  res = w25qxx_fast_read_dual_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1479  if (res != 0)
-
1480  {
-
1481  w25qxx_interface_debug_print("w25qxx: fast read dual io failed.\n");
-
1482  (void)w25qxx_deinit(&gs_handle);
-
1483 
-
1484  return 1;
-
1485  }
-
1486  for (j = 0; j < 256; j++)
-
1487  {
-
1488  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1489  {
-
1490  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1491  (void)w25qxx_deinit(&gs_handle);
-
1492 
-
1493  return 1;
-
1494  }
-
1495  }
-
1496  w25qxx_interface_debug_print("w25qxx: w25qxx_fast_read_dual_io check passed.\n");
-
1497 
-
1498  /* fast read quad io */
-
1499  res = w25qxx_fast_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1500  if (res != 0)
-
1501  {
-
1502  w25qxx_interface_debug_print("w25qxx: fast read quad io failed.\n");
-
1503  (void)w25qxx_deinit(&gs_handle);
-
1504 
-
1505  return 1;
-
1506  }
-
1507  for (j = 0; j < 256; j++)
-
1508  {
-
1509  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1510  {
-
1511  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1512  (void)w25qxx_deinit(&gs_handle);
-
1513 
-
1514  return 1;
-
1515  }
-
1516  }
-
1517  w25qxx_interface_debug_print("w25qxx: w25qxx_fast_read_quad_io check passed.\n");
-
1518 
-
1519  /* word read quad io */
-
1520  res = w25qxx_word_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1521  if (res != 0)
-
1522  {
-
1523  w25qxx_interface_debug_print("w25qxx: word read quad io failed.\n");
-
1524  (void)w25qxx_deinit(&gs_handle);
-
1525 
-
1526  return 1;
-
1527  }
-
1528  for (j = 0; j < 256; j++)
-
1529  {
-
1530  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1531  {
-
1532  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1533  (void)w25qxx_deinit(&gs_handle);
-
1534 
-
1535  return 1;
-
1536  }
-
1537  }
-
1538  w25qxx_interface_debug_print("w25qxx: w25qxx_word_read_quad_io check passed.\n");
-
1539 
-
1540  /* octal read quad io */
-
1541  res = w25qxx_octal_word_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1542  if (res != 0)
-
1543  {
-
1544  w25qxx_interface_debug_print("w25qxx: octal read quad io failed.\n");
-
1545  (void)w25qxx_deinit(&gs_handle);
-
1546 
-
1547  return 1;
-
1548  }
-
1549  for (j = 0; j < 256; j++)
-
1550  {
-
1551  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1552  {
-
1553  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1554  (void)w25qxx_deinit(&gs_handle);
-
1555 
-
1556  return 1;
-
1557  }
-
1558  }
-
1559  w25qxx_interface_debug_print("w25qxx: w25qxx_octal_word_read_quad_io check passed.\n");
-
1560 
-
1561  /* random data */
-
1562  for (j = 0; j < 256; j++)
-
1563  {
-
1564  gs_buffer_input[j] = rand() %256;
-
1565  }
-
1566 
-
1567  /* w25qxx_sector_erase_4k */
-
1568  res = w25qxx_sector_erase_4k(&gs_handle, 0x00000000);
-
1569  if (res != 0)
-
1570  {
-
1571  w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
-
1572  (void)w25qxx_deinit(&gs_handle);
-
1573 
-
1574  return 1;
-
1575  }
-
1576 
-
1577  /* w25qxx_page_program_quad_input */
-
1578  res = w25qxx_page_program_quad_input(&gs_handle, 0x00000000, gs_buffer_input, 256);
-
1579  if (res != 0)
-
1580  {
-
1581  w25qxx_interface_debug_print("w25qxx: page program quad input failed.\n");
-
1582  (void)w25qxx_deinit(&gs_handle);
-
1583 
-
1584  return 1;
-
1585  }
-
1586 
-
1587  /* fast read */
-
1588  res = w25qxx_fast_read(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1589  if (res != 0)
-
1590  {
-
1591  w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
1592  (void)w25qxx_deinit(&gs_handle);
-
1593 
-
1594  return 1;
-
1595  }
-
1596  for (j = 0; j < 256; j++)
-
1597  {
-
1598  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1599  {
-
1600  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1601  (void)w25qxx_deinit(&gs_handle);
-
1602 
-
1603  return 1;
-
1604  }
-
1605  }
-
1606  w25qxx_interface_debug_print("w25qxx: w25qxx_page_program_quad_input check passed.\n");
-
1607 
-
1608  if (type >= W25Q256)
-
1609  {
-
1610  /* set address mode 4 byte */
-
1611  w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
-
1612 
-
1613  /* set address mode 4 byte */
-
1614  res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
-
1615  if (res != 0)
-
1616  {
-
1617  w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
1618  (void)w25qxx_deinit(&gs_handle);
-
1619 
-
1620  return 1;
-
1621  }
-
1622 
-
1623  /* random data */
-
1624  for (j = 0; j < 256; j++)
-
1625  {
-
1626  gs_buffer_input[j] = rand() %256;
-
1627  }
-
1628 
-
1629  /* w25qxx_sector_erase_4k */
-
1630  res = w25qxx_sector_erase_4k(&gs_handle, 0x00000000);
-
1631  if (res != 0)
-
1632  {
-
1633  w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
-
1634  (void)w25qxx_deinit(&gs_handle);
-
1635 
-
1636  return 1;
-
1637  }
-
1638 
-
1639  /* w25qxx_page_program */
-
1640  res = w25qxx_page_program(&gs_handle, 0x00000000, gs_buffer_input, 256);
-
1641  if (res != 0)
-
1642  {
-
1643  w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
1644  (void)w25qxx_deinit(&gs_handle);
-
1645 
-
1646  return 1;
-
1647  }
-
1648 
-
1649  /* fast read dual output */
-
1650  res = w25qxx_fast_read_dual_output(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1651  if (res != 0)
-
1652  {
-
1653  w25qxx_interface_debug_print("w25qxx: fast read dual output failed.\n");
-
1654  (void)w25qxx_deinit(&gs_handle);
-
1655 
-
1656  return 1;
-
1657  }
-
1658  for (j = 0; j < 256; j++)
-
1659  {
-
1660  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1661  {
-
1662  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1663  (void)w25qxx_deinit(&gs_handle);
-
1664 
-
1665  return 1;
-
1666  }
-
1667  }
-
1668  w25qxx_interface_debug_print("w25qxx: fast_read_dual_output check passed.\n");
-
1669 
-
1670  /* fast read quad output */
-
1671  res = w25qxx_fast_read_quad_output(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1672  if (res != 0)
-
1673  {
-
1674  w25qxx_interface_debug_print("w25qxx: fast read quad output failed.\n");
-
1675  (void)w25qxx_deinit(&gs_handle);
-
1676 
-
1677  return 1;
-
1678  }
-
1679  for (j = 0; j < 256; j++)
-
1680  {
-
1681  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1682  {
-
1683  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1684  (void)w25qxx_deinit(&gs_handle);
-
1685 
-
1686  return 1;
-
1687  }
-
1688  }
-
1689  w25qxx_interface_debug_print("w25qxx: fast_read_quad_output check passed.\n");
-
1690 
-
1691  /* fast read dual io */
-
1692  res = w25qxx_fast_read_dual_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1693  if (res != 0)
-
1694  {
-
1695  w25qxx_interface_debug_print("w25qxx: fast read dual io failed.\n");
-
1696  (void)w25qxx_deinit(&gs_handle);
-
1697 
-
1698  return 1;
-
1699  }
-
1700  for (j = 0; j < 256; j++)
-
1701  {
-
1702  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1703  {
-
1704  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1705  (void)w25qxx_deinit(&gs_handle);
-
1706 
-
1707  return 1;
-
1708  }
-
1709  }
-
1710  w25qxx_interface_debug_print("w25qxx: w25qxx_fast_read_dual_io check passed.\n");
-
1711 
-
1712  /* fast read quad io */
-
1713  res = w25qxx_fast_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1714  if (res != 0)
-
1715  {
-
1716  w25qxx_interface_debug_print("w25qxx: fast read quad io failed.\n");
-
1717  (void)w25qxx_deinit(&gs_handle);
-
1718 
-
1719  return 1;
-
1720  }
-
1721  for (j = 0; j < 256; j++)
-
1722  {
-
1723  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1724  {
-
1725  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1726  (void)w25qxx_deinit(&gs_handle);
-
1727 
-
1728  return 1;
-
1729  }
-
1730  }
-
1731  w25qxx_interface_debug_print("w25qxx: w25qxx_fast_read_quad_io check passed.\n");
-
1732 
-
1733  /* word read quad io */
-
1734  res = w25qxx_word_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1735  if (res != 0)
-
1736  {
-
1737  w25qxx_interface_debug_print("w25qxx: word read quad io failed.\n");
-
1738  (void)w25qxx_deinit(&gs_handle);
-
1739 
-
1740  return 1;
-
1741  }
-
1742  for (j = 0; j < 256; j++)
-
1743  {
-
1744  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1745  {
-
1746  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1747  (void)w25qxx_deinit(&gs_handle);
-
1748 
-
1749  return 1;
-
1750  }
-
1751  }
-
1752  w25qxx_interface_debug_print("w25qxx: w25qxx_word_read_quad_io check passed.\n");
-
1753 
-
1754  /* octal read quad io */
-
1755  res = w25qxx_octal_word_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1756  if (res != 0)
-
1757  {
-
1758  w25qxx_interface_debug_print("w25qxx: octal read quad io failed.\n");
-
1759  (void)w25qxx_deinit(&gs_handle);
-
1760 
-
1761  return 1;
-
1762  }
-
1763  for (j = 0; j < 256; j++)
-
1764  {
-
1765  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1766  {
-
1767  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1768  (void)w25qxx_deinit(&gs_handle);
-
1769 
-
1770  return 1;
-
1771  }
-
1772  }
-
1773  w25qxx_interface_debug_print("w25qxx: w25qxx_octal_word_read_quad_io check passed.\n");
-
1774 
-
1775  /* random data */
-
1776  for (j = 0; j < 256; j++)
-
1777  {
-
1778  gs_buffer_input[j] = rand() %256;
-
1779  }
-
1780 
-
1781  /* w25qxx_sector_erase_4k */
-
1782  res = w25qxx_sector_erase_4k(&gs_handle, 0x00000000);
-
1783  if (res != 0)
-
1784  {
-
1785  w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
-
1786  (void)w25qxx_deinit(&gs_handle);
-
1787 
-
1788  return 1;
-
1789  }
-
1790 
-
1791  /* w25qxx_page_program_quad_input */
-
1792  res = w25qxx_page_program_quad_input(&gs_handle, 0x00000000, gs_buffer_input, 256);
-
1793  if (res != 0)
-
1794  {
-
1795  w25qxx_interface_debug_print("w25qxx: page program quad input failed.\n");
-
1796  (void)w25qxx_deinit(&gs_handle);
-
1797 
-
1798  return 1;
-
1799  }
-
1800 
-
1801  /* fast read */
-
1802  res = w25qxx_fast_read(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1803  if (res != 0)
-
1804  {
-
1805  w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
1806  (void)w25qxx_deinit(&gs_handle);
-
1807 
-
1808  return 1;
-
1809  }
-
1810  for (j = 0; j < 256; j++)
-
1811  {
-
1812  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1813  {
-
1814  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1815  (void)w25qxx_deinit(&gs_handle);
-
1816 
-
1817  return 1;
-
1818  }
-
1819  }
-
1820  w25qxx_interface_debug_print("w25qxx: w25qxx_page_program_quad_input check passed.\n");
-
1821 
-
1822  /* set address mode 3 byte */
-
1823  w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
-
1824 
-
1825  /* set address mode 3 byte */
-
1826  res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
-
1827  if (res != 0)
-
1828  {
-
1829  w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
1830  (void)w25qxx_deinit(&gs_handle);
-
1831 
-
1832  return 1;
-
1833  }
-
1834  }
-
1835 
-
1836  /* enter to qspi mode */
-
1837  w25qxx_interface_debug_print("w25qxx: enter to qspi mode.\n");
-
1838 
-
1839  /* enter qspi */
-
1840  res = w25qxx_enter_qspi_mode(&gs_handle);
-
1841  if (res != 0)
-
1842  {
-
1843  w25qxx_interface_debug_print("w25qxx: enter qspi mode failed.\n");
-
1844  (void)w25qxx_deinit(&gs_handle);
-
1845 
-
1846  return 1;
-
1847  }
-
1848 
-
1849  /* set chip interface spi */
-
1850  res = w25qxx_set_interface(&gs_handle, W25QXX_INTERFACE_QSPI);
-
1851  if (res != 0)
-
1852  {
-
1853  w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
-
1854 
-
1855  return 1;
-
1856  }
-
1857  }
-
1858 
-
1859  /* w25qxx_set_read_parameters test */
-
1860  w25qxx_interface_debug_print("w25qxx: w25qxx_set_read_parameters test.\n");
-
1861 
-
1862  /* 8 dummy max 80MHz test */
-
1863  w25qxx_interface_debug_print("w25qxx: set 8 dummy max 80MHz test.\n");
-
1864 
-
1865  res = w25qxx_set_read_parameters(&gs_handle, W25QXX_QSPI_READ_DUMMY_8_80MHZ, W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE);
-
1866  if (res != 0)
-
1867  {
-
1868  w25qxx_interface_debug_print("w25qxx: set read parameters.\n");
-
1869 
-
1870  return 1;
-
1871  }
-
1872 
-
1873  for (addr = 0; addr < size; addr += step)
-
1874  {
-
1875  for (j = 0; j < 600; j++)
-
1876  {
-
1877  gs_buffer_input[j] = rand() %256;
-
1878  }
-
1879  res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
-
1880  if (res != 0)
-
1881  {
-
1882  w25qxx_interface_debug_print("w25qxx: write failed.\n");
-
1883  (void)w25qxx_deinit(&gs_handle);
-
1884 
-
1885  return 1;
-
1886  }
-
1887  res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
-
1888  if (res != 0)
-
1889  {
-
1890  w25qxx_interface_debug_print("w25qxx: read failed.\n");
-
1891  (void)w25qxx_deinit(&gs_handle);
-
1892 
-
1893  return 1;
-
1894  }
-
1895  for (j = 0; j < 600; j++)
-
1896  {
-
1897  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1898  {
-
1899  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1900  (void)w25qxx_deinit(&gs_handle);
-
1901 
-
1902  return 1;
-
1903  }
-
1904  }
-
1905  w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
-
1906  }
-
1907 
-
1908  /* 6 dummy max 80MHz test */
-
1909  w25qxx_interface_debug_print("w25qxx: set 6 dummy max 80MHz test.\n");
-
1910 
-
1911  res = w25qxx_set_read_parameters(&gs_handle, W25QXX_QSPI_READ_DUMMY_6_80MHZ, W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE);
-
1912  if (res != 0)
-
1913  {
-
1914  w25qxx_interface_debug_print("w25qxx: set read parameters.\n");
-
1915 
-
1916  return 1;
-
1917  }
-
1918 
-
1919  for (addr = 0; addr < size; addr += step)
-
1920  {
-
1921  for (j = 0; j < 600; j++)
-
1922  {
-
1923  gs_buffer_input[j] = rand() %256;
-
1924  }
-
1925  res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
-
1926  if (res != 0)
-
1927  {
-
1928  w25qxx_interface_debug_print("w25qxx: write failed.\n");
-
1929  (void)w25qxx_deinit(&gs_handle);
-
1930 
-
1931  return 1;
-
1932  }
-
1933  res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
-
1934  if (res != 0)
-
1935  {
-
1936  w25qxx_interface_debug_print("w25qxx: read failed.\n");
-
1937  (void)w25qxx_deinit(&gs_handle);
-
1938 
-
1939  return 1;
-
1940  }
-
1941  for (j = 0; j < 600; j++)
-
1942  {
-
1943  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1944  {
-
1945  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1946  (void)w25qxx_deinit(&gs_handle);
-
1947 
-
1948  return 1;
-
1949  }
-
1950  }
-
1951  w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
-
1952  }
-
1953 
-
1954  /* 4 dummy max 55MHz test */
-
1955  w25qxx_interface_debug_print("w25qxx: set 4 dummy max 55MHz test.\n");
-
1956 
-
1957  res = w25qxx_set_read_parameters(&gs_handle, W25QXX_QSPI_READ_DUMMY_4_55MHZ, W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE);
-
1958  if (res != 0)
-
1959  {
-
1960  w25qxx_interface_debug_print("w25qxx: set read parameters.\n");
-
1961 
-
1962  return 1;
-
1963  }
-
1964 
-
1965  for (addr = 0; addr < size; addr += step)
-
1966  {
-
1967  for (j = 0; j < 600; j++)
-
1968  {
-
1969  gs_buffer_input[j] = rand() %256;
-
1970  }
-
1971  res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
-
1972  if (res != 0)
-
1973  {
-
1974  w25qxx_interface_debug_print("w25qxx: write failed.\n");
-
1975  (void)w25qxx_deinit(&gs_handle);
-
1976 
-
1977  return 1;
-
1978  }
-
1979  res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
-
1980  if (res != 0)
-
1981  {
-
1982  w25qxx_interface_debug_print("w25qxx: read failed.\n");
-
1983  (void)w25qxx_deinit(&gs_handle);
-
1984 
-
1985  return 1;
-
1986  }
-
1987  for (j = 0; j < 600; j++)
-
1988  {
-
1989  if (gs_buffer_input[j] != gs_buffer_output[j])
-
1990  {
-
1991  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1992  (void)w25qxx_deinit(&gs_handle);
-
1993 
-
1994  return 1;
-
1995  }
-
1996  }
-
1997  w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
-
1998  }
-
1999 
-
2000  /* 2 dummy max 33MHz test */
-
2001  w25qxx_interface_debug_print("w25qxx: set 2 dummy max 33MHz test.\n");
-
2002 
-
2003  res = w25qxx_set_read_parameters(&gs_handle, W25QXX_QSPI_READ_DUMMY_2_33MHZ, W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE);
-
2004  if (res != 0)
-
2005  {
-
2006  w25qxx_interface_debug_print("w25qxx: set read parameters.\n");
-
2007 
-
2008  return 1;
-
2009  }
-
2010 
-
2011  for (addr = 0; addr < size; addr += step)
-
2012  {
-
2013  for (j = 0; j < 600; j++)
-
2014  {
-
2015  gs_buffer_input[j] = rand() %256;
-
2016  }
-
2017  res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
-
2018  if (res != 0)
-
2019  {
-
2020  w25qxx_interface_debug_print("w25qxx: write failed.\n");
-
2021  (void)w25qxx_deinit(&gs_handle);
-
2022 
-
2023  return 1;
-
2024  }
-
2025  res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
-
2026  if (res != 0)
-
2027  {
-
2028  w25qxx_interface_debug_print("w25qxx: read failed.\n");
-
2029  (void)w25qxx_deinit(&gs_handle);
-
2030 
-
2031  return 1;
-
2032  }
-
2033  for (j = 0; j < 600; j++)
-
2034  {
-
2035  if (gs_buffer_input[j] != gs_buffer_output[j])
-
2036  {
-
2037  w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
2038  (void)w25qxx_deinit(&gs_handle);
-
2039 
-
2040  return 1;
-
2041  }
-
2042  }
-
2043  w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
-
2044  }
-
2045  }
-
2046 
-
2047  /* finish read test */
-
2048  w25qxx_interface_debug_print("w25qxx: finish read test.\n");
-
2049  (void)w25qxx_deinit(&gs_handle);
-
2050 
-
2051  return 0;
-
2052 }
+Go to the documentation of this file.
1
+
37#include "driver_w25qxx_read_test.h"
+
38#include <stdlib.h>
+
39
+
40static w25qxx_handle_t gs_handle;
+
41static uint8_t gs_buffer_input[600];
+
42static uint8_t gs_buffer_output[600];
+
43static const uint32_t gsc_size[] = {0x100000, 0x200000, 0x400000, 0x800000, 0x1000000, 0x2000000};
+
+
55uint8_t w25qxx_read_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
+
56{
+
57 uint8_t res;
+
58 w25qxx_info_t info;
+
59
+
60 /* link interface function */
+
61 DRIVER_W25QXX_LINK_INIT(&gs_handle, w25qxx_handle_t);
+
62 DRIVER_W25QXX_LINK_SPI_QSPI_INIT(&gs_handle, w25qxx_interface_spi_qspi_init);
+
63 DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(&gs_handle, w25qxx_interface_spi_qspi_deinit);
+
64 DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(&gs_handle, w25qxx_interface_spi_qspi_write_read);
+
65 DRIVER_W25QXX_LINK_DELAY_MS(&gs_handle, w25qxx_interface_delay_ms);
+
66 DRIVER_W25QXX_LINK_DELAY_US(&gs_handle, w25qxx_interface_delay_us);
+
67 DRIVER_W25QXX_LINK_DEBUG_PRINT(&gs_handle, w25qxx_interface_debug_print);
+
68
+
69 /* get information */
+
70 res = w25qxx_info(&info);
+
71 if (res != 0)
+
72 {
+
73 w25qxx_interface_debug_print("w25qxx: get info failed.\n");
+
74
+
75 return 1;
+
76 }
+
77 else
+
78 {
+
79 /* print chip information */
+
80 w25qxx_interface_debug_print("w25qxx: chip is %s.\n", info.chip_name);
+
81 w25qxx_interface_debug_print("w25qxx: manufacturer is %s.\n", info.manufacturer_name);
+
82 w25qxx_interface_debug_print("w25qxx: interface is %s.\n", info.interface);
+
83 w25qxx_interface_debug_print("w25qxx: driver version is %d.%d.\n", info.driver_version / 1000, (info.driver_version % 1000) / 100);
+
84 w25qxx_interface_debug_print("w25qxx: min supply voltage is %0.1fV.\n", info.supply_voltage_min_v);
+
85 w25qxx_interface_debug_print("w25qxx: max supply voltage is %0.1fV.\n", info.supply_voltage_max_v);
+
86 w25qxx_interface_debug_print("w25qxx: max current is %0.2fmA.\n", info.max_current_ma);
+
87 w25qxx_interface_debug_print("w25qxx: max temperature is %0.1fC.\n", info.temperature_max);
+
88 w25qxx_interface_debug_print("w25qxx: min temperature is %0.1fC.\n", info.temperature_min);
+
89 }
+
90
+
91 /* set chip type */
+
92 res = w25qxx_set_type(&gs_handle, type);
+
93 if (res != 0)
+
94 {
+
95 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
96
+
97 return 1;
+
98 }
+
99
+
100 /* set chip interface */
+
101 res = w25qxx_set_interface(&gs_handle, interface);
+
102 if (res != 0)
+
103 {
+
104 w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
+
105
+
106 return 1;
+
107 }
+
108
+
109 /* set dual quad spi */
+
110 res = w25qxx_set_dual_quad_spi(&gs_handle, dual_quad_spi_enable);
+
111 if (res != 0)
+
112 {
+
113 w25qxx_interface_debug_print("w25qxx: set dual quad spi failed.\n");
+
114 (void)w25qxx_deinit(&gs_handle);
+
115
+
116 return 1;
+
117 }
+
118
+
119 /* chip init */
+
120 res = w25qxx_init(&gs_handle);
+
121 if (res != 0)
+
122 {
+
123 w25qxx_interface_debug_print("w25qxx: init failed.\n");
+
124
+
125 return 1;
+
126 }
+
127
+
128 /* start read test */
+
129 w25qxx_interface_debug_print("w25qxx: start read test.\n");
+
130
+
131 if (interface == W25QXX_INTERFACE_SPI)
+
132 {
+
133 uint32_t size;
+
134 uint32_t addr, step, j;
+
135
+
136 size = gsc_size[type - W25Q80];
+
137 step = size / 16;
+
138
+
139 /* w25qxx_write/w25qxx_read test */
+
140 w25qxx_interface_debug_print("w25qxx: w25qxx_write/w25qxx_read test.\n");
+
141
+
142 for (addr = 0; addr < size; addr += step)
+
143 {
+
144 for (j = 0; j < 600; j++)
+
145 {
+
146 gs_buffer_input[j] = rand() %256;
+
147 }
+
148 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
+
149 if (res != 0)
+
150 {
+
151 w25qxx_interface_debug_print("w25qxx: write failed.\n");
+
152 (void)w25qxx_deinit(&gs_handle);
+
153
+
154 return 1;
+
155 }
+
156 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
+
157 if (res != 0)
+
158 {
+
159 w25qxx_interface_debug_print("w25qxx: read failed.\n");
+
160 (void)w25qxx_deinit(&gs_handle);
+
161
+
162 return 1;
+
163 }
+
164 for (j = 0; j < 600; j++)
+
165 {
+
166 if (gs_buffer_input[j] != gs_buffer_output[j])
+
167 {
+
168 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
169 (void)w25qxx_deinit(&gs_handle);
+
170
+
171 return 1;
+
172 }
+
173 }
+
174 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
+
175 }
+
176
+
177 /* w25qxx_sector_erase_4k test */
+
178 addr = (rand() % 10) * 4 * 1024;
+
179 w25qxx_interface_debug_print("w25qxx: w25qxx_sector_erase_4k test with address 0x%X.\n", addr);
+
180 res = w25qxx_sector_erase_4k(&gs_handle, addr);
+
181 if (res != 0)
+
182 {
+
183 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
+
184 (void)w25qxx_deinit(&gs_handle);
+
185
+
186 return 1;
+
187 }
+
188 for (j = 0; j < 256; j++)
+
189 {
+
190 gs_buffer_input[j] = rand() %256;
+
191 }
+
192
+
193 /* w25qxx_page_program */
+
194 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
195 if (res != 0)
+
196 {
+
197 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
198 (void)w25qxx_deinit(&gs_handle);
+
199
+
200 return 1;
+
201 }
+
202
+
203 /* w25qxx_only_spi_read */
+
204 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
+
205 if (res != 0)
+
206 {
+
207 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
+
208 (void)w25qxx_deinit(&gs_handle);
+
209
+
210 return 1;
+
211 }
+
212 for (j = 0; j < 256; j++)
+
213 {
+
214 if (gs_buffer_input[j] != gs_buffer_output[j])
+
215 {
+
216 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
217 (void)w25qxx_deinit(&gs_handle);
+
218
+
219 return 1;
+
220 }
+
221 }
+
222 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
+
223
+
224 /* w25qxx_fast_read */
+
225 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
226 if (res != 0)
+
227 {
+
228 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
229 (void)w25qxx_deinit(&gs_handle);
+
230
+
231 return 1;
+
232 }
+
233 for (j = 0; j < 256; j++)
+
234 {
+
235 if (gs_buffer_input[j] != gs_buffer_output[j])
+
236 {
+
237 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
238 (void)w25qxx_deinit(&gs_handle);
+
239
+
240 return 1;
+
241 }
+
242 }
+
243 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
244
+
245 /* w25qxx_block_erase_32k test */
+
246 addr = (rand() % 10) * 32 * 1024;
+
247 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_32k test with address 0x%X.\n", addr);
+
248 res = w25qxx_block_erase_32k(&gs_handle, addr);
+
249 if (res != 0)
+
250 {
+
251 w25qxx_interface_debug_print("w25qxx: sector erase 32k failed.\n");
+
252 (void)w25qxx_deinit(&gs_handle);
+
253
+
254 return 1;
+
255 }
+
256 for (j = 0; j < 256; j++)
+
257 {
+
258 gs_buffer_input[j] = rand() %256;
+
259 }
+
260
+
261 /* w25qxx_page_program */
+
262 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
263 if (res != 0)
+
264 {
+
265 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
266 (void)w25qxx_deinit(&gs_handle);
+
267
+
268 return 1;
+
269 }
+
270
+
271 /* w25qxx_only_spi_read */
+
272 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
+
273 if (res != 0)
+
274 {
+
275 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
+
276 (void)w25qxx_deinit(&gs_handle);
+
277
+
278 return 1;
+
279 }
+
280 for (j = 0; j < 256; j++)
+
281 {
+
282 if (gs_buffer_input[j] != gs_buffer_output[j])
+
283 {
+
284 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
285 (void)w25qxx_deinit(&gs_handle);
+
286
+
287 return 1;
+
288 }
+
289 }
+
290 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
+
291
+
292 /* w25qxx_fast_read */
+
293 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
294 if (res != 0)
+
295 {
+
296 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
297 (void)w25qxx_deinit(&gs_handle);
+
298
+
299 return 1;
+
300 }
+
301 for (j = 0; j < 256; j++)
+
302 {
+
303 if (gs_buffer_input[j] != gs_buffer_output[j])
+
304 {
+
305 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
306 (void)w25qxx_deinit(&gs_handle);
+
307
+
308 return 1;
+
309 }
+
310 }
+
311 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
312
+
313 /* w25qxx_block_erase_64k test */
+
314 addr = (rand() % 10) * 64 * 1024;
+
315 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_64k test with address 0x%X.\n", addr);
+
316 res = w25qxx_block_erase_64k(&gs_handle, addr);
+
317 if (res != 0)
+
318 {
+
319 w25qxx_interface_debug_print("w25qxx: sector erase 64k failed.\n");
+
320 (void)w25qxx_deinit(&gs_handle);
+
321
+
322 return 1;
+
323 }
+
324 for (j = 0; j < 256; j++)
+
325 {
+
326 gs_buffer_input[j] = rand() %256;
+
327 }
+
328
+
329 /* w25qxx_page_program */
+
330 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
331 if (res != 0)
+
332 {
+
333 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
334 (void)w25qxx_deinit(&gs_handle);
+
335
+
336 return 1;
+
337 }
+
338
+
339 /* w25qxx_only_spi_read */
+
340 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
+
341 if (res != 0)
+
342 {
+
343 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
+
344 (void)w25qxx_deinit(&gs_handle);
+
345
+
346 return 1;
+
347 }
+
348 for (j = 0; j < 256; j++)
+
349 {
+
350 if (gs_buffer_input[j] != gs_buffer_output[j])
+
351 {
+
352 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
353 (void)w25qxx_deinit(&gs_handle);
+
354
+
355 return 1;
+
356 }
+
357 }
+
358 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
+
359
+
360 /* w25qxx_fast_read */
+
361 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
362 if (res != 0)
+
363 {
+
364 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
365 (void)w25qxx_deinit(&gs_handle);
+
366
+
367 return 1;
+
368 }
+
369 for (j = 0; j < 256; j++)
+
370 {
+
371 if (gs_buffer_input[j] != gs_buffer_output[j])
+
372 {
+
373 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
374 (void)w25qxx_deinit(&gs_handle);
+
375
+
376 return 1;
+
377 }
+
378 }
+
379 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
380
+
381 /* get sfdp */
+
382 w25qxx_interface_debug_print("w25qxx: get sfdp.\n");
+
383 memset(gs_buffer_output, 0, sizeof(uint8_t) * 256);
+
384 res = w25qxx_get_sfdp(&gs_handle, (uint8_t *)gs_buffer_output);
+
385 if (res != 0)
+
386 {
+
387 w25qxx_interface_debug_print("w25qxx: get sfdp failed.\n");
+
388 (void)w25qxx_deinit(&gs_handle);
+
389
+
390 return 1;
+
391 }
+
392 for (j = 0; j < 256; j += 8)
+
393 {
+
394 w25qxx_interface_debug_print("w25qxx: sdfp[%d-%d] is 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X.\n",
+
395 j , j + 7,
+
396 gs_buffer_output[j + 0], gs_buffer_output[j + 1], gs_buffer_output[j + 2],
+
397 gs_buffer_output[j + 3], gs_buffer_output[j + 4], gs_buffer_output[j + 5],
+
398 gs_buffer_output[j + 6], gs_buffer_output[j + 7]);
+
399 }
+
400
+
401 /* security register1 write and read test */
+
402 w25qxx_interface_debug_print("w25qxx: security register1 write and read test.\n");
+
403
+
404 /* security register1 write and read test */
+
405 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1);
+
406 if (res != 0)
+
407 {
+
408 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
+
409 (void)w25qxx_deinit(&gs_handle);
+
410
+
411 return 1;
+
412 }
+
413 for (j = 0; j < 256; j++)
+
414 {
+
415 gs_buffer_input[j] = rand() %256;
+
416 }
+
417 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1, gs_buffer_input);
+
418 if (res != 0)
+
419 {
+
420 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
+
421 (void)w25qxx_deinit(&gs_handle);
+
422
+
423 return 1;
+
424 }
+
425 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1, gs_buffer_output);
+
426 if (res != 0)
+
427 {
+
428 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
+
429 (void)w25qxx_deinit(&gs_handle);
+
430
+
431 return 1;
+
432 }
+
433 for (j = 0; j < 256; j++)
+
434 {
+
435 if (gs_buffer_input[j] != gs_buffer_output[j])
+
436 {
+
437 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
438 (void)w25qxx_deinit(&gs_handle);
+
439
+
440 return 1;
+
441 }
+
442 }
+
443 w25qxx_interface_debug_print("w25qxx: security register1 check passed.\n");
+
444
+
445 /* security register2 write and read test */
+
446 w25qxx_interface_debug_print("w25qxx: security register2 write and read test.\n");
+
447
+
448 /* security register2 write and read test */
+
449 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2);
+
450 if (res != 0)
+
451 {
+
452 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
+
453 (void)w25qxx_deinit(&gs_handle);
+
454
+
455 return 1;
+
456 }
+
457 for (j = 0; j < 256; j++)
+
458 {
+
459 gs_buffer_input[j] = rand() %256;
+
460 }
+
461 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2, gs_buffer_input);
+
462 if (res != 0)
+
463 {
+
464 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
+
465 (void)w25qxx_deinit(&gs_handle);
+
466
+
467 return 1;
+
468 }
+
469 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2, gs_buffer_output);
+
470 if (res != 0)
+
471 {
+
472 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
+
473 (void)w25qxx_deinit(&gs_handle);
+
474
+
475 return 1;
+
476 }
+
477 for (j = 0; j < 256; j++)
+
478 {
+
479 if (gs_buffer_input[j] != gs_buffer_output[j])
+
480 {
+
481 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
482 (void)w25qxx_deinit(&gs_handle);
+
483
+
484 return 1;
+
485 }
+
486 }
+
487 w25qxx_interface_debug_print("w25qxx: security register2 check passed.\n");
+
488
+
489 /* security register3 write and read test */
+
490 w25qxx_interface_debug_print("w25qxx: security register3 write and read test.\n");
+
491
+
492 /* security register3 write and read test */
+
493 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3);
+
494 if (res != 0)
+
495 {
+
496 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
+
497 (void)w25qxx_deinit(&gs_handle);
+
498
+
499 return 1;
+
500 }
+
501 for (j = 0; j < 256; j++)
+
502 {
+
503 gs_buffer_input[j] = rand() %256;
+
504 }
+
505 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3, gs_buffer_input);
+
506 if (res != 0)
+
507 {
+
508 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
+
509 (void)w25qxx_deinit(&gs_handle);
+
510
+
511 return 1;
+
512 }
+
513 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3, gs_buffer_output);
+
514 if (res != 0)
+
515 {
+
516 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
+
517 (void)w25qxx_deinit(&gs_handle);
+
518
+
519 return 1;
+
520 }
+
521 for (j = 0; j < 256; j++)
+
522 {
+
523 if (gs_buffer_input[j] != gs_buffer_output[j])
+
524 {
+
525 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
526 (void)w25qxx_deinit(&gs_handle);
+
527
+
528 return 1;
+
529 }
+
530 }
+
531 w25qxx_interface_debug_print("w25qxx: security register3 check passed.\n");
+
532
+
533 #if (W25QXX_ENABLE_ERASE_READ_TEST == 1)
+
534 /* start chip erasing */
+
535 w25qxx_interface_debug_print("w25qxx: start chip erasing.\n");
+
536
+
537 /* chip erase */
+
538 w25qxx_interface_debug_print("w25qxx: w25qxx_chip_erase test.\n");
+
539 res = w25qxx_chip_erase(&gs_handle);
+
540 if (res != 0)
+
541 {
+
542 w25qxx_interface_debug_print("w25qxx: chip erase failed.\n");
+
543 (void)w25qxx_deinit(&gs_handle);
+
544
+
545 return 1;
+
546 }
+
547 w25qxx_interface_debug_print("w25qxx: chip erase successful.\n");
+
548 #endif
+
549
+
550 if (type >= W25Q256)
+
551 {
+
552 /* set address mode 4 byte */
+
553 w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
+
554
+
555 /* set address mode 4 byte */
+
556 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
+
557 if (res != 0)
+
558 {
+
559 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
560 (void)w25qxx_deinit(&gs_handle);
+
561
+
562 return 1;
+
563 }
+
564
+
565 /* w25qxx_write/w25qxx_read test */
+
566 w25qxx_interface_debug_print("w25qxx: w25qxx_write/w25qxx_read test.\n");
+
567
+
568 for (addr = 0; addr < size; addr += step)
+
569 {
+
570 for (j = 0; j < 600; j++)
+
571 {
+
572 gs_buffer_input[j] = rand() %256;
+
573 }
+
574 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
+
575 if (res != 0)
+
576 {
+
577 w25qxx_interface_debug_print("w25qxx: write failed.\n");
+
578 (void)w25qxx_deinit(&gs_handle);
+
579
+
580 return 1;
+
581 }
+
582 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
+
583 if (res != 0)
+
584 {
+
585 w25qxx_interface_debug_print("w25qxx: read failed.\n");
+
586 (void)w25qxx_deinit(&gs_handle);
+
587
+
588 return 1;
+
589 }
+
590 for (j = 0; j < 600; j++)
+
591 {
+
592 if (gs_buffer_input[j] != gs_buffer_output[j])
+
593 {
+
594 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
595 (void)w25qxx_deinit(&gs_handle);
+
596
+
597 return 1;
+
598 }
+
599 }
+
600 w25qxx_interface_debug_print("w25qxx: %d/%d successful.\n", addr, size);
+
601 }
+
602
+
603 /* w25qxx_sector_erase_4k test */
+
604 addr = (rand() % 10) * 4 * 1024;
+
605 w25qxx_interface_debug_print("w25qxx: w25qxx_sector_erase_4k test with address 0x%X.\n", addr);
+
606 res = w25qxx_sector_erase_4k(&gs_handle, addr);
+
607 if (res != 0)
+
608 {
+
609 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
+
610 (void)w25qxx_deinit(&gs_handle);
+
611
+
612 return 1;
+
613 }
+
614 for (j = 0; j < 256; j++)
+
615 {
+
616 gs_buffer_input[j] = rand() %256;
+
617 }
+
618
+
619 /* w25qxx_page_program */
+
620 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
621 if (res != 0)
+
622 {
+
623 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
624 (void)w25qxx_deinit(&gs_handle);
+
625
+
626 return 1;
+
627 }
+
628
+
629 /* w25qxx_only_spi_read */
+
630 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
+
631 if (res != 0)
+
632 {
+
633 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
+
634 (void)w25qxx_deinit(&gs_handle);
+
635
+
636 return 1;
+
637 }
+
638 for (j = 0; j < 256; j++)
+
639 {
+
640 if (gs_buffer_input[j] != gs_buffer_output[j])
+
641 {
+
642 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
643 (void)w25qxx_deinit(&gs_handle);
+
644
+
645 return 1;
+
646 }
+
647 }
+
648 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
+
649
+
650 /* w25qxx_fast_read */
+
651 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
652 if (res != 0)
+
653 {
+
654 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
655 (void)w25qxx_deinit(&gs_handle);
+
656
+
657 return 1;
+
658 }
+
659 for (j = 0; j < 256; j++)
+
660 {
+
661 if (gs_buffer_input[j] != gs_buffer_output[j])
+
662 {
+
663 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
664 (void)w25qxx_deinit(&gs_handle);
+
665
+
666 return 1;
+
667 }
+
668 }
+
669 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
670
+
671 /* w25qxx_block_erase_32k test */
+
672 addr = (rand() % 10) * 32 * 1024;
+
673 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_32k test with address 0x%X.\n", addr);
+
674 res = w25qxx_block_erase_32k(&gs_handle, addr);
+
675 if (res != 0)
+
676 {
+
677 w25qxx_interface_debug_print("w25qxx: sector erase 32k failed.\n");
+
678 (void)w25qxx_deinit(&gs_handle);
+
679
+
680 return 1;
+
681 }
+
682 for (j = 0; j < 256; j++)
+
683 {
+
684 gs_buffer_input[j] = rand() %256;
+
685 }
+
686
+
687 /* w25qxx_page_program */
+
688 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
689 if (res != 0)
+
690 {
+
691 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
692 (void)w25qxx_deinit(&gs_handle);
+
693
+
694 return 1;
+
695 }
+
696
+
697 /* w25qxx_only_spi_read */
+
698 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
+
699 if (res != 0)
+
700 {
+
701 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
+
702 (void)w25qxx_deinit(&gs_handle);
+
703
+
704 return 1;
+
705 }
+
706 for (j = 0; j < 256; j++)
+
707 {
+
708 if (gs_buffer_input[j] != gs_buffer_output[j])
+
709 {
+
710 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
711 (void)w25qxx_deinit(&gs_handle);
+
712
+
713 return 1;
+
714 }
+
715 }
+
716 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
+
717
+
718 /* w25qxx_fast_read */
+
719 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
720 if (res != 0)
+
721 {
+
722 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
723 (void)w25qxx_deinit(&gs_handle);
+
724
+
725 return 1;
+
726 }
+
727 for (j = 0; j < 256; j++)
+
728 {
+
729 if (gs_buffer_input[j] != gs_buffer_output[j])
+
730 {
+
731 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
732 (void)w25qxx_deinit(&gs_handle);
+
733
+
734 return 1;
+
735 }
+
736 }
+
737 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
738
+
739 /* w25qxx_block_erase_64k test */
+
740 addr = (rand() % 10) * 64 * 1024;
+
741 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_64k test with address 0x%X.\n", addr);
+
742 res = w25qxx_block_erase_64k(&gs_handle, addr);
+
743 if (res != 0)
+
744 {
+
745 w25qxx_interface_debug_print("w25qxx: sector erase 64k failed.\n");
+
746 (void)w25qxx_deinit(&gs_handle);
+
747
+
748 return 1;
+
749 }
+
750 for (j = 0; j < 256; j++)
+
751 {
+
752 gs_buffer_input[j] = rand() %256;
+
753 }
+
754
+
755 /* w25qxx_page_program */
+
756 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
757 if (res != 0)
+
758 {
+
759 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
760 (void)w25qxx_deinit(&gs_handle);
+
761
+
762 return 1;
+
763 }
+
764
+
765 /* w25qxx_only_spi_read */
+
766 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
+
767 if (res != 0)
+
768 {
+
769 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
+
770 (void)w25qxx_deinit(&gs_handle);
+
771
+
772 return 1;
+
773 }
+
774 for (j = 0; j < 256; j++)
+
775 {
+
776 if (gs_buffer_input[j] != gs_buffer_output[j])
+
777 {
+
778 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
779 (void)w25qxx_deinit(&gs_handle);
+
780
+
781 return 1;
+
782 }
+
783 }
+
784 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
+
785
+
786 /* w25qxx_fast_read */
+
787 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
788 if (res != 0)
+
789 {
+
790 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
791 (void)w25qxx_deinit(&gs_handle);
+
792
+
793 return 1;
+
794 }
+
795 for (j = 0; j < 256; j++)
+
796 {
+
797 if (gs_buffer_input[j] != gs_buffer_output[j])
+
798 {
+
799 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
800 (void)w25qxx_deinit(&gs_handle);
+
801
+
802 return 1;
+
803 }
+
804 }
+
805 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
806
+
807 /* get sfdp */
+
808 w25qxx_interface_debug_print("w25qxx: get sfdp.\n");
+
809 memset(gs_buffer_output, 0, sizeof(uint8_t) * 256);
+
810 res = w25qxx_get_sfdp(&gs_handle, (uint8_t *)gs_buffer_output);
+
811 if (res != 0)
+
812 {
+
813 w25qxx_interface_debug_print("w25qxx: get sfdp failed.\n");
+
814 (void)w25qxx_deinit(&gs_handle);
+
815
+
816 return 1;
+
817 }
+
818 for (j = 0; j < 256; j += 8)
+
819 {
+
820 w25qxx_interface_debug_print("w25qxx: sdfp[%d-%d] is 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X.\n",
+
821 j , j + 7,
+
822 gs_buffer_output[j + 0], gs_buffer_output[j + 1], gs_buffer_output[j + 2],
+
823 gs_buffer_output[j + 3], gs_buffer_output[j + 4], gs_buffer_output[j + 5],
+
824 gs_buffer_output[j + 6], gs_buffer_output[j + 7]);
+
825 }
+
826
+
827 /* security register1 write and read test */
+
828 w25qxx_interface_debug_print("w25qxx: security register1 write and read test.\n");
+
829
+
830 /* security register1 write and read test */
+
831 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1);
+
832 if (res != 0)
+
833 {
+
834 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
+
835 (void)w25qxx_deinit(&gs_handle);
+
836
+
837 return 1;
+
838 }
+
839 for (j = 0; j < 256; j++)
+
840 {
+
841 gs_buffer_input[j] = rand() %256;
+
842 }
+
843 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1, gs_buffer_input);
+
844 if (res != 0)
+
845 {
+
846 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
+
847 (void)w25qxx_deinit(&gs_handle);
+
848
+
849 return 1;
+
850 }
+
851 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1, gs_buffer_output);
+
852 if (res != 0)
+
853 {
+
854 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
+
855 (void)w25qxx_deinit(&gs_handle);
+
856
+
857 return 1;
+
858 }
+
859 for (j = 0; j < 256; j++)
+
860 {
+
861 if (gs_buffer_input[j] != gs_buffer_output[j])
+
862 {
+
863 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
864 (void)w25qxx_deinit(&gs_handle);
+
865
+
866 return 1;
+
867 }
+
868 }
+
869 w25qxx_interface_debug_print("w25qxx: security register1 check passed.\n");
+
870
+
871 /* security register2 write and read test */
+
872 w25qxx_interface_debug_print("w25qxx: security register2 write and read test.\n");
+
873
+
874 /* security register2 write and read test */
+
875 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2);
+
876 if (res != 0)
+
877 {
+
878 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
+
879 (void)w25qxx_deinit(&gs_handle);
+
880
+
881 return 1;
+
882 }
+
883 for (j = 0; j < 256; j++)
+
884 {
+
885 gs_buffer_input[j] = rand() %256;
+
886 }
+
887 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2, gs_buffer_input);
+
888 if (res != 0)
+
889 {
+
890 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
+
891 (void)w25qxx_deinit(&gs_handle);
+
892
+
893 return 1;
+
894 }
+
895 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2, gs_buffer_output);
+
896 if (res != 0)
+
897 {
+
898 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
+
899 (void)w25qxx_deinit(&gs_handle);
+
900
+
901 return 1;
+
902 }
+
903 for (j = 0; j < 256; j++)
+
904 {
+
905 if (gs_buffer_input[j] != gs_buffer_output[j])
+
906 {
+
907 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
908 (void)w25qxx_deinit(&gs_handle);
+
909
+
910 return 1;
+
911 }
+
912 }
+
913 w25qxx_interface_debug_print("w25qxx: security register2 check passed.\n");
+
914
+
915 /* security register3 write and read test */
+
916 w25qxx_interface_debug_print("w25qxx: security register3 write and read test.\n");
+
917
+
918 /* security register3 write and read test */
+
919 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3);
+
920 if (res != 0)
+
921 {
+
922 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
+
923 (void)w25qxx_deinit(&gs_handle);
+
924
+
925 return 1;
+
926 }
+
927 for (j = 0; j < 256; j++)
+
928 {
+
929 gs_buffer_input[j] = rand() %256;
+
930 }
+
931 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3, gs_buffer_input);
+
932 if (res != 0)
+
933 {
+
934 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
+
935 (void)w25qxx_deinit(&gs_handle);
+
936
+
937 return 1;
+
938 }
+
939 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3, gs_buffer_output);
+
940 if (res != 0)
+
941 {
+
942 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
+
943 (void)w25qxx_deinit(&gs_handle);
+
944
+
945 return 1;
+
946 }
+
947 for (j = 0; j < 256; j++)
+
948 {
+
949 if (gs_buffer_input[j] != gs_buffer_output[j])
+
950 {
+
951 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
952 (void)w25qxx_deinit(&gs_handle);
+
953
+
954 return 1;
+
955 }
+
956 }
+
957 w25qxx_interface_debug_print("w25qxx: security register3 check passed.\n");
+
958
+
959 /* set address mode 3 byte */
+
960 w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
+
961
+
962 /* set address mode 3 byte */
+
963 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
+
964 if (res != 0)
+
965 {
+
966 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
967 (void)w25qxx_deinit(&gs_handle);
+
968
+
969 return 1;
+
970 }
+
971 }
+
972 }
+
973 else
+
974 {
+
975 uint32_t size;
+
976 uint32_t addr, step, j;
+
977
+
978 size = gsc_size[type - W25Q80];
+
979 step = size / 16;
+
980
+
981 /* w25qxx_write/w25qxx_read test */
+
982 w25qxx_interface_debug_print("w25qxx: w25qxx_write/w25qxx_read test.\n");
+
983
+
984 for (addr = 0; addr < size; addr += step)
+
985 {
+
986 for (j = 0; j < 600; j++)
+
987 {
+
988 gs_buffer_input[j] = rand() %256;
+
989 }
+
990 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
+
991 if (res != 0)
+
992 {
+
993 w25qxx_interface_debug_print("w25qxx: write failed.\n");
+
994 (void)w25qxx_deinit(&gs_handle);
+
995
+
996 return 1;
+
997 }
+
998 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
+
999 if (res != 0)
+
1000 {
+
1001 w25qxx_interface_debug_print("w25qxx: read failed.\n");
+
1002 (void)w25qxx_deinit(&gs_handle);
+
1003
+
1004 return 1;
+
1005 }
+
1006 for (j = 0; j < 600; j++)
+
1007 {
+
1008 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1009 {
+
1010 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1011 (void)w25qxx_deinit(&gs_handle);
+
1012
+
1013 return 1;
+
1014 }
+
1015 }
+
1016 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
+
1017 }
+
1018
+
1019 /* w25qxx_sector_erase_4k test */
+
1020 addr = (rand() % 10) * 4 * 1024;
+
1021 w25qxx_interface_debug_print("w25qxx: w25qxx_sector_erase_4k test with address 0x%X.\n", addr);
+
1022 res = w25qxx_sector_erase_4k(&gs_handle, addr);
+
1023 if (res != 0)
+
1024 {
+
1025 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
+
1026 (void)w25qxx_deinit(&gs_handle);
+
1027
+
1028 return 1;
+
1029 }
+
1030 for (j = 0; j < 256; j++)
+
1031 {
+
1032 gs_buffer_input[j] = rand() %256;
+
1033 }
+
1034
+
1035 /* w25qxx_page_program */
+
1036 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
1037 if (res != 0)
+
1038 {
+
1039 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
1040 (void)w25qxx_deinit(&gs_handle);
+
1041
+
1042 return 1;
+
1043 }
+
1044
+
1045 /* w25qxx_fast_read */
+
1046 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
1047 if (res != 0)
+
1048 {
+
1049 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
1050 (void)w25qxx_deinit(&gs_handle);
+
1051
+
1052 return 1;
+
1053 }
+
1054 for (j = 0; j < 256; j++)
+
1055 {
+
1056 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1057 {
+
1058 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1059 (void)w25qxx_deinit(&gs_handle);
+
1060
+
1061 return 1;
+
1062 }
+
1063 }
+
1064 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
1065
+
1066 /* w25qxx_block_erase_32k test */
+
1067 addr = (rand() % 10) * 32 * 1024;
+
1068 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_32k test with address 0x%X.\n", addr);
+
1069 res = w25qxx_block_erase_32k(&gs_handle, addr);
+
1070 if (res != 0)
+
1071 {
+
1072 w25qxx_interface_debug_print("w25qxx: sector erase 32k failed.\n");
+
1073 (void)w25qxx_deinit(&gs_handle);
+
1074
+
1075 return 1;
+
1076 }
+
1077 for (j = 0; j < 256; j++)
+
1078 {
+
1079 gs_buffer_input[j] = rand() %256;
+
1080 }
+
1081
+
1082 /* w25qxx_page_program */
+
1083 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
1084 if (res != 0)
+
1085 {
+
1086 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
1087 (void)w25qxx_deinit(&gs_handle);
+
1088
+
1089 return 1;
+
1090 }
+
1091
+
1092 /* w25qxx_fast_read */
+
1093 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
1094 if (res != 0)
+
1095 {
+
1096 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
1097 (void)w25qxx_deinit(&gs_handle);
+
1098
+
1099 return 1;
+
1100 }
+
1101 for (j = 0; j < 256; j++)
+
1102 {
+
1103 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1104 {
+
1105 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1106 (void)w25qxx_deinit(&gs_handle);
+
1107
+
1108 return 1;
+
1109 }
+
1110 }
+
1111 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
1112
+
1113 /* w25qxx_block_erase_64k test */
+
1114 addr = (rand() % 10) * 64 * 1024;
+
1115 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_64k test with address 0x%X.\n", addr);
+
1116 res = w25qxx_block_erase_64k(&gs_handle, addr);
+
1117 if (res != 0)
+
1118 {
+
1119 w25qxx_interface_debug_print("w25qxx: sector erase 64k failed.\n");
+
1120 (void)w25qxx_deinit(&gs_handle);
+
1121
+
1122 return 1;
+
1123 }
+
1124 for (j = 0; j < 256; j++)
+
1125 {
+
1126 gs_buffer_input[j] = rand() %256;
+
1127 }
+
1128
+
1129 /* w25qxx_page_program */
+
1130 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
1131 if (res != 0)
+
1132 {
+
1133 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
1134 (void)w25qxx_deinit(&gs_handle);
+
1135
+
1136 return 1;
+
1137 }
+
1138
+
1139 /* w25qxx_fast_read */
+
1140 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
1141 if (res != 0)
+
1142 {
+
1143 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
1144 (void)w25qxx_deinit(&gs_handle);
+
1145
+
1146 return 1;
+
1147 }
+
1148 for (j = 0; j < 256; j++)
+
1149 {
+
1150 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1151 {
+
1152 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1153 (void)w25qxx_deinit(&gs_handle);
+
1154
+
1155 return 1;
+
1156 }
+
1157 }
+
1158 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
1159
+
1160 #if (W25QXX_ENABLE_ERASE_READ_TEST == 1)
+
1161 /* start chip erasing */
+
1162 w25qxx_interface_debug_print("w25qxx: start chip erasing.\n");
+
1163
+
1164 /* chip erase */
+
1165 w25qxx_interface_debug_print("w25qxx: w25qxx_chip_erase test.\n");
+
1166 res = w25qxx_chip_erase(&gs_handle);
+
1167 if (res != 0)
+
1168 {
+
1169 w25qxx_interface_debug_print("w25qxx: chip erase failed.\n");
+
1170 (void)w25qxx_deinit(&gs_handle);
+
1171
+
1172 return 1;
+
1173 }
+
1174 w25qxx_interface_debug_print("w25qxx: chip erase successful.\n");
+
1175 #endif
+
1176
+
1177 if (type >= W25Q256)
+
1178 {
+
1179 /* set address mode 4 byte */
+
1180 w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
+
1181
+
1182 /* set address mode 4 byte */
+
1183 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
+
1184 if (res != 0)
+
1185 {
+
1186 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
1187 (void)w25qxx_deinit(&gs_handle);
+
1188
+
1189 return 1;
+
1190 }
+
1191
+
1192 /* w25qxx_write/w25qxx_read test */
+
1193 w25qxx_interface_debug_print("w25qxx: w25qxx_write/w25qxx_read test.\n");
+
1194
+
1195 for (addr = 0; addr < size; addr += step)
+
1196 {
+
1197 for (j = 0; j < 600; j++)
+
1198 {
+
1199 gs_buffer_input[j] = rand() %256;
+
1200 }
+
1201 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
+
1202 if (res != 0)
+
1203 {
+
1204 w25qxx_interface_debug_print("w25qxx: write failed.\n");
+
1205 (void)w25qxx_deinit(&gs_handle);
+
1206
+
1207 return 1;
+
1208 }
+
1209 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
+
1210 if (res != 0)
+
1211 {
+
1212 w25qxx_interface_debug_print("w25qxx: read failed.\n");
+
1213 (void)w25qxx_deinit(&gs_handle);
+
1214
+
1215 return 1;
+
1216 }
+
1217 for (j = 0; j < 600; j++)
+
1218 {
+
1219 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1220 {
+
1221 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1222 (void)w25qxx_deinit(&gs_handle);
+
1223
+
1224 return 1;
+
1225 }
+
1226 }
+
1227 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
+
1228 }
+
1229
+
1230 /* w25qxx_sector_erase_4k test */
+
1231 addr = (rand() % 10) * 4 * 1024;
+
1232 w25qxx_interface_debug_print("w25qxx: w25qxx_sector_erase_4k test with address 0x%X.\n", addr);
+
1233 res = w25qxx_sector_erase_4k(&gs_handle, addr);
+
1234 if (res != 0)
+
1235 {
+
1236 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
+
1237 (void)w25qxx_deinit(&gs_handle);
+
1238
+
1239 return 1;
+
1240 }
+
1241 for (j = 0; j < 256; j++)
+
1242 {
+
1243 gs_buffer_input[j] = rand() %256;
+
1244 }
+
1245
+
1246 /* w25qxx_page_program */
+
1247 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
1248 if (res != 0)
+
1249 {
+
1250 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
1251 (void)w25qxx_deinit(&gs_handle);
+
1252
+
1253 return 1;
+
1254 }
+
1255
+
1256 /* w25qxx_fast_read */
+
1257 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
1258 if (res != 0)
+
1259 {
+
1260 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
1261 (void)w25qxx_deinit(&gs_handle);
+
1262
+
1263 return 1;
+
1264 }
+
1265 for (j = 0; j < 256; j++)
+
1266 {
+
1267 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1268 {
+
1269 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1270 (void)w25qxx_deinit(&gs_handle);
+
1271
+
1272 return 1;
+
1273 }
+
1274 }
+
1275 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
1276
+
1277 /* w25qxx_block_erase_32k test */
+
1278 addr = (rand() % 10) * 32 * 1024;
+
1279 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_32k test with address 0x%X.\n", addr);
+
1280 res = w25qxx_block_erase_32k(&gs_handle, addr);
+
1281 if (res != 0)
+
1282 {
+
1283 w25qxx_interface_debug_print("w25qxx: sector erase 32k failed.\n");
+
1284 (void)w25qxx_deinit(&gs_handle);
+
1285
+
1286 return 1;
+
1287 }
+
1288 for (j = 0; j < 256; j++)
+
1289 {
+
1290 gs_buffer_input[j] = rand() %256;
+
1291 }
+
1292
+
1293 /* w25qxx_page_program */
+
1294 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
1295 if (res != 0)
+
1296 {
+
1297 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
1298 (void)w25qxx_deinit(&gs_handle);
+
1299
+
1300 return 1;
+
1301 }
+
1302
+
1303 /* w25qxx_fast_read */
+
1304 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
1305 if (res != 0)
+
1306 {
+
1307 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
1308 (void)w25qxx_deinit(&gs_handle);
+
1309
+
1310 return 1;
+
1311 }
+
1312 for (j = 0; j < 256; j++)
+
1313 {
+
1314 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1315 {
+
1316 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1317 (void)w25qxx_deinit(&gs_handle);
+
1318
+
1319 return 1;
+
1320 }
+
1321 }
+
1322 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
1323
+
1324 /* w25qxx_block_erase_64k test */
+
1325 addr = (rand() % 10) * 64 * 1024;
+
1326 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_64k test with address 0x%X.\n", addr);
+
1327 res = w25qxx_block_erase_64k(&gs_handle, addr);
+
1328 if (res != 0)
+
1329 {
+
1330 w25qxx_interface_debug_print("w25qxx: sector erase 64k failed.\n");
+
1331 (void)w25qxx_deinit(&gs_handle);
+
1332
+
1333 return 1;
+
1334 }
+
1335 for (j = 0; j < 256; j++)
+
1336 {
+
1337 gs_buffer_input[j] = rand() %256;
+
1338 }
+
1339
+
1340 /* w25qxx_page_program */
+
1341 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
1342 if (res != 0)
+
1343 {
+
1344 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
1345 (void)w25qxx_deinit(&gs_handle);
+
1346
+
1347 return 1;
+
1348 }
+
1349
+
1350 /* w25qxx_fast_read */
+
1351 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
1352 if (res != 0)
+
1353 {
+
1354 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
1355 (void)w25qxx_deinit(&gs_handle);
+
1356
+
1357 return 1;
+
1358 }
+
1359 for (j = 0; j < 256; j++)
+
1360 {
+
1361 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1362 {
+
1363 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1364 (void)w25qxx_deinit(&gs_handle);
+
1365
+
1366 return 1;
+
1367 }
+
1368 }
+
1369 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
1370
+
1371 /* set address mode 3 byte */
+
1372 w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
+
1373
+
1374 /* set address mode 3 byte */
+
1375 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
+
1376 if (res != 0)
+
1377 {
+
1378 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
1379 (void)w25qxx_deinit(&gs_handle);
+
1380
+
1381 return 1;
+
1382 }
+
1383 }
+
1384
+
1385 if (dual_quad_spi_enable != 0)
+
1386 {
+
1387 /* enter to spi mode */
+
1388 w25qxx_interface_debug_print("w25qxx: enter to spi mode.\n");
+
1389
+
1390 /* exit qspi */
+
1391 res = w25qxx_exit_qspi_mode(&gs_handle);
+
1392 if (res != 0)
+
1393 {
+
1394 w25qxx_interface_debug_print("w25qxx: exit qspi mode failed.\n");
+
1395 (void)w25qxx_deinit(&gs_handle);
+
1396
+
1397 return 1;
+
1398 }
+
1399
+
1400 /* set chip interface spi */
+
1401 res = w25qxx_set_interface(&gs_handle, W25QXX_INTERFACE_SPI);
+
1402 if (res != 0)
+
1403 {
+
1404 w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
+
1405
+
1406 return 1;
+
1407 }
+
1408
+
1409 /* random data */
+
1410 for (j = 0; j < 256; j++)
+
1411 {
+
1412 gs_buffer_input[j] = rand() %256;
+
1413 }
+
1414
+
1415 /* w25qxx_sector_erase_4k */
+
1416 res = w25qxx_sector_erase_4k(&gs_handle, 0x00000000);
+
1417 if (res != 0)
+
1418 {
+
1419 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
+
1420 (void)w25qxx_deinit(&gs_handle);
+
1421
+
1422 return 1;
+
1423 }
+
1424
+
1425 /* w25qxx_page_program */
+
1426 res = w25qxx_page_program(&gs_handle, 0x00000000, gs_buffer_input, 256);
+
1427 if (res != 0)
+
1428 {
+
1429 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
1430 (void)w25qxx_deinit(&gs_handle);
+
1431
+
1432 return 1;
+
1433 }
+
1434
+
1435 /* fast read dual output */
+
1436 res = w25qxx_fast_read_dual_output(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1437 if (res != 0)
+
1438 {
+
1439 w25qxx_interface_debug_print("w25qxx: fast read dual output failed.\n");
+
1440 (void)w25qxx_deinit(&gs_handle);
+
1441
+
1442 return 1;
+
1443 }
+
1444 for (j = 0; j < 256; j++)
+
1445 {
+
1446 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1447 {
+
1448 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1449 (void)w25qxx_deinit(&gs_handle);
+
1450
+
1451 return 1;
+
1452 }
+
1453 }
+
1454 w25qxx_interface_debug_print("w25qxx: fast_read_dual_output check passed.\n");
+
1455
+
1456 /* fast read quad output */
+
1457 res = w25qxx_fast_read_quad_output(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1458 if (res != 0)
+
1459 {
+
1460 w25qxx_interface_debug_print("w25qxx: fast read quad output failed.\n");
+
1461 (void)w25qxx_deinit(&gs_handle);
+
1462
+
1463 return 1;
+
1464 }
+
1465 for (j = 0; j < 256; j++)
+
1466 {
+
1467 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1468 {
+
1469 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1470 (void)w25qxx_deinit(&gs_handle);
+
1471
+
1472 return 1;
+
1473 }
+
1474 }
+
1475 w25qxx_interface_debug_print("w25qxx: fast_read_quad_output check passed.\n");
+
1476
+
1477 /* fast read dual io */
+
1478 res = w25qxx_fast_read_dual_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1479 if (res != 0)
+
1480 {
+
1481 w25qxx_interface_debug_print("w25qxx: fast read dual io failed.\n");
+
1482 (void)w25qxx_deinit(&gs_handle);
+
1483
+
1484 return 1;
+
1485 }
+
1486 for (j = 0; j < 256; j++)
+
1487 {
+
1488 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1489 {
+
1490 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1491 (void)w25qxx_deinit(&gs_handle);
+
1492
+
1493 return 1;
+
1494 }
+
1495 }
+
1496 w25qxx_interface_debug_print("w25qxx: w25qxx_fast_read_dual_io check passed.\n");
+
1497
+
1498 /* fast read quad io */
+
1499 res = w25qxx_fast_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1500 if (res != 0)
+
1501 {
+
1502 w25qxx_interface_debug_print("w25qxx: fast read quad io failed.\n");
+
1503 (void)w25qxx_deinit(&gs_handle);
+
1504
+
1505 return 1;
+
1506 }
+
1507 for (j = 0; j < 256; j++)
+
1508 {
+
1509 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1510 {
+
1511 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1512 (void)w25qxx_deinit(&gs_handle);
+
1513
+
1514 return 1;
+
1515 }
+
1516 }
+
1517 w25qxx_interface_debug_print("w25qxx: w25qxx_fast_read_quad_io check passed.\n");
+
1518
+
1519 /* word read quad io */
+
1520 res = w25qxx_word_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1521 if (res != 0)
+
1522 {
+
1523 w25qxx_interface_debug_print("w25qxx: word read quad io failed.\n");
+
1524 (void)w25qxx_deinit(&gs_handle);
+
1525
+
1526 return 1;
+
1527 }
+
1528 for (j = 0; j < 256; j++)
+
1529 {
+
1530 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1531 {
+
1532 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1533 (void)w25qxx_deinit(&gs_handle);
+
1534
+
1535 return 1;
+
1536 }
+
1537 }
+
1538 w25qxx_interface_debug_print("w25qxx: w25qxx_word_read_quad_io check passed.\n");
+
1539
+
1540 /* octal read quad io */
+
1541 res = w25qxx_octal_word_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1542 if (res != 0)
+
1543 {
+
1544 w25qxx_interface_debug_print("w25qxx: octal read quad io failed.\n");
+
1545 (void)w25qxx_deinit(&gs_handle);
+
1546
+
1547 return 1;
+
1548 }
+
1549 for (j = 0; j < 256; j++)
+
1550 {
+
1551 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1552 {
+
1553 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1554 (void)w25qxx_deinit(&gs_handle);
+
1555
+
1556 return 1;
+
1557 }
+
1558 }
+
1559 w25qxx_interface_debug_print("w25qxx: w25qxx_octal_word_read_quad_io check passed.\n");
+
1560
+
1561 /* random data */
+
1562 for (j = 0; j < 256; j++)
+
1563 {
+
1564 gs_buffer_input[j] = rand() %256;
+
1565 }
+
1566
+
1567 /* w25qxx_sector_erase_4k */
+
1568 res = w25qxx_sector_erase_4k(&gs_handle, 0x00000000);
+
1569 if (res != 0)
+
1570 {
+
1571 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
+
1572 (void)w25qxx_deinit(&gs_handle);
+
1573
+
1574 return 1;
+
1575 }
+
1576
+
1577 /* w25qxx_page_program_quad_input */
+
1578 res = w25qxx_page_program_quad_input(&gs_handle, 0x00000000, gs_buffer_input, 256);
+
1579 if (res != 0)
+
1580 {
+
1581 w25qxx_interface_debug_print("w25qxx: page program quad input failed.\n");
+
1582 (void)w25qxx_deinit(&gs_handle);
+
1583
+
1584 return 1;
+
1585 }
+
1586
+
1587 /* fast read */
+
1588 res = w25qxx_fast_read(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1589 if (res != 0)
+
1590 {
+
1591 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
1592 (void)w25qxx_deinit(&gs_handle);
+
1593
+
1594 return 1;
+
1595 }
+
1596 for (j = 0; j < 256; j++)
+
1597 {
+
1598 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1599 {
+
1600 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1601 (void)w25qxx_deinit(&gs_handle);
+
1602
+
1603 return 1;
+
1604 }
+
1605 }
+
1606 w25qxx_interface_debug_print("w25qxx: w25qxx_page_program_quad_input check passed.\n");
+
1607
+
1608 if (type >= W25Q256)
+
1609 {
+
1610 /* set address mode 4 byte */
+
1611 w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
+
1612
+
1613 /* set address mode 4 byte */
+
1614 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
+
1615 if (res != 0)
+
1616 {
+
1617 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
1618 (void)w25qxx_deinit(&gs_handle);
+
1619
+
1620 return 1;
+
1621 }
+
1622
+
1623 /* random data */
+
1624 for (j = 0; j < 256; j++)
+
1625 {
+
1626 gs_buffer_input[j] = rand() %256;
+
1627 }
+
1628
+
1629 /* w25qxx_sector_erase_4k */
+
1630 res = w25qxx_sector_erase_4k(&gs_handle, 0x00000000);
+
1631 if (res != 0)
+
1632 {
+
1633 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
+
1634 (void)w25qxx_deinit(&gs_handle);
+
1635
+
1636 return 1;
+
1637 }
+
1638
+
1639 /* w25qxx_page_program */
+
1640 res = w25qxx_page_program(&gs_handle, 0x00000000, gs_buffer_input, 256);
+
1641 if (res != 0)
+
1642 {
+
1643 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
1644 (void)w25qxx_deinit(&gs_handle);
+
1645
+
1646 return 1;
+
1647 }
+
1648
+
1649 /* fast read dual output */
+
1650 res = w25qxx_fast_read_dual_output(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1651 if (res != 0)
+
1652 {
+
1653 w25qxx_interface_debug_print("w25qxx: fast read dual output failed.\n");
+
1654 (void)w25qxx_deinit(&gs_handle);
+
1655
+
1656 return 1;
+
1657 }
+
1658 for (j = 0; j < 256; j++)
+
1659 {
+
1660 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1661 {
+
1662 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1663 (void)w25qxx_deinit(&gs_handle);
+
1664
+
1665 return 1;
+
1666 }
+
1667 }
+
1668 w25qxx_interface_debug_print("w25qxx: fast_read_dual_output check passed.\n");
+
1669
+
1670 /* fast read quad output */
+
1671 res = w25qxx_fast_read_quad_output(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1672 if (res != 0)
+
1673 {
+
1674 w25qxx_interface_debug_print("w25qxx: fast read quad output failed.\n");
+
1675 (void)w25qxx_deinit(&gs_handle);
+
1676
+
1677 return 1;
+
1678 }
+
1679 for (j = 0; j < 256; j++)
+
1680 {
+
1681 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1682 {
+
1683 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1684 (void)w25qxx_deinit(&gs_handle);
+
1685
+
1686 return 1;
+
1687 }
+
1688 }
+
1689 w25qxx_interface_debug_print("w25qxx: fast_read_quad_output check passed.\n");
+
1690
+
1691 /* fast read dual io */
+
1692 res = w25qxx_fast_read_dual_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1693 if (res != 0)
+
1694 {
+
1695 w25qxx_interface_debug_print("w25qxx: fast read dual io failed.\n");
+
1696 (void)w25qxx_deinit(&gs_handle);
+
1697
+
1698 return 1;
+
1699 }
+
1700 for (j = 0; j < 256; j++)
+
1701 {
+
1702 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1703 {
+
1704 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1705 (void)w25qxx_deinit(&gs_handle);
+
1706
+
1707 return 1;
+
1708 }
+
1709 }
+
1710 w25qxx_interface_debug_print("w25qxx: w25qxx_fast_read_dual_io check passed.\n");
+
1711
+
1712 /* fast read quad io */
+
1713 res = w25qxx_fast_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1714 if (res != 0)
+
1715 {
+
1716 w25qxx_interface_debug_print("w25qxx: fast read quad io failed.\n");
+
1717 (void)w25qxx_deinit(&gs_handle);
+
1718
+
1719 return 1;
+
1720 }
+
1721 for (j = 0; j < 256; j++)
+
1722 {
+
1723 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1724 {
+
1725 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1726 (void)w25qxx_deinit(&gs_handle);
+
1727
+
1728 return 1;
+
1729 }
+
1730 }
+
1731 w25qxx_interface_debug_print("w25qxx: w25qxx_fast_read_quad_io check passed.\n");
+
1732
+
1733 /* word read quad io */
+
1734 res = w25qxx_word_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1735 if (res != 0)
+
1736 {
+
1737 w25qxx_interface_debug_print("w25qxx: word read quad io failed.\n");
+
1738 (void)w25qxx_deinit(&gs_handle);
+
1739
+
1740 return 1;
+
1741 }
+
1742 for (j = 0; j < 256; j++)
+
1743 {
+
1744 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1745 {
+
1746 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1747 (void)w25qxx_deinit(&gs_handle);
+
1748
+
1749 return 1;
+
1750 }
+
1751 }
+
1752 w25qxx_interface_debug_print("w25qxx: w25qxx_word_read_quad_io check passed.\n");
+
1753
+
1754 /* octal read quad io */
+
1755 res = w25qxx_octal_word_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1756 if (res != 0)
+
1757 {
+
1758 w25qxx_interface_debug_print("w25qxx: octal read quad io failed.\n");
+
1759 (void)w25qxx_deinit(&gs_handle);
+
1760
+
1761 return 1;
+
1762 }
+
1763 for (j = 0; j < 256; j++)
+
1764 {
+
1765 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1766 {
+
1767 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1768 (void)w25qxx_deinit(&gs_handle);
+
1769
+
1770 return 1;
+
1771 }
+
1772 }
+
1773 w25qxx_interface_debug_print("w25qxx: w25qxx_octal_word_read_quad_io check passed.\n");
+
1774
+
1775 /* random data */
+
1776 for (j = 0; j < 256; j++)
+
1777 {
+
1778 gs_buffer_input[j] = rand() %256;
+
1779 }
+
1780
+
1781 /* w25qxx_sector_erase_4k */
+
1782 res = w25qxx_sector_erase_4k(&gs_handle, 0x00000000);
+
1783 if (res != 0)
+
1784 {
+
1785 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
+
1786 (void)w25qxx_deinit(&gs_handle);
+
1787
+
1788 return 1;
+
1789 }
+
1790
+
1791 /* w25qxx_page_program_quad_input */
+
1792 res = w25qxx_page_program_quad_input(&gs_handle, 0x00000000, gs_buffer_input, 256);
+
1793 if (res != 0)
+
1794 {
+
1795 w25qxx_interface_debug_print("w25qxx: page program quad input failed.\n");
+
1796 (void)w25qxx_deinit(&gs_handle);
+
1797
+
1798 return 1;
+
1799 }
+
1800
+
1801 /* fast read */
+
1802 res = w25qxx_fast_read(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1803 if (res != 0)
+
1804 {
+
1805 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
1806 (void)w25qxx_deinit(&gs_handle);
+
1807
+
1808 return 1;
+
1809 }
+
1810 for (j = 0; j < 256; j++)
+
1811 {
+
1812 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1813 {
+
1814 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1815 (void)w25qxx_deinit(&gs_handle);
+
1816
+
1817 return 1;
+
1818 }
+
1819 }
+
1820 w25qxx_interface_debug_print("w25qxx: w25qxx_page_program_quad_input check passed.\n");
+
1821
+
1822 /* set address mode 3 byte */
+
1823 w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
+
1824
+
1825 /* set address mode 3 byte */
+
1826 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
+
1827 if (res != 0)
+
1828 {
+
1829 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
1830 (void)w25qxx_deinit(&gs_handle);
+
1831
+
1832 return 1;
+
1833 }
+
1834 }
+
1835
+
1836 /* enter to qspi mode */
+
1837 w25qxx_interface_debug_print("w25qxx: enter to qspi mode.\n");
+
1838
+
1839 /* enter qspi */
+
1840 res = w25qxx_enter_qspi_mode(&gs_handle);
+
1841 if (res != 0)
+
1842 {
+
1843 w25qxx_interface_debug_print("w25qxx: enter qspi mode failed.\n");
+
1844 (void)w25qxx_deinit(&gs_handle);
+
1845
+
1846 return 1;
+
1847 }
+
1848
+
1849 /* set chip interface spi */
+
1850 res = w25qxx_set_interface(&gs_handle, W25QXX_INTERFACE_QSPI);
+
1851 if (res != 0)
+
1852 {
+
1853 w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
+
1854
+
1855 return 1;
+
1856 }
+
1857 }
+
1858
+
1859 /* w25qxx_set_read_parameters test */
+
1860 w25qxx_interface_debug_print("w25qxx: w25qxx_set_read_parameters test.\n");
+
1861
+
1862 /* 8 dummy max 80MHz test */
+
1863 w25qxx_interface_debug_print("w25qxx: set 8 dummy max 80MHz test.\n");
+
1864
+
1865 res = w25qxx_set_read_parameters(&gs_handle, W25QXX_QSPI_READ_DUMMY_8_80MHZ, W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE);
+
1866 if (res != 0)
+
1867 {
+
1868 w25qxx_interface_debug_print("w25qxx: set read parameters.\n");
+
1869
+
1870 return 1;
+
1871 }
+
1872
+
1873 for (addr = 0; addr < size; addr += step)
+
1874 {
+
1875 for (j = 0; j < 600; j++)
+
1876 {
+
1877 gs_buffer_input[j] = rand() %256;
+
1878 }
+
1879 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
+
1880 if (res != 0)
+
1881 {
+
1882 w25qxx_interface_debug_print("w25qxx: write failed.\n");
+
1883 (void)w25qxx_deinit(&gs_handle);
+
1884
+
1885 return 1;
+
1886 }
+
1887 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
+
1888 if (res != 0)
+
1889 {
+
1890 w25qxx_interface_debug_print("w25qxx: read failed.\n");
+
1891 (void)w25qxx_deinit(&gs_handle);
+
1892
+
1893 return 1;
+
1894 }
+
1895 for (j = 0; j < 600; j++)
+
1896 {
+
1897 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1898 {
+
1899 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1900 (void)w25qxx_deinit(&gs_handle);
+
1901
+
1902 return 1;
+
1903 }
+
1904 }
+
1905 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
+
1906 }
+
1907
+
1908 /* 6 dummy max 80MHz test */
+
1909 w25qxx_interface_debug_print("w25qxx: set 6 dummy max 80MHz test.\n");
+
1910
+
1911 res = w25qxx_set_read_parameters(&gs_handle, W25QXX_QSPI_READ_DUMMY_6_80MHZ, W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE);
+
1912 if (res != 0)
+
1913 {
+
1914 w25qxx_interface_debug_print("w25qxx: set read parameters.\n");
+
1915
+
1916 return 1;
+
1917 }
+
1918
+
1919 for (addr = 0; addr < size; addr += step)
+
1920 {
+
1921 for (j = 0; j < 600; j++)
+
1922 {
+
1923 gs_buffer_input[j] = rand() %256;
+
1924 }
+
1925 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
+
1926 if (res != 0)
+
1927 {
+
1928 w25qxx_interface_debug_print("w25qxx: write failed.\n");
+
1929 (void)w25qxx_deinit(&gs_handle);
+
1930
+
1931 return 1;
+
1932 }
+
1933 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
+
1934 if (res != 0)
+
1935 {
+
1936 w25qxx_interface_debug_print("w25qxx: read failed.\n");
+
1937 (void)w25qxx_deinit(&gs_handle);
+
1938
+
1939 return 1;
+
1940 }
+
1941 for (j = 0; j < 600; j++)
+
1942 {
+
1943 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1944 {
+
1945 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1946 (void)w25qxx_deinit(&gs_handle);
+
1947
+
1948 return 1;
+
1949 }
+
1950 }
+
1951 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
+
1952 }
+
1953
+
1954 /* 4 dummy max 55MHz test */
+
1955 w25qxx_interface_debug_print("w25qxx: set 4 dummy max 55MHz test.\n");
+
1956
+
1957 res = w25qxx_set_read_parameters(&gs_handle, W25QXX_QSPI_READ_DUMMY_4_55MHZ, W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE);
+
1958 if (res != 0)
+
1959 {
+
1960 w25qxx_interface_debug_print("w25qxx: set read parameters.\n");
+
1961
+
1962 return 1;
+
1963 }
+
1964
+
1965 for (addr = 0; addr < size; addr += step)
+
1966 {
+
1967 for (j = 0; j < 600; j++)
+
1968 {
+
1969 gs_buffer_input[j] = rand() %256;
+
1970 }
+
1971 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
+
1972 if (res != 0)
+
1973 {
+
1974 w25qxx_interface_debug_print("w25qxx: write failed.\n");
+
1975 (void)w25qxx_deinit(&gs_handle);
+
1976
+
1977 return 1;
+
1978 }
+
1979 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
+
1980 if (res != 0)
+
1981 {
+
1982 w25qxx_interface_debug_print("w25qxx: read failed.\n");
+
1983 (void)w25qxx_deinit(&gs_handle);
+
1984
+
1985 return 1;
+
1986 }
+
1987 for (j = 0; j < 600; j++)
+
1988 {
+
1989 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1990 {
+
1991 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1992 (void)w25qxx_deinit(&gs_handle);
+
1993
+
1994 return 1;
+
1995 }
+
1996 }
+
1997 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
+
1998 }
+
1999
+
2000 /* 2 dummy max 33MHz test */
+
2001 w25qxx_interface_debug_print("w25qxx: set 2 dummy max 33MHz test.\n");
+
2002
+
2003 res = w25qxx_set_read_parameters(&gs_handle, W25QXX_QSPI_READ_DUMMY_2_33MHZ, W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE);
+
2004 if (res != 0)
+
2005 {
+
2006 w25qxx_interface_debug_print("w25qxx: set read parameters.\n");
+
2007
+
2008 return 1;
+
2009 }
+
2010
+
2011 for (addr = 0; addr < size; addr += step)
+
2012 {
+
2013 for (j = 0; j < 600; j++)
+
2014 {
+
2015 gs_buffer_input[j] = rand() %256;
+
2016 }
+
2017 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
+
2018 if (res != 0)
+
2019 {
+
2020 w25qxx_interface_debug_print("w25qxx: write failed.\n");
+
2021 (void)w25qxx_deinit(&gs_handle);
+
2022
+
2023 return 1;
+
2024 }
+
2025 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
+
2026 if (res != 0)
+
2027 {
+
2028 w25qxx_interface_debug_print("w25qxx: read failed.\n");
+
2029 (void)w25qxx_deinit(&gs_handle);
+
2030
+
2031 return 1;
+
2032 }
+
2033 for (j = 0; j < 600; j++)
+
2034 {
+
2035 if (gs_buffer_input[j] != gs_buffer_output[j])
+
2036 {
+
2037 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
2038 (void)w25qxx_deinit(&gs_handle);
+
2039
+
2040 return 1;
+
2041 }
+
2042 }
+
2043 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
+
2044 }
+
2045 }
+
2046
+
2047 /* finish read test */
+
2048 w25qxx_interface_debug_print("w25qxx: finish read test.\n");
+
2049 (void)w25qxx_deinit(&gs_handle);
+
2050
+
2051 return 0;
+
2052}
+
driver_w25qxx_read_test.h
driver w25qxx read test header file
-
w25qxx_page_program_quad_input
uint8_t w25qxx_page_program_quad_input(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
quad page program with quad input
Definition: driver_w25qxx.c:4920
-
w25qxx_get_sfdp
uint8_t w25qxx_get_sfdp(w25qxx_handle_t *handle, uint8_t sfdp[256])
get the sfdp
Definition: driver_w25qxx.c:2880
-
w25qxx_read_security_register
uint8_t w25qxx_read_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
read the security register
Definition: driver_w25qxx.c:3344
-
w25qxx_program_security_register
uint8_t w25qxx_program_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
program the security register
Definition: driver_w25qxx.c:3147
-
w25qxx_exit_qspi_mode
uint8_t w25qxx_exit_qspi_mode(w25qxx_handle_t *handle)
exit the qspi mode
Definition: driver_w25qxx.c:2572
-
w25qxx_fast_read_dual_output
uint8_t w25qxx_fast_read_dual_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual output in the fast mode
Definition: driver_w25qxx.c:3858
-
w25qxx_octal_word_read_quad_io
uint8_t w25qxx_octal_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
octal word read with quad io
Definition: driver_w25qxx.c:4459
-
w25qxx_set_read_parameters
uint8_t w25qxx_set_read_parameters(w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
set the read parameters
Definition: driver_w25qxx.c:2427
-
w25qxx_enter_qspi_mode
uint8_t w25qxx_enter_qspi_mode(w25qxx_handle_t *handle)
enter the qspi mode
Definition: driver_w25qxx.c:2494
-
w25qxx_fast_read_quad_io
uint8_t w25qxx_fast_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad io in the fast mode
Definition: driver_w25qxx.c:4184
-
w25qxx_fast_read_dual_io
uint8_t w25qxx_fast_read_dual_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual io in the fast mode
Definition: driver_w25qxx.c:4076
-
w25qxx_word_read_quad_io
uint8_t w25qxx_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
word read with quad io
Definition: driver_w25qxx.c:4350
-
w25qxx_erase_security_register
uint8_t w25qxx_erase_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num)
erase the security register
Definition: driver_w25qxx.c:2952
-
w25qxx_fast_read_quad_output
uint8_t w25qxx_fast_read_quad_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad output in the fast mode
Definition: driver_w25qxx.c:3967
-
W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE
@ W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE
Definition: driver_w25qxx.h:124
-
W25QXX_QSPI_READ_DUMMY_4_55MHZ
@ W25QXX_QSPI_READ_DUMMY_4_55MHZ
Definition: driver_w25qxx.h:114
-
W25QXX_QSPI_READ_DUMMY_6_80MHZ
@ W25QXX_QSPI_READ_DUMMY_6_80MHZ
Definition: driver_w25qxx.h:115
-
W25QXX_QSPI_READ_DUMMY_2_33MHZ
@ W25QXX_QSPI_READ_DUMMY_2_33MHZ
Definition: driver_w25qxx.h:113
-
W25QXX_QSPI_READ_DUMMY_8_80MHZ
@ W25QXX_QSPI_READ_DUMMY_8_80MHZ
Definition: driver_w25qxx.h:116
-
W25QXX_SECURITY_REGISTER_2
@ W25QXX_SECURITY_REGISTER_2
Definition: driver_w25qxx.h:137
-
W25QXX_SECURITY_REGISTER_3
@ W25QXX_SECURITY_REGISTER_3
Definition: driver_w25qxx.h:138
-
W25QXX_SECURITY_REGISTER_1
@ W25QXX_SECURITY_REGISTER_1
Definition: driver_w25qxx.h:136
-
w25qxx_chip_erase
uint8_t w25qxx_chip_erase(w25qxx_handle_t *handle)
erase the chip
Definition: driver_w25qxx.c:1459
-
w25qxx_only_spi_read
uint8_t w25qxx_only_spi_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read only in the spi interface
Definition: driver_w25qxx.c:3465
-
w25qxx_block_erase_32k
uint8_t w25qxx_block_erase_32k(w25qxx_handle_t *handle, uint32_t addr)
erase the 32k block
Definition: driver_w25qxx.c:5419
-
w25qxx_set_interface
uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface)
set the chip interface
Definition: driver_w25qxx.c:259
-
w25qxx_page_program
uint8_t w25qxx_page_program(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
page program
Definition: driver_w25qxx.c:4569
-
w25qxx_set_dual_quad_spi
uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable)
enable or disable the dual quad spi
Definition: driver_w25qxx.c:175
-
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition: driver_w25qxx.h:63
-
w25qxx_init
uint8_t w25qxx_init(w25qxx_handle_t *handle)
initialize the chip
Definition: driver_w25qxx.c:6819
-
w25qxx_info
uint8_t w25qxx_info(w25qxx_info_t *info)
get chip's information
Definition: driver_w25qxx.c:8566
-
w25qxx_sector_erase_4k
uint8_t w25qxx_sector_erase_4k(w25qxx_handle_t *handle, uint32_t addr)
erase the 4k sector
Definition: driver_w25qxx.c:5080
-
w25qxx_deinit
uint8_t w25qxx_deinit(w25qxx_handle_t *handle)
close the chip
Definition: driver_w25qxx.c:7195
-
w25qxx_set_type
uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type)
set the chip type
Definition: driver_w25qxx.c:217
-
w25qxx_write
uint8_t w25qxx_write(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
write data
Definition: driver_w25qxx.c:8415
-
w25qxx_fast_read
uint8_t w25qxx_fast_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read in the fast mode
Definition: driver_w25qxx.c:3634
-
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition: driver_w25qxx.h:76
-
w25qxx_set_address_mode
uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
set the chip address mode
Definition: driver_w25qxx.c:304
-
w25qxx_read
uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read data
Definition: driver_w25qxx.c:7289
-
w25qxx_block_erase_64k
uint8_t w25qxx_block_erase_64k(w25qxx_handle_t *handle, uint32_t addr)
erase the 64k block
Definition: driver_w25qxx.c:5758
-
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition: driver_w25qxx.h:85
-
W25Q80
@ W25Q80
Definition: driver_w25qxx.h:64
-
W25Q256
@ W25Q256
Definition: driver_w25qxx.h:69
-
W25QXX_ADDRESS_MODE_3_BYTE
@ W25QXX_ADDRESS_MODE_3_BYTE
Definition: driver_w25qxx.h:95
-
W25QXX_ADDRESS_MODE_4_BYTE
@ W25QXX_ADDRESS_MODE_4_BYTE
Definition: driver_w25qxx.h:96
-
W25QXX_INTERFACE_QSPI
@ W25QXX_INTERFACE_QSPI
Definition: driver_w25qxx.h:78
-
W25QXX_INTERFACE_SPI
@ W25QXX_INTERFACE_SPI
Definition: driver_w25qxx.h:77
-
w25qxx_interface_spi_qspi_deinit
uint8_t w25qxx_interface_spi_qspi_deinit(void)
interface spi qspi bus deinit
Definition: driver_w25qxx_interface_template.c:58
-
w25qxx_interface_spi_qspi_init
uint8_t w25qxx_interface_spi_qspi_init(void)
interface spi qspi bus init
Definition: driver_w25qxx_interface_template.c:46
-
w25qxx_interface_delay_us
void w25qxx_interface_delay_us(uint32_t us)
interface delay us
Definition: driver_w25qxx_interface_template.c:108
-
w25qxx_interface_spi_qspi_write_read
uint8_t w25qxx_interface_spi_qspi_write_read(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
interface spi qspi bus write read
Definition: driver_w25qxx_interface_template.c:84
-
w25qxx_interface_debug_print
void w25qxx_interface_debug_print(const char *const fmt,...)
interface print format data
Definition: driver_w25qxx_interface_template.c:118
-
w25qxx_interface_delay_ms
void w25qxx_interface_delay_ms(uint32_t ms)
interface delay ms
Definition: driver_w25qxx_interface_template.c:98
-
DRIVER_W25QXX_LINK_DELAY_MS
#define DRIVER_W25QXX_LINK_DELAY_MS(HANDLE, FUC)
link delay_ms function
Definition: driver_w25qxx.h:297
-
DRIVER_W25QXX_LINK_INIT
#define DRIVER_W25QXX_LINK_INIT(HANDLE, STRUCTURE)
initialize w25qxx_handle_t structure
Definition: driver_w25qxx.h:265
-
DRIVER_W25QXX_LINK_SPI_QSPI_INIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_INIT(HANDLE, FUC)
link spi_qspi_init function
Definition: driver_w25qxx.h:273
-
DRIVER_W25QXX_LINK_DEBUG_PRINT
#define DRIVER_W25QXX_LINK_DEBUG_PRINT(HANDLE, FUC)
link debug_print function
Definition: driver_w25qxx.h:313
-
DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ
#define DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(HANDLE, FUC)
link spi_qspi_write_read function
Definition: driver_w25qxx.h:289
-
DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(HANDLE, FUC)
link spi_qspi_deinit function
Definition: driver_w25qxx.h:281
-
DRIVER_W25QXX_LINK_DELAY_US
#define DRIVER_W25QXX_LINK_DELAY_US(HANDLE, FUC)
link delay_us function
Definition: driver_w25qxx.h:305
-
w25qxx_read_test
uint8_t w25qxx_read_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
read test
Definition: driver_w25qxx_read_test.c:55
-
w25qxx_handle_s
w25qxx handle structure definition
Definition: driver_w25qxx.h:210
-
w25qxx_info_s
w25qxx information structure definition
Definition: driver_w25qxx.h:236
-
w25qxx_info_s::temperature_max
float temperature_max
Definition: driver_w25qxx.h:244
-
w25qxx_info_s::supply_voltage_max_v
float supply_voltage_max_v
Definition: driver_w25qxx.h:241
-
w25qxx_info_s::driver_version
uint32_t driver_version
Definition: driver_w25qxx.h:245
-
w25qxx_info_s::interface
char interface[16]
Definition: driver_w25qxx.h:239
-
w25qxx_info_s::temperature_min
float temperature_min
Definition: driver_w25qxx.h:243
-
w25qxx_info_s::max_current_ma
float max_current_ma
Definition: driver_w25qxx.h:242
-
w25qxx_info_s::manufacturer_name
char manufacturer_name[32]
Definition: driver_w25qxx.h:238
-
w25qxx_info_s::supply_voltage_min_v
float supply_voltage_min_v
Definition: driver_w25qxx.h:240
-
w25qxx_info_s::chip_name
char chip_name[32]
Definition: driver_w25qxx.h:237
+
w25qxx_page_program_quad_input
uint8_t w25qxx_page_program_quad_input(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
quad page program with quad input
Definition driver_w25qxx.c:4920
+
w25qxx_get_sfdp
uint8_t w25qxx_get_sfdp(w25qxx_handle_t *handle, uint8_t sfdp[256])
get the sfdp
Definition driver_w25qxx.c:2880
+
w25qxx_read_security_register
uint8_t w25qxx_read_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
read the security register
Definition driver_w25qxx.c:3344
+
w25qxx_program_security_register
uint8_t w25qxx_program_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
program the security register
Definition driver_w25qxx.c:3147
+
w25qxx_exit_qspi_mode
uint8_t w25qxx_exit_qspi_mode(w25qxx_handle_t *handle)
exit the qspi mode
Definition driver_w25qxx.c:2572
+
w25qxx_fast_read_dual_output
uint8_t w25qxx_fast_read_dual_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual output in the fast mode
Definition driver_w25qxx.c:3858
+
w25qxx_octal_word_read_quad_io
uint8_t w25qxx_octal_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
octal word read with quad io
Definition driver_w25qxx.c:4459
+
w25qxx_set_read_parameters
uint8_t w25qxx_set_read_parameters(w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
set the read parameters
Definition driver_w25qxx.c:2427
+
w25qxx_enter_qspi_mode
uint8_t w25qxx_enter_qspi_mode(w25qxx_handle_t *handle)
enter the qspi mode
Definition driver_w25qxx.c:2494
+
w25qxx_fast_read_quad_io
uint8_t w25qxx_fast_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad io in the fast mode
Definition driver_w25qxx.c:4184
+
w25qxx_fast_read_dual_io
uint8_t w25qxx_fast_read_dual_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual io in the fast mode
Definition driver_w25qxx.c:4076
+
w25qxx_word_read_quad_io
uint8_t w25qxx_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
word read with quad io
Definition driver_w25qxx.c:4350
+
w25qxx_erase_security_register
uint8_t w25qxx_erase_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num)
erase the security register
Definition driver_w25qxx.c:2952
+
w25qxx_fast_read_quad_output
uint8_t w25qxx_fast_read_quad_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad output in the fast mode
Definition driver_w25qxx.c:3967
+
W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE
@ W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE
Definition driver_w25qxx.h:124
+
W25QXX_QSPI_READ_DUMMY_4_55MHZ
@ W25QXX_QSPI_READ_DUMMY_4_55MHZ
Definition driver_w25qxx.h:114
+
W25QXX_QSPI_READ_DUMMY_6_80MHZ
@ W25QXX_QSPI_READ_DUMMY_6_80MHZ
Definition driver_w25qxx.h:115
+
W25QXX_QSPI_READ_DUMMY_2_33MHZ
@ W25QXX_QSPI_READ_DUMMY_2_33MHZ
Definition driver_w25qxx.h:113
+
W25QXX_QSPI_READ_DUMMY_8_80MHZ
@ W25QXX_QSPI_READ_DUMMY_8_80MHZ
Definition driver_w25qxx.h:116
+
W25QXX_SECURITY_REGISTER_2
@ W25QXX_SECURITY_REGISTER_2
Definition driver_w25qxx.h:137
+
W25QXX_SECURITY_REGISTER_3
@ W25QXX_SECURITY_REGISTER_3
Definition driver_w25qxx.h:138
+
W25QXX_SECURITY_REGISTER_1
@ W25QXX_SECURITY_REGISTER_1
Definition driver_w25qxx.h:136
+
w25qxx_chip_erase
uint8_t w25qxx_chip_erase(w25qxx_handle_t *handle)
erase the chip
Definition driver_w25qxx.c:1459
+
w25qxx_only_spi_read
uint8_t w25qxx_only_spi_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read only in the spi interface
Definition driver_w25qxx.c:3465
+
w25qxx_block_erase_32k
uint8_t w25qxx_block_erase_32k(w25qxx_handle_t *handle, uint32_t addr)
erase the 32k block
Definition driver_w25qxx.c:5419
+
w25qxx_set_interface
uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface)
set the chip interface
Definition driver_w25qxx.c:259
+
w25qxx_page_program
uint8_t w25qxx_page_program(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
page program
Definition driver_w25qxx.c:4569
+
w25qxx_set_dual_quad_spi
uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable)
enable or disable the dual quad spi
Definition driver_w25qxx.c:175
+
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition driver_w25qxx.h:63
+
w25qxx_init
uint8_t w25qxx_init(w25qxx_handle_t *handle)
initialize the chip
Definition driver_w25qxx.c:6819
+
w25qxx_info
uint8_t w25qxx_info(w25qxx_info_t *info)
get chip's information
Definition driver_w25qxx.c:8566
+
w25qxx_sector_erase_4k
uint8_t w25qxx_sector_erase_4k(w25qxx_handle_t *handle, uint32_t addr)
erase the 4k sector
Definition driver_w25qxx.c:5080
+
w25qxx_deinit
uint8_t w25qxx_deinit(w25qxx_handle_t *handle)
close the chip
Definition driver_w25qxx.c:7195
+
w25qxx_set_type
uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type)
set the chip type
Definition driver_w25qxx.c:217
+
w25qxx_write
uint8_t w25qxx_write(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
write data
Definition driver_w25qxx.c:8415
+
w25qxx_fast_read
uint8_t w25qxx_fast_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read in the fast mode
Definition driver_w25qxx.c:3634
+
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition driver_w25qxx.h:76
+
w25qxx_set_address_mode
uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
set the chip address mode
Definition driver_w25qxx.c:304
+
w25qxx_read
uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read data
Definition driver_w25qxx.c:7289
+
w25qxx_block_erase_64k
uint8_t w25qxx_block_erase_64k(w25qxx_handle_t *handle, uint32_t addr)
erase the 64k block
Definition driver_w25qxx.c:5758
+
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition driver_w25qxx.h:85
+
W25Q80
@ W25Q80
Definition driver_w25qxx.h:64
+
W25Q256
@ W25Q256
Definition driver_w25qxx.h:69
+
W25QXX_ADDRESS_MODE_3_BYTE
@ W25QXX_ADDRESS_MODE_3_BYTE
Definition driver_w25qxx.h:95
+
W25QXX_ADDRESS_MODE_4_BYTE
@ W25QXX_ADDRESS_MODE_4_BYTE
Definition driver_w25qxx.h:96
+
W25QXX_INTERFACE_QSPI
@ W25QXX_INTERFACE_QSPI
Definition driver_w25qxx.h:78
+
W25QXX_INTERFACE_SPI
@ W25QXX_INTERFACE_SPI
Definition driver_w25qxx.h:77
+
w25qxx_interface_spi_qspi_deinit
uint8_t w25qxx_interface_spi_qspi_deinit(void)
interface spi qspi bus deinit
Definition driver_w25qxx_interface_template.c:58
+
w25qxx_interface_spi_qspi_init
uint8_t w25qxx_interface_spi_qspi_init(void)
interface spi qspi bus init
Definition driver_w25qxx_interface_template.c:46
+
w25qxx_interface_delay_us
void w25qxx_interface_delay_us(uint32_t us)
interface delay us
Definition driver_w25qxx_interface_template.c:108
+
w25qxx_interface_spi_qspi_write_read
uint8_t w25qxx_interface_spi_qspi_write_read(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
interface spi qspi bus write read
Definition driver_w25qxx_interface_template.c:84
+
w25qxx_interface_debug_print
void w25qxx_interface_debug_print(const char *const fmt,...)
interface print format data
Definition driver_w25qxx_interface_template.c:118
+
w25qxx_interface_delay_ms
void w25qxx_interface_delay_ms(uint32_t ms)
interface delay ms
Definition driver_w25qxx_interface_template.c:98
+
DRIVER_W25QXX_LINK_DELAY_MS
#define DRIVER_W25QXX_LINK_DELAY_MS(HANDLE, FUC)
link delay_ms function
Definition driver_w25qxx.h:297
+
DRIVER_W25QXX_LINK_INIT
#define DRIVER_W25QXX_LINK_INIT(HANDLE, STRUCTURE)
initialize w25qxx_handle_t structure
Definition driver_w25qxx.h:265
+
DRIVER_W25QXX_LINK_SPI_QSPI_INIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_INIT(HANDLE, FUC)
link spi_qspi_init function
Definition driver_w25qxx.h:273
+
DRIVER_W25QXX_LINK_DEBUG_PRINT
#define DRIVER_W25QXX_LINK_DEBUG_PRINT(HANDLE, FUC)
link debug_print function
Definition driver_w25qxx.h:313
+
DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ
#define DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(HANDLE, FUC)
link spi_qspi_write_read function
Definition driver_w25qxx.h:289
+
DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(HANDLE, FUC)
link spi_qspi_deinit function
Definition driver_w25qxx.h:281
+
DRIVER_W25QXX_LINK_DELAY_US
#define DRIVER_W25QXX_LINK_DELAY_US(HANDLE, FUC)
link delay_us function
Definition driver_w25qxx.h:305
+
w25qxx_read_test
uint8_t w25qxx_read_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
read test
Definition driver_w25qxx_read_test.c:55
+
w25qxx_handle_s
w25qxx handle structure definition
Definition driver_w25qxx.h:210
+
w25qxx_info_s
w25qxx information structure definition
Definition driver_w25qxx.h:236
+
w25qxx_info_s::temperature_max
float temperature_max
Definition driver_w25qxx.h:244
+
w25qxx_info_s::supply_voltage_max_v
float supply_voltage_max_v
Definition driver_w25qxx.h:241
+
w25qxx_info_s::driver_version
uint32_t driver_version
Definition driver_w25qxx.h:245
+
w25qxx_info_s::interface
char interface[16]
Definition driver_w25qxx.h:239
+
w25qxx_info_s::temperature_min
float temperature_min
Definition driver_w25qxx.h:243
+
w25qxx_info_s::max_current_ma
float max_current_ma
Definition driver_w25qxx.h:242
+
w25qxx_info_s::manufacturer_name
char manufacturer_name[32]
Definition driver_w25qxx.h:238
+
w25qxx_info_s::supply_voltage_min_v
float supply_voltage_min_v
Definition driver_w25qxx.h:240
+
w25qxx_info_s::chip_name
char chip_name[32]
Definition driver_w25qxx.h:237
diff --git a/doc/html/driver__w25qxx__read__test_8h.html b/doc/html/driver__w25qxx__read__test_8h.html index a5279d7..29c807a 100644 --- a/doc/html/driver__w25qxx__read__test_8h.html +++ b/doc/html/driver__w25qxx__read__test_8h.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: test/driver_w25qxx_read_test.h File Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@

@@ -78,17 +78,23 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
Macros | Functions
-
-
driver_w25qxx_read_test.h File Reference
+
driver_w25qxx_read_test.h File Reference
@@ -98,16 +104,16 @@

Go to the source code of this file.

- - - + +

+

Macros

#define W25QXX_ENABLE_ERASE_READ_TEST   1
 w25qxx enable erase read test enumeration definition More...
#define W25QXX_ENABLE_ERASE_READ_TEST   1
 w25qxx enable erase read test enumeration definition
 
- - - + +

+

Functions

uint8_t w25qxx_read_test (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 read test More...
uint8_t w25qxx_read_test (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 read test
 

Detailed Description

@@ -135,7 +141,7 @@

history

diff --git a/doc/html/driver__w25qxx__read__test_8h_source.html b/doc/html/driver__w25qxx__read__test_8h_source.html index 88b20a8..e302d41 100644 --- a/doc/html/driver__w25qxx__read__test_8h_source.html +++ b/doc/html/driver__w25qxx__read__test_8h_source.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: test/driver_w25qxx_read_test.h Source File @@ -23,11 +23,10 @@
- + - @@ -36,22 +35,28 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ + +
@@ -78,47 +83,53 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
-
-
driver_w25qxx_read_test.h
+
driver_w25qxx_read_test.h
-Go to the documentation of this file.
1 
-
37 #ifndef DRIVER_W25QXX_READ_TEST_H
-
38 #define DRIVER_W25QXX_READ_TEST_H
-
39 
-
40 #include "driver_w25qxx_interface.h"
-
41 
-
42 #ifdef __cplusplus
-
43 extern "C"{
-
44 #endif
-
45 
-
54 #define W25QXX_ENABLE_ERASE_READ_TEST 1
-
55 
-
66 uint8_t w25qxx_read_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable);
-
67 
-
72 #ifdef __cplusplus
-
73 }
-
74 #endif
-
75 
-
76 #endif
+Go to the documentation of this file.
1
+
37#ifndef DRIVER_W25QXX_READ_TEST_H
+
38#define DRIVER_W25QXX_READ_TEST_H
+
39
+
40#include "driver_w25qxx_interface.h"
+
41
+
42#ifdef __cplusplus
+
43extern "C"{
+
44#endif
+
45
+
54#define W25QXX_ENABLE_ERASE_READ_TEST 1
+
55
+
66uint8_t w25qxx_read_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable);
+
67
+
72#ifdef __cplusplus
+
73}
+
74#endif
+
75
+
76#endif
driver_w25qxx_interface.h
driver w25qxx interface header file
-
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition: driver_w25qxx.h:63
-
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition: driver_w25qxx.h:76
-
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition: driver_w25qxx.h:85
-
w25qxx_read_test
uint8_t w25qxx_read_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
read test
Definition: driver_w25qxx_read_test.c:55
+
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition driver_w25qxx.h:63
+
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition driver_w25qxx.h:76
+
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition driver_w25qxx.h:85
+
w25qxx_read_test
uint8_t w25qxx_read_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
read test
Definition driver_w25qxx_read_test.c:55
diff --git a/doc/html/driver__w25qxx__register__test_8c.html b/doc/html/driver__w25qxx__register__test_8c.html index fec8229..ed5e579 100644 --- a/doc/html/driver__w25qxx__register__test_8c.html +++ b/doc/html/driver__w25qxx__register__test_8c.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: test/driver_w25qxx_register_test.c File Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +

@@ -64,7 +64,7 @@
@@ -78,16 +78,22 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
Functions
-
-
driver_w25qxx_register_test.c File Reference
+
driver_w25qxx_register_test.c File Reference
@@ -97,10 +103,10 @@

Go to the source code of this file.

- - - + +

+

Functions

uint8_t w25qxx_register_test (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 register test More...
uint8_t w25qxx_register_test (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 register test
 

Detailed Description

@@ -128,7 +134,7 @@

history

diff --git a/doc/html/driver__w25qxx__register__test_8c_source.html b/doc/html/driver__w25qxx__register__test_8c_source.html index d882757..76e833b 100644 --- a/doc/html/driver__w25qxx__register__test_8c_source.html +++ b/doc/html/driver__w25qxx__register__test_8c_source.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: test/driver_w25qxx_register_test.c Source File @@ -23,11 +23,10 @@
- + - @@ -36,22 +35,28 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ + +

@@ -78,1269 +83,1277 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
-
-
driver_w25qxx_register_test.c
+
driver_w25qxx_register_test.c
-Go to the documentation of this file.
1 
-
37 #include "driver_w25qxx_register_test.h"
-
38 
-
39 static w25qxx_handle_t gs_handle;
-
51 uint8_t w25qxx_register_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
-
52 {
-
53  uint8_t res;
-
54  uint8_t status;
-
55  uint8_t manufacturer;
-
56  uint8_t device_id[2];
-
57  uint8_t id[8];
-
58  w25qxx_info_t info;
-
59  w25qxx_type_t type_check;
-
60  w25qxx_interface_t interface_check;
-
61 
-
62  /* link interface function */
-
63  DRIVER_W25QXX_LINK_INIT(&gs_handle, w25qxx_handle_t);
-
64  DRIVER_W25QXX_LINK_SPI_QSPI_INIT(&gs_handle, w25qxx_interface_spi_qspi_init);
-
65  DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(&gs_handle, w25qxx_interface_spi_qspi_deinit);
-
66  DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(&gs_handle, w25qxx_interface_spi_qspi_write_read);
-
67  DRIVER_W25QXX_LINK_DELAY_MS(&gs_handle, w25qxx_interface_delay_ms);
-
68  DRIVER_W25QXX_LINK_DELAY_US(&gs_handle, w25qxx_interface_delay_us);
-
69  DRIVER_W25QXX_LINK_DEBUG_PRINT(&gs_handle, w25qxx_interface_debug_print);
-
70 
-
71  /* get information */
-
72  res = w25qxx_info(&info);
-
73  if (res != 0)
-
74  {
-
75  w25qxx_interface_debug_print("w25qxx: get info failed.\n");
-
76 
-
77  return 1;
-
78  }
-
79  else
-
80  {
-
81  /* print chip information */
-
82  w25qxx_interface_debug_print("w25qxx: chip is %s.\n", info.chip_name);
-
83  w25qxx_interface_debug_print("w25qxx: manufacturer is %s.\n", info.manufacturer_name);
-
84  w25qxx_interface_debug_print("w25qxx: interface is %s.\n", info.interface);
-
85  w25qxx_interface_debug_print("w25qxx: driver version is %d.%d.\n", info.driver_version / 1000, (info.driver_version % 1000) / 100);
-
86  w25qxx_interface_debug_print("w25qxx: min supply voltage is %0.1fV.\n", info.supply_voltage_min_v);
-
87  w25qxx_interface_debug_print("w25qxx: max supply voltage is %0.1fV.\n", info.supply_voltage_max_v);
-
88  w25qxx_interface_debug_print("w25qxx: max current is %0.2fmA.\n", info.max_current_ma);
-
89  w25qxx_interface_debug_print("w25qxx: max temperature is %0.1fC.\n", info.temperature_max);
-
90  w25qxx_interface_debug_print("w25qxx: min temperature is %0.1fC.\n", info.temperature_min);
-
91  }
-
92 
-
93  /* start read test */
-
94  w25qxx_interface_debug_print("w25qxx: start register test.\n");
-
95 
-
96  /* w25qxx_set_type/w25qxx_get_type test */
-
97  w25qxx_interface_debug_print("w25qxx: w25qxx_set_type/w25qxx_get_type test.\n");
-
98 
-
99  /* set type w25q80 */
-
100  res = w25qxx_set_type(&gs_handle, W25Q80);
-
101  if (res != 0)
-
102  {
-
103  w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
104 
-
105  return 1;
-
106  }
-
107  w25qxx_interface_debug_print("w25qxx: set type W25Q80.\n");
-
108 
-
109  /* get type */
-
110  res = w25qxx_get_type(&gs_handle, &type_check);
-
111  if (res != 0)
-
112  {
-
113  w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
114 
-
115  return 1;
-
116  }
-
117  w25qxx_interface_debug_print("w25qxx: check chip type %s.\n", type_check == W25Q80 ? "ok" : "error");
-
118 
-
119  /* set type w25q16 */
-
120  res = w25qxx_set_type(&gs_handle, W25Q16);
-
121  if (res != 0)
-
122  {
-
123  w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
124 
-
125  return 1;
-
126  }
-
127  w25qxx_interface_debug_print("w25qxx: set type W25Q16.\n");
-
128 
-
129  /* get type */
-
130  res = w25qxx_get_type(&gs_handle, &type_check);
-
131  if (res != 0)
-
132  {
-
133  w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
134 
-
135  return 1;
-
136  }
-
137  w25qxx_interface_debug_print("w25qxx: check chip type %s.\n", type_check == W25Q16 ? "ok" : "error");
-
138 
-
139  /* set type w25q32 */
-
140  res = w25qxx_set_type(&gs_handle, W25Q32);
-
141  if (res != 0)
-
142  {
-
143  w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
144 
-
145  return 1;
-
146  }
-
147  w25qxx_interface_debug_print("w25qxx: set type W25Q32.\n");
-
148 
-
149  /* get type */
-
150  res = w25qxx_get_type(&gs_handle, &type_check);
-
151  if (res != 0)
-
152  {
-
153  w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
154 
-
155  return 1;
-
156  }
-
157  w25qxx_interface_debug_print("w25qxx: check chip type %s.\n", type_check == W25Q32 ? "ok" : "error");
-
158 
-
159  /* set type w25q64 */
-
160  res = w25qxx_set_type(&gs_handle, W25Q64);
-
161  if (res != 0)
-
162  {
-
163  w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
164 
-
165  return 1;
-
166  }
-
167  w25qxx_interface_debug_print("w25qxx: set type W25Q64.\n");
-
168 
-
169  /* get type */
-
170  res = w25qxx_get_type(&gs_handle, &type_check);
-
171  if (res != 0)
-
172  {
-
173  w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
174 
-
175  return 1;
-
176  }
-
177  w25qxx_interface_debug_print("w25qxx: check chip type %s.\n", type_check == W25Q64 ? "ok" : "error");
-
178 
-
179  /* set type w25q128 */
-
180  res = w25qxx_set_type(&gs_handle, W25Q128);
-
181  if (res != 0)
-
182  {
-
183  w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
184 
-
185  return 1;
-
186  }
-
187  w25qxx_interface_debug_print("w25qxx: set type W25Q128.\n");
-
188 
-
189  /* get type */
-
190  res = w25qxx_get_type(&gs_handle, &type_check);
-
191  if (res != 0)
-
192  {
-
193  w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
194 
-
195  return 1;
-
196  }
-
197  w25qxx_interface_debug_print("w25qxx: check chip type %s.\n", type_check == W25Q128 ? "ok" : "error");
-
198 
-
199  /* set type w25q256 */
-
200  res = w25qxx_set_type(&gs_handle, W25Q256);
-
201  if (res != 0)
-
202  {
-
203  w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
204 
-
205  return 1;
-
206  }
-
207  w25qxx_interface_debug_print("w25qxx: set type W25Q256.\n");
-
208 
-
209  /* get type */
-
210  res = w25qxx_get_type(&gs_handle, &type_check);
-
211  if (res != 0)
-
212  {
-
213  w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
214 
-
215  return 1;
-
216  }
-
217  w25qxx_interface_debug_print("w25qxx: check chip type %s.\n", type_check == W25Q256 ? "ok" : "error");
-
218 
-
219  /* w25qxx_set_interface/w25qxx_get_interface test */
-
220  w25qxx_interface_debug_print("w25qxx: w25qxx_set_interface/w25qxx_get_interface test.\n");
-
221 
-
222  /* set chip interface spi */
-
223  res = w25qxx_set_interface(&gs_handle, W25QXX_INTERFACE_SPI);
-
224  if (res != 0)
-
225  {
-
226  w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
-
227 
-
228  return 1;
-
229  }
-
230  w25qxx_interface_debug_print("w25qxx: set interface SPI.\n");
-
231 
-
232  /* get interface */
-
233  res = w25qxx_get_interface(&gs_handle, &interface_check);
-
234  if (res != 0)
-
235  {
-
236  w25qxx_interface_debug_print("w25qxx: get interface failed.\n");
-
237 
-
238  return 1;
-
239  }
-
240  w25qxx_interface_debug_print("w25qxx: check chip interface %s.\n", interface_check == W25QXX_INTERFACE_SPI ? "ok" : "error");
-
241 
-
242  /* set chip interface qspi */
-
243  res = w25qxx_set_interface(&gs_handle, W25QXX_INTERFACE_QSPI);
-
244  if (res != 0)
-
245  {
-
246  w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
-
247 
-
248  return 1;
-
249  }
-
250  w25qxx_interface_debug_print("w25qxx: set interface QSPI.\n");
-
251 
-
252  /* get interface */
-
253  res = w25qxx_get_interface(&gs_handle, &interface_check);
-
254  if (res != 0)
-
255  {
-
256  w25qxx_interface_debug_print("w25qxx: get interface failed.\n");
-
257 
-
258  return 1;
-
259  }
-
260  w25qxx_interface_debug_print("w25qxx: check chip interface %s.\n", interface_check == W25QXX_INTERFACE_QSPI ? "ok" : "error");
-
261 
-
262  /* set chip type */
-
263  res = w25qxx_set_type(&gs_handle, type);
-
264  if (res != 0)
-
265  {
-
266  w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
267 
-
268  return 1;
-
269  }
-
270 
-
271  /* set chip interface */
-
272  res = w25qxx_set_interface(&gs_handle, interface);
-
273  if (res != 0)
-
274  {
-
275  w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
-
276 
-
277  return 1;
-
278  }
-
279 
-
280  /* set dual quad spi */
-
281  res = w25qxx_set_dual_quad_spi(&gs_handle, dual_quad_spi_enable);
-
282  if (res != 0)
-
283  {
-
284  w25qxx_interface_debug_print("w25qxx: set dual quad spi failed.\n");
-
285  (void)w25qxx_deinit(&gs_handle);
-
286 
-
287  return 1;
-
288  }
-
289 
-
290  /* chip init */
-
291  res = w25qxx_init(&gs_handle);
-
292  if (res != 0)
-
293  {
-
294  w25qxx_interface_debug_print("w25qxx: init failed.\n");
-
295 
-
296  return 1;
-
297  }
-
298 
-
299  if (interface == W25QXX_INTERFACE_SPI)
-
300  {
-
301  /* w25qxx_get_manufacturer_device_id test */
-
302  w25qxx_interface_debug_print("w25qxx: w25qxx_get_manufacturer_device_id test.\n");
-
303 
-
304  /* get manufacturer device id */
-
305  res = w25qxx_get_manufacturer_device_id(&gs_handle, (uint8_t *)&manufacturer, (uint8_t *)device_id);
-
306  if (res != 0)
-
307  {
-
308  w25qxx_interface_debug_print("w25qxx: get manufacturer device id failed.\n");
-
309  (void)w25qxx_deinit(&gs_handle);
-
310 
-
311  return 1;
-
312  }
-
313  w25qxx_interface_debug_print("w25qxx: manufacturer is 0x%02X, device id is 0x%02X.\n", manufacturer, device_id[0]);
-
314 
-
315  /* w25qxx_get_jedec_id test */
-
316  w25qxx_interface_debug_print("w25qxx: w25qxx_get_jedec_id test.\n");
-
317 
-
318  /* get jedec id */
-
319  res = w25qxx_get_jedec_id(&gs_handle, (uint8_t *)&manufacturer, (uint8_t *)device_id);
-
320  if (res != 0)
-
321  {
-
322  w25qxx_interface_debug_print("w25qxx: get jedec id failed.\n");
-
323  (void)w25qxx_deinit(&gs_handle);
-
324 
-
325  return 1;
-
326  }
-
327  w25qxx_interface_debug_print("w25qxx: manufacturer is 0x%02X, device id is 0x%02X 0x%02X.\n", manufacturer,
-
328  device_id[0], device_id[1]);
-
329 
-
330  /* w25qxx_get_unique_id test */
-
331  w25qxx_interface_debug_print("w25qxx: w25qxx_get_unique_id test.\n");
-
332 
-
333  /* get unique id */
-
334  res = w25qxx_get_unique_id(&gs_handle, (uint8_t *)id);
-
335  if (res != 0)
-
336  {
-
337  w25qxx_interface_debug_print("w25qxx: get unique id failed.\n");
-
338  (void)w25qxx_deinit(&gs_handle);
-
339 
-
340  return 1;
-
341  }
-
342  w25qxx_interface_debug_print("w25qxx: unique id 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X.\n",
-
343  id[0], id[1], id[2], id[3], id[4], id[5], id[6], id[7]);
-
344 
-
345  /* w25qxx_set_status1/w25qxx_get_status1 test */
-
346  w25qxx_interface_debug_print("w25qxx: w25qxx_set_status1/w25qxx_get_status1 test.\n");
-
347 
-
348  /* set status1 */
-
349  res = w25qxx_set_status1(&gs_handle, 0x00);
-
350  if (res != 0)
-
351  {
-
352  w25qxx_interface_debug_print("w25qxx: set status1 failed.\n");
-
353  (void)w25qxx_deinit(&gs_handle);
-
354 
-
355  return 1;
-
356  }
-
357 
-
358  /* get status1 */
-
359  res = w25qxx_get_status1(&gs_handle, (uint8_t *)&status);
-
360  if (res != 0)
-
361  {
-
362  w25qxx_interface_debug_print("w25qxx: get status1 failed.\n");
-
363  (void)w25qxx_deinit(&gs_handle);
-
364 
-
365  return 1;
-
366  }
-
367  w25qxx_interface_debug_print("w25qxx: status1 is 0x%02X.\n", status);
-
368 
-
369  /* w25qxx_set_status2/w25qxx_get_status2 test */
-
370  w25qxx_interface_debug_print("w25qxx: w25qxx_set_status2/w25qxx_get_status2 test.\n");
-
371 
-
372  /* set status2 */
-
373  res = w25qxx_set_status2(&gs_handle, 0x02);
-
374  if (res != 0)
-
375  {
-
376  w25qxx_interface_debug_print("w25qxx: set status2 failed.\n");
-
377  (void)w25qxx_deinit(&gs_handle);
-
378 
-
379  return 1;
-
380  }
-
381 
-
382  /* get status2 */
-
383  res = w25qxx_get_status2(&gs_handle, (uint8_t *)&status);
-
384  if (res != 0)
-
385  {
-
386  w25qxx_interface_debug_print("w25qxx: get status2 failed.\n");
-
387  (void)w25qxx_deinit(&gs_handle);
-
388 
-
389  return 1;
-
390  }
-
391  w25qxx_interface_debug_print("w25qxx: status2 is 0x%02X.\n", status);
-
392 
-
393  /* w25qxx_set_status3/w25qxx_get_status3 test */
-
394  w25qxx_interface_debug_print("w25qxx: w25qxx_set_status3/w25qxx_get_status3 test.\n");
-
395 
-
396  /* set status3 */
-
397  res = w25qxx_set_status3(&gs_handle, 0x60);
-
398  if (res != 0)
-
399  {
-
400  w25qxx_interface_debug_print("w25qxx: set status3 failed.\n");
-
401  (void)w25qxx_deinit(&gs_handle);
-
402 
-
403  return 1;
-
404  }
-
405 
-
406  /* get status3 */
-
407  res = w25qxx_get_status3(&gs_handle, (uint8_t *)&status);
-
408  if (res != 0)
-
409  {
-
410  w25qxx_interface_debug_print("w25qxx: get status3 failed.\n");
-
411  (void)w25qxx_deinit(&gs_handle);
-
412 
-
413  return 1;
-
414  }
-
415  w25qxx_interface_debug_print("w25qxx: status3 is 0x%02X.\n", status);
-
416 
-
417  /* w25qxx_enable_write test */
-
418  w25qxx_interface_debug_print("w25qxx: w25qxx_enable_write test.\n");
-
419 
-
420  /* enable write */
-
421  res = w25qxx_enable_write(&gs_handle);
-
422  if (res != 0)
-
423  {
-
424  w25qxx_interface_debug_print("w25qxx: enable write failed.\n");
-
425  (void)w25qxx_deinit(&gs_handle);
-
426 
-
427  return 1;
-
428  }
-
429  w25qxx_interface_debug_print("w25qxx: check enable write %s.\n", res == 0 ? "ok" : "error");
-
430 
-
431  /* w25qxx_disable_write test */
-
432  w25qxx_interface_debug_print("w25qxx: w25qxx_disable_write test.\n");
-
433 
-
434  /* disable write */
-
435  res = w25qxx_disable_write(&gs_handle);
-
436  if (res != 0)
-
437  {
-
438  w25qxx_interface_debug_print("w25qxx: disable write failed.\n");
-
439  (void)w25qxx_deinit(&gs_handle);
-
440 
-
441  return 1;
-
442  }
-
443  w25qxx_interface_debug_print("w25qxx: check disable write %s.\n", res == 0 ? "ok" : "error");
-
444 
-
445  /* w25qxx_enable_write test */
-
446  w25qxx_interface_debug_print("w25qxx: w25qxx_enable_write test.\n");
-
447 
-
448  /* enable sr write */
-
449  res = w25qxx_enable_volatile_sr_write(&gs_handle);
-
450  if (res != 0)
-
451  {
-
452  w25qxx_interface_debug_print("w25qxx: enable sr write failed.\n");
-
453  (void)w25qxx_deinit(&gs_handle);
-
454 
-
455  return 1;
-
456  }
-
457  w25qxx_interface_debug_print("w25qxx: check enable sr write %s.\n", res == 0 ? "ok" : "error");
-
458 
-
459  /* w25qxx_erase_program_suspend test */
-
460  w25qxx_interface_debug_print("w25qxx: w25qxx_erase_program_suspend test.\n");
-
461 
-
462  /* erase program suspend */
-
463  res = w25qxx_erase_program_suspend(&gs_handle);
-
464  if (res != 0)
-
465  {
-
466  w25qxx_interface_debug_print("w25qxx: erase program suspend failed.\n");
-
467  (void)w25qxx_deinit(&gs_handle);
-
468 
-
469  return 1;
-
470  }
-
471  w25qxx_interface_debug_print("w25qxx: check erase program suspend %s.\n", res == 0 ? "ok" : "error");
-
472 
-
473  /* w25qxx_erase_program_suspend test */
-
474  w25qxx_interface_debug_print("w25qxx: w25qxx_erase_program_suspend test.\n");
-
475 
-
476  /* erase program resume */
-
477  res = w25qxx_erase_program_resume(&gs_handle);
-
478  if (res != 0)
-
479  {
-
480  w25qxx_interface_debug_print("w25qxx: erase program resume failed.\n");
-
481  (void)w25qxx_deinit(&gs_handle);
-
482 
-
483  return 1;
-
484  }
-
485  w25qxx_interface_debug_print("w25qxx: check erase program resume %s.\n", res == 0 ? "ok" : "error");
-
486 
-
487  /* w25qxx_global_block_lock test */
-
488  w25qxx_interface_debug_print("w25qxx: w25qxx_global_block_lock test.\n");
-
489 
-
490  /* global block lock */
-
491  res = w25qxx_global_block_lock(&gs_handle);
-
492  if (res != 0)
-
493  {
-
494  w25qxx_interface_debug_print("w25qxx: global block lock failed.\n");
-
495  (void)w25qxx_deinit(&gs_handle);
-
496 
-
497  return 1;
-
498  }
-
499  w25qxx_interface_debug_print("w25qxx: check global block lock %s.\n", res == 0 ? "ok" : "error");
-
500 
-
501  /* w25qxx_global_block_unlock test */
-
502  w25qxx_interface_debug_print("w25qxx: w25qxx_global_block_unlock test.\n");
-
503 
-
504  /* global block unlock */
-
505  res = w25qxx_global_block_unlock(&gs_handle);
-
506  if (res != 0)
-
507  {
-
508  w25qxx_interface_debug_print("w25qxx: global block unlock failed.\n");
-
509  (void)w25qxx_deinit(&gs_handle);
-
510 
-
511  return 1;
-
512  }
-
513  w25qxx_interface_debug_print("w25qxx: check global block unlock %s.\n", res == 0 ? "ok" : "error");
-
514 
-
515  /* w25qxx_individual_block_lock test */
-
516  w25qxx_interface_debug_print("w25qxx: w25qxx_individual_block_lock test.\n");
-
517 
-
518  /* individual block lock */
-
519  res = w25qxx_individual_block_lock(&gs_handle, 0x00000000);
-
520  if (res != 0)
-
521  {
-
522  w25qxx_interface_debug_print("w25qxx: individual block lock failed.\n");
-
523  (void)w25qxx_deinit(&gs_handle);
-
524 
-
525  return 1;
-
526  }
-
527  w25qxx_interface_debug_print("w25qxx: check individual block lock %s.\n", res == 0 ? "ok" : "error");
-
528 
-
529  /* w25qxx_read_block_lock test */
-
530  w25qxx_interface_debug_print("w25qxx: w25qxx_read_block_lock test.\n");
-
531 
-
532  res = w25qxx_read_block_lock(&gs_handle, 0x00000000, (uint8_t *)&status);
-
533  if (res != 0)
-
534  {
-
535  w25qxx_interface_debug_print("w25qxx: read block lock failed.\n");
-
536  (void)w25qxx_deinit(&gs_handle);
-
537 
-
538  return 1;
-
539  }
-
540  w25qxx_interface_debug_print("w25qxx: check read block lock %s with %d.\n", res == 0 ? "ok" : "error", status);
-
541 
-
542  /* w25qxx_individual_block_unlock test */
-
543  w25qxx_interface_debug_print("w25qxx: w25qxx_individual_block_unlock test.\n");
-
544 
-
545  /* individual block unlock */
-
546  res = w25qxx_individual_block_unlock(&gs_handle, 0x00000000);
-
547  if (res != 0)
-
548  {
-
549  w25qxx_interface_debug_print("w25qxx: individual block unlock failed.\n");
-
550  (void)w25qxx_deinit(&gs_handle);
-
551 
-
552  return 1;
-
553  }
-
554  w25qxx_interface_debug_print("w25qxx: check individual block unlock %s.\n", res == 0 ? "ok" : "error");
-
555 
-
556  /* w25qxx_set_burst_with_wrap test */
-
557  w25qxx_interface_debug_print("w25qxx: w25qxx_set_burst_with_wrap test.\n");
-
558 
-
559  /* set burst with wrap */
-
560  res = w25qxx_set_burst_with_wrap(&gs_handle, W25QXX_BURST_WRAP_NONE);
-
561  if (res != 0)
-
562  {
-
563  w25qxx_interface_debug_print("w25qxx: set burst with wrap failed.\n");
-
564  (void)w25qxx_deinit(&gs_handle);
-
565 
-
566  return 1;
-
567  }
-
568  w25qxx_interface_debug_print("w25qxx: check set burst with wrap %s.\n", res == 0 ? "ok" : "error");
-
569 
-
570  /* w25qxx_power_down test */
-
571  w25qxx_interface_debug_print("w25qxx: w25qxx_power_down test.\n");
-
572 
-
573  /* power down */
-
574  res = w25qxx_power_down(&gs_handle);
-
575  if (res != 0)
-
576  {
-
577  w25qxx_interface_debug_print("w25qxx: power down failed.\n");
-
578  (void)w25qxx_deinit(&gs_handle);
-
579 
-
580  return 1;
-
581  }
-
582  w25qxx_interface_delay_ms(10);
-
583 
-
584  /* w25qxx_release_power_down test */
-
585  w25qxx_interface_debug_print("w25qxx: w25qxx_release_power_down test.\n");
-
586 
-
587  /* release power down */
-
588  res = w25qxx_release_power_down(&gs_handle);
-
589  if (res != 0)
-
590  {
-
591  w25qxx_interface_debug_print("w25qxx: release power down failed.\n");
-
592  (void)w25qxx_deinit(&gs_handle);
-
593 
-
594  return 1;
-
595  }
-
596  w25qxx_interface_delay_ms(10);
-
597 
-
598  /* w25qxx_enable_reset test */
-
599  w25qxx_interface_debug_print("w25qxx: w25qxx_enable_reset test.\n");
-
600 
-
601  /* enable reset */
-
602  res = w25qxx_enable_reset(&gs_handle);
-
603  if (res != 0)
-
604  {
-
605  w25qxx_interface_debug_print("w25qxx: enable reset failed.\n");
-
606  (void)w25qxx_deinit(&gs_handle);
-
607 
-
608  return 1;
-
609  }
-
610 
-
611  /* w25qxx_reset_device test */
-
612  w25qxx_interface_debug_print("w25qxx: w25qxx_reset_device test.\n");
-
613 
-
614  /* reset device */
-
615  res = w25qxx_reset_device(&gs_handle);
-
616  if (res != 0)
-
617  {
-
618  w25qxx_interface_debug_print("w25qxx: reset device failed.\n");
-
619  (void)w25qxx_deinit(&gs_handle);
-
620 
-
621  return 1;
-
622  }
-
623  w25qxx_interface_delay_ms(10);
-
624 
-
625  if (type >= W25Q256)
-
626  {
-
627  /* set address mode 4 byte */
-
628  w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
-
629 
-
630  /* set address mode 4 byte */
-
631  res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
-
632  if (res != 0)
-
633  {
-
634  w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
635  (void)w25qxx_deinit(&gs_handle);
-
636 
-
637  return 1;
-
638  }
-
639 
-
640  /* w25qxx_get_unique_id test */
-
641  w25qxx_interface_debug_print("w25qxx: w25qxx_get_unique_id test.\n");
-
642 
-
643  /* get unique id */
-
644  res = w25qxx_get_unique_id(&gs_handle, (uint8_t *)id);
-
645  if (res != 0)
-
646  {
-
647  w25qxx_interface_debug_print("w25qxx: get unique id failed.\n");
-
648  (void)w25qxx_deinit(&gs_handle);
-
649 
-
650  return 1;
-
651  }
-
652  w25qxx_interface_debug_print("w25qxx: unique id 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X.\n",
-
653  id[0], id[1], id[2], id[3], id[4], id[5], id[6], id[7]);
-
654 
-
655  /* w25qxx_individual_block_lock test */
-
656  w25qxx_interface_debug_print("w25qxx: w25qxx_individual_block_lock test.\n");
-
657 
-
658  /* individual block lock */
-
659  res = w25qxx_individual_block_lock(&gs_handle, 0x00000000);
-
660  if (res != 0)
-
661  {
-
662  w25qxx_interface_debug_print("w25qxx: individual block lock failed.\n");
-
663  (void)w25qxx_deinit(&gs_handle);
-
664 
-
665  return 1;
-
666  }
-
667  w25qxx_interface_debug_print("w25qxx: check individual block lock %s.\n", res == 0 ? "ok" : "error");
-
668 
-
669  /* w25qxx_read_block_lock test */
-
670  w25qxx_interface_debug_print("w25qxx: w25qxx_read_block_lock test.\n");
-
671 
-
672  res = w25qxx_read_block_lock(&gs_handle, 0x00000000, (uint8_t *)&status);
-
673  if (res != 0)
-
674  {
-
675  w25qxx_interface_debug_print("w25qxx: read block lock failed.\n");
-
676  (void)w25qxx_deinit(&gs_handle);
-
677 
-
678  return 1;
-
679  }
-
680  w25qxx_interface_debug_print("w25qxx: check read block lock %s with %d.\n", res == 0 ? "ok" : "error", status);
-
681 
-
682  /* w25qxx_individual_block_unlock test */
-
683  w25qxx_interface_debug_print("w25qxx: w25qxx_individual_block_unlock test.\n");
-
684 
-
685  /* individual block unlock */
-
686  res = w25qxx_individual_block_unlock(&gs_handle, 0x00000000);
-
687  if (res != 0)
-
688  {
-
689  w25qxx_interface_debug_print("w25qxx: individual block unlock failed.\n");
-
690  (void)w25qxx_deinit(&gs_handle);
-
691 
-
692  return 1;
-
693  }
-
694  w25qxx_interface_debug_print("w25qxx: check individual block unlock %s.\n", res == 0 ? "ok" : "error");
-
695 
-
696  /* set address mode 3 byte */
-
697  w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
-
698 
-
699  /* set address mode 3 byte */
-
700  res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
-
701  if (res != 0)
-
702  {
-
703  w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
704  (void)w25qxx_deinit(&gs_handle);
-
705 
-
706  return 1;
-
707  }
-
708  }
-
709  }
-
710  else
-
711  {
-
712  /* w25qxx_get_manufacturer_device_id test */
-
713  w25qxx_interface_debug_print("w25qxx: w25qxx_get_manufacturer_device_id test.\n");
-
714 
-
715  /* get manufacturer device id */
-
716  res = w25qxx_get_manufacturer_device_id(&gs_handle, (uint8_t *)&manufacturer, (uint8_t *)device_id);
-
717  if (res != 0)
-
718  {
-
719  w25qxx_interface_debug_print("w25qxx: get manufacturer device id failed.\n");
-
720  (void)w25qxx_deinit(&gs_handle);
-
721 
-
722  return 1;
-
723  }
-
724  w25qxx_interface_debug_print("w25qxx: manufacturer is 0x%02X, device id is 0x%02X.\n", manufacturer, device_id[0]);
-
725 
-
726  /* w25qxx_get_jedec_id test */
-
727  w25qxx_interface_debug_print("w25qxx: w25qxx_get_jedec_id test.\n");
-
728 
-
729  /* get jedec id */
-
730  res = w25qxx_get_jedec_id(&gs_handle, (uint8_t *)&manufacturer, (uint8_t *)device_id);
-
731  if (res != 0)
-
732  {
-
733  w25qxx_interface_debug_print("w25qxx: get jedec id failed.\n");
-
734  (void)w25qxx_deinit(&gs_handle);
-
735 
-
736  return 1;
-
737  }
-
738  w25qxx_interface_debug_print("w25qxx: manufacturer is 0x%02X, device id is 0x%02X 0x%02X.\n", manufacturer,
-
739  device_id[0], device_id[1]);
-
740 
-
741  /* w25qxx_set_status1/w25qxx_get_status1 test */
-
742  w25qxx_interface_debug_print("w25qxx: w25qxx_set_status1/w25qxx_get_status1 test.\n");
-
743 
-
744  /* set status1 */
-
745  res = w25qxx_set_status1(&gs_handle, 0x00);
-
746  if (res != 0)
-
747  {
-
748  w25qxx_interface_debug_print("w25qxx: set status1 failed.\n");
-
749  (void)w25qxx_deinit(&gs_handle);
-
750 
-
751  return 1;
-
752  }
-
753 
-
754  /* get status1 */
-
755  res = w25qxx_get_status1(&gs_handle, (uint8_t *)&status);
-
756  if (res != 0)
-
757  {
-
758  w25qxx_interface_debug_print("w25qxx: get status1 failed.\n");
-
759  (void)w25qxx_deinit(&gs_handle);
-
760 
-
761  return 1;
-
762  }
-
763  w25qxx_interface_debug_print("w25qxx: status1 is 0x%02X.\n", status);
-
764 
-
765  /* w25qxx_set_status2/w25qxx_get_status2 test */
-
766  w25qxx_interface_debug_print("w25qxx: w25qxx_set_status2/w25qxx_get_status2 test.\n");
-
767 
-
768  /* set status2 */
-
769  res = w25qxx_set_status2(&gs_handle, 0x02);
-
770  if (res != 0)
-
771  {
-
772  w25qxx_interface_debug_print("w25qxx: set status2 failed.\n");
-
773  (void)w25qxx_deinit(&gs_handle);
-
774 
-
775  return 1;
-
776  }
-
777 
-
778  /* get status2 */
-
779  res = w25qxx_get_status2(&gs_handle, (uint8_t *)&status);
-
780  if (res != 0)
-
781  {
-
782  w25qxx_interface_debug_print("w25qxx: get status2 failed.\n");
-
783  (void)w25qxx_deinit(&gs_handle);
-
784 
-
785  return 1;
-
786  }
-
787  w25qxx_interface_debug_print("w25qxx: status2 is 0x%02X.\n", status);
-
788 
-
789  /* w25qxx_set_status3/w25qxx_get_status3 test */
-
790  w25qxx_interface_debug_print("w25qxx: w25qxx_set_status3/w25qxx_get_status3 test.\n");
-
791 
-
792  /* set status3 */
-
793  res = w25qxx_set_status3(&gs_handle, 0x60);
-
794  if (res != 0)
-
795  {
-
796  w25qxx_interface_debug_print("w25qxx: set status3 failed.\n");
-
797  (void)w25qxx_deinit(&gs_handle);
-
798 
-
799  return 1;
-
800  }
-
801 
-
802  /* get status3 */
-
803  res = w25qxx_get_status3(&gs_handle, (uint8_t *)&status);
-
804  if (res != 0)
-
805  {
-
806  w25qxx_interface_debug_print("w25qxx: get status3 failed.\n");
-
807  (void)w25qxx_deinit(&gs_handle);
-
808 
-
809  return 1;
-
810  }
-
811  w25qxx_interface_debug_print("w25qxx: status3 is 0x%02X.\n", status);
-
812 
-
813  /* w25qxx_enable_write test */
-
814  w25qxx_interface_debug_print("w25qxx: w25qxx_enable_write test.\n");
-
815 
-
816  /* enable write */
-
817  res = w25qxx_enable_write(&gs_handle);
-
818  if (res != 0)
-
819  {
-
820  w25qxx_interface_debug_print("w25qxx: enable write failed.\n");
-
821  (void)w25qxx_deinit(&gs_handle);
-
822 
-
823  return 1;
-
824  }
-
825  w25qxx_interface_debug_print("w25qxx: check enable write %s.\n", res == 0 ? "ok" : "error");
-
826 
-
827  /* w25qxx_disable_write test */
-
828  w25qxx_interface_debug_print("w25qxx: w25qxx_disable_write test.\n");
-
829 
-
830  /* disable write */
-
831  res = w25qxx_disable_write(&gs_handle);
-
832  if (res != 0)
-
833  {
-
834  w25qxx_interface_debug_print("w25qxx: disable write failed.\n");
-
835  (void)w25qxx_deinit(&gs_handle);
-
836 
-
837  return 1;
-
838  }
-
839  w25qxx_interface_debug_print("w25qxx: check disable write %s.\n", res == 0 ? "ok" : "error");
-
840 
-
841  /* w25qxx_enable_write test */
-
842  w25qxx_interface_debug_print("w25qxx: w25qxx_enable_write test.\n");
-
843 
-
844  /* enable sr write */
-
845  res = w25qxx_enable_volatile_sr_write(&gs_handle);
-
846  if (res != 0)
-
847  {
-
848  w25qxx_interface_debug_print("w25qxx: enable sr write failed.\n");
-
849  (void)w25qxx_deinit(&gs_handle);
-
850 
-
851  return 1;
-
852  }
-
853  w25qxx_interface_debug_print("w25qxx: check enable sr write %s.\n", res == 0 ? "ok" : "error");
-
854 
-
855  /* w25qxx_erase_program_suspend test */
-
856  w25qxx_interface_debug_print("w25qxx: w25qxx_erase_program_suspend test.\n");
-
857 
-
858  /* erase program suspend */
-
859  res = w25qxx_erase_program_suspend(&gs_handle);
-
860  if (res != 0)
-
861  {
-
862  w25qxx_interface_debug_print("w25qxx: erase program suspend failed.\n");
-
863  (void)w25qxx_deinit(&gs_handle);
-
864 
-
865  return 1;
-
866  }
-
867  w25qxx_interface_debug_print("w25qxx: check erase program suspend %s.\n", res == 0 ? "ok" : "error");
-
868 
-
869  /* w25qxx_erase_program_suspend test */
-
870  w25qxx_interface_debug_print("w25qxx: w25qxx_erase_program_suspend test.\n");
-
871 
-
872  /* erase program resume */
-
873  res = w25qxx_erase_program_resume(&gs_handle);
-
874  if (res != 0)
-
875  {
-
876  w25qxx_interface_debug_print("w25qxx: erase program resume failed.\n");
-
877  (void)w25qxx_deinit(&gs_handle);
-
878 
-
879  return 1;
-
880  }
-
881  w25qxx_interface_debug_print("w25qxx: check erase program resume %s.\n", res == 0 ? "ok" : "error");
-
882 
-
883  /* w25qxx_global_block_lock test */
-
884  w25qxx_interface_debug_print("w25qxx: w25qxx_global_block_lock test.\n");
-
885 
-
886  /* global block lock */
-
887  res = w25qxx_global_block_lock(&gs_handle);
-
888  if (res != 0)
-
889  {
-
890  w25qxx_interface_debug_print("w25qxx: global block lock failed.\n");
-
891  (void)w25qxx_deinit(&gs_handle);
-
892 
-
893  return 1;
-
894  }
-
895  w25qxx_interface_debug_print("w25qxx: check global block lock %s.\n", res == 0 ? "ok" : "error");
-
896 
-
897  /* w25qxx_global_block_unlock test */
-
898  w25qxx_interface_debug_print("w25qxx: w25qxx_global_block_unlock test.\n");
-
899 
-
900  /* global block unlock */
-
901  res = w25qxx_global_block_unlock(&gs_handle);
-
902  if (res != 0)
-
903  {
-
904  w25qxx_interface_debug_print("w25qxx: global block unlock failed.\n");
-
905  (void)w25qxx_deinit(&gs_handle);
-
906 
-
907  return 1;
-
908  }
-
909  w25qxx_interface_debug_print("w25qxx: check global block unlock %s.\n", res == 0 ? "ok" : "error");
-
910 
-
911  /* w25qxx_individual_block_lock test */
-
912  w25qxx_interface_debug_print("w25qxx: w25qxx_individual_block_lock test.\n");
-
913 
-
914  /* individual block lock */
-
915  res = w25qxx_individual_block_lock(&gs_handle, 0x00000000);
-
916  if (res != 0)
-
917  {
-
918  w25qxx_interface_debug_print("w25qxx: individual block lock failed.\n");
-
919  (void)w25qxx_deinit(&gs_handle);
-
920 
-
921  return 1;
-
922  }
-
923  w25qxx_interface_debug_print("w25qxx: check individual block lock %s.\n", res == 0 ? "ok" : "error");
-
924 
-
925  /* w25qxx_read_block_lock test */
-
926  w25qxx_interface_debug_print("w25qxx: w25qxx_read_block_lock test.\n");
-
927 
-
928  res = w25qxx_read_block_lock(&gs_handle, 0x00000000, (uint8_t *)&status);
-
929  if (res != 0)
-
930  {
-
931  w25qxx_interface_debug_print("w25qxx: read block lock failed.\n");
-
932  (void)w25qxx_deinit(&gs_handle);
-
933 
-
934  return 1;
-
935  }
-
936  w25qxx_interface_debug_print("w25qxx: check read block lock %s with %d.\n", res == 0 ? "ok" : "error", status);
-
937 
-
938  /* w25qxx_individual_block_unlock test */
-
939  w25qxx_interface_debug_print("w25qxx: w25qxx_individual_block_unlock test.\n");
-
940 
-
941  /* individual block unlock */
-
942  res = w25qxx_individual_block_unlock(&gs_handle, 0x00000000);
-
943  if (res != 0)
-
944  {
-
945  w25qxx_interface_debug_print("w25qxx: individual block unlock failed.\n");
-
946  (void)w25qxx_deinit(&gs_handle);
-
947 
-
948  return 1;
-
949  }
-
950  w25qxx_interface_debug_print("w25qxx: check individual block unlock %s.\n", res == 0 ? "ok" : "error");
-
951 
-
952  /* w25qxx_power_down test */
-
953  w25qxx_interface_debug_print("w25qxx: w25qxx_power_down test.\n");
-
954 
-
955  /* power down */
-
956  res = w25qxx_power_down(&gs_handle);
-
957  if (res != 0)
-
958  {
-
959  w25qxx_interface_debug_print("w25qxx: power down failed.\n");
-
960  (void)w25qxx_deinit(&gs_handle);
-
961 
-
962  return 1;
-
963  }
-
964  w25qxx_interface_delay_ms(10);
-
965 
-
966  /* w25qxx_release_power_down test */
-
967  w25qxx_interface_debug_print("w25qxx: w25qxx_release_power_down test.\n");
-
968 
-
969  /* release power down */
-
970  res = w25qxx_release_power_down(&gs_handle);
-
971  if (res != 0)
-
972  {
-
973  w25qxx_interface_debug_print("w25qxx: release power down failed.\n");
-
974  (void)w25qxx_deinit(&gs_handle);
-
975 
-
976  return 1;
-
977  }
-
978  w25qxx_interface_delay_ms(10);
-
979 
-
980  /* w25qxx_enable_reset test */
-
981  w25qxx_interface_debug_print("w25qxx: w25qxx_enable_reset test.\n");
-
982 
-
983  /* enable reset */
-
984  res = w25qxx_enable_reset(&gs_handle);
-
985  if (res != 0)
-
986  {
-
987  w25qxx_interface_debug_print("w25qxx: enable reset failed.\n");
-
988  (void)w25qxx_deinit(&gs_handle);
-
989 
-
990  return 1;
-
991  }
-
992 
-
993  /* w25qxx_reset_device test */
-
994  w25qxx_interface_debug_print("w25qxx: w25qxx_reset_device test.\n");
-
995 
-
996  /* reset device */
-
997  res = w25qxx_reset_device(&gs_handle);
-
998  if (res != 0)
-
999  {
-
1000  w25qxx_interface_debug_print("w25qxx: reset device failed.\n");
-
1001  (void)w25qxx_deinit(&gs_handle);
-
1002 
-
1003  return 1;
-
1004  }
-
1005  w25qxx_interface_delay_ms(10);
-
1006 
-
1007  if (type >= W25Q256)
-
1008  {
-
1009  /* set address mode 4 byte */
-
1010  w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
-
1011 
-
1012  /* set address mode 4 byte */
-
1013  res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
-
1014  if (res != 0)
-
1015  {
-
1016  w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
1017  (void)w25qxx_deinit(&gs_handle);
-
1018 
-
1019  return 1;
-
1020  }
-
1021 
-
1022  /* w25qxx_individual_block_lock test */
-
1023  w25qxx_interface_debug_print("w25qxx: w25qxx_individual_block_lock test.\n");
-
1024 
-
1025  /* individual block lock */
-
1026  res = w25qxx_individual_block_lock(&gs_handle, 0x00000000);
-
1027  if (res != 0)
-
1028  {
-
1029  w25qxx_interface_debug_print("w25qxx: individual block lock failed.\n");
-
1030  (void)w25qxx_deinit(&gs_handle);
-
1031 
-
1032  return 1;
-
1033  }
-
1034  w25qxx_interface_debug_print("w25qxx: check individual block lock %s.\n", res == 0 ? "ok" : "error");
-
1035 
-
1036  /* w25qxx_individual_block_unlock test */
-
1037  w25qxx_interface_debug_print("w25qxx: w25qxx_individual_block_unlock test.\n");
-
1038 
-
1039  /* individual block unlock */
-
1040  res = w25qxx_individual_block_unlock(&gs_handle, 0x00000000);
-
1041  if (res != 0)
-
1042  {
-
1043  w25qxx_interface_debug_print("w25qxx: individual block unlock failed.\n");
-
1044  (void)w25qxx_deinit(&gs_handle);
-
1045 
-
1046  return 1;
-
1047  }
-
1048  w25qxx_interface_debug_print("w25qxx: check individual block unlock %s.\n", res == 0 ? "ok" : "error");
-
1049 
-
1050  /* w25qxx_read_block_lock test */
-
1051  w25qxx_interface_debug_print("w25qxx: w25qxx_read_block_lock test.\n");
-
1052 
-
1053  res = w25qxx_read_block_lock(&gs_handle, 0x00000000, (uint8_t *)&status);
-
1054  if (res != 0)
-
1055  {
-
1056  w25qxx_interface_debug_print("w25qxx: read block lock failed.\n");
-
1057  (void)w25qxx_deinit(&gs_handle);
-
1058 
-
1059  return 1;
-
1060  }
-
1061  w25qxx_interface_debug_print("w25qxx: check read block lock %s with %d.\n", res == 0 ? "ok" : "error", status);
-
1062 
-
1063  /* set address mode 3 byte */
-
1064  w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
-
1065 
-
1066  /* set address mode 3 byte */
-
1067  res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
-
1068  if (res != 0)
-
1069  {
-
1070  w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
1071  (void)w25qxx_deinit(&gs_handle);
-
1072 
-
1073  return 1;
-
1074  }
-
1075  }
-
1076 
-
1077  if (dual_quad_spi_enable != 0)
-
1078  {
-
1079  /* enter to spi mode */
-
1080  w25qxx_interface_debug_print("w25qxx: enter to spi mode.\n");
-
1081 
-
1082  /* exit qspi */
-
1083  res = w25qxx_exit_qspi_mode(&gs_handle);
-
1084  if (res != 0)
-
1085  {
-
1086  w25qxx_interface_debug_print("w25qxx: exit qspi mode failed.\n");
-
1087  (void)w25qxx_deinit(&gs_handle);
-
1088 
-
1089  return 1;
-
1090  }
-
1091 
-
1092  /* set chip interface spi */
-
1093  res = w25qxx_set_interface(&gs_handle, W25QXX_INTERFACE_SPI);
-
1094  if (res != 0)
-
1095  {
-
1096  w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
-
1097 
-
1098  return 1;
-
1099  }
-
1100 
-
1101  /* w25qxx_get_manufacturer_device_id_dual_io test */
-
1102  w25qxx_interface_debug_print("w25qxx: w25qxx_get_manufacturer_device_id_dual_io test.\n");
-
1103 
-
1104  /* get manufacturer device id dual io */
-
1105  res = w25qxx_get_manufacturer_device_id_dual_io(&gs_handle, (uint8_t *)&manufacturer, (uint8_t *)device_id);
-
1106  if (res != 0)
-
1107  {
-
1108  w25qxx_interface_debug_print("w25qxx: get manufacturer device id dual io failed.\n");
-
1109  (void)w25qxx_deinit(&gs_handle);
-
1110 
-
1111  return 1;
-
1112  }
-
1113  w25qxx_interface_debug_print("w25qxx: manufacturer is 0x%02X, device id is 0x%02X.\n", manufacturer, device_id[0]);
-
1114 
-
1115  /* w25qxx_get_manufacturer_device_id_quad_io test */
-
1116  w25qxx_interface_debug_print("w25qxx: w25qxx_get_manufacturer_device_id_quad_io test.\n");
-
1117 
-
1118  /* get manufacturer device id quad io */
-
1119  res = w25qxx_get_manufacturer_device_id_quad_io(&gs_handle, (uint8_t *)&manufacturer, (uint8_t *)device_id);
-
1120  if (res != 0)
-
1121  {
-
1122  w25qxx_interface_debug_print("w25qxx: get manufacturer device id quad io failed.\n");
-
1123  (void)w25qxx_deinit(&gs_handle);
-
1124 
-
1125  return 1;
-
1126  }
-
1127  w25qxx_interface_debug_print("w25qxx: manufacturer is 0x%02X, device id is 0x%02X.\n", manufacturer, device_id[0]);
-
1128 
-
1129  if (type >= W25Q256)
-
1130  {
-
1131  /* set address mode 4 byte */
-
1132  w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
-
1133 
-
1134  /* set address mode 4 byte */
-
1135  res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
-
1136  if (res != 0)
-
1137  {
-
1138  w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
1139  (void)w25qxx_deinit(&gs_handle);
-
1140 
-
1141  return 1;
-
1142  }
-
1143 
-
1144  /* w25qxx_get_manufacturer_device_id_dual_io test */
-
1145  w25qxx_interface_debug_print("w25qxx: w25qxx_get_manufacturer_device_id_dual_io test.\n");
-
1146 
-
1147  /* get manufacturer device id dual io */
-
1148  res = w25qxx_get_manufacturer_device_id_dual_io(&gs_handle, (uint8_t *)&manufacturer, (uint8_t *)device_id);
-
1149  if (res != 0)
-
1150  {
-
1151  w25qxx_interface_debug_print("w25qxx: get manufacturer device id dual io failed.\n");
-
1152  (void)w25qxx_deinit(&gs_handle);
-
1153 
-
1154  return 1;
-
1155  }
-
1156  w25qxx_interface_debug_print("w25qxx: manufacturer is 0x%02X, device id is 0x%02X.\n", manufacturer, device_id[0]);
-
1157 
-
1158  /* w25qxx_get_manufacturer_device_id_quad_io test */
-
1159  w25qxx_interface_debug_print("w25qxx: w25qxx_get_manufacturer_device_id_quad_io test.\n");
-
1160 
-
1161  /* get manufacturer device id quad io */
-
1162  res = w25qxx_get_manufacturer_device_id_quad_io(&gs_handle, (uint8_t *)&manufacturer, (uint8_t *)device_id);
-
1163  if (res != 0)
-
1164  {
-
1165  w25qxx_interface_debug_print("w25qxx: get manufacturer device id quad io failed.\n");
-
1166  (void)w25qxx_deinit(&gs_handle);
-
1167 
-
1168  return 1;
-
1169  }
-
1170  w25qxx_interface_debug_print("w25qxx: manufacturer is 0x%02X, device id is 0x%02X.\n", manufacturer, device_id[0]);
-
1171 
-
1172  /* set address mode 3 byte */
-
1173  w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
-
1174 
-
1175  /* set address mode 3 byte */
-
1176  res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
-
1177  if (res != 0)
-
1178  {
-
1179  w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
1180  (void)w25qxx_deinit(&gs_handle);
-
1181 
-
1182  return 1;
-
1183  }
-
1184  }
-
1185 
-
1186  /* enter to qspi mode */
-
1187  w25qxx_interface_debug_print("w25qxx: enter to qspi mode.\n");
-
1188 
-
1189  /* enter qspi */
-
1190  res = w25qxx_enter_qspi_mode(&gs_handle);
-
1191  if (res != 0)
-
1192  {
-
1193  w25qxx_interface_debug_print("w25qxx: enter qspi mode failed.\n");
-
1194  (void)w25qxx_deinit(&gs_handle);
-
1195 
-
1196  return 1;
-
1197  }
-
1198 
-
1199  /* set chip interface spi */
-
1200  res = w25qxx_set_interface(&gs_handle, W25QXX_INTERFACE_QSPI);
-
1201  if (res != 0)
-
1202  {
-
1203  w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
-
1204 
-
1205  return 1;
-
1206  }
-
1207  }
-
1208  }
-
1209 
-
1210  /* finish read test */
-
1211  w25qxx_interface_debug_print("w25qxx: finish register test.\n");
-
1212  (void)w25qxx_deinit(&gs_handle);
-
1213 
-
1214  return 0;
-
1215 }
+Go to the documentation of this file.
1
+
37#include "driver_w25qxx_register_test.h"
+
38
+
39static w25qxx_handle_t gs_handle;
+
+
51uint8_t w25qxx_register_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
+
52{
+
53 uint8_t res;
+
54 uint8_t status;
+
55 uint8_t manufacturer;
+
56 uint8_t device_id[2];
+
57 uint8_t id[8];
+
58 w25qxx_info_t info;
+
59 w25qxx_type_t type_check;
+
60 w25qxx_interface_t interface_check;
+
61
+
62 /* link interface function */
+
63 DRIVER_W25QXX_LINK_INIT(&gs_handle, w25qxx_handle_t);
+
64 DRIVER_W25QXX_LINK_SPI_QSPI_INIT(&gs_handle, w25qxx_interface_spi_qspi_init);
+
65 DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(&gs_handle, w25qxx_interface_spi_qspi_deinit);
+
66 DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(&gs_handle, w25qxx_interface_spi_qspi_write_read);
+
67 DRIVER_W25QXX_LINK_DELAY_MS(&gs_handle, w25qxx_interface_delay_ms);
+
68 DRIVER_W25QXX_LINK_DELAY_US(&gs_handle, w25qxx_interface_delay_us);
+
69 DRIVER_W25QXX_LINK_DEBUG_PRINT(&gs_handle, w25qxx_interface_debug_print);
+
70
+
71 /* get information */
+
72 res = w25qxx_info(&info);
+
73 if (res != 0)
+
74 {
+
75 w25qxx_interface_debug_print("w25qxx: get info failed.\n");
+
76
+
77 return 1;
+
78 }
+
79 else
+
80 {
+
81 /* print chip information */
+
82 w25qxx_interface_debug_print("w25qxx: chip is %s.\n", info.chip_name);
+
83 w25qxx_interface_debug_print("w25qxx: manufacturer is %s.\n", info.manufacturer_name);
+
84 w25qxx_interface_debug_print("w25qxx: interface is %s.\n", info.interface);
+
85 w25qxx_interface_debug_print("w25qxx: driver version is %d.%d.\n", info.driver_version / 1000, (info.driver_version % 1000) / 100);
+
86 w25qxx_interface_debug_print("w25qxx: min supply voltage is %0.1fV.\n", info.supply_voltage_min_v);
+
87 w25qxx_interface_debug_print("w25qxx: max supply voltage is %0.1fV.\n", info.supply_voltage_max_v);
+
88 w25qxx_interface_debug_print("w25qxx: max current is %0.2fmA.\n", info.max_current_ma);
+
89 w25qxx_interface_debug_print("w25qxx: max temperature is %0.1fC.\n", info.temperature_max);
+
90 w25qxx_interface_debug_print("w25qxx: min temperature is %0.1fC.\n", info.temperature_min);
+
91 }
+
92
+
93 /* start read test */
+
94 w25qxx_interface_debug_print("w25qxx: start register test.\n");
+
95
+
96 /* w25qxx_set_type/w25qxx_get_type test */
+
97 w25qxx_interface_debug_print("w25qxx: w25qxx_set_type/w25qxx_get_type test.\n");
+
98
+
99 /* set type w25q80 */
+
100 res = w25qxx_set_type(&gs_handle, W25Q80);
+
101 if (res != 0)
+
102 {
+
103 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
104
+
105 return 1;
+
106 }
+
107 w25qxx_interface_debug_print("w25qxx: set type W25Q80.\n");
+
108
+
109 /* get type */
+
110 res = w25qxx_get_type(&gs_handle, &type_check);
+
111 if (res != 0)
+
112 {
+
113 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
114
+
115 return 1;
+
116 }
+
117 w25qxx_interface_debug_print("w25qxx: check chip type %s.\n", type_check == W25Q80 ? "ok" : "error");
+
118
+
119 /* set type w25q16 */
+
120 res = w25qxx_set_type(&gs_handle, W25Q16);
+
121 if (res != 0)
+
122 {
+
123 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
124
+
125 return 1;
+
126 }
+
127 w25qxx_interface_debug_print("w25qxx: set type W25Q16.\n");
+
128
+
129 /* get type */
+
130 res = w25qxx_get_type(&gs_handle, &type_check);
+
131 if (res != 0)
+
132 {
+
133 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
134
+
135 return 1;
+
136 }
+
137 w25qxx_interface_debug_print("w25qxx: check chip type %s.\n", type_check == W25Q16 ? "ok" : "error");
+
138
+
139 /* set type w25q32 */
+
140 res = w25qxx_set_type(&gs_handle, W25Q32);
+
141 if (res != 0)
+
142 {
+
143 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
144
+
145 return 1;
+
146 }
+
147 w25qxx_interface_debug_print("w25qxx: set type W25Q32.\n");
+
148
+
149 /* get type */
+
150 res = w25qxx_get_type(&gs_handle, &type_check);
+
151 if (res != 0)
+
152 {
+
153 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
154
+
155 return 1;
+
156 }
+
157 w25qxx_interface_debug_print("w25qxx: check chip type %s.\n", type_check == W25Q32 ? "ok" : "error");
+
158
+
159 /* set type w25q64 */
+
160 res = w25qxx_set_type(&gs_handle, W25Q64);
+
161 if (res != 0)
+
162 {
+
163 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
164
+
165 return 1;
+
166 }
+
167 w25qxx_interface_debug_print("w25qxx: set type W25Q64.\n");
+
168
+
169 /* get type */
+
170 res = w25qxx_get_type(&gs_handle, &type_check);
+
171 if (res != 0)
+
172 {
+
173 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
174
+
175 return 1;
+
176 }
+
177 w25qxx_interface_debug_print("w25qxx: check chip type %s.\n", type_check == W25Q64 ? "ok" : "error");
+
178
+
179 /* set type w25q128 */
+
180 res = w25qxx_set_type(&gs_handle, W25Q128);
+
181 if (res != 0)
+
182 {
+
183 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
184
+
185 return 1;
+
186 }
+
187 w25qxx_interface_debug_print("w25qxx: set type W25Q128.\n");
+
188
+
189 /* get type */
+
190 res = w25qxx_get_type(&gs_handle, &type_check);
+
191 if (res != 0)
+
192 {
+
193 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
194
+
195 return 1;
+
196 }
+
197 w25qxx_interface_debug_print("w25qxx: check chip type %s.\n", type_check == W25Q128 ? "ok" : "error");
+
198
+
199 /* set type w25q256 */
+
200 res = w25qxx_set_type(&gs_handle, W25Q256);
+
201 if (res != 0)
+
202 {
+
203 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
204
+
205 return 1;
+
206 }
+
207 w25qxx_interface_debug_print("w25qxx: set type W25Q256.\n");
+
208
+
209 /* get type */
+
210 res = w25qxx_get_type(&gs_handle, &type_check);
+
211 if (res != 0)
+
212 {
+
213 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
214
+
215 return 1;
+
216 }
+
217 w25qxx_interface_debug_print("w25qxx: check chip type %s.\n", type_check == W25Q256 ? "ok" : "error");
+
218
+
219 /* w25qxx_set_interface/w25qxx_get_interface test */
+
220 w25qxx_interface_debug_print("w25qxx: w25qxx_set_interface/w25qxx_get_interface test.\n");
+
221
+
222 /* set chip interface spi */
+
223 res = w25qxx_set_interface(&gs_handle, W25QXX_INTERFACE_SPI);
+
224 if (res != 0)
+
225 {
+
226 w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
+
227
+
228 return 1;
+
229 }
+
230 w25qxx_interface_debug_print("w25qxx: set interface SPI.\n");
+
231
+
232 /* get interface */
+
233 res = w25qxx_get_interface(&gs_handle, &interface_check);
+
234 if (res != 0)
+
235 {
+
236 w25qxx_interface_debug_print("w25qxx: get interface failed.\n");
+
237
+
238 return 1;
+
239 }
+
240 w25qxx_interface_debug_print("w25qxx: check chip interface %s.\n", interface_check == W25QXX_INTERFACE_SPI ? "ok" : "error");
+
241
+
242 /* set chip interface qspi */
+
243 res = w25qxx_set_interface(&gs_handle, W25QXX_INTERFACE_QSPI);
+
244 if (res != 0)
+
245 {
+
246 w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
+
247
+
248 return 1;
+
249 }
+
250 w25qxx_interface_debug_print("w25qxx: set interface QSPI.\n");
+
251
+
252 /* get interface */
+
253 res = w25qxx_get_interface(&gs_handle, &interface_check);
+
254 if (res != 0)
+
255 {
+
256 w25qxx_interface_debug_print("w25qxx: get interface failed.\n");
+
257
+
258 return 1;
+
259 }
+
260 w25qxx_interface_debug_print("w25qxx: check chip interface %s.\n", interface_check == W25QXX_INTERFACE_QSPI ? "ok" : "error");
+
261
+
262 /* set chip type */
+
263 res = w25qxx_set_type(&gs_handle, type);
+
264 if (res != 0)
+
265 {
+
266 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
267
+
268 return 1;
+
269 }
+
270
+
271 /* set chip interface */
+
272 res = w25qxx_set_interface(&gs_handle, interface);
+
273 if (res != 0)
+
274 {
+
275 w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
+
276
+
277 return 1;
+
278 }
+
279
+
280 /* set dual quad spi */
+
281 res = w25qxx_set_dual_quad_spi(&gs_handle, dual_quad_spi_enable);
+
282 if (res != 0)
+
283 {
+
284 w25qxx_interface_debug_print("w25qxx: set dual quad spi failed.\n");
+
285 (void)w25qxx_deinit(&gs_handle);
+
286
+
287 return 1;
+
288 }
+
289
+
290 /* chip init */
+
291 res = w25qxx_init(&gs_handle);
+
292 if (res != 0)
+
293 {
+
294 w25qxx_interface_debug_print("w25qxx: init failed.\n");
+
295
+
296 return 1;
+
297 }
+
298
+
299 if (interface == W25QXX_INTERFACE_SPI)
+
300 {
+
301 /* w25qxx_get_manufacturer_device_id test */
+
302 w25qxx_interface_debug_print("w25qxx: w25qxx_get_manufacturer_device_id test.\n");
+
303
+
304 /* get manufacturer device id */
+
305 res = w25qxx_get_manufacturer_device_id(&gs_handle, (uint8_t *)&manufacturer, (uint8_t *)device_id);
+
306 if (res != 0)
+
307 {
+
308 w25qxx_interface_debug_print("w25qxx: get manufacturer device id failed.\n");
+
309 (void)w25qxx_deinit(&gs_handle);
+
310
+
311 return 1;
+
312 }
+
313 w25qxx_interface_debug_print("w25qxx: manufacturer is 0x%02X, device id is 0x%02X.\n", manufacturer, device_id[0]);
+
314
+
315 /* w25qxx_get_jedec_id test */
+
316 w25qxx_interface_debug_print("w25qxx: w25qxx_get_jedec_id test.\n");
+
317
+
318 /* get jedec id */
+
319 res = w25qxx_get_jedec_id(&gs_handle, (uint8_t *)&manufacturer, (uint8_t *)device_id);
+
320 if (res != 0)
+
321 {
+
322 w25qxx_interface_debug_print("w25qxx: get jedec id failed.\n");
+
323 (void)w25qxx_deinit(&gs_handle);
+
324
+
325 return 1;
+
326 }
+
327 w25qxx_interface_debug_print("w25qxx: manufacturer is 0x%02X, device id is 0x%02X 0x%02X.\n", manufacturer,
+
328 device_id[0], device_id[1]);
+
329
+
330 /* w25qxx_get_unique_id test */
+
331 w25qxx_interface_debug_print("w25qxx: w25qxx_get_unique_id test.\n");
+
332
+
333 /* get unique id */
+
334 res = w25qxx_get_unique_id(&gs_handle, (uint8_t *)id);
+
335 if (res != 0)
+
336 {
+
337 w25qxx_interface_debug_print("w25qxx: get unique id failed.\n");
+
338 (void)w25qxx_deinit(&gs_handle);
+
339
+
340 return 1;
+
341 }
+
342 w25qxx_interface_debug_print("w25qxx: unique id 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X.\n",
+
343 id[0], id[1], id[2], id[3], id[4], id[5], id[6], id[7]);
+
344
+
345 /* w25qxx_set_status1/w25qxx_get_status1 test */
+
346 w25qxx_interface_debug_print("w25qxx: w25qxx_set_status1/w25qxx_get_status1 test.\n");
+
347
+
348 /* set status1 */
+
349 res = w25qxx_set_status1(&gs_handle, 0x00);
+
350 if (res != 0)
+
351 {
+
352 w25qxx_interface_debug_print("w25qxx: set status1 failed.\n");
+
353 (void)w25qxx_deinit(&gs_handle);
+
354
+
355 return 1;
+
356 }
+
357
+
358 /* get status1 */
+
359 res = w25qxx_get_status1(&gs_handle, (uint8_t *)&status);
+
360 if (res != 0)
+
361 {
+
362 w25qxx_interface_debug_print("w25qxx: get status1 failed.\n");
+
363 (void)w25qxx_deinit(&gs_handle);
+
364
+
365 return 1;
+
366 }
+
367 w25qxx_interface_debug_print("w25qxx: status1 is 0x%02X.\n", status);
+
368
+
369 /* w25qxx_set_status2/w25qxx_get_status2 test */
+
370 w25qxx_interface_debug_print("w25qxx: w25qxx_set_status2/w25qxx_get_status2 test.\n");
+
371
+
372 /* set status2 */
+
373 res = w25qxx_set_status2(&gs_handle, 0x02);
+
374 if (res != 0)
+
375 {
+
376 w25qxx_interface_debug_print("w25qxx: set status2 failed.\n");
+
377 (void)w25qxx_deinit(&gs_handle);
+
378
+
379 return 1;
+
380 }
+
381
+
382 /* get status2 */
+
383 res = w25qxx_get_status2(&gs_handle, (uint8_t *)&status);
+
384 if (res != 0)
+
385 {
+
386 w25qxx_interface_debug_print("w25qxx: get status2 failed.\n");
+
387 (void)w25qxx_deinit(&gs_handle);
+
388
+
389 return 1;
+
390 }
+
391 w25qxx_interface_debug_print("w25qxx: status2 is 0x%02X.\n", status);
+
392
+
393 /* w25qxx_set_status3/w25qxx_get_status3 test */
+
394 w25qxx_interface_debug_print("w25qxx: w25qxx_set_status3/w25qxx_get_status3 test.\n");
+
395
+
396 /* set status3 */
+
397 res = w25qxx_set_status3(&gs_handle, 0x60);
+
398 if (res != 0)
+
399 {
+
400 w25qxx_interface_debug_print("w25qxx: set status3 failed.\n");
+
401 (void)w25qxx_deinit(&gs_handle);
+
402
+
403 return 1;
+
404 }
+
405
+
406 /* get status3 */
+
407 res = w25qxx_get_status3(&gs_handle, (uint8_t *)&status);
+
408 if (res != 0)
+
409 {
+
410 w25qxx_interface_debug_print("w25qxx: get status3 failed.\n");
+
411 (void)w25qxx_deinit(&gs_handle);
+
412
+
413 return 1;
+
414 }
+
415 w25qxx_interface_debug_print("w25qxx: status3 is 0x%02X.\n", status);
+
416
+
417 /* w25qxx_enable_write test */
+
418 w25qxx_interface_debug_print("w25qxx: w25qxx_enable_write test.\n");
+
419
+
420 /* enable write */
+
421 res = w25qxx_enable_write(&gs_handle);
+
422 if (res != 0)
+
423 {
+
424 w25qxx_interface_debug_print("w25qxx: enable write failed.\n");
+
425 (void)w25qxx_deinit(&gs_handle);
+
426
+
427 return 1;
+
428 }
+
429 w25qxx_interface_debug_print("w25qxx: check enable write %s.\n", res == 0 ? "ok" : "error");
+
430
+
431 /* w25qxx_disable_write test */
+
432 w25qxx_interface_debug_print("w25qxx: w25qxx_disable_write test.\n");
+
433
+
434 /* disable write */
+
435 res = w25qxx_disable_write(&gs_handle);
+
436 if (res != 0)
+
437 {
+
438 w25qxx_interface_debug_print("w25qxx: disable write failed.\n");
+
439 (void)w25qxx_deinit(&gs_handle);
+
440
+
441 return 1;
+
442 }
+
443 w25qxx_interface_debug_print("w25qxx: check disable write %s.\n", res == 0 ? "ok" : "error");
+
444
+
445 /* w25qxx_enable_write test */
+
446 w25qxx_interface_debug_print("w25qxx: w25qxx_enable_write test.\n");
+
447
+
448 /* enable sr write */
+
449 res = w25qxx_enable_volatile_sr_write(&gs_handle);
+
450 if (res != 0)
+
451 {
+
452 w25qxx_interface_debug_print("w25qxx: enable sr write failed.\n");
+
453 (void)w25qxx_deinit(&gs_handle);
+
454
+
455 return 1;
+
456 }
+
457 w25qxx_interface_debug_print("w25qxx: check enable sr write %s.\n", res == 0 ? "ok" : "error");
+
458
+
459 /* w25qxx_erase_program_suspend test */
+
460 w25qxx_interface_debug_print("w25qxx: w25qxx_erase_program_suspend test.\n");
+
461
+
462 /* erase program suspend */
+
463 res = w25qxx_erase_program_suspend(&gs_handle);
+
464 if (res != 0)
+
465 {
+
466 w25qxx_interface_debug_print("w25qxx: erase program suspend failed.\n");
+
467 (void)w25qxx_deinit(&gs_handle);
+
468
+
469 return 1;
+
470 }
+
471 w25qxx_interface_debug_print("w25qxx: check erase program suspend %s.\n", res == 0 ? "ok" : "error");
+
472
+
473 /* w25qxx_erase_program_suspend test */
+
474 w25qxx_interface_debug_print("w25qxx: w25qxx_erase_program_suspend test.\n");
+
475
+
476 /* erase program resume */
+
477 res = w25qxx_erase_program_resume(&gs_handle);
+
478 if (res != 0)
+
479 {
+
480 w25qxx_interface_debug_print("w25qxx: erase program resume failed.\n");
+
481 (void)w25qxx_deinit(&gs_handle);
+
482
+
483 return 1;
+
484 }
+
485 w25qxx_interface_debug_print("w25qxx: check erase program resume %s.\n", res == 0 ? "ok" : "error");
+
486
+
487 /* w25qxx_global_block_lock test */
+
488 w25qxx_interface_debug_print("w25qxx: w25qxx_global_block_lock test.\n");
+
489
+
490 /* global block lock */
+
491 res = w25qxx_global_block_lock(&gs_handle);
+
492 if (res != 0)
+
493 {
+
494 w25qxx_interface_debug_print("w25qxx: global block lock failed.\n");
+
495 (void)w25qxx_deinit(&gs_handle);
+
496
+
497 return 1;
+
498 }
+
499 w25qxx_interface_debug_print("w25qxx: check global block lock %s.\n", res == 0 ? "ok" : "error");
+
500
+
501 /* w25qxx_global_block_unlock test */
+
502 w25qxx_interface_debug_print("w25qxx: w25qxx_global_block_unlock test.\n");
+
503
+
504 /* global block unlock */
+
505 res = w25qxx_global_block_unlock(&gs_handle);
+
506 if (res != 0)
+
507 {
+
508 w25qxx_interface_debug_print("w25qxx: global block unlock failed.\n");
+
509 (void)w25qxx_deinit(&gs_handle);
+
510
+
511 return 1;
+
512 }
+
513 w25qxx_interface_debug_print("w25qxx: check global block unlock %s.\n", res == 0 ? "ok" : "error");
+
514
+
515 /* w25qxx_individual_block_lock test */
+
516 w25qxx_interface_debug_print("w25qxx: w25qxx_individual_block_lock test.\n");
+
517
+
518 /* individual block lock */
+
519 res = w25qxx_individual_block_lock(&gs_handle, 0x00000000);
+
520 if (res != 0)
+
521 {
+
522 w25qxx_interface_debug_print("w25qxx: individual block lock failed.\n");
+
523 (void)w25qxx_deinit(&gs_handle);
+
524
+
525 return 1;
+
526 }
+
527 w25qxx_interface_debug_print("w25qxx: check individual block lock %s.\n", res == 0 ? "ok" : "error");
+
528
+
529 /* w25qxx_read_block_lock test */
+
530 w25qxx_interface_debug_print("w25qxx: w25qxx_read_block_lock test.\n");
+
531
+
532 res = w25qxx_read_block_lock(&gs_handle, 0x00000000, (uint8_t *)&status);
+
533 if (res != 0)
+
534 {
+
535 w25qxx_interface_debug_print("w25qxx: read block lock failed.\n");
+
536 (void)w25qxx_deinit(&gs_handle);
+
537
+
538 return 1;
+
539 }
+
540 w25qxx_interface_debug_print("w25qxx: check read block lock %s with %d.\n", res == 0 ? "ok" : "error", status);
+
541
+
542 /* w25qxx_individual_block_unlock test */
+
543 w25qxx_interface_debug_print("w25qxx: w25qxx_individual_block_unlock test.\n");
+
544
+
545 /* individual block unlock */
+
546 res = w25qxx_individual_block_unlock(&gs_handle, 0x00000000);
+
547 if (res != 0)
+
548 {
+
549 w25qxx_interface_debug_print("w25qxx: individual block unlock failed.\n");
+
550 (void)w25qxx_deinit(&gs_handle);
+
551
+
552 return 1;
+
553 }
+
554 w25qxx_interface_debug_print("w25qxx: check individual block unlock %s.\n", res == 0 ? "ok" : "error");
+
555
+
556 /* w25qxx_set_burst_with_wrap test */
+
557 w25qxx_interface_debug_print("w25qxx: w25qxx_set_burst_with_wrap test.\n");
+
558
+
559 /* set burst with wrap */
+
560 res = w25qxx_set_burst_with_wrap(&gs_handle, W25QXX_BURST_WRAP_NONE);
+
561 if (res != 0)
+
562 {
+
563 w25qxx_interface_debug_print("w25qxx: set burst with wrap failed.\n");
+
564 (void)w25qxx_deinit(&gs_handle);
+
565
+
566 return 1;
+
567 }
+
568 w25qxx_interface_debug_print("w25qxx: check set burst with wrap %s.\n", res == 0 ? "ok" : "error");
+
569
+
570 /* w25qxx_power_down test */
+
571 w25qxx_interface_debug_print("w25qxx: w25qxx_power_down test.\n");
+
572
+
573 /* power down */
+
574 res = w25qxx_power_down(&gs_handle);
+
575 if (res != 0)
+
576 {
+
577 w25qxx_interface_debug_print("w25qxx: power down failed.\n");
+
578 (void)w25qxx_deinit(&gs_handle);
+
579
+
580 return 1;
+
581 }
+
582 w25qxx_interface_delay_ms(10);
+
583
+
584 /* w25qxx_release_power_down test */
+
585 w25qxx_interface_debug_print("w25qxx: w25qxx_release_power_down test.\n");
+
586
+
587 /* release power down */
+
588 res = w25qxx_release_power_down(&gs_handle);
+
589 if (res != 0)
+
590 {
+
591 w25qxx_interface_debug_print("w25qxx: release power down failed.\n");
+
592 (void)w25qxx_deinit(&gs_handle);
+
593
+
594 return 1;
+
595 }
+
596 w25qxx_interface_delay_ms(10);
+
597
+
598 /* w25qxx_enable_reset test */
+
599 w25qxx_interface_debug_print("w25qxx: w25qxx_enable_reset test.\n");
+
600
+
601 /* enable reset */
+
602 res = w25qxx_enable_reset(&gs_handle);
+
603 if (res != 0)
+
604 {
+
605 w25qxx_interface_debug_print("w25qxx: enable reset failed.\n");
+
606 (void)w25qxx_deinit(&gs_handle);
+
607
+
608 return 1;
+
609 }
+
610
+
611 /* w25qxx_reset_device test */
+
612 w25qxx_interface_debug_print("w25qxx: w25qxx_reset_device test.\n");
+
613
+
614 /* reset device */
+
615 res = w25qxx_reset_device(&gs_handle);
+
616 if (res != 0)
+
617 {
+
618 w25qxx_interface_debug_print("w25qxx: reset device failed.\n");
+
619 (void)w25qxx_deinit(&gs_handle);
+
620
+
621 return 1;
+
622 }
+
623 w25qxx_interface_delay_ms(10);
+
624
+
625 if (type >= W25Q256)
+
626 {
+
627 /* set address mode 4 byte */
+
628 w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
+
629
+
630 /* set address mode 4 byte */
+
631 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
+
632 if (res != 0)
+
633 {
+
634 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
635 (void)w25qxx_deinit(&gs_handle);
+
636
+
637 return 1;
+
638 }
+
639
+
640 /* w25qxx_get_unique_id test */
+
641 w25qxx_interface_debug_print("w25qxx: w25qxx_get_unique_id test.\n");
+
642
+
643 /* get unique id */
+
644 res = w25qxx_get_unique_id(&gs_handle, (uint8_t *)id);
+
645 if (res != 0)
+
646 {
+
647 w25qxx_interface_debug_print("w25qxx: get unique id failed.\n");
+
648 (void)w25qxx_deinit(&gs_handle);
+
649
+
650 return 1;
+
651 }
+
652 w25qxx_interface_debug_print("w25qxx: unique id 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X.\n",
+
653 id[0], id[1], id[2], id[3], id[4], id[5], id[6], id[7]);
+
654
+
655 /* w25qxx_individual_block_lock test */
+
656 w25qxx_interface_debug_print("w25qxx: w25qxx_individual_block_lock test.\n");
+
657
+
658 /* individual block lock */
+
659 res = w25qxx_individual_block_lock(&gs_handle, 0x00000000);
+
660 if (res != 0)
+
661 {
+
662 w25qxx_interface_debug_print("w25qxx: individual block lock failed.\n");
+
663 (void)w25qxx_deinit(&gs_handle);
+
664
+
665 return 1;
+
666 }
+
667 w25qxx_interface_debug_print("w25qxx: check individual block lock %s.\n", res == 0 ? "ok" : "error");
+
668
+
669 /* w25qxx_read_block_lock test */
+
670 w25qxx_interface_debug_print("w25qxx: w25qxx_read_block_lock test.\n");
+
671
+
672 res = w25qxx_read_block_lock(&gs_handle, 0x00000000, (uint8_t *)&status);
+
673 if (res != 0)
+
674 {
+
675 w25qxx_interface_debug_print("w25qxx: read block lock failed.\n");
+
676 (void)w25qxx_deinit(&gs_handle);
+
677
+
678 return 1;
+
679 }
+
680 w25qxx_interface_debug_print("w25qxx: check read block lock %s with %d.\n", res == 0 ? "ok" : "error", status);
+
681
+
682 /* w25qxx_individual_block_unlock test */
+
683 w25qxx_interface_debug_print("w25qxx: w25qxx_individual_block_unlock test.\n");
+
684
+
685 /* individual block unlock */
+
686 res = w25qxx_individual_block_unlock(&gs_handle, 0x00000000);
+
687 if (res != 0)
+
688 {
+
689 w25qxx_interface_debug_print("w25qxx: individual block unlock failed.\n");
+
690 (void)w25qxx_deinit(&gs_handle);
+
691
+
692 return 1;
+
693 }
+
694 w25qxx_interface_debug_print("w25qxx: check individual block unlock %s.\n", res == 0 ? "ok" : "error");
+
695
+
696 /* set address mode 3 byte */
+
697 w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
+
698
+
699 /* set address mode 3 byte */
+
700 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
+
701 if (res != 0)
+
702 {
+
703 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
704 (void)w25qxx_deinit(&gs_handle);
+
705
+
706 return 1;
+
707 }
+
708 }
+
709 }
+
710 else
+
711 {
+
712 /* w25qxx_get_manufacturer_device_id test */
+
713 w25qxx_interface_debug_print("w25qxx: w25qxx_get_manufacturer_device_id test.\n");
+
714
+
715 /* get manufacturer device id */
+
716 res = w25qxx_get_manufacturer_device_id(&gs_handle, (uint8_t *)&manufacturer, (uint8_t *)device_id);
+
717 if (res != 0)
+
718 {
+
719 w25qxx_interface_debug_print("w25qxx: get manufacturer device id failed.\n");
+
720 (void)w25qxx_deinit(&gs_handle);
+
721
+
722 return 1;
+
723 }
+
724 w25qxx_interface_debug_print("w25qxx: manufacturer is 0x%02X, device id is 0x%02X.\n", manufacturer, device_id[0]);
+
725
+
726 /* w25qxx_get_jedec_id test */
+
727 w25qxx_interface_debug_print("w25qxx: w25qxx_get_jedec_id test.\n");
+
728
+
729 /* get jedec id */
+
730 res = w25qxx_get_jedec_id(&gs_handle, (uint8_t *)&manufacturer, (uint8_t *)device_id);
+
731 if (res != 0)
+
732 {
+
733 w25qxx_interface_debug_print("w25qxx: get jedec id failed.\n");
+
734 (void)w25qxx_deinit(&gs_handle);
+
735
+
736 return 1;
+
737 }
+
738 w25qxx_interface_debug_print("w25qxx: manufacturer is 0x%02X, device id is 0x%02X 0x%02X.\n", manufacturer,
+
739 device_id[0], device_id[1]);
+
740
+
741 /* w25qxx_set_status1/w25qxx_get_status1 test */
+
742 w25qxx_interface_debug_print("w25qxx: w25qxx_set_status1/w25qxx_get_status1 test.\n");
+
743
+
744 /* set status1 */
+
745 res = w25qxx_set_status1(&gs_handle, 0x00);
+
746 if (res != 0)
+
747 {
+
748 w25qxx_interface_debug_print("w25qxx: set status1 failed.\n");
+
749 (void)w25qxx_deinit(&gs_handle);
+
750
+
751 return 1;
+
752 }
+
753
+
754 /* get status1 */
+
755 res = w25qxx_get_status1(&gs_handle, (uint8_t *)&status);
+
756 if (res != 0)
+
757 {
+
758 w25qxx_interface_debug_print("w25qxx: get status1 failed.\n");
+
759 (void)w25qxx_deinit(&gs_handle);
+
760
+
761 return 1;
+
762 }
+
763 w25qxx_interface_debug_print("w25qxx: status1 is 0x%02X.\n", status);
+
764
+
765 /* w25qxx_set_status2/w25qxx_get_status2 test */
+
766 w25qxx_interface_debug_print("w25qxx: w25qxx_set_status2/w25qxx_get_status2 test.\n");
+
767
+
768 /* set status2 */
+
769 res = w25qxx_set_status2(&gs_handle, 0x02);
+
770 if (res != 0)
+
771 {
+
772 w25qxx_interface_debug_print("w25qxx: set status2 failed.\n");
+
773 (void)w25qxx_deinit(&gs_handle);
+
774
+
775 return 1;
+
776 }
+
777
+
778 /* get status2 */
+
779 res = w25qxx_get_status2(&gs_handle, (uint8_t *)&status);
+
780 if (res != 0)
+
781 {
+
782 w25qxx_interface_debug_print("w25qxx: get status2 failed.\n");
+
783 (void)w25qxx_deinit(&gs_handle);
+
784
+
785 return 1;
+
786 }
+
787 w25qxx_interface_debug_print("w25qxx: status2 is 0x%02X.\n", status);
+
788
+
789 /* w25qxx_set_status3/w25qxx_get_status3 test */
+
790 w25qxx_interface_debug_print("w25qxx: w25qxx_set_status3/w25qxx_get_status3 test.\n");
+
791
+
792 /* set status3 */
+
793 res = w25qxx_set_status3(&gs_handle, 0x60);
+
794 if (res != 0)
+
795 {
+
796 w25qxx_interface_debug_print("w25qxx: set status3 failed.\n");
+
797 (void)w25qxx_deinit(&gs_handle);
+
798
+
799 return 1;
+
800 }
+
801
+
802 /* get status3 */
+
803 res = w25qxx_get_status3(&gs_handle, (uint8_t *)&status);
+
804 if (res != 0)
+
805 {
+
806 w25qxx_interface_debug_print("w25qxx: get status3 failed.\n");
+
807 (void)w25qxx_deinit(&gs_handle);
+
808
+
809 return 1;
+
810 }
+
811 w25qxx_interface_debug_print("w25qxx: status3 is 0x%02X.\n", status);
+
812
+
813 /* w25qxx_enable_write test */
+
814 w25qxx_interface_debug_print("w25qxx: w25qxx_enable_write test.\n");
+
815
+
816 /* enable write */
+
817 res = w25qxx_enable_write(&gs_handle);
+
818 if (res != 0)
+
819 {
+
820 w25qxx_interface_debug_print("w25qxx: enable write failed.\n");
+
821 (void)w25qxx_deinit(&gs_handle);
+
822
+
823 return 1;
+
824 }
+
825 w25qxx_interface_debug_print("w25qxx: check enable write %s.\n", res == 0 ? "ok" : "error");
+
826
+
827 /* w25qxx_disable_write test */
+
828 w25qxx_interface_debug_print("w25qxx: w25qxx_disable_write test.\n");
+
829
+
830 /* disable write */
+
831 res = w25qxx_disable_write(&gs_handle);
+
832 if (res != 0)
+
833 {
+
834 w25qxx_interface_debug_print("w25qxx: disable write failed.\n");
+
835 (void)w25qxx_deinit(&gs_handle);
+
836
+
837 return 1;
+
838 }
+
839 w25qxx_interface_debug_print("w25qxx: check disable write %s.\n", res == 0 ? "ok" : "error");
+
840
+
841 /* w25qxx_enable_write test */
+
842 w25qxx_interface_debug_print("w25qxx: w25qxx_enable_write test.\n");
+
843
+
844 /* enable sr write */
+
845 res = w25qxx_enable_volatile_sr_write(&gs_handle);
+
846 if (res != 0)
+
847 {
+
848 w25qxx_interface_debug_print("w25qxx: enable sr write failed.\n");
+
849 (void)w25qxx_deinit(&gs_handle);
+
850
+
851 return 1;
+
852 }
+
853 w25qxx_interface_debug_print("w25qxx: check enable sr write %s.\n", res == 0 ? "ok" : "error");
+
854
+
855 /* w25qxx_erase_program_suspend test */
+
856 w25qxx_interface_debug_print("w25qxx: w25qxx_erase_program_suspend test.\n");
+
857
+
858 /* erase program suspend */
+
859 res = w25qxx_erase_program_suspend(&gs_handle);
+
860 if (res != 0)
+
861 {
+
862 w25qxx_interface_debug_print("w25qxx: erase program suspend failed.\n");
+
863 (void)w25qxx_deinit(&gs_handle);
+
864
+
865 return 1;
+
866 }
+
867 w25qxx_interface_debug_print("w25qxx: check erase program suspend %s.\n", res == 0 ? "ok" : "error");
+
868
+
869 /* w25qxx_erase_program_suspend test */
+
870 w25qxx_interface_debug_print("w25qxx: w25qxx_erase_program_suspend test.\n");
+
871
+
872 /* erase program resume */
+
873 res = w25qxx_erase_program_resume(&gs_handle);
+
874 if (res != 0)
+
875 {
+
876 w25qxx_interface_debug_print("w25qxx: erase program resume failed.\n");
+
877 (void)w25qxx_deinit(&gs_handle);
+
878
+
879 return 1;
+
880 }
+
881 w25qxx_interface_debug_print("w25qxx: check erase program resume %s.\n", res == 0 ? "ok" : "error");
+
882
+
883 /* w25qxx_global_block_lock test */
+
884 w25qxx_interface_debug_print("w25qxx: w25qxx_global_block_lock test.\n");
+
885
+
886 /* global block lock */
+
887 res = w25qxx_global_block_lock(&gs_handle);
+
888 if (res != 0)
+
889 {
+
890 w25qxx_interface_debug_print("w25qxx: global block lock failed.\n");
+
891 (void)w25qxx_deinit(&gs_handle);
+
892
+
893 return 1;
+
894 }
+
895 w25qxx_interface_debug_print("w25qxx: check global block lock %s.\n", res == 0 ? "ok" : "error");
+
896
+
897 /* w25qxx_global_block_unlock test */
+
898 w25qxx_interface_debug_print("w25qxx: w25qxx_global_block_unlock test.\n");
+
899
+
900 /* global block unlock */
+
901 res = w25qxx_global_block_unlock(&gs_handle);
+
902 if (res != 0)
+
903 {
+
904 w25qxx_interface_debug_print("w25qxx: global block unlock failed.\n");
+
905 (void)w25qxx_deinit(&gs_handle);
+
906
+
907 return 1;
+
908 }
+
909 w25qxx_interface_debug_print("w25qxx: check global block unlock %s.\n", res == 0 ? "ok" : "error");
+
910
+
911 /* w25qxx_individual_block_lock test */
+
912 w25qxx_interface_debug_print("w25qxx: w25qxx_individual_block_lock test.\n");
+
913
+
914 /* individual block lock */
+
915 res = w25qxx_individual_block_lock(&gs_handle, 0x00000000);
+
916 if (res != 0)
+
917 {
+
918 w25qxx_interface_debug_print("w25qxx: individual block lock failed.\n");
+
919 (void)w25qxx_deinit(&gs_handle);
+
920
+
921 return 1;
+
922 }
+
923 w25qxx_interface_debug_print("w25qxx: check individual block lock %s.\n", res == 0 ? "ok" : "error");
+
924
+
925 /* w25qxx_read_block_lock test */
+
926 w25qxx_interface_debug_print("w25qxx: w25qxx_read_block_lock test.\n");
+
927
+
928 res = w25qxx_read_block_lock(&gs_handle, 0x00000000, (uint8_t *)&status);
+
929 if (res != 0)
+
930 {
+
931 w25qxx_interface_debug_print("w25qxx: read block lock failed.\n");
+
932 (void)w25qxx_deinit(&gs_handle);
+
933
+
934 return 1;
+
935 }
+
936 w25qxx_interface_debug_print("w25qxx: check read block lock %s with %d.\n", res == 0 ? "ok" : "error", status);
+
937
+
938 /* w25qxx_individual_block_unlock test */
+
939 w25qxx_interface_debug_print("w25qxx: w25qxx_individual_block_unlock test.\n");
+
940
+
941 /* individual block unlock */
+
942 res = w25qxx_individual_block_unlock(&gs_handle, 0x00000000);
+
943 if (res != 0)
+
944 {
+
945 w25qxx_interface_debug_print("w25qxx: individual block unlock failed.\n");
+
946 (void)w25qxx_deinit(&gs_handle);
+
947
+
948 return 1;
+
949 }
+
950 w25qxx_interface_debug_print("w25qxx: check individual block unlock %s.\n", res == 0 ? "ok" : "error");
+
951
+
952 /* w25qxx_power_down test */
+
953 w25qxx_interface_debug_print("w25qxx: w25qxx_power_down test.\n");
+
954
+
955 /* power down */
+
956 res = w25qxx_power_down(&gs_handle);
+
957 if (res != 0)
+
958 {
+
959 w25qxx_interface_debug_print("w25qxx: power down failed.\n");
+
960 (void)w25qxx_deinit(&gs_handle);
+
961
+
962 return 1;
+
963 }
+
964 w25qxx_interface_delay_ms(10);
+
965
+
966 /* w25qxx_release_power_down test */
+
967 w25qxx_interface_debug_print("w25qxx: w25qxx_release_power_down test.\n");
+
968
+
969 /* release power down */
+
970 res = w25qxx_release_power_down(&gs_handle);
+
971 if (res != 0)
+
972 {
+
973 w25qxx_interface_debug_print("w25qxx: release power down failed.\n");
+
974 (void)w25qxx_deinit(&gs_handle);
+
975
+
976 return 1;
+
977 }
+
978 w25qxx_interface_delay_ms(10);
+
979
+
980 /* w25qxx_enable_reset test */
+
981 w25qxx_interface_debug_print("w25qxx: w25qxx_enable_reset test.\n");
+
982
+
983 /* enable reset */
+
984 res = w25qxx_enable_reset(&gs_handle);
+
985 if (res != 0)
+
986 {
+
987 w25qxx_interface_debug_print("w25qxx: enable reset failed.\n");
+
988 (void)w25qxx_deinit(&gs_handle);
+
989
+
990 return 1;
+
991 }
+
992
+
993 /* w25qxx_reset_device test */
+
994 w25qxx_interface_debug_print("w25qxx: w25qxx_reset_device test.\n");
+
995
+
996 /* reset device */
+
997 res = w25qxx_reset_device(&gs_handle);
+
998 if (res != 0)
+
999 {
+
1000 w25qxx_interface_debug_print("w25qxx: reset device failed.\n");
+
1001 (void)w25qxx_deinit(&gs_handle);
+
1002
+
1003 return 1;
+
1004 }
+
1005 w25qxx_interface_delay_ms(10);
+
1006
+
1007 if (type >= W25Q256)
+
1008 {
+
1009 /* set address mode 4 byte */
+
1010 w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
+
1011
+
1012 /* set address mode 4 byte */
+
1013 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
+
1014 if (res != 0)
+
1015 {
+
1016 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
1017 (void)w25qxx_deinit(&gs_handle);
+
1018
+
1019 return 1;
+
1020 }
+
1021
+
1022 /* w25qxx_individual_block_lock test */
+
1023 w25qxx_interface_debug_print("w25qxx: w25qxx_individual_block_lock test.\n");
+
1024
+
1025 /* individual block lock */
+
1026 res = w25qxx_individual_block_lock(&gs_handle, 0x00000000);
+
1027 if (res != 0)
+
1028 {
+
1029 w25qxx_interface_debug_print("w25qxx: individual block lock failed.\n");
+
1030 (void)w25qxx_deinit(&gs_handle);
+
1031
+
1032 return 1;
+
1033 }
+
1034 w25qxx_interface_debug_print("w25qxx: check individual block lock %s.\n", res == 0 ? "ok" : "error");
+
1035
+
1036 /* w25qxx_individual_block_unlock test */
+
1037 w25qxx_interface_debug_print("w25qxx: w25qxx_individual_block_unlock test.\n");
+
1038
+
1039 /* individual block unlock */
+
1040 res = w25qxx_individual_block_unlock(&gs_handle, 0x00000000);
+
1041 if (res != 0)
+
1042 {
+
1043 w25qxx_interface_debug_print("w25qxx: individual block unlock failed.\n");
+
1044 (void)w25qxx_deinit(&gs_handle);
+
1045
+
1046 return 1;
+
1047 }
+
1048 w25qxx_interface_debug_print("w25qxx: check individual block unlock %s.\n", res == 0 ? "ok" : "error");
+
1049
+
1050 /* w25qxx_read_block_lock test */
+
1051 w25qxx_interface_debug_print("w25qxx: w25qxx_read_block_lock test.\n");
+
1052
+
1053 res = w25qxx_read_block_lock(&gs_handle, 0x00000000, (uint8_t *)&status);
+
1054 if (res != 0)
+
1055 {
+
1056 w25qxx_interface_debug_print("w25qxx: read block lock failed.\n");
+
1057 (void)w25qxx_deinit(&gs_handle);
+
1058
+
1059 return 1;
+
1060 }
+
1061 w25qxx_interface_debug_print("w25qxx: check read block lock %s with %d.\n", res == 0 ? "ok" : "error", status);
+
1062
+
1063 /* set address mode 3 byte */
+
1064 w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
+
1065
+
1066 /* set address mode 3 byte */
+
1067 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
+
1068 if (res != 0)
+
1069 {
+
1070 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
1071 (void)w25qxx_deinit(&gs_handle);
+
1072
+
1073 return 1;
+
1074 }
+
1075 }
+
1076
+
1077 if (dual_quad_spi_enable != 0)
+
1078 {
+
1079 /* enter to spi mode */
+
1080 w25qxx_interface_debug_print("w25qxx: enter to spi mode.\n");
+
1081
+
1082 /* exit qspi */
+
1083 res = w25qxx_exit_qspi_mode(&gs_handle);
+
1084 if (res != 0)
+
1085 {
+
1086 w25qxx_interface_debug_print("w25qxx: exit qspi mode failed.\n");
+
1087 (void)w25qxx_deinit(&gs_handle);
+
1088
+
1089 return 1;
+
1090 }
+
1091
+
1092 /* set chip interface spi */
+
1093 res = w25qxx_set_interface(&gs_handle, W25QXX_INTERFACE_SPI);
+
1094 if (res != 0)
+
1095 {
+
1096 w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
+
1097
+
1098 return 1;
+
1099 }
+
1100
+
1101 /* w25qxx_get_manufacturer_device_id_dual_io test */
+
1102 w25qxx_interface_debug_print("w25qxx: w25qxx_get_manufacturer_device_id_dual_io test.\n");
+
1103
+
1104 /* get manufacturer device id dual io */
+
1105 res = w25qxx_get_manufacturer_device_id_dual_io(&gs_handle, (uint8_t *)&manufacturer, (uint8_t *)device_id);
+
1106 if (res != 0)
+
1107 {
+
1108 w25qxx_interface_debug_print("w25qxx: get manufacturer device id dual io failed.\n");
+
1109 (void)w25qxx_deinit(&gs_handle);
+
1110
+
1111 return 1;
+
1112 }
+
1113 w25qxx_interface_debug_print("w25qxx: manufacturer is 0x%02X, device id is 0x%02X.\n", manufacturer, device_id[0]);
+
1114
+
1115 /* w25qxx_get_manufacturer_device_id_quad_io test */
+
1116 w25qxx_interface_debug_print("w25qxx: w25qxx_get_manufacturer_device_id_quad_io test.\n");
+
1117
+
1118 /* get manufacturer device id quad io */
+
1119 res = w25qxx_get_manufacturer_device_id_quad_io(&gs_handle, (uint8_t *)&manufacturer, (uint8_t *)device_id);
+
1120 if (res != 0)
+
1121 {
+
1122 w25qxx_interface_debug_print("w25qxx: get manufacturer device id quad io failed.\n");
+
1123 (void)w25qxx_deinit(&gs_handle);
+
1124
+
1125 return 1;
+
1126 }
+
1127 w25qxx_interface_debug_print("w25qxx: manufacturer is 0x%02X, device id is 0x%02X.\n", manufacturer, device_id[0]);
+
1128
+
1129 if (type >= W25Q256)
+
1130 {
+
1131 /* set address mode 4 byte */
+
1132 w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
+
1133
+
1134 /* set address mode 4 byte */
+
1135 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
+
1136 if (res != 0)
+
1137 {
+
1138 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
1139 (void)w25qxx_deinit(&gs_handle);
+
1140
+
1141 return 1;
+
1142 }
+
1143
+
1144 /* w25qxx_get_manufacturer_device_id_dual_io test */
+
1145 w25qxx_interface_debug_print("w25qxx: w25qxx_get_manufacturer_device_id_dual_io test.\n");
+
1146
+
1147 /* get manufacturer device id dual io */
+
1148 res = w25qxx_get_manufacturer_device_id_dual_io(&gs_handle, (uint8_t *)&manufacturer, (uint8_t *)device_id);
+
1149 if (res != 0)
+
1150 {
+
1151 w25qxx_interface_debug_print("w25qxx: get manufacturer device id dual io failed.\n");
+
1152 (void)w25qxx_deinit(&gs_handle);
+
1153
+
1154 return 1;
+
1155 }
+
1156 w25qxx_interface_debug_print("w25qxx: manufacturer is 0x%02X, device id is 0x%02X.\n", manufacturer, device_id[0]);
+
1157
+
1158 /* w25qxx_get_manufacturer_device_id_quad_io test */
+
1159 w25qxx_interface_debug_print("w25qxx: w25qxx_get_manufacturer_device_id_quad_io test.\n");
+
1160
+
1161 /* get manufacturer device id quad io */
+
1162 res = w25qxx_get_manufacturer_device_id_quad_io(&gs_handle, (uint8_t *)&manufacturer, (uint8_t *)device_id);
+
1163 if (res != 0)
+
1164 {
+
1165 w25qxx_interface_debug_print("w25qxx: get manufacturer device id quad io failed.\n");
+
1166 (void)w25qxx_deinit(&gs_handle);
+
1167
+
1168 return 1;
+
1169 }
+
1170 w25qxx_interface_debug_print("w25qxx: manufacturer is 0x%02X, device id is 0x%02X.\n", manufacturer, device_id[0]);
+
1171
+
1172 /* set address mode 3 byte */
+
1173 w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
+
1174
+
1175 /* set address mode 3 byte */
+
1176 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
+
1177 if (res != 0)
+
1178 {
+
1179 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
1180 (void)w25qxx_deinit(&gs_handle);
+
1181
+
1182 return 1;
+
1183 }
+
1184 }
+
1185
+
1186 /* enter to qspi mode */
+
1187 w25qxx_interface_debug_print("w25qxx: enter to qspi mode.\n");
+
1188
+
1189 /* enter qspi */
+
1190 res = w25qxx_enter_qspi_mode(&gs_handle);
+
1191 if (res != 0)
+
1192 {
+
1193 w25qxx_interface_debug_print("w25qxx: enter qspi mode failed.\n");
+
1194 (void)w25qxx_deinit(&gs_handle);
+
1195
+
1196 return 1;
+
1197 }
+
1198
+
1199 /* set chip interface spi */
+
1200 res = w25qxx_set_interface(&gs_handle, W25QXX_INTERFACE_QSPI);
+
1201 if (res != 0)
+
1202 {
+
1203 w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
+
1204
+
1205 return 1;
+
1206 }
+
1207 }
+
1208 }
+
1209
+
1210 /* finish read test */
+
1211 w25qxx_interface_debug_print("w25qxx: finish register test.\n");
+
1212 (void)w25qxx_deinit(&gs_handle);
+
1213
+
1214 return 0;
+
1215}
+
driver_w25qxx_register_test.h
driver w25qxx register test header file
-
w25qxx_erase_program_resume
uint8_t w25qxx_erase_program_resume(w25qxx_handle_t *handle)
resume erase or program
Definition: driver_w25qxx.c:1722
-
w25qxx_enable_volatile_sr_write
uint8_t w25qxx_enable_volatile_sr_write(w25qxx_handle_t *handle)
enable volatile sr writing
Definition: driver_w25qxx.c:501
-
w25qxx_get_unique_id
uint8_t w25qxx_get_unique_id(w25qxx_handle_t *handle, uint8_t id[8])
get the unique id
Definition: driver_w25qxx.c:2764
-
w25qxx_get_manufacturer_device_id_dual_io
uint8_t w25qxx_get_manufacturer_device_id_dual_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with dual io
Definition: driver_w25qxx.c:2038
-
w25qxx_set_status1
uint8_t w25qxx_set_status1(w25qxx_handle_t *handle, uint8_t status)
set the status 1
Definition: driver_w25qxx.c:863
-
w25qxx_reset_device
uint8_t w25qxx_reset_device(w25qxx_handle_t *handle)
reset the device
Definition: driver_w25qxx.c:2690
-
w25qxx_individual_block_lock
uint8_t w25qxx_individual_block_lock(w25qxx_handle_t *handle, uint32_t addr)
lock the individual block
Definition: driver_w25qxx.c:6094
-
w25qxx_read_block_lock
uint8_t w25qxx_read_block_lock(w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
read the block lock
Definition: driver_w25qxx.c:6529
-
w25qxx_get_manufacturer_device_id_quad_io
uint8_t w25qxx_get_manufacturer_device_id_quad_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with quad io
Definition: driver_w25qxx.c:2122
-
w25qxx_exit_qspi_mode
uint8_t w25qxx_exit_qspi_mode(w25qxx_handle_t *handle)
exit the qspi mode
Definition: driver_w25qxx.c:2572
-
w25qxx_global_block_unlock
uint8_t w25qxx_global_block_unlock(w25qxx_handle_t *handle)
unlock the whole block
Definition: driver_w25qxx.c:2354
-
w25qxx_individual_block_unlock
uint8_t w25qxx_individual_block_unlock(w25qxx_handle_t *handle, uint32_t addr)
unlock the individual block
Definition: driver_w25qxx.c:6311
-
w25qxx_get_jedec_id
uint8_t w25qxx_get_jedec_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
get the jedec id information
Definition: driver_w25qxx.c:2203
-
w25qxx_get_status3
uint8_t w25qxx_get_status3(w25qxx_handle_t *handle, uint8_t *status)
get the status 3
Definition: driver_w25qxx.c:789
-
w25qxx_get_status2
uint8_t w25qxx_get_status2(w25qxx_handle_t *handle, uint8_t *status)
get the status 2
Definition: driver_w25qxx.c:716
-
w25qxx_enter_qspi_mode
uint8_t w25qxx_enter_qspi_mode(w25qxx_handle_t *handle)
enter the qspi mode
Definition: driver_w25qxx.c:2494
-
w25qxx_get_status1
uint8_t w25qxx_get_status1(w25qxx_handle_t *handle, uint8_t *status)
get the status 1
Definition: driver_w25qxx.c:643
-
w25qxx_set_status2
uint8_t w25qxx_set_status2(w25qxx_handle_t *handle, uint8_t status)
set the status 2
Definition: driver_w25qxx.c:1062
-
w25qxx_global_block_lock
uint8_t w25qxx_global_block_lock(w25qxx_handle_t *handle)
lock the whole block
Definition: driver_w25qxx.c:2284
-
w25qxx_enable_reset
uint8_t w25qxx_enable_reset(w25qxx_handle_t *handle)
enable the reset
Definition: driver_w25qxx.c:2619
-
w25qxx_disable_write
uint8_t w25qxx_disable_write(w25qxx_handle_t *handle)
disable writing
Definition: driver_w25qxx.c:572
-
w25qxx_set_burst_with_wrap
uint8_t w25qxx_set_burst_with_wrap(w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
set the burst with wrap
Definition: driver_w25qxx.c:6746
-
w25qxx_erase_program_suspend
uint8_t w25qxx_erase_program_suspend(w25qxx_handle_t *handle)
suspend erase or program
Definition: driver_w25qxx.c:1650
-
w25qxx_set_status3
uint8_t w25qxx_set_status3(w25qxx_handle_t *handle, uint8_t status)
set the status 3
Definition: driver_w25qxx.c:1261
-
w25qxx_enable_write
uint8_t w25qxx_enable_write(w25qxx_handle_t *handle)
enable writing
Definition: driver_w25qxx.c:431
-
W25QXX_BURST_WRAP_NONE
@ W25QXX_BURST_WRAP_NONE
Definition: driver_w25qxx.h:146
-
w25qxx_release_power_down
uint8_t w25qxx_release_power_down(w25qxx_handle_t *handle)
release power down
Definition: driver_w25qxx.c:1875
-
w25qxx_set_interface
uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface)
set the chip interface
Definition: driver_w25qxx.c:259
-
w25qxx_set_dual_quad_spi
uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable)
enable or disable the dual quad spi
Definition: driver_w25qxx.c:175
-
w25qxx_get_type
uint8_t w25qxx_get_type(w25qxx_handle_t *handle, w25qxx_type_t *type)
get the chip type
Definition: driver_w25qxx.c:238
-
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition: driver_w25qxx.h:63
-
w25qxx_get_interface
uint8_t w25qxx_get_interface(w25qxx_handle_t *handle, w25qxx_interface_t *interface)
get the chip interface
Definition: driver_w25qxx.c:280
-
w25qxx_init
uint8_t w25qxx_init(w25qxx_handle_t *handle)
initialize the chip
Definition: driver_w25qxx.c:6819
-
w25qxx_get_manufacturer_device_id
uint8_t w25qxx_get_manufacturer_device_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information
Definition: driver_w25qxx.c:1952
-
w25qxx_info
uint8_t w25qxx_info(w25qxx_info_t *info)
get chip's information
Definition: driver_w25qxx.c:8566
-
w25qxx_deinit
uint8_t w25qxx_deinit(w25qxx_handle_t *handle)
close the chip
Definition: driver_w25qxx.c:7195
-
w25qxx_set_type
uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type)
set the chip type
Definition: driver_w25qxx.c:217
-
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition: driver_w25qxx.h:76
-
w25qxx_set_address_mode
uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
set the chip address mode
Definition: driver_w25qxx.c:304
-
w25qxx_power_down
uint8_t w25qxx_power_down(w25qxx_handle_t *handle)
power down
Definition: driver_w25qxx.c:1792
-
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition: driver_w25qxx.h:85
-
W25Q80
@ W25Q80
Definition: driver_w25qxx.h:64
-
W25Q64
@ W25Q64
Definition: driver_w25qxx.h:67
-
W25Q32
@ W25Q32
Definition: driver_w25qxx.h:66
-
W25Q16
@ W25Q16
Definition: driver_w25qxx.h:65
-
W25Q128
@ W25Q128
Definition: driver_w25qxx.h:68
-
W25Q256
@ W25Q256
Definition: driver_w25qxx.h:69
-
W25QXX_ADDRESS_MODE_3_BYTE
@ W25QXX_ADDRESS_MODE_3_BYTE
Definition: driver_w25qxx.h:95
-
W25QXX_ADDRESS_MODE_4_BYTE
@ W25QXX_ADDRESS_MODE_4_BYTE
Definition: driver_w25qxx.h:96
-
W25QXX_INTERFACE_QSPI
@ W25QXX_INTERFACE_QSPI
Definition: driver_w25qxx.h:78
-
W25QXX_INTERFACE_SPI
@ W25QXX_INTERFACE_SPI
Definition: driver_w25qxx.h:77
-
w25qxx_interface_spi_qspi_deinit
uint8_t w25qxx_interface_spi_qspi_deinit(void)
interface spi qspi bus deinit
Definition: driver_w25qxx_interface_template.c:58
-
w25qxx_interface_spi_qspi_init
uint8_t w25qxx_interface_spi_qspi_init(void)
interface spi qspi bus init
Definition: driver_w25qxx_interface_template.c:46
-
w25qxx_interface_delay_us
void w25qxx_interface_delay_us(uint32_t us)
interface delay us
Definition: driver_w25qxx_interface_template.c:108
-
w25qxx_interface_spi_qspi_write_read
uint8_t w25qxx_interface_spi_qspi_write_read(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
interface spi qspi bus write read
Definition: driver_w25qxx_interface_template.c:84
-
w25qxx_interface_debug_print
void w25qxx_interface_debug_print(const char *const fmt,...)
interface print format data
Definition: driver_w25qxx_interface_template.c:118
-
w25qxx_interface_delay_ms
void w25qxx_interface_delay_ms(uint32_t ms)
interface delay ms
Definition: driver_w25qxx_interface_template.c:98
-
DRIVER_W25QXX_LINK_DELAY_MS
#define DRIVER_W25QXX_LINK_DELAY_MS(HANDLE, FUC)
link delay_ms function
Definition: driver_w25qxx.h:297
-
DRIVER_W25QXX_LINK_INIT
#define DRIVER_W25QXX_LINK_INIT(HANDLE, STRUCTURE)
initialize w25qxx_handle_t structure
Definition: driver_w25qxx.h:265
-
DRIVER_W25QXX_LINK_SPI_QSPI_INIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_INIT(HANDLE, FUC)
link spi_qspi_init function
Definition: driver_w25qxx.h:273
-
DRIVER_W25QXX_LINK_DEBUG_PRINT
#define DRIVER_W25QXX_LINK_DEBUG_PRINT(HANDLE, FUC)
link debug_print function
Definition: driver_w25qxx.h:313
-
DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ
#define DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(HANDLE, FUC)
link spi_qspi_write_read function
Definition: driver_w25qxx.h:289
-
DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(HANDLE, FUC)
link spi_qspi_deinit function
Definition: driver_w25qxx.h:281
-
DRIVER_W25QXX_LINK_DELAY_US
#define DRIVER_W25QXX_LINK_DELAY_US(HANDLE, FUC)
link delay_us function
Definition: driver_w25qxx.h:305
-
w25qxx_register_test
uint8_t w25qxx_register_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
register test
Definition: driver_w25qxx_register_test.c:51
-
w25qxx_handle_s
w25qxx handle structure definition
Definition: driver_w25qxx.h:210
-
w25qxx_info_s
w25qxx information structure definition
Definition: driver_w25qxx.h:236
-
w25qxx_info_s::temperature_max
float temperature_max
Definition: driver_w25qxx.h:244
-
w25qxx_info_s::supply_voltage_max_v
float supply_voltage_max_v
Definition: driver_w25qxx.h:241
-
w25qxx_info_s::driver_version
uint32_t driver_version
Definition: driver_w25qxx.h:245
-
w25qxx_info_s::interface
char interface[16]
Definition: driver_w25qxx.h:239
-
w25qxx_info_s::temperature_min
float temperature_min
Definition: driver_w25qxx.h:243
-
w25qxx_info_s::max_current_ma
float max_current_ma
Definition: driver_w25qxx.h:242
-
w25qxx_info_s::manufacturer_name
char manufacturer_name[32]
Definition: driver_w25qxx.h:238
-
w25qxx_info_s::supply_voltage_min_v
float supply_voltage_min_v
Definition: driver_w25qxx.h:240
-
w25qxx_info_s::chip_name
char chip_name[32]
Definition: driver_w25qxx.h:237
+
w25qxx_erase_program_resume
uint8_t w25qxx_erase_program_resume(w25qxx_handle_t *handle)
resume erase or program
Definition driver_w25qxx.c:1722
+
w25qxx_enable_volatile_sr_write
uint8_t w25qxx_enable_volatile_sr_write(w25qxx_handle_t *handle)
enable volatile sr writing
Definition driver_w25qxx.c:501
+
w25qxx_get_unique_id
uint8_t w25qxx_get_unique_id(w25qxx_handle_t *handle, uint8_t id[8])
get the unique id
Definition driver_w25qxx.c:2764
+
w25qxx_get_manufacturer_device_id_dual_io
uint8_t w25qxx_get_manufacturer_device_id_dual_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with dual io
Definition driver_w25qxx.c:2038
+
w25qxx_set_status1
uint8_t w25qxx_set_status1(w25qxx_handle_t *handle, uint8_t status)
set the status 1
Definition driver_w25qxx.c:863
+
w25qxx_reset_device
uint8_t w25qxx_reset_device(w25qxx_handle_t *handle)
reset the device
Definition driver_w25qxx.c:2690
+
w25qxx_individual_block_lock
uint8_t w25qxx_individual_block_lock(w25qxx_handle_t *handle, uint32_t addr)
lock the individual block
Definition driver_w25qxx.c:6094
+
w25qxx_read_block_lock
uint8_t w25qxx_read_block_lock(w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
read the block lock
Definition driver_w25qxx.c:6529
+
w25qxx_get_manufacturer_device_id_quad_io
uint8_t w25qxx_get_manufacturer_device_id_quad_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with quad io
Definition driver_w25qxx.c:2122
+
w25qxx_exit_qspi_mode
uint8_t w25qxx_exit_qspi_mode(w25qxx_handle_t *handle)
exit the qspi mode
Definition driver_w25qxx.c:2572
+
w25qxx_global_block_unlock
uint8_t w25qxx_global_block_unlock(w25qxx_handle_t *handle)
unlock the whole block
Definition driver_w25qxx.c:2354
+
w25qxx_individual_block_unlock
uint8_t w25qxx_individual_block_unlock(w25qxx_handle_t *handle, uint32_t addr)
unlock the individual block
Definition driver_w25qxx.c:6311
+
w25qxx_get_jedec_id
uint8_t w25qxx_get_jedec_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
get the jedec id information
Definition driver_w25qxx.c:2203
+
w25qxx_get_status3
uint8_t w25qxx_get_status3(w25qxx_handle_t *handle, uint8_t *status)
get the status 3
Definition driver_w25qxx.c:789
+
w25qxx_get_status2
uint8_t w25qxx_get_status2(w25qxx_handle_t *handle, uint8_t *status)
get the status 2
Definition driver_w25qxx.c:716
+
w25qxx_enter_qspi_mode
uint8_t w25qxx_enter_qspi_mode(w25qxx_handle_t *handle)
enter the qspi mode
Definition driver_w25qxx.c:2494
+
w25qxx_get_status1
uint8_t w25qxx_get_status1(w25qxx_handle_t *handle, uint8_t *status)
get the status 1
Definition driver_w25qxx.c:643
+
w25qxx_set_status2
uint8_t w25qxx_set_status2(w25qxx_handle_t *handle, uint8_t status)
set the status 2
Definition driver_w25qxx.c:1062
+
w25qxx_global_block_lock
uint8_t w25qxx_global_block_lock(w25qxx_handle_t *handle)
lock the whole block
Definition driver_w25qxx.c:2284
+
w25qxx_enable_reset
uint8_t w25qxx_enable_reset(w25qxx_handle_t *handle)
enable the reset
Definition driver_w25qxx.c:2619
+
w25qxx_disable_write
uint8_t w25qxx_disable_write(w25qxx_handle_t *handle)
disable writing
Definition driver_w25qxx.c:572
+
w25qxx_set_burst_with_wrap
uint8_t w25qxx_set_burst_with_wrap(w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
set the burst with wrap
Definition driver_w25qxx.c:6746
+
w25qxx_erase_program_suspend
uint8_t w25qxx_erase_program_suspend(w25qxx_handle_t *handle)
suspend erase or program
Definition driver_w25qxx.c:1650
+
w25qxx_set_status3
uint8_t w25qxx_set_status3(w25qxx_handle_t *handle, uint8_t status)
set the status 3
Definition driver_w25qxx.c:1261
+
w25qxx_enable_write
uint8_t w25qxx_enable_write(w25qxx_handle_t *handle)
enable writing
Definition driver_w25qxx.c:431
+
W25QXX_BURST_WRAP_NONE
@ W25QXX_BURST_WRAP_NONE
Definition driver_w25qxx.h:146
+
w25qxx_release_power_down
uint8_t w25qxx_release_power_down(w25qxx_handle_t *handle)
release power down
Definition driver_w25qxx.c:1875
+
w25qxx_set_interface
uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface)
set the chip interface
Definition driver_w25qxx.c:259
+
w25qxx_set_dual_quad_spi
uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable)
enable or disable the dual quad spi
Definition driver_w25qxx.c:175
+
w25qxx_get_type
uint8_t w25qxx_get_type(w25qxx_handle_t *handle, w25qxx_type_t *type)
get the chip type
Definition driver_w25qxx.c:238
+
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition driver_w25qxx.h:63
+
w25qxx_get_interface
uint8_t w25qxx_get_interface(w25qxx_handle_t *handle, w25qxx_interface_t *interface)
get the chip interface
Definition driver_w25qxx.c:280
+
w25qxx_init
uint8_t w25qxx_init(w25qxx_handle_t *handle)
initialize the chip
Definition driver_w25qxx.c:6819
+
w25qxx_get_manufacturer_device_id
uint8_t w25qxx_get_manufacturer_device_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information
Definition driver_w25qxx.c:1952
+
w25qxx_info
uint8_t w25qxx_info(w25qxx_info_t *info)
get chip's information
Definition driver_w25qxx.c:8566
+
w25qxx_deinit
uint8_t w25qxx_deinit(w25qxx_handle_t *handle)
close the chip
Definition driver_w25qxx.c:7195
+
w25qxx_set_type
uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type)
set the chip type
Definition driver_w25qxx.c:217
+
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition driver_w25qxx.h:76
+
w25qxx_set_address_mode
uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
set the chip address mode
Definition driver_w25qxx.c:304
+
w25qxx_power_down
uint8_t w25qxx_power_down(w25qxx_handle_t *handle)
power down
Definition driver_w25qxx.c:1792
+
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition driver_w25qxx.h:85
+
W25Q80
@ W25Q80
Definition driver_w25qxx.h:64
+
W25Q64
@ W25Q64
Definition driver_w25qxx.h:67
+
W25Q32
@ W25Q32
Definition driver_w25qxx.h:66
+
W25Q16
@ W25Q16
Definition driver_w25qxx.h:65
+
W25Q128
@ W25Q128
Definition driver_w25qxx.h:68
+
W25Q256
@ W25Q256
Definition driver_w25qxx.h:69
+
W25QXX_ADDRESS_MODE_3_BYTE
@ W25QXX_ADDRESS_MODE_3_BYTE
Definition driver_w25qxx.h:95
+
W25QXX_ADDRESS_MODE_4_BYTE
@ W25QXX_ADDRESS_MODE_4_BYTE
Definition driver_w25qxx.h:96
+
W25QXX_INTERFACE_QSPI
@ W25QXX_INTERFACE_QSPI
Definition driver_w25qxx.h:78
+
W25QXX_INTERFACE_SPI
@ W25QXX_INTERFACE_SPI
Definition driver_w25qxx.h:77
+
w25qxx_interface_spi_qspi_deinit
uint8_t w25qxx_interface_spi_qspi_deinit(void)
interface spi qspi bus deinit
Definition driver_w25qxx_interface_template.c:58
+
w25qxx_interface_spi_qspi_init
uint8_t w25qxx_interface_spi_qspi_init(void)
interface spi qspi bus init
Definition driver_w25qxx_interface_template.c:46
+
w25qxx_interface_delay_us
void w25qxx_interface_delay_us(uint32_t us)
interface delay us
Definition driver_w25qxx_interface_template.c:108
+
w25qxx_interface_spi_qspi_write_read
uint8_t w25qxx_interface_spi_qspi_write_read(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
interface spi qspi bus write read
Definition driver_w25qxx_interface_template.c:84
+
w25qxx_interface_debug_print
void w25qxx_interface_debug_print(const char *const fmt,...)
interface print format data
Definition driver_w25qxx_interface_template.c:118
+
w25qxx_interface_delay_ms
void w25qxx_interface_delay_ms(uint32_t ms)
interface delay ms
Definition driver_w25qxx_interface_template.c:98
+
DRIVER_W25QXX_LINK_DELAY_MS
#define DRIVER_W25QXX_LINK_DELAY_MS(HANDLE, FUC)
link delay_ms function
Definition driver_w25qxx.h:297
+
DRIVER_W25QXX_LINK_INIT
#define DRIVER_W25QXX_LINK_INIT(HANDLE, STRUCTURE)
initialize w25qxx_handle_t structure
Definition driver_w25qxx.h:265
+
DRIVER_W25QXX_LINK_SPI_QSPI_INIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_INIT(HANDLE, FUC)
link spi_qspi_init function
Definition driver_w25qxx.h:273
+
DRIVER_W25QXX_LINK_DEBUG_PRINT
#define DRIVER_W25QXX_LINK_DEBUG_PRINT(HANDLE, FUC)
link debug_print function
Definition driver_w25qxx.h:313
+
DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ
#define DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(HANDLE, FUC)
link spi_qspi_write_read function
Definition driver_w25qxx.h:289
+
DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(HANDLE, FUC)
link spi_qspi_deinit function
Definition driver_w25qxx.h:281
+
DRIVER_W25QXX_LINK_DELAY_US
#define DRIVER_W25QXX_LINK_DELAY_US(HANDLE, FUC)
link delay_us function
Definition driver_w25qxx.h:305
+
w25qxx_register_test
uint8_t w25qxx_register_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
register test
Definition driver_w25qxx_register_test.c:51
+
w25qxx_handle_s
w25qxx handle structure definition
Definition driver_w25qxx.h:210
+
w25qxx_info_s
w25qxx information structure definition
Definition driver_w25qxx.h:236
+
w25qxx_info_s::temperature_max
float temperature_max
Definition driver_w25qxx.h:244
+
w25qxx_info_s::supply_voltage_max_v
float supply_voltage_max_v
Definition driver_w25qxx.h:241
+
w25qxx_info_s::driver_version
uint32_t driver_version
Definition driver_w25qxx.h:245
+
w25qxx_info_s::interface
char interface[16]
Definition driver_w25qxx.h:239
+
w25qxx_info_s::temperature_min
float temperature_min
Definition driver_w25qxx.h:243
+
w25qxx_info_s::max_current_ma
float max_current_ma
Definition driver_w25qxx.h:242
+
w25qxx_info_s::manufacturer_name
char manufacturer_name[32]
Definition driver_w25qxx.h:238
+
w25qxx_info_s::supply_voltage_min_v
float supply_voltage_min_v
Definition driver_w25qxx.h:240
+
w25qxx_info_s::chip_name
char chip_name[32]
Definition driver_w25qxx.h:237
diff --git a/doc/html/driver__w25qxx__register__test_8h.html b/doc/html/driver__w25qxx__register__test_8h.html index e8b4455..7268249 100644 --- a/doc/html/driver__w25qxx__register__test_8h.html +++ b/doc/html/driver__w25qxx__register__test_8h.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: test/driver_w25qxx_register_test.h File Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@

@@ -78,16 +78,22 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
Functions
-
-
driver_w25qxx_register_test.h File Reference
+
driver_w25qxx_register_test.h File Reference
@@ -97,10 +103,10 @@

Go to the source code of this file.

- - - + +

+

Functions

uint8_t w25qxx_register_test (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 register test More...
uint8_t w25qxx_register_test (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 register test
 

Detailed Description

@@ -128,7 +134,7 @@

history

diff --git a/doc/html/driver__w25qxx__register__test_8h_source.html b/doc/html/driver__w25qxx__register__test_8h_source.html index 4026e01..d33b098 100644 --- a/doc/html/driver__w25qxx__register__test_8h_source.html +++ b/doc/html/driver__w25qxx__register__test_8h_source.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: test/driver_w25qxx_register_test.h Source File @@ -23,11 +23,10 @@
- + - @@ -36,22 +35,28 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ + +
@@ -78,45 +83,51 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
-
-
driver_w25qxx_register_test.h
+
driver_w25qxx_register_test.h
-Go to the documentation of this file.
1 
-
37 #ifndef DRIVER_W25QXX_REGISTER_TEST_H
-
38 #define DRIVER_W25QXX_REGISTER_TEST_H
-
39 
-
40 #include "driver_w25qxx_interface.h"
-
41 
-
42 #ifdef __cplusplus
-
43 extern "C"{
-
44 #endif
-
45 
-
63 uint8_t w25qxx_register_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable);
-
64 
-
69 #ifdef __cplusplus
-
70 }
-
71 #endif
-
72 
-
73 #endif
+Go to the documentation of this file.
1
+
37#ifndef DRIVER_W25QXX_REGISTER_TEST_H
+
38#define DRIVER_W25QXX_REGISTER_TEST_H
+
39
+
40#include "driver_w25qxx_interface.h"
+
41
+
42#ifdef __cplusplus
+
43extern "C"{
+
44#endif
+
45
+
63uint8_t w25qxx_register_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable);
+
64
+
69#ifdef __cplusplus
+
70}
+
71#endif
+
72
+
73#endif
driver_w25qxx_interface.h
driver w25qxx interface header file
-
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition: driver_w25qxx.h:63
-
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition: driver_w25qxx.h:76
-
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition: driver_w25qxx.h:85
-
w25qxx_register_test
uint8_t w25qxx_register_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
register test
Definition: driver_w25qxx_register_test.c:51
+
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition driver_w25qxx.h:63
+
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition driver_w25qxx.h:76
+
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition driver_w25qxx.h:85
+
w25qxx_register_test
uint8_t w25qxx_register_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
register test
Definition driver_w25qxx_register_test.c:51
diff --git a/doc/html/dynsections.js b/doc/html/dynsections.js index 88f2c27..9b28156 100644 --- a/doc/html/dynsections.js +++ b/doc/html/dynsections.js @@ -47,6 +47,8 @@ function updateStripes() { $('table.directory tr'). removeClass('even').filter(':visible:even').addClass('even'); + $('table.directory tr'). + removeClass('odd').filter(':visible:odd').addClass('odd'); } function toggleLevel(level) @@ -118,11 +120,80 @@ function toggleInherit(id) $(img).attr('src',src.substring(0,src.length-10)+'open.png'); } } -/* @license-end */ +var opened=true; +// in case HTML_COLORSTYLE is LIGHT or DARK the vars will be replaced, so we write them out explicitly and use double quotes +var plusImg = [ "var(--fold-plus-image)", "var(--fold-plus-image-relpath)" ]; +var minusImg = [ "var(--fold-minus-image)", "var(--fold-minus-image-relpath)" ]; + +// toggle all folding blocks +function codefold_toggle_all(relPath) { + if (opened) { + $('#fold_all').css('background-image',plusImg[relPath]); + $('div[id^=foldopen]').hide(); + $('div[id^=foldclosed]').show(); + } else { + $('#fold_all').css('background-image',minusImg[relPath]); + $('div[id^=foldopen]').show(); + $('div[id^=foldclosed]').hide(); + } + opened=!opened; +} + +// toggle single folding block +function codefold_toggle(id) { + $('#foldopen'+id).toggle(); + $('#foldclosed'+id).toggle(); +} +function init_codefold(relPath) { + $('span[class=lineno]').css( + {'padding-right':'4px', + 'margin-right':'2px', + 'display':'inline-block', + 'width':'54px', + 'background':'linear-gradient(var(--fold-line-color),var(--fold-line-color)) no-repeat 46px/2px 100%' + }); + // add global toggle to first line + $('span[class=lineno]:first').append(''); + // add vertical lines to other rows + $('span[class=lineno]').not(':eq(0)').append(''); + // add toggle controls to lines with fold divs + $('div[class=foldopen]').each(function() { + // extract specific id to use + var id = $(this).attr('id').replace('foldopen',''); + // extract start and end foldable fragment attributes + var start = $(this).attr('data-start'); + var end = $(this).attr('data-end'); + // replace normal fold span with controls for the first line of a foldable fragment + $(this).find('span[class=fold]:first').replaceWith(''); + // append div for folded (closed) representation + $(this).after(''); + // extract the first line from the "open" section to represent closed content + var line = $(this).children().first().clone(); + // remove any glow that might still be active on the original line + $(line).removeClass('glow'); + if (start) { + // if line already ends with a start marker (e.g. trailing {), remove it + $(line).html($(line).html().replace(new RegExp('\\s*'+start+'\\s*$','g'),'')); + } + // replace minus with plus symbol + $(line).find('span[class=fold]').css('background-image',plusImg[relPath]); + // append ellipsis + $(line).append(' '+start+'…'+end); + // insert constructed line into closed div + $('#foldclosed'+id).html(line); + }); +} + +/* @license-end */ $(document).ready(function() { $('.code,.codeRef').each(function() { $(this).data('powertip',$('#a'+$(this).attr('href').replace(/.*\//,'').replace(/[^a-z_A-Z0-9]/g,'_')).html()); + $.fn.powerTip.smartPlacementLists.s = [ 's', 'n', 'ne', 'se' ]; $(this).powerTip({ placement: 's', smartPlacement: true, mouseOnToPopup: true }); }); }); diff --git a/doc/html/files.html b/doc/html/files.html index b2984b5..07064d4 100644 --- a/doc/html/files.html +++ b/doc/html/files.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: File List @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +

@@ -64,7 +64,7 @@
@@ -78,36 +78,42 @@
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[detail level 123]
- + - + - + - + - + - + - + - + - +
 ▼ doc
 ▼ mainpage
 ▼ mainpage
 mainpage.h
 ▼ example
 ▼ example
 driver_w25qxx_advance.cDriver w25qxx advance source file
 driver_w25qxx_advance.hDriver w25qxx advance header file
 driver_w25qxx_advance.hDriver w25qxx advance header file
 driver_w25qxx_basic.cDriver w25qxx basic source file
 driver_w25qxx_basic.hDriver w25qxx basic header file
 driver_w25qxx_basic.hDriver w25qxx basic header file
 ▼ interface
 driver_w25qxx_interface.hDriver w25qxx interface header file
 driver_w25qxx_interface.hDriver w25qxx interface header file
 driver_w25qxx_interface_template.cDriver w25qxx interface template source file
 ▼ src
 ▼ src
 driver_w25qxx.cDriver w25qxx source file
 driver_w25qxx.hDriver w25qxx header file
 driver_w25qxx.hDriver w25qxx header file
 ▼ test
 driver_w25qxx_read_test.cDriver w25qxx read test source file
 driver_w25qxx_read_test.cDriver w25qxx read test source file
 driver_w25qxx_read_test.hDriver w25qxx read test header file
 driver_w25qxx_register_test.cDriver w25qxx register test source file
 driver_w25qxx_register_test.cDriver w25qxx register test source file
 driver_w25qxx_register_test.hDriver w25qxx register test header file
@@ -116,7 +122,7 @@ diff --git a/doc/html/folderclosed.svg b/doc/html/folderclosed.svg new file mode 100644 index 0000000..b04bed2 --- /dev/null +++ b/doc/html/folderclosed.svg @@ -0,0 +1,11 @@ + + + + + + + + + + diff --git a/doc/html/folderclosedd.svg b/doc/html/folderclosedd.svg new file mode 100644 index 0000000..52f0166 --- /dev/null +++ b/doc/html/folderclosedd.svg @@ -0,0 +1,11 @@ + + + + + + + + + + diff --git a/doc/html/folderopen.svg b/doc/html/folderopen.svg new file mode 100644 index 0000000..f6896dd --- /dev/null +++ b/doc/html/folderopen.svg @@ -0,0 +1,17 @@ + + + + + + + + + + diff --git a/doc/html/folderopend.svg b/doc/html/folderopend.svg new file mode 100644 index 0000000..2d1f06e --- /dev/null +++ b/doc/html/folderopend.svg @@ -0,0 +1,12 @@ + + + + + + + + + + + diff --git a/doc/html/functions.html b/doc/html/functions.html index 5934253..9004eb1 100644 --- a/doc/html/functions.html +++ b/doc/html/functions.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: Data Fields @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
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- + - @@ -36,21 +35,22 @@
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LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +

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diff --git a/doc/html/globals.html b/doc/html/globals.html index 22614bf..c73e086 100644 --- a/doc/html/globals.html +++ b/doc/html/globals.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: Globals @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
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LibDriver W25QXX -  1.0.0 +
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LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
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- + - @@ -36,21 +35,22 @@
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LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +

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LibDriver W25QXX -  1.0.0 +
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LibDriver W25QXX 1.0.0
W25QXX full function driver
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LibDriver W25QXX -  1.0.0 +
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LibDriver W25QXX 1.0.0
W25QXX full function driver
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LibDriver W25QXX 1.0.0
W25QXX full function driver
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- + - @@ -36,21 +35,22 @@
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LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
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- + - @@ -36,21 +35,22 @@
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LibDriver W25QXX -  1.0.0 +
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LibDriver W25QXX 1.0.0
W25QXX full function driver
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- + - @@ -36,21 +35,22 @@
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LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +

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LibDriver W25QXX 1.0.0
W25QXX full function driver
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- + - @@ -36,21 +35,22 @@
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LibDriver W25QXX -  1.0.0 +
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LibDriver W25QXX 1.0.0
W25QXX full function driver
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diff --git a/doc/html/globals_w.html b/doc/html/globals_w.html index 4e1a211..795e5d8 100644 --- a/doc/html/globals_w.html +++ b/doc/html/globals_w.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: Globals @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
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LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
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diff --git a/doc/html/group__w25qxx__advance__driver.html b/doc/html/group__w25qxx__advance__driver.html index f42641a..6338509 100644 --- a/doc/html/group__w25qxx__advance__driver.html +++ b/doc/html/group__w25qxx__advance__driver.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: w25qxx advance driver function @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +

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Enumerations | Functions
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w25qxx advance driver function
w25qxx driver function
+
w25qxx advance driver function
w25qxx driver function

w25qxx advance driver modules More...

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+

Enumerations

enum  w25qxx_qspi_read_dummy_t { W25QXX_QSPI_READ_DUMMY_2_33MHZ = 0x00 +
enum  w25qxx_qspi_read_dummy_t { W25QXX_QSPI_READ_DUMMY_2_33MHZ = 0x00 , W25QXX_QSPI_READ_DUMMY_4_55MHZ = 0x01 , W25QXX_QSPI_READ_DUMMY_6_80MHZ = 0x02 , W25QXX_QSPI_READ_DUMMY_8_80MHZ = 0x03 }
 w25qxx qspi read dummy enumeration definition More...
 
enum  w25qxx_qspi_read_wrap_length_t { W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE = 0x00 +
enum  w25qxx_qspi_read_wrap_length_t { W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE = 0x00 , W25QXX_QSPI_READ_WRAP_LENGTH_16_BYTE = 0x01 , W25QXX_QSPI_READ_WRAP_LENGTH_32_BYTE = 0x02 , W25QXX_QSPI_READ_WRAP_LENGTH_64_BYTE = 0x03 }
 w25qxx qspi read wrap length enumeration definition More...
 
enum  w25qxx_security_register_t { W25QXX_SECURITY_REGISTER_1 = 0x1000 +
enum  w25qxx_security_register_t { W25QXX_SECURITY_REGISTER_1 = 0x1000 , W25QXX_SECURITY_REGISTER_2 = 0x2000 , W25QXX_SECURITY_REGISTER_3 = 0x3000 }
 w25qxx security register enumeration definition More...
 
enum  w25qxx_burst_wrap_t {
+
enum  w25qxx_burst_wrap_t {
  W25QXX_BURST_WRAP_NONE = 0x10 , W25QXX_BURST_WRAP_8_BYTE = 0x00 , W25QXX_BURST_WRAP_16_BYTE = 0x20 @@ -128,7 +134,7 @@ }
 w25qxx burst wrap enumeration definition More...
 
enum  w25qxx_status1_t {
+
enum  w25qxx_status1_t {
  W25QXX_STATUS1_STATUS_REGISTER_PROTECT_0 = (1 << 7) , W25QXX_STATUS1_SECTOR_PROTECT_OR_TOP_BOTTOM_PROTECT = (1 << 6) , W25QXX_STATUS1_TOP_BOTTOM_PROTECT_OR_BLOCK_PROTECT_3 = (1 << 5) @@ -142,7 +148,7 @@ }
 w25qxx status 1 enumeration definition More...
 
enum  w25qxx_status2_t {
+
enum  w25qxx_status2_t {
  W25QXX_STATUS2_SUSPEND_STATUS = (1 << 7) , W25QXX_STATUS2_COMPLEMENT_PROTECT = (1 << 6) , W25QXX_STATUS2_SECURITY_REGISTER_3_LOCK_BITS = (1 << 5) @@ -155,7 +161,7 @@ }
 w25qxx status 2 enumeration definition More...
 
enum  w25qxx_status3_t {
+
enum  w25qxx_status3_t {
  W25QXX_STATUS3_HOLD_RESET_FUNCTION = (1 << 7) , W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_100_PERCENTAGE = (0 << 5) , W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_75_PERCENTAGE = (1 << 5) @@ -170,125 +176,125 @@
 w25qxx status 3 enumeration definition More...
 
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Functions

uint8_t w25qxx_fast_read_dual_output (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with dual output in the fast mode More...
uint8_t w25qxx_fast_read_dual_output (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with dual output in the fast mode
 
uint8_t w25qxx_fast_read_quad_output (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with quad output in the fast mode More...
uint8_t w25qxx_fast_read_quad_output (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with quad output in the fast mode
 
uint8_t w25qxx_fast_read_dual_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with dual io in the fast mode More...
uint8_t w25qxx_fast_read_dual_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with dual io in the fast mode
 
uint8_t w25qxx_fast_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with quad io in the fast mode More...
uint8_t w25qxx_fast_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read with quad io in the fast mode
 
uint8_t w25qxx_word_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 word read with quad io More...
uint8_t w25qxx_word_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 word read with quad io
 
uint8_t w25qxx_octal_word_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 octal word read with quad io More...
uint8_t w25qxx_octal_word_read_quad_io (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 octal word read with quad io
 
uint8_t w25qxx_page_program_quad_input (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
 quad page program with quad input More...
uint8_t w25qxx_page_program_quad_input (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
 quad page program with quad input
 
uint8_t w25qxx_enable_write (w25qxx_handle_t *handle)
 enable writing More...
uint8_t w25qxx_enable_write (w25qxx_handle_t *handle)
 enable writing
 
uint8_t w25qxx_enable_volatile_sr_write (w25qxx_handle_t *handle)
 enable volatile sr writing More...
uint8_t w25qxx_enable_volatile_sr_write (w25qxx_handle_t *handle)
 enable volatile sr writing
 
uint8_t w25qxx_disable_write (w25qxx_handle_t *handle)
 disable writing More...
uint8_t w25qxx_disable_write (w25qxx_handle_t *handle)
 disable writing
 
uint8_t w25qxx_get_status1 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 1 More...
uint8_t w25qxx_get_status1 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 1
 
uint8_t w25qxx_get_status2 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 2 More...
uint8_t w25qxx_get_status2 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 2
 
uint8_t w25qxx_get_status3 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 3 More...
uint8_t w25qxx_get_status3 (w25qxx_handle_t *handle, uint8_t *status)
 get the status 3
 
uint8_t w25qxx_set_status1 (w25qxx_handle_t *handle, uint8_t status)
 set the status 1 More...
uint8_t w25qxx_set_status1 (w25qxx_handle_t *handle, uint8_t status)
 set the status 1
 
uint8_t w25qxx_set_status2 (w25qxx_handle_t *handle, uint8_t status)
 set the status 2 More...
uint8_t w25qxx_set_status2 (w25qxx_handle_t *handle, uint8_t status)
 set the status 2
 
uint8_t w25qxx_set_status3 (w25qxx_handle_t *handle, uint8_t status)
 set the status 3 More...
uint8_t w25qxx_set_status3 (w25qxx_handle_t *handle, uint8_t status)
 set the status 3
 
uint8_t w25qxx_erase_program_suspend (w25qxx_handle_t *handle)
 suspend erase or program More...
uint8_t w25qxx_erase_program_suspend (w25qxx_handle_t *handle)
 suspend erase or program
 
uint8_t w25qxx_erase_program_resume (w25qxx_handle_t *handle)
 resume erase or program More...
uint8_t w25qxx_erase_program_resume (w25qxx_handle_t *handle)
 resume erase or program
 
uint8_t w25qxx_get_manufacturer_device_id_dual_io (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information with dual io More...
uint8_t w25qxx_get_manufacturer_device_id_dual_io (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information with dual io
 
uint8_t w25qxx_get_manufacturer_device_id_quad_io (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information with quad io More...
uint8_t w25qxx_get_manufacturer_device_id_quad_io (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information with quad io
 
uint8_t w25qxx_get_jedec_id (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
 get the jedec id information More...
uint8_t w25qxx_get_jedec_id (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
 get the jedec id information
 
uint8_t w25qxx_global_block_lock (w25qxx_handle_t *handle)
 lock the whole block More...
uint8_t w25qxx_global_block_lock (w25qxx_handle_t *handle)
 lock the whole block
 
uint8_t w25qxx_global_block_unlock (w25qxx_handle_t *handle)
 unlock the whole block More...
uint8_t w25qxx_global_block_unlock (w25qxx_handle_t *handle)
 unlock the whole block
 
uint8_t w25qxx_set_read_parameters (w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
 set the read parameters More...
uint8_t w25qxx_set_read_parameters (w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
 set the read parameters
 
uint8_t w25qxx_enter_qspi_mode (w25qxx_handle_t *handle)
 enter the qspi mode More...
uint8_t w25qxx_enter_qspi_mode (w25qxx_handle_t *handle)
 enter the qspi mode
 
uint8_t w25qxx_exit_qspi_mode (w25qxx_handle_t *handle)
 exit the qspi mode More...
uint8_t w25qxx_exit_qspi_mode (w25qxx_handle_t *handle)
 exit the qspi mode
 
uint8_t w25qxx_enable_reset (w25qxx_handle_t *handle)
 enable the reset More...
uint8_t w25qxx_enable_reset (w25qxx_handle_t *handle)
 enable the reset
 
uint8_t w25qxx_reset_device (w25qxx_handle_t *handle)
 reset the device More...
uint8_t w25qxx_reset_device (w25qxx_handle_t *handle)
 reset the device
 
uint8_t w25qxx_get_unique_id (w25qxx_handle_t *handle, uint8_t id[8])
 get the unique id More...
uint8_t w25qxx_get_unique_id (w25qxx_handle_t *handle, uint8_t id[8])
 get the unique id
 
uint8_t w25qxx_get_sfdp (w25qxx_handle_t *handle, uint8_t sfdp[256])
 get the sfdp More...
uint8_t w25qxx_get_sfdp (w25qxx_handle_t *handle, uint8_t sfdp[256])
 get the sfdp
 
uint8_t w25qxx_erase_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num)
 erase the security register More...
uint8_t w25qxx_erase_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num)
 erase the security register
 
uint8_t w25qxx_program_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
 program the security register More...
uint8_t w25qxx_program_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
 program the security register
 
uint8_t w25qxx_read_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
 read the security register More...
uint8_t w25qxx_read_security_register (w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
 read the security register
 
uint8_t w25qxx_individual_block_lock (w25qxx_handle_t *handle, uint32_t addr)
 lock the individual block More...
uint8_t w25qxx_individual_block_lock (w25qxx_handle_t *handle, uint32_t addr)
 lock the individual block
 
uint8_t w25qxx_individual_block_unlock (w25qxx_handle_t *handle, uint32_t addr)
 unlock the individual block More...
uint8_t w25qxx_individual_block_unlock (w25qxx_handle_t *handle, uint32_t addr)
 unlock the individual block
 
uint8_t w25qxx_read_block_lock (w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
 read the block lock More...
uint8_t w25qxx_read_block_lock (w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
 read the block lock
 
uint8_t w25qxx_set_burst_with_wrap (w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
 set the burst with wrap More...
uint8_t w25qxx_set_burst_with_wrap (w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
 set the burst with wrap
 

Detailed Description

w25qxx advance driver modules

Enumeration Type Documentation

- -

◆ w25qxx_burst_wrap_t

+ +

◆ w25qxx_burst_wrap_t

@@ -301,15 +307,15 @@

-EnumeratorW25QXX_BURST_WRAP_NONE 

no burst wrap

+EnumeratorW25QXX_BURST_WRAP_NONE 

no burst wrap

-W25QXX_BURST_WRAP_8_BYTE 

8 byte burst wrap

+W25QXX_BURST_WRAP_8_BYTE 

8 byte burst wrap

-W25QXX_BURST_WRAP_16_BYTE 

16 byte burst wrap

+W25QXX_BURST_WRAP_16_BYTE 

16 byte burst wrap

-W25QXX_BURST_WRAP_32_BYTE 

32 byte burst wrap

+W25QXX_BURST_WRAP_32_BYTE 

32 byte burst wrap

-W25QXX_BURST_WRAP_64_BYTE 

64 byte burst wrap

+W25QXX_BURST_WRAP_64_BYTE 

64 byte burst wrap

@@ -317,8 +323,8 @@

-

◆ w25qxx_qspi_read_dummy_t

+ +

◆ w25qxx_qspi_read_dummy_t

@@ -331,13 +337,13 @@

-EnumeratorW25QXX_QSPI_READ_DUMMY_2_33MHZ 

qspi read dummy 2 max 33 MHz

+EnumeratorW25QXX_QSPI_READ_DUMMY_2_33MHZ 

qspi read dummy 2 max 33 MHz

-W25QXX_QSPI_READ_DUMMY_4_55MHZ 

qspi read dummy 4 max 55 MHz

+W25QXX_QSPI_READ_DUMMY_4_55MHZ 

qspi read dummy 4 max 55 MHz

-W25QXX_QSPI_READ_DUMMY_6_80MHZ 

qspi read dummy 6 max 80 MHz

+W25QXX_QSPI_READ_DUMMY_6_80MHZ 

qspi read dummy 6 max 80 MHz

-W25QXX_QSPI_READ_DUMMY_8_80MHZ 

qspi read dummy 8 max 80 MHz

+W25QXX_QSPI_READ_DUMMY_8_80MHZ 

qspi read dummy 8 max 80 MHz

@@ -345,8 +351,8 @@

-

◆ w25qxx_qspi_read_wrap_length_t

+ +

◆ w25qxx_qspi_read_wrap_length_t

@@ -359,13 +365,13 @@

-EnumeratorW25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE 

read wrap length 8 byte

+EnumeratorW25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE 

read wrap length 8 byte

-W25QXX_QSPI_READ_WRAP_LENGTH_16_BYTE 

read wrap length 16 byte

+W25QXX_QSPI_READ_WRAP_LENGTH_16_BYTE 

read wrap length 16 byte

-W25QXX_QSPI_READ_WRAP_LENGTH_32_BYTE 

read wrap length 32 byte

+W25QXX_QSPI_READ_WRAP_LENGTH_32_BYTE 

read wrap length 32 byte

-W25QXX_QSPI_READ_WRAP_LENGTH_64_BYTE 

read wrap length 64 byte

+W25QXX_QSPI_READ_WRAP_LENGTH_64_BYTE 

read wrap length 64 byte

@@ -373,8 +379,8 @@

-

◆ w25qxx_security_register_t

+ +

◆ w25qxx_security_register_t

@@ -387,11 +393,11 @@

-EnumeratorW25QXX_SECURITY_REGISTER_1 

security register 1

+EnumeratorW25QXX_SECURITY_REGISTER_1 

security register 1

-W25QXX_SECURITY_REGISTER_2 

security register 2

+W25QXX_SECURITY_REGISTER_2 

security register 2

-W25QXX_SECURITY_REGISTER_3 

security register 3

+W25QXX_SECURITY_REGISTER_3 

security register 3

@@ -399,8 +405,8 @@

-

◆ w25qxx_status1_t

+ +

◆ w25qxx_status1_t

@@ -413,21 +419,21 @@

-EnumeratorW25QXX_STATUS1_STATUS_REGISTER_PROTECT_0 

status register protect 0

+EnumeratorW25QXX_STATUS1_STATUS_REGISTER_PROTECT_0 

status register protect 0

-W25QXX_STATUS1_SECTOR_PROTECT_OR_TOP_BOTTOM_PROTECT 

sector protect bit or top / bottom protect bit

+W25QXX_STATUS1_SECTOR_PROTECT_OR_TOP_BOTTOM_PROTECT 

sector protect bit or top / bottom protect bit

-W25QXX_STATUS1_TOP_BOTTOM_PROTECT_OR_BLOCK_PROTECT_3 

top / bottom protect bit or block 3 protect bit

+W25QXX_STATUS1_TOP_BOTTOM_PROTECT_OR_BLOCK_PROTECT_3 

top / bottom protect bit or block 3 protect bit

-W25QXX_STATUS1_BLOCK_PROTECT_2 

block 2 protect bit

+W25QXX_STATUS1_BLOCK_PROTECT_2 

block 2 protect bit

-W25QXX_STATUS1_BLOCK_PROTECT_1 

block 1 protect bit

+W25QXX_STATUS1_BLOCK_PROTECT_1 

block 1 protect bit

-W25QXX_STATUS1_BLOCK_PROTECT_0 

block 0 protect bit

+W25QXX_STATUS1_BLOCK_PROTECT_0 

block 0 protect bit

-W25QXX_STATUS1_WRITE_ENABLE_LATCH 

write enable latch

+W25QXX_STATUS1_WRITE_ENABLE_LATCH 

write enable latch

-W25QXX_STATUS1_ERASE_WRITE_PROGRESS 

erase / write in progress

+W25QXX_STATUS1_ERASE_WRITE_PROGRESS 

erase / write in progress

@@ -435,8 +441,8 @@

-

◆ w25qxx_status2_t

+ +

◆ w25qxx_status2_t

@@ -449,19 +455,19 @@

-EnumeratorW25QXX_STATUS2_SUSPEND_STATUS 

suspend status

+EnumeratorW25QXX_STATUS2_SUSPEND_STATUS 

suspend status

-W25QXX_STATUS2_COMPLEMENT_PROTECT 

complement protect

+W25QXX_STATUS2_COMPLEMENT_PROTECT 

complement protect

-W25QXX_STATUS2_SECURITY_REGISTER_3_LOCK_BITS 

security register 3 lock bits

+W25QXX_STATUS2_SECURITY_REGISTER_3_LOCK_BITS 

security register 3 lock bits

-W25QXX_STATUS2_SECURITY_REGISTER_2_LOCK_BITS 

security register 2 lock bits

+W25QXX_STATUS2_SECURITY_REGISTER_2_LOCK_BITS 

security register 2 lock bits

-W25QXX_STATUS2_SECURITY_REGISTER_1_LOCK_BITS 

security register 1 lock bits

+W25QXX_STATUS2_SECURITY_REGISTER_1_LOCK_BITS 

security register 1 lock bits

-W25QXX_STATUS2_QUAD_ENABLE 

quad enable

+W25QXX_STATUS2_QUAD_ENABLE 

quad enable

-W25QXX_STATUS2_STATUS_REGISTER_PROTECT_1 

status register protect 1

+W25QXX_STATUS2_STATUS_REGISTER_PROTECT_1 

status register protect 1

@@ -469,8 +475,8 @@

-

◆ w25qxx_status3_t

+ +

◆ w25qxx_status3_t

@@ -483,21 +489,21 @@

-EnumeratorW25QXX_STATUS3_HOLD_RESET_FUNCTION 

HOLD or RESET function

+EnumeratorW25QXX_STATUS3_HOLD_RESET_FUNCTION 

HOLD or RESET function

-W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_100_PERCENTAGE 

output driver strength 100%

+W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_100_PERCENTAGE 

output driver strength 100%

-W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_75_PERCENTAGE 

output driver strength 75%

+W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_75_PERCENTAGE 

output driver strength 75%

-W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_50_PERCENTAGE 

output driver strength 50%

+W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_50_PERCENTAGE 

output driver strength 50%

-W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_25_PERCENTAGE 

output driver strength 25%

+W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_25_PERCENTAGE 

output driver strength 25%

-W25QXX_STATUS3_WRITE_PROTECT_SELECTION 

write protect selection

+W25QXX_STATUS3_WRITE_PROTECT_SELECTION 

write protect selection

-W25QXX_STATUS3_POWER_UP_ADDRESS_MODE 

power up address mode

+W25QXX_STATUS3_POWER_UP_ADDRESS_MODE 

power up address mode

-W25QXX_STATUS3_CURRENT_ADDRESS_MODE 

current address mode

+W25QXX_STATUS3_CURRENT_ADDRESS_MODE 

current address mode

@@ -506,8 +512,8 @@

Function Documentation

- -

◆ w25qxx_disable_write()

+ +

◆ w25qxx_disable_write()

@@ -542,8 +548,8 @@

-

◆ w25qxx_enable_reset()

+ +

◆ w25qxx_enable_reset()

@@ -578,8 +584,8 @@

-

◆ w25qxx_enable_volatile_sr_write()

+ +

◆ w25qxx_enable_volatile_sr_write()

@@ -614,8 +620,8 @@

-

◆ w25qxx_enable_write()

+ +

◆ w25qxx_enable_write()

@@ -650,8 +656,8 @@

-

◆ w25qxx_enter_qspi_mode()

+ +

◆ w25qxx_enter_qspi_mode()

@@ -687,8 +693,8 @@

-

◆ w25qxx_erase_program_resume()

+ +

◆ w25qxx_erase_program_resume()

@@ -723,8 +729,8 @@

-

◆ w25qxx_erase_program_suspend()

+ +

◆ w25qxx_erase_program_suspend()

@@ -759,8 +765,8 @@

-

◆ w25qxx_erase_security_register()

+ +

◆ w25qxx_erase_security_register()

@@ -809,8 +815,8 @@

-

◆ w25qxx_exit_qspi_mode()

+ +

◆ w25qxx_exit_qspi_mode()

@@ -846,8 +852,8 @@

-

◆ w25qxx_fast_read_dual_io()

+ +

◆ w25qxx_fast_read_dual_io()

@@ -910,8 +916,8 @@

-

◆ w25qxx_fast_read_dual_output()

+ +

◆ w25qxx_fast_read_dual_output()

@@ -974,8 +980,8 @@

-

◆ w25qxx_fast_read_quad_io()

+ +

◆ w25qxx_fast_read_quad_io()

@@ -1037,8 +1043,8 @@

-

◆ w25qxx_fast_read_quad_output()

+ +

◆ w25qxx_fast_read_quad_output()

@@ -1101,8 +1107,8 @@

-

◆ w25qxx_get_jedec_id()

+ +

◆ w25qxx_get_jedec_id()

@@ -1155,8 +1161,8 @@

-

◆ w25qxx_get_manufacturer_device_id_dual_io()

+ +

◆ w25qxx_get_manufacturer_device_id_dual_io()

@@ -1212,8 +1218,8 @@

-

◆ w25qxx_get_manufacturer_device_id_quad_io()

+ +

◆ w25qxx_get_manufacturer_device_id_quad_io()

@@ -1269,8 +1275,8 @@

-

◆ w25qxx_get_sfdp()

+ +

◆ w25qxx_get_sfdp()

@@ -1317,8 +1323,8 @@

-

◆ w25qxx_get_status1()

+ +

◆ w25qxx_get_status1()

@@ -1364,8 +1370,8 @@

-

◆ w25qxx_get_status2()

+ +

◆ w25qxx_get_status2()

@@ -1411,8 +1417,8 @@

-

◆ w25qxx_get_status3()

+ +

◆ w25qxx_get_status3()

@@ -1458,8 +1464,8 @@

-

◆ w25qxx_get_unique_id()

+ +

◆ w25qxx_get_unique_id()

@@ -1507,8 +1513,8 @@

-

◆ w25qxx_global_block_lock()

+ +

◆ w25qxx_global_block_lock()

@@ -1543,8 +1549,8 @@

-

◆ w25qxx_global_block_unlock()

+ +

◆ w25qxx_global_block_unlock()

@@ -1579,8 +1585,8 @@

-

◆ w25qxx_individual_block_lock()

+ +

◆ w25qxx_individual_block_lock()

@@ -1627,8 +1633,8 @@

-

◆ w25qxx_individual_block_unlock()

+ +

◆ w25qxx_individual_block_unlock()

@@ -1675,8 +1681,8 @@

-

◆ w25qxx_octal_word_read_quad_io()

+ +

◆ w25qxx_octal_word_read_quad_io()

@@ -1739,8 +1745,8 @@

-

◆ w25qxx_page_program_quad_input()

+ +

◆ w25qxx_page_program_quad_input()

@@ -1805,8 +1811,8 @@

-

◆ w25qxx_program_security_register()

+ +

◆ w25qxx_program_security_register()

@@ -1862,8 +1868,8 @@

-

◆ w25qxx_read_block_lock()

+ +

◆ w25qxx_read_block_lock()

@@ -1917,8 +1923,8 @@

-

◆ w25qxx_read_security_register()

+ +

◆ w25qxx_read_security_register()

@@ -1974,8 +1980,8 @@

-

◆ w25qxx_reset_device()

+ +

◆ w25qxx_reset_device()

@@ -2010,8 +2016,8 @@

-

◆ w25qxx_set_burst_with_wrap()

+ +

◆ w25qxx_set_burst_with_wrap()

@@ -2058,8 +2064,8 @@

-

◆ w25qxx_set_read_parameters()

+ +

◆ w25qxx_set_read_parameters()

@@ -2113,8 +2119,8 @@

-

◆ w25qxx_set_status1()

+ +

◆ w25qxx_set_status1()

@@ -2161,8 +2167,8 @@

-

◆ w25qxx_set_status2()

+ +

◆ w25qxx_set_status2()

@@ -2209,8 +2215,8 @@

-

◆ w25qxx_set_status3()

+ +

◆ w25qxx_set_status3()

@@ -2257,8 +2263,8 @@

-

◆ w25qxx_word_read_quad_io()

+ +

◆ w25qxx_word_read_quad_io()

@@ -2326,7 +2332,7 @@

diff --git a/doc/html/group__w25qxx__basic__driver.html b/doc/html/group__w25qxx__basic__driver.html index 954317f..9e911b3 100644 --- a/doc/html/group__w25qxx__basic__driver.html +++ b/doc/html/group__w25qxx__basic__driver.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: w25qxx basic driver function @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@

@@ -78,9 +78,16 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
@@ -89,15 +96,14 @@ Typedefs | Enumerations | Functions
-
-
w25qxx basic driver function
w25qxx driver function
+
w25qxx basic driver function
w25qxx driver function

w25qxx basic driver modules More...

- @@ -106,18 +112,18 @@

+

Data Structures

struct  w25qxx_handle_s
 w25qxx handle structure definition More...
 w25qxx information structure definition More...
 
- - - + + - - + +

+

Typedefs

typedef struct w25qxx_handle_s w25qxx_handle_t
 w25qxx handle structure definition More...
typedef struct w25qxx_handle_s w25qxx_handle_t
 w25qxx handle structure definition
 
typedef struct w25qxx_info_s w25qxx_info_t
 w25qxx information structure definition More...
typedef struct w25qxx_info_s w25qxx_info_t
 w25qxx information structure definition
 
- - - - -

+

Enumerations

enum  w25qxx_type_t {
+
enum  w25qxx_type_t {
  W25Q80 = 0XEF13U , W25Q16 = 0XEF14U , W25Q32 = 0XEF15U @@ -129,99 +135,99 @@ }
 w25qxx type enumeration definition More...
 
enum  w25qxx_interface_t { W25QXX_INTERFACE_SPI = 0x00 +
enum  w25qxx_interface_t { W25QXX_INTERFACE_SPI = 0x00 , W25QXX_INTERFACE_QSPI = 0x01 }
 w25qxx interface enumeration definition More...
 
enum  w25qxx_bool_t { W25QXX_BOOL_FALSE = 0x00 +
enum  w25qxx_bool_t { W25QXX_BOOL_FALSE = 0x00 , W25QXX_BOOL_TRUE = 0x01 }
 w25qxx bool enumeration definition More...
 
enum  w25qxx_address_mode_t { W25QXX_ADDRESS_MODE_3_BYTE = 0x00 +
enum  w25qxx_address_mode_t { W25QXX_ADDRESS_MODE_3_BYTE = 0x00 , W25QXX_ADDRESS_MODE_4_BYTE = 0x01 }
 w25qxx address mode enumeration definition More...
 
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+

Functions

uint8_t w25qxx_info (w25qxx_info_t *info)
 get chip's information More...
uint8_t w25qxx_info (w25qxx_info_t *info)
 get chip's information
 
uint8_t w25qxx_set_dual_quad_spi (w25qxx_handle_t *handle, w25qxx_bool_t enable)
 enable or disable the dual quad spi More...
uint8_t w25qxx_set_dual_quad_spi (w25qxx_handle_t *handle, w25qxx_bool_t enable)
 enable or disable the dual quad spi
 
uint8_t w25qxx_get_dual_quad_spi (w25qxx_handle_t *handle, w25qxx_bool_t *enable)
 get the dual quad spi status More...
uint8_t w25qxx_get_dual_quad_spi (w25qxx_handle_t *handle, w25qxx_bool_t *enable)
 get the dual quad spi status
 
uint8_t w25qxx_set_type (w25qxx_handle_t *handle, w25qxx_type_t type)
 set the chip type More...
uint8_t w25qxx_set_type (w25qxx_handle_t *handle, w25qxx_type_t type)
 set the chip type
 
uint8_t w25qxx_get_type (w25qxx_handle_t *handle, w25qxx_type_t *type)
 get the chip type More...
uint8_t w25qxx_get_type (w25qxx_handle_t *handle, w25qxx_type_t *type)
 get the chip type
 
uint8_t w25qxx_set_interface (w25qxx_handle_t *handle, w25qxx_interface_t interface)
 set the chip interface More...
uint8_t w25qxx_set_interface (w25qxx_handle_t *handle, w25qxx_interface_t interface)
 set the chip interface
 
uint8_t w25qxx_get_interface (w25qxx_handle_t *handle, w25qxx_interface_t *interface)
 get the chip interface More...
uint8_t w25qxx_get_interface (w25qxx_handle_t *handle, w25qxx_interface_t *interface)
 get the chip interface
 
uint8_t w25qxx_set_address_mode (w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
 set the chip address mode More...
uint8_t w25qxx_set_address_mode (w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
 set the chip address mode
 
uint8_t w25qxx_get_address_mode (w25qxx_handle_t *handle, w25qxx_address_mode_t *mode)
 get the chip address mode More...
uint8_t w25qxx_get_address_mode (w25qxx_handle_t *handle, w25qxx_address_mode_t *mode)
 get the chip address mode
 
uint8_t w25qxx_init (w25qxx_handle_t *handle)
 initialize the chip More...
uint8_t w25qxx_init (w25qxx_handle_t *handle)
 initialize the chip
 
uint8_t w25qxx_deinit (w25qxx_handle_t *handle)
 close the chip More...
uint8_t w25qxx_deinit (w25qxx_handle_t *handle)
 close the chip
 
uint8_t w25qxx_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read data More...
uint8_t w25qxx_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read data
 
uint8_t w25qxx_write (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 write data More...
uint8_t w25qxx_write (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 write data
 
uint8_t w25qxx_only_spi_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read only in the spi interface More...
uint8_t w25qxx_only_spi_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read only in the spi interface
 
uint8_t w25qxx_fast_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read in the fast mode More...
uint8_t w25qxx_fast_read (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
 read in the fast mode
 
uint8_t w25qxx_page_program (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
 page program More...
uint8_t w25qxx_page_program (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
 page program
 
uint8_t w25qxx_sector_erase_4k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 4k sector More...
uint8_t w25qxx_sector_erase_4k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 4k sector
 
uint8_t w25qxx_block_erase_32k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 32k block More...
uint8_t w25qxx_block_erase_32k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 32k block
 
uint8_t w25qxx_block_erase_64k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 64k block More...
uint8_t w25qxx_block_erase_64k (w25qxx_handle_t *handle, uint32_t addr)
 erase the 64k block
 
uint8_t w25qxx_chip_erase (w25qxx_handle_t *handle)
 erase the chip More...
uint8_t w25qxx_chip_erase (w25qxx_handle_t *handle)
 erase the chip
 
uint8_t w25qxx_power_down (w25qxx_handle_t *handle)
 power down More...
uint8_t w25qxx_power_down (w25qxx_handle_t *handle)
 power down
 
uint8_t w25qxx_release_power_down (w25qxx_handle_t *handle)
 release power down More...
uint8_t w25qxx_release_power_down (w25qxx_handle_t *handle)
 release power down
 
uint8_t w25qxx_get_manufacturer_device_id (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information More...
uint8_t w25qxx_get_manufacturer_device_id (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
 get the manufacturer && device id information
 

Detailed Description

w25qxx basic driver modules

Typedef Documentation

- -

◆ w25qxx_handle_t

+ +

◆ w25qxx_handle_t

@@ -236,8 +242,8 @@

-

◆ w25qxx_info_t

+ +

◆ w25qxx_info_t

@@ -253,8 +259,8 @@

Enumeration Type Documentation

- -

◆ w25qxx_address_mode_t

+ +

◆ w25qxx_address_mode_t

@@ -267,9 +273,9 @@

-EnumeratorW25QXX_ADDRESS_MODE_3_BYTE 

3 byte mode

+EnumeratorW25QXX_ADDRESS_MODE_3_BYTE 

3 byte mode

-W25QXX_ADDRESS_MODE_4_BYTE 

4 byte mode

+W25QXX_ADDRESS_MODE_4_BYTE 

4 byte mode

@@ -277,8 +283,8 @@

-

◆ w25qxx_bool_t

+ +

◆ w25qxx_bool_t

@@ -291,9 +297,9 @@

-EnumeratorW25QXX_BOOL_FALSE 

false

+EnumeratorW25QXX_BOOL_FALSE 

false

-W25QXX_BOOL_TRUE 

true

+W25QXX_BOOL_TRUE 

true

@@ -301,8 +307,8 @@

-

◆ w25qxx_interface_t

+ +

◆ w25qxx_interface_t

@@ -315,9 +321,9 @@

-EnumeratorW25QXX_INTERFACE_SPI 

spi interface

+EnumeratorW25QXX_INTERFACE_SPI 

spi interface

-W25QXX_INTERFACE_QSPI 

dspi qspi interface

+W25QXX_INTERFACE_QSPI 

dspi qspi interface

@@ -325,8 +331,8 @@

-

◆ w25qxx_type_t

+ +

◆ w25qxx_type_t

@@ -339,17 +345,17 @@

-EnumeratorW25Q80 

w25q80

+EnumeratorW25Q80 

w25q80

-W25Q16 

w25q16

+W25Q16 

w25q16

-W25Q32 

w25q32

+W25Q32 

w25q32

-W25Q64 

w25q64

+W25Q64 

w25q64

-W25Q128 

w25q128

+W25Q128 

w25q128

-W25Q256 

w25q256

+W25Q256 

w25q256

@@ -358,8 +364,8 @@

Function Documentation

- -

◆ w25qxx_block_erase_32k()

+ +

◆ w25qxx_block_erase_32k()

@@ -408,8 +414,8 @@

-

◆ w25qxx_block_erase_64k()

+ +

◆ w25qxx_block_erase_64k()

@@ -458,8 +464,8 @@

-

◆ w25qxx_chip_erase()

+ +

◆ w25qxx_chip_erase()

@@ -495,8 +501,8 @@

-

◆ w25qxx_deinit()

+ +

◆ w25qxx_deinit()

@@ -532,8 +538,8 @@

-

◆ w25qxx_fast_read()

+ +

◆ w25qxx_fast_read()

@@ -594,8 +600,8 @@

-

◆ w25qxx_get_address_mode()

+ +

◆ w25qxx_get_address_mode()

@@ -640,8 +646,8 @@

-

◆ w25qxx_get_dual_quad_spi()

+ +

◆ w25qxx_get_dual_quad_spi()

@@ -685,8 +691,8 @@

-

◆ w25qxx_get_interface()

+ +

◆ w25qxx_get_interface()

@@ -730,8 +736,8 @@

-

◆ w25qxx_get_manufacturer_device_id()

+ +

◆ w25qxx_get_manufacturer_device_id()

@@ -784,8 +790,8 @@

-

◆ w25qxx_get_type()

+ +

◆ w25qxx_get_type()

@@ -829,8 +835,8 @@

-

◆ w25qxx_info()

+ +

◆ w25qxx_info()

@@ -863,8 +869,8 @@

-

◆ w25qxx_init()

+ +

◆ w25qxx_init()

@@ -927,8 +933,8 @@

-

◆ w25qxx_only_spi_read()

+ +

◆ w25qxx_only_spi_read()

@@ -990,8 +996,8 @@

-

◆ w25qxx_page_program()

+ +

◆ w25qxx_page_program()

@@ -1055,8 +1061,8 @@

-

◆ w25qxx_power_down()

+ +

◆ w25qxx_power_down()

@@ -1091,8 +1097,8 @@

-

◆ w25qxx_read()

+ +

◆ w25qxx_read()

@@ -1153,8 +1159,8 @@

-

◆ w25qxx_release_power_down()

+ +

◆ w25qxx_release_power_down()

@@ -1189,8 +1195,8 @@

-

◆ w25qxx_sector_erase_4k()

+ +

◆ w25qxx_sector_erase_4k()

@@ -1239,8 +1245,8 @@

-

◆ w25qxx_set_address_mode()

+ +

◆ w25qxx_set_address_mode()

@@ -1287,8 +1293,8 @@

-

◆ w25qxx_set_dual_quad_spi()

+ +

◆ w25qxx_set_dual_quad_spi()

@@ -1332,8 +1338,8 @@

-

◆ w25qxx_set_interface()

+ +

◆ w25qxx_set_interface()

@@ -1377,8 +1383,8 @@

-

◆ w25qxx_set_type()

+ +

◆ w25qxx_set_type()

@@ -1422,8 +1428,8 @@

-

◆ w25qxx_write()

+ +

◆ w25qxx_write()

@@ -1490,7 +1496,7 @@

diff --git a/doc/html/group__w25qxx__driver.html b/doc/html/group__w25qxx__driver.html index f8dee8f..3c8e2ec 100644 --- a/doc/html/group__w25qxx__driver.html +++ b/doc/html/group__w25qxx__driver.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: w25qxx driver function @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@

@@ -78,43 +78,49 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
Modules
-
-
w25qxx driver function
+
w25qxx driver function

w25qxx driver modules More...

- - + - + - + - + - + - + - +

+

Modules

 w25qxx link driver function
 w25qxx link driver function
 w25qxx link driver modules
 
 w25qxx basic driver function
 w25qxx basic driver function
 w25qxx basic driver modules
 
 w25qxx advance driver function
 w25qxx advance driver function
 w25qxx advance driver modules
 
 w25qxx extern driver function
 w25qxx extern driver function
 w25qxx extern driver modules
 
 w25qxx interface driver function
 w25qxx interface driver function
 w25qxx interface driver modules
 
 w25qxx example driver function
 w25qxx example driver function
 w25qxx example driver modules
 
 w25qxx test driver function
 w25qxx test driver function
 w25qxx test driver modules
 
@@ -125,7 +131,7 @@ diff --git a/doc/html/group__w25qxx__example__driver.html b/doc/html/group__w25qxx__example__driver.html index fc4aec1..7c2bf0c 100644 --- a/doc/html/group__w25qxx__example__driver.html +++ b/doc/html/group__w25qxx__example__driver.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: w25qxx example driver function @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@
@@ -78,180 +78,186 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
Functions
-
-
w25qxx example driver function
w25qxx driver function
+
w25qxx example driver function
w25qxx driver function

w25qxx example driver modules More...

- - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + +

+

Functions

uint8_t w25qxx_advance_init (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 advance example init More...
uint8_t w25qxx_advance_init (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 advance example init
 
uint8_t w25qxx_advance_deinit (void)
 advance example deinit More...
uint8_t w25qxx_advance_deinit (void)
 advance example deinit
 
uint8_t w25qxx_advance_power_down (void)
 advance example power down More...
uint8_t w25qxx_advance_power_down (void)
 advance example power down
 
uint8_t w25qxx_advance_wake_up (void)
 advance example wake up More...
uint8_t w25qxx_advance_wake_up (void)
 advance example wake up
 
uint8_t w25qxx_advance_chip_erase (void)
 advance example chip erase More...
uint8_t w25qxx_advance_chip_erase (void)
 advance example chip erase
 
uint8_t w25qxx_advance_get_id (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information More...
uint8_t w25qxx_advance_get_id (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information
 
uint8_t w25qxx_advance_write (uint32_t addr, uint8_t *data, uint32_t len)
 advance example write More...
uint8_t w25qxx_advance_write (uint32_t addr, uint8_t *data, uint32_t len)
 advance example write
 
uint8_t w25qxx_advance_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read More...
uint8_t w25qxx_advance_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read
 
uint8_t w25qxx_advance_page_program (uint32_t addr, uint8_t *data, uint16_t len)
 advance example page program More...
uint8_t w25qxx_advance_page_program (uint32_t addr, uint8_t *data, uint16_t len)
 advance example page program
 
uint8_t w25qxx_advance_sector_erase_4k (uint32_t addr)
 advance example erase the 4k sector More...
uint8_t w25qxx_advance_sector_erase_4k (uint32_t addr)
 advance example erase the 4k sector
 
uint8_t w25qxx_advance_block_erase_32k (uint32_t addr)
 advance example erase the 32k block More...
uint8_t w25qxx_advance_block_erase_32k (uint32_t addr)
 advance example erase the 32k block
 
uint8_t w25qxx_advance_block_erase_64k (uint32_t addr)
 advance example erase the 64k block More...
uint8_t w25qxx_advance_block_erase_64k (uint32_t addr)
 advance example erase the 64k block
 
uint8_t w25qxx_advance_fast_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read in the fast mode More...
uint8_t w25qxx_advance_fast_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read in the fast mode
 
uint8_t w25qxx_advance_get_status1 (uint8_t *status)
 advance example get the status 1 More...
uint8_t w25qxx_advance_get_status1 (uint8_t *status)
 advance example get the status 1
 
uint8_t w25qxx_advance_get_status2 (uint8_t *status)
 advance example get the status 2 More...
uint8_t w25qxx_advance_get_status2 (uint8_t *status)
 advance example get the status 2
 
uint8_t w25qxx_advance_get_status3 (uint8_t *status)
 advance example get the status 3 More...
uint8_t w25qxx_advance_get_status3 (uint8_t *status)
 advance example get the status 3
 
uint8_t w25qxx_advance_set_status1 (uint8_t status)
 advance example set the status 1 More...
uint8_t w25qxx_advance_set_status1 (uint8_t status)
 advance example set the status 1
 
uint8_t w25qxx_advance_set_status2 (uint8_t status)
 advance example set the status 2 More...
uint8_t w25qxx_advance_set_status2 (uint8_t status)
 advance example set the status 2
 
uint8_t w25qxx_advance_set_status3 (uint8_t status)
 advance example set the status 3 More...
uint8_t w25qxx_advance_set_status3 (uint8_t status)
 advance example set the status 3
 
uint8_t w25qxx_advance_get_get_jedec_id (uint8_t *manufacturer, uint8_t device_id[2])
 advance example get the jedec id information More...
uint8_t w25qxx_advance_get_get_jedec_id (uint8_t *manufacturer, uint8_t device_id[2])
 advance example get the jedec id information
 
uint8_t w25qxx_advance_global_block_lock (void)
 advance example global block lock More...
uint8_t w25qxx_advance_global_block_lock (void)
 advance example global block lock
 
uint8_t w25qxx_advance_global_block_unlock (void)
 advance example global block unlock More...
uint8_t w25qxx_advance_global_block_unlock (void)
 advance example global block unlock
 
uint8_t w25qxx_advance_individual_block_lock (uint32_t addr)
 advance example lock the individual block More...
uint8_t w25qxx_advance_individual_block_lock (uint32_t addr)
 advance example lock the individual block
 
uint8_t w25qxx_advance_individual_block_unlock (uint32_t addr)
 advance example unlock the individual block More...
uint8_t w25qxx_advance_individual_block_unlock (uint32_t addr)
 advance example unlock the individual block
 
uint8_t w25qxx_advance_read_block_lock (uint32_t addr, uint8_t *value)
 advance example read the block lock More...
uint8_t w25qxx_advance_read_block_lock (uint32_t addr, uint8_t *value)
 advance example read the block lock
 
uint8_t w25qxx_advance_reset (void)
 advance example reset More...
uint8_t w25qxx_advance_reset (void)
 advance example reset
 
uint8_t w25qxx_advance_only_spi_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read only in the spi interface More...
uint8_t w25qxx_advance_only_spi_read (uint32_t addr, uint8_t *data, uint32_t len)
 advance example read only in the spi interface
 
uint8_t w25qxx_advance_only_spi_fast_read_dual_output (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi dual output interface More...
uint8_t w25qxx_advance_only_spi_fast_read_dual_output (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi dual output interface
 
uint8_t w25qxx_advance_only_spi_fast_read_quad_output (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi quad output interface More...
uint8_t w25qxx_advance_only_spi_fast_read_quad_output (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi quad output interface
 
uint8_t w25qxx_advance_only_spi_fast_read_dual_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi dual io interface More...
uint8_t w25qxx_advance_only_spi_fast_read_dual_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi dual io interface
 
uint8_t w25qxx_advance_only_spi_fast_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi quad io interface More...
uint8_t w25qxx_advance_only_spi_fast_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example fast read only in the spi quad io interface
 
uint8_t w25qxx_advance_only_spi_word_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example word read only in the spi quad io interface More...
uint8_t w25qxx_advance_only_spi_word_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example word read only in the spi quad io interface
 
uint8_t w25qxx_advance_only_spi_octal_word_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example octal word read only in the spi quad io interface More...
uint8_t w25qxx_advance_only_spi_octal_word_read_quad_io (uint32_t addr, uint8_t *data, uint32_t len)
 advance example octal word read only in the spi quad io interface
 
uint8_t w25qxx_advance_only_spi_page_program_quad_input (uint32_t addr, uint8_t *data, uint16_t len)
 advance example quad page program only in the spi quad input interface More...
uint8_t w25qxx_advance_only_spi_page_program_quad_input (uint32_t addr, uint8_t *data, uint16_t len)
 advance example quad page program only in the spi quad input interface
 
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information only in the spi dual io interface More...
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information only in the spi dual io interface
 
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information only in the spi quad io interface More...
uint8_t w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io (uint8_t *manufacturer, uint8_t *device_id)
 advance example get the manufacturer && device id information only in the spi quad io interface
 
uint8_t w25qxx_advance_only_spi_get_unique_id (uint8_t id[8])
 advance example get the unique id only in the spi interface More...
uint8_t w25qxx_advance_only_spi_get_unique_id (uint8_t id[8])
 advance example get the unique id only in the spi interface
 
uint8_t w25qxx_advance_only_spi_get_sfdp (uint8_t sfdp[256])
 advance example get the sfdp only in the spi interface More...
uint8_t w25qxx_advance_only_spi_get_sfdp (uint8_t sfdp[256])
 advance example get the sfdp only in the spi interface
 
uint8_t w25qxx_advance_only_spi_write_security_register (w25qxx_security_register_t num, uint8_t data[256])
 advance example write the security register only in the spi interface More...
uint8_t w25qxx_advance_only_spi_write_security_register (w25qxx_security_register_t num, uint8_t data[256])
 advance example write the security register only in the spi interface
 
uint8_t w25qxx_advance_only_spi_read_security_register (w25qxx_security_register_t num, uint8_t data[256])
 advance example read the security register only in the spi interface More...
uint8_t w25qxx_advance_only_spi_read_security_register (w25qxx_security_register_t num, uint8_t data[256])
 advance example read the security register only in the spi interface
 
uint8_t w25qxx_advance_only_spi_set_burst_with_wrap (w25qxx_burst_wrap_t wrap)
 advance example set the burst with wrap only in the spi interface More...
uint8_t w25qxx_advance_only_spi_set_burst_with_wrap (w25qxx_burst_wrap_t wrap)
 advance example set the burst with wrap only in the spi interface
 
uint8_t w25qxx_advance_only_qspi_set_read_parameters (w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
 advance example set the read parameters only in the qspi interface More...
uint8_t w25qxx_advance_only_qspi_set_read_parameters (w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
 advance example set the read parameters only in the qspi interface
 
uint8_t w25qxx_basic_init (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 basic example init More...
uint8_t w25qxx_basic_init (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 basic example init
 
uint8_t w25qxx_basic_deinit (void)
 basic example deinit More...
uint8_t w25qxx_basic_deinit (void)
 basic example deinit
 
uint8_t w25qxx_basic_power_down (void)
 basic example power down More...
uint8_t w25qxx_basic_power_down (void)
 basic example power down
 
uint8_t w25qxx_basic_wake_up (void)
 basic example wake up More...
uint8_t w25qxx_basic_wake_up (void)
 basic example wake up
 
uint8_t w25qxx_basic_chip_erase (void)
 basic example chip erase More...
uint8_t w25qxx_basic_chip_erase (void)
 basic example chip erase
 
uint8_t w25qxx_basic_get_id (uint8_t *manufacturer, uint8_t *device_id)
 basic example get the manufacturer && device id information More...
uint8_t w25qxx_basic_get_id (uint8_t *manufacturer, uint8_t *device_id)
 basic example get the manufacturer && device id information
 
uint8_t w25qxx_basic_write (uint32_t addr, uint8_t *data, uint32_t len)
 basic example write More...
uint8_t w25qxx_basic_write (uint32_t addr, uint8_t *data, uint32_t len)
 basic example write
 
uint8_t w25qxx_basic_read (uint32_t addr, uint8_t *data, uint32_t len)
 basic example read More...
uint8_t w25qxx_basic_read (uint32_t addr, uint8_t *data, uint32_t len)
 basic example read
 

Detailed Description

w25qxx example driver modules

Function Documentation

- -

◆ w25qxx_advance_block_erase_32k()

+ +

◆ w25qxx_advance_block_erase_32k()

@@ -284,8 +290,8 @@

-

◆ w25qxx_advance_block_erase_64k()

+ +

◆ w25qxx_advance_block_erase_64k()

@@ -318,8 +324,8 @@

-

◆ w25qxx_advance_chip_erase()

+ +

◆ w25qxx_advance_chip_erase()

@@ -346,8 +352,8 @@

-

◆ w25qxx_advance_deinit()

+ +

◆ w25qxx_advance_deinit()

@@ -374,8 +380,8 @@

-

◆ w25qxx_advance_fast_read()

+ +

◆ w25qxx_advance_fast_read()

@@ -426,8 +432,8 @@

-

◆ w25qxx_advance_get_get_jedec_id()

+ +

◆ w25qxx_advance_get_get_jedec_id()

@@ -471,8 +477,8 @@

-

◆ w25qxx_advance_get_id()

+ +

◆ w25qxx_advance_get_id()

@@ -516,8 +522,8 @@

-

◆ w25qxx_advance_get_status1()

+ +

◆ w25qxx_advance_get_status1()

@@ -550,8 +556,8 @@

-

◆ w25qxx_advance_get_status2()

+ +

◆ w25qxx_advance_get_status2()

@@ -584,8 +590,8 @@

-

◆ w25qxx_advance_get_status3()

+ +

◆ w25qxx_advance_get_status3()

@@ -618,8 +624,8 @@

-

◆ w25qxx_advance_global_block_lock()

+ +

◆ w25qxx_advance_global_block_lock()

@@ -646,8 +652,8 @@

-

◆ w25qxx_advance_global_block_unlock()

+ +

◆ w25qxx_advance_global_block_unlock()

@@ -674,8 +680,8 @@

-

◆ w25qxx_advance_individual_block_lock()

+ +

◆ w25qxx_advance_individual_block_lock()

@@ -708,8 +714,8 @@

-

◆ w25qxx_advance_individual_block_unlock()

+ +

◆ w25qxx_advance_individual_block_unlock()

@@ -742,8 +748,8 @@

-

◆ w25qxx_advance_init()

+ +

◆ w25qxx_advance_init()

@@ -794,8 +800,8 @@

-

◆ w25qxx_advance_only_qspi_set_read_parameters()

+ +

◆ w25qxx_advance_only_qspi_set_read_parameters()

@@ -839,8 +845,8 @@

-

◆ w25qxx_advance_only_spi_fast_read_dual_io()

+ +

◆ w25qxx_advance_only_spi_fast_read_dual_io()

@@ -891,8 +897,8 @@

-

◆ w25qxx_advance_only_spi_fast_read_dual_output()

+ +

◆ w25qxx_advance_only_spi_fast_read_dual_output()

@@ -943,8 +949,8 @@

-

◆ w25qxx_advance_only_spi_fast_read_quad_io()

+ +

◆ w25qxx_advance_only_spi_fast_read_quad_io()

@@ -995,8 +1001,8 @@

-

◆ w25qxx_advance_only_spi_fast_read_quad_output()

+ +

◆ w25qxx_advance_only_spi_fast_read_quad_output()

@@ -1047,8 +1053,8 @@

-

◆ w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io()

+ +

◆ w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io()

@@ -1092,8 +1098,8 @@

-

◆ w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io()

+ +

◆ w25qxx_advance_only_spi_get_manufacturer_device_id_quad_io()

@@ -1137,8 +1143,8 @@

-

◆ w25qxx_advance_only_spi_get_sfdp()

+ +

◆ w25qxx_advance_only_spi_get_sfdp()

@@ -1171,8 +1177,8 @@

-

◆ w25qxx_advance_only_spi_get_unique_id()

+ +

◆ w25qxx_advance_only_spi_get_unique_id()

@@ -1205,8 +1211,8 @@

-

◆ w25qxx_advance_only_spi_octal_word_read_quad_io()

+ +

◆ w25qxx_advance_only_spi_octal_word_read_quad_io()

@@ -1257,8 +1263,8 @@

-

◆ w25qxx_advance_only_spi_page_program_quad_input()

+ +

◆ w25qxx_advance_only_spi_page_program_quad_input()

@@ -1309,8 +1315,8 @@

-

◆ w25qxx_advance_only_spi_read()

+ +

◆ w25qxx_advance_only_spi_read()

@@ -1361,8 +1367,8 @@

-

◆ w25qxx_advance_only_spi_read_security_register()

+ +

◆ w25qxx_advance_only_spi_read_security_register()

@@ -1406,8 +1412,8 @@

-

◆ w25qxx_advance_only_spi_set_burst_with_wrap()

+ +

◆ w25qxx_advance_only_spi_set_burst_with_wrap()

@@ -1440,8 +1446,8 @@

-

◆ w25qxx_advance_only_spi_word_read_quad_io()

+ +

◆ w25qxx_advance_only_spi_word_read_quad_io()

@@ -1492,8 +1498,8 @@

-

◆ w25qxx_advance_only_spi_write_security_register()

+ +

◆ w25qxx_advance_only_spi_write_security_register()

@@ -1537,8 +1543,8 @@

-

◆ w25qxx_advance_page_program()

+ +

◆ w25qxx_advance_page_program()

@@ -1589,8 +1595,8 @@

-

◆ w25qxx_advance_power_down()

+ +

◆ w25qxx_advance_power_down()

@@ -1617,8 +1623,8 @@

-

◆ w25qxx_advance_read()

+ +

◆ w25qxx_advance_read()

@@ -1669,8 +1675,8 @@

-

◆ w25qxx_advance_read_block_lock()

+ +

◆ w25qxx_advance_read_block_lock()

@@ -1714,8 +1720,8 @@

-

◆ w25qxx_advance_reset()

+ +

◆ w25qxx_advance_reset()

@@ -1742,8 +1748,8 @@

-

◆ w25qxx_advance_sector_erase_4k()

+ +

◆ w25qxx_advance_sector_erase_4k()

@@ -1776,8 +1782,8 @@

-

◆ w25qxx_advance_set_status1()

+ +

◆ w25qxx_advance_set_status1()

@@ -1810,8 +1816,8 @@

-

◆ w25qxx_advance_set_status2()

+ +

◆ w25qxx_advance_set_status2()

@@ -1844,8 +1850,8 @@

-

◆ w25qxx_advance_set_status3()

+ +

◆ w25qxx_advance_set_status3()

@@ -1878,8 +1884,8 @@

-

◆ w25qxx_advance_wake_up()

+ +

◆ w25qxx_advance_wake_up()

@@ -1906,8 +1912,8 @@

-

◆ w25qxx_advance_write()

+ +

◆ w25qxx_advance_write()

@@ -1958,8 +1964,8 @@

-

◆ w25qxx_basic_chip_erase()

+ +

◆ w25qxx_basic_chip_erase()

@@ -1986,8 +1992,8 @@

-

◆ w25qxx_basic_deinit()

+ +

◆ w25qxx_basic_deinit()

@@ -2014,8 +2020,8 @@

-

◆ w25qxx_basic_get_id()

+ +

◆ w25qxx_basic_get_id()

@@ -2059,8 +2065,8 @@

-

◆ w25qxx_basic_init()

+ +

◆ w25qxx_basic_init()

@@ -2111,8 +2117,8 @@

-

◆ w25qxx_basic_power_down()

+ +

◆ w25qxx_basic_power_down()

@@ -2139,8 +2145,8 @@

-

◆ w25qxx_basic_read()

+ +

◆ w25qxx_basic_read()

@@ -2191,8 +2197,8 @@

-

◆ w25qxx_basic_wake_up()

+ +

◆ w25qxx_basic_wake_up()

@@ -2219,8 +2225,8 @@

-

◆ w25qxx_basic_write()

+ +

◆ w25qxx_basic_write()

@@ -2276,7 +2282,7 @@

diff --git a/doc/html/group__w25qxx__extern__driver.html b/doc/html/group__w25qxx__extern__driver.html index f7dab08..560747e 100644 --- a/doc/html/group__w25qxx__extern__driver.html +++ b/doc/html/group__w25qxx__extern__driver.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: w25qxx extern driver function @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@

@@ -78,33 +78,39 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
Functions
-
-
w25qxx extern driver function
w25qxx driver function
+
w25qxx extern driver function
w25qxx driver function

w25qxx extern driver modules More...

- - - + +

+

Functions

uint8_t w25qxx_write_read_reg (w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
 write and read register More...
uint8_t w25qxx_write_read_reg (w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
 write and read register
 

Detailed Description

w25qxx extern driver modules

Function Documentation

- -

◆ w25qxx_write_read_reg()

+ +

◆ w25qxx_write_read_reg()

@@ -246,7 +252,7 @@

diff --git a/doc/html/group__w25qxx__interface__driver.html b/doc/html/group__w25qxx__interface__driver.html index 73b43ad..45393d4 100644 --- a/doc/html/group__w25qxx__interface__driver.html +++ b/doc/html/group__w25qxx__interface__driver.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: w25qxx interface driver function @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@
@@ -78,48 +78,54 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
Functions
-
-
w25qxx interface driver function
w25qxx driver function
+
w25qxx interface driver function
w25qxx driver function

w25qxx interface driver modules More...

- - - + + - - + + - - + + - - + + - - + + - - + +

+

Functions

uint8_t w25qxx_interface_spi_qspi_init (void)
 interface spi qspi bus init More...
uint8_t w25qxx_interface_spi_qspi_init (void)
 interface spi qspi bus init
 
uint8_t w25qxx_interface_spi_qspi_deinit (void)
 interface spi qspi bus deinit More...
uint8_t w25qxx_interface_spi_qspi_deinit (void)
 interface spi qspi bus deinit
 
uint8_t w25qxx_interface_spi_qspi_write_read (uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
 interface spi qspi bus write read More...
uint8_t w25qxx_interface_spi_qspi_write_read (uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
 interface spi qspi bus write read
 
void w25qxx_interface_delay_ms (uint32_t ms)
 interface delay ms More...
void w25qxx_interface_delay_ms (uint32_t ms)
 interface delay ms
 
void w25qxx_interface_delay_us (uint32_t us)
 interface delay us More...
void w25qxx_interface_delay_us (uint32_t us)
 interface delay us
 
void w25qxx_interface_debug_print (const char *const fmt,...)
 interface print format data More...
void w25qxx_interface_debug_print (const char *const fmt,...)
 interface print format data
 

Detailed Description

w25qxx interface driver modules

Function Documentation

- -

◆ w25qxx_interface_debug_print()

+ +

◆ w25qxx_interface_debug_print()

@@ -157,8 +163,8 @@

-

◆ w25qxx_interface_delay_ms()

+ +

◆ w25qxx_interface_delay_ms()

@@ -186,8 +192,8 @@

-

◆ w25qxx_interface_delay_us()

+ +

◆ w25qxx_interface_delay_us()

@@ -215,8 +221,8 @@

-

◆ w25qxx_interface_spi_qspi_deinit()

+ +

◆ w25qxx_interface_spi_qspi_deinit()

@@ -243,8 +249,8 @@

-

◆ w25qxx_interface_spi_qspi_init()

+ +

◆ w25qxx_interface_spi_qspi_init()

@@ -271,8 +277,8 @@

-

◆ w25qxx_interface_spi_qspi_write_read()

+ +

◆ w25qxx_interface_spi_qspi_write_read()

@@ -405,7 +411,7 @@

diff --git a/doc/html/group__w25qxx__link__driver.html b/doc/html/group__w25qxx__link__driver.html index 0d4a7e9..ec23540 100644 --- a/doc/html/group__w25qxx__link__driver.html +++ b/doc/html/group__w25qxx__link__driver.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: w25qxx link driver function @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@

@@ -78,51 +78,57 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
Macros
-
-
w25qxx link driver function
w25qxx driver function
+
w25qxx link driver function
w25qxx driver function

w25qxx link driver modules More...

- - - + + - - + + - - + + - - + + - - + + - - + + - - + +

+

Macros

#define DRIVER_W25QXX_LINK_INIT(HANDLE, STRUCTURE)   memset(HANDLE, 0, sizeof(STRUCTURE))
 initialize w25qxx_handle_t structure More...
#define DRIVER_W25QXX_LINK_INIT(HANDLE, STRUCTURE)   memset(HANDLE, 0, sizeof(STRUCTURE))
 initialize w25qxx_handle_t structure
 
#define DRIVER_W25QXX_LINK_SPI_QSPI_INIT(HANDLE, FUC)   (HANDLE)->spi_qspi_init = FUC
 link spi_qspi_init function More...
#define DRIVER_W25QXX_LINK_SPI_QSPI_INIT(HANDLE, FUC)   (HANDLE)->spi_qspi_init = FUC
 link spi_qspi_init function
 
#define DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(HANDLE, FUC)   (HANDLE)->spi_qspi_deinit = FUC
 link spi_qspi_deinit function More...
#define DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(HANDLE, FUC)   (HANDLE)->spi_qspi_deinit = FUC
 link spi_qspi_deinit function
 
#define DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(HANDLE, FUC)   (HANDLE)->spi_qspi_write_read = FUC
 link spi_qspi_write_read function More...
#define DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(HANDLE, FUC)   (HANDLE)->spi_qspi_write_read = FUC
 link spi_qspi_write_read function
 
#define DRIVER_W25QXX_LINK_DELAY_MS(HANDLE, FUC)   (HANDLE)->delay_ms = FUC
 link delay_ms function More...
#define DRIVER_W25QXX_LINK_DELAY_MS(HANDLE, FUC)   (HANDLE)->delay_ms = FUC
 link delay_ms function
 
#define DRIVER_W25QXX_LINK_DELAY_US(HANDLE, FUC)   (HANDLE)->delay_us = FUC
 link delay_us function More...
#define DRIVER_W25QXX_LINK_DELAY_US(HANDLE, FUC)   (HANDLE)->delay_us = FUC
 link delay_us function
 
#define DRIVER_W25QXX_LINK_DEBUG_PRINT(HANDLE, FUC)   (HANDLE)->debug_print = FUC
 link debug_print function More...
#define DRIVER_W25QXX_LINK_DEBUG_PRINT(HANDLE, FUC)   (HANDLE)->debug_print = FUC
 link debug_print function
 

Detailed Description

w25qxx link driver modules

Macro Definition Documentation

- -

◆ DRIVER_W25QXX_LINK_DEBUG_PRINT

+ +

◆ DRIVER_W25QXX_LINK_DEBUG_PRINT

@@ -161,8 +167,8 @@

-

◆ DRIVER_W25QXX_LINK_DELAY_MS

+ +

◆ DRIVER_W25QXX_LINK_DELAY_MS

@@ -201,8 +207,8 @@

-

◆ DRIVER_W25QXX_LINK_DELAY_US

+ +

◆ DRIVER_W25QXX_LINK_DELAY_US

@@ -241,8 +247,8 @@

-

◆ DRIVER_W25QXX_LINK_INIT

+ +

◆ DRIVER_W25QXX_LINK_INIT

@@ -281,8 +287,8 @@

-

◆ DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT

+ +

◆ DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT

@@ -321,8 +327,8 @@

-

◆ DRIVER_W25QXX_LINK_SPI_QSPI_INIT

+ +

◆ DRIVER_W25QXX_LINK_SPI_QSPI_INIT

@@ -361,8 +367,8 @@

-

◆ DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ

+ +

◆ DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ

@@ -406,7 +412,7 @@

diff --git a/doc/html/group__w25qxx__test__driver.html b/doc/html/group__w25qxx__test__driver.html index e872ada..a5a3888 100644 --- a/doc/html/group__w25qxx__test__driver.html +++ b/doc/html/group__w25qxx__test__driver.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: w25qxx test driver function @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@

@@ -78,43 +78,49 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
Macros | Functions
-
-
w25qxx test driver function
w25qxx driver function
+
w25qxx test driver function
w25qxx driver function

w25qxx test driver modules More...

- - - + +

+

Macros

#define W25QXX_ENABLE_ERASE_READ_TEST   1
 w25qxx enable erase read test enumeration definition More...
#define W25QXX_ENABLE_ERASE_READ_TEST   1
 w25qxx enable erase read test enumeration definition
 
- - - + + - - + +

+

Functions

uint8_t w25qxx_read_test (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 read test More...
uint8_t w25qxx_read_test (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 read test
 
uint8_t w25qxx_register_test (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 register test More...
uint8_t w25qxx_register_test (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
 register test
 

Detailed Description

w25qxx test driver modules

Macro Definition Documentation

- -

◆ W25QXX_ENABLE_ERASE_READ_TEST

+ +

◆ W25QXX_ENABLE_ERASE_READ_TEST

@@ -132,8 +138,8 @@

Function Documentation

- -

◆ w25qxx_read_test()

+ +

◆ w25qxx_read_test()

@@ -184,8 +190,8 @@

-

◆ w25qxx_register_test()

+ +

◆ w25qxx_register_test()

@@ -241,7 +247,7 @@

diff --git a/doc/html/index.html b/doc/html/index.html index fa44d30..4cb31bd 100644 --- a/doc/html/index.html +++ b/doc/html/index.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: LibDriver W25QXX @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@

@@ -78,14 +78,20 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
-
-
-
LibDriver W25QXX
+
+
LibDriver W25QXX

libdriver w25qxx is a full function driver of w25qxx and it can run in both MCU and Linux platform.

Version
1.0.0
@@ -108,7 +114,7 @@

Copyright (c) LibDriver All rights reserved.

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this._helper&&(i=this._proportionallyResizeElements,s=i.length&&/textarea/i.test(i[0].nodeName),n=s&&this._hasScroll(i[0],"left")?0:c.sizeDiff.height,o=s?0:c.sizeDiff.width,a={width:c.helper.width()-o,height:c.helper.height()-n},r=parseFloat(c.element.css("left"))+(c.position.left-c.originalPosition.left)||null,h=parseFloat(c.element.css("top"))+(c.position.top-c.originalPosition.top)||null,l.animate||this.element.css(t.extend(a,{top:h,left:r})),c.helper.height(c.size.height),c.helper.width(c.size.width),this._helper&&!l.animate&&this._proportionallyResize()),t("body").css("cursor","auto"),this._removeClass("ui-resizable-resizing"),this._propagate("stop",e),this._helper&&this.helper.remove(),!1},_updatePrevProperties:function(){this.prevPosition={top:this.position.top,left:this.position.left},this.prevSize={width:this.size.width,height:this.size.height}},_applyChanges:function(){var t={};return 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t=y(this).resizable("instance");t.ghost&&t.ghost.css({position:"relative",height:t.size.height,width:t.size.width})},stop:function(){var t=y(this).resizable("instance");t.ghost&&t.helper&&t.helper.get(0).removeChild(t.ghost.get(0))}}),y.ui.plugin.add("resizable","grid",{resize:function(){var t,e=y(this).resizable("instance"),i=e.options,s=e.size,n=e.originalSize,o=e.originalPosition,h=e.axis,a="number"==typeof i.grid?[i.grid,i.grid]:i.grid,r=a[0]||1,l=a[1]||1,u=Math.round((s.width-n.width)/r)*r,p=Math.round((s.height-n.height)/l)*l,d=n.width+u,c=n.height+p,f=i.maxWidth&&i.maxWidthd,s=i.minHeight&&i.minHeight>c;i.grid=a,m&&(d+=r),s&&(c+=l),f&&(d-=r),g&&(c-=l),/^(se|s|e)$/.test(h)?(e.size.width=d,e.size.height=c):/^(ne)$/.test(h)?(e.size.width=d,e.size.height=c,e.position.top=o.top-p):/^(sw)$/.test(h)?(e.size.width=d,e.size.height=c,e.position.left=o.left-u):((c-l<=0||d-r<=0)&&(t=e._getPaddingPlusBorderDimensions(this)),0 - + - - + + LibDriver W25QXX: doc/mainpage/mainpage.h File Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@
@@ -78,14 +78,20 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
-
-
mainpage.h File Reference
+
mainpage.h File Reference
@@ -96,7 +102,7 @@ diff --git a/doc/html/mainpage_8h_source.html b/doc/html/mainpage_8h_source.html index 0dd254b..ac24538 100644 --- a/doc/html/mainpage_8h_source.html +++ b/doc/html/mainpage_8h_source.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: doc/mainpage/mainpage.h Source File @@ -23,11 +23,10 @@
- + - @@ -36,22 +35,28 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ + +
@@ -78,24 +83,30 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
-
-
mainpage.h
+
mainpage.h
-Go to the documentation of this file.
1 
+Go to the documentation of this file.
1
diff --git a/doc/html/menu.js b/doc/html/menu.js index 2fe2214..b0b2693 100644 --- a/doc/html/menu.js +++ b/doc/html/menu.js @@ -28,7 +28,15 @@ function initMenu(relPath,searchEnabled,serverSide,searchPage,search) { if ('children' in data) { result+='
    '; for (var i in data.children) { - result+='
  • '+ + var url; + var link; + link = data.children[i].url; + if (link.substring(0,1)=='^') { + url = link.substring(1); + } else { + url = relPath+link; + } + result+='
  • '+ data.children[i].text+''+ makeTree(data.children[i],relPath)+'
    • '; } @@ -36,15 +44,92 @@ function initMenu(relPath,searchEnabled,serverSide,searchPage,search) { } return result; } - - $('#main-nav').append(makeTree(menudata,relPath)); - $('#main-nav').children(':first').addClass('sm sm-dox').attr('id','main-menu'); + var searchBoxHtml; if (searchEnabled) { if (serverSide) { - $('#main-menu').append('
    • '); + searchBoxHtml='
    '+ + '
    '+ + '
     '+ + ''+ + '
    '+ + '
    '+ + '
    '+ + '
    '; } else { - $('#main-menu').append('
    • '); + searchBoxHtml='
    '+ + ''+ + ' '+ + ''+ + ''+ + ''+ + ''+ + ''+ + '
    '; + } + } + + $('#main-nav').before('
    '+ + ''+ + ''+ + '
    '); + $('#main-nav').append(makeTree(menudata,relPath)); + $('#main-nav').children(':first').addClass('sm sm-dox').attr('id','main-menu'); + if (searchBoxHtml) { + $('#main-menu').append('
  • '); + } + var $mainMenuState = $('#main-menu-state'); + var prevWidth = 0; + if ($mainMenuState.length) { + function initResizableIfExists() { + if (typeof initResizable==='function') initResizable(); + } + // animate mobile menu + $mainMenuState.change(function(e) { + var $menu = $('#main-menu'); + var options = { duration: 250, step: initResizableIfExists }; + if (this.checked) { + options['complete'] = function() { $menu.css('display', 'block') }; + $menu.hide().slideDown(options); + } else { + options['complete'] = function() { $menu.css('display', 'none') }; + $menu.show().slideUp(options); + } + }); + // set default menu visibility + function resetState() { + var $menu = $('#main-menu'); + var $mainMenuState = $('#main-menu-state'); + var newWidth = $(window).outerWidth(); + if (newWidth!=prevWidth) { + if ($(window).outerWidth()<768) { + $mainMenuState.prop('checked',false); $menu.hide(); + $('#searchBoxPos1').html(searchBoxHtml); + $('#searchBoxPos2').hide(); + } else { + $menu.show(); + $('#searchBoxPos1').empty(); + $('#searchBoxPos2').html(searchBoxHtml); + $('#searchBoxPos2').show(); + } + if (typeof searchBox!=='undefined') { + searchBox.CloseResultsWindow(); + } + prevWidth = newWidth; + } } + $(window).ready(function() { resetState(); initResizableIfExists(); }); + $(window).resize(resetState); } $('#main-menu').smartmenus(); } diff --git a/doc/html/menudata.js b/doc/html/menudata.js index c8580c4..e651d59 100644 --- a/doc/html/menudata.js +++ b/doc/html/menudata.js @@ -24,7 +24,7 @@ */ var menudata={children:[ {text:"Main Page",url:"index.html"}, -{text:"Modules",url:"modules.html"}, +{text:"Topics",url:"topics.html"}, {text:"Data Structures",url:"annotated.html",children:[ {text:"Data Structures",url:"annotated.html"}, {text:"Data Structure Index",url:"classes.html"}, diff --git a/doc/html/minus.svg b/doc/html/minus.svg new file mode 100644 index 0000000..f70d0c1 --- /dev/null +++ b/doc/html/minus.svg @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/doc/html/minusd.svg b/doc/html/minusd.svg new file mode 100644 index 0000000..5f8e879 --- /dev/null +++ b/doc/html/minusd.svg @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/doc/html/nav_fd.png b/doc/html/nav_fd.png new file mode 100644 index 0000000..032fbdd Binary files /dev/null and b/doc/html/nav_fd.png differ diff --git a/doc/html/nav_hd.png b/doc/html/nav_hd.png new file mode 100644 index 0000000..de80f18 Binary files /dev/null and b/doc/html/nav_hd.png differ diff --git a/doc/html/navtree.css b/doc/html/navtree.css index 33341a6..69211d4 100644 --- a/doc/html/navtree.css +++ b/doc/html/navtree.css @@ -22,8 +22,13 @@ #nav-tree .selected { background-image: url('tab_a.png'); background-repeat:repeat-x; - color: #fff; - text-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0); + color: var(--nav-text-active-color); + text-shadow: var(--nav-text-active-shadow); +} + +#nav-tree .selected .arrow { + color: var(--nav-arrow-selected-color); + text-shadow: none; } #nav-tree img { @@ -37,13 +42,12 @@ text-decoration:none; padding:0px; margin:0px; - outline:none; } #nav-tree .label { margin:0px; padding:0px; - font: 12px 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif; + font: 12px var(--font-family-nav); } #nav-tree .label a { @@ -52,7 +56,7 @@ #nav-tree .selected a { text-decoration:none; - color:#fff; + color:var(--nav-text-active-color); } #nav-tree .children_ul { @@ -67,7 +71,6 @@ #nav-tree { padding: 0px 0px; - background-color: #FAFAFF; font-size:14px; overflow:auto; } @@ -86,7 +89,8 @@ display:block; position: absolute; left: 0px; - width: 250px; + width: $width; + overflow : hidden; } .ui-resizable .ui-resizable-handle { @@ -94,7 +98,7 @@ } .ui-resizable-e { - background-image:url("splitbar.png"); + background-image:var(--nav-splitbar-image); background-size:100%; background-repeat:repeat-y; background-attachment: scroll; @@ -117,9 +121,8 @@ } #nav-tree { - background-image:url('nav_h.png'); background-repeat:repeat-x; - background-color: #F9FAFC; + background-color: var(--nav-background-color); -webkit-overflow-scrolling : touch; /* iOS 5+ */ } diff --git a/doc/html/navtree.js b/doc/html/navtree.js index 1e272d3..93dd3d4 100644 --- a/doc/html/navtree.js +++ b/doc/html/navtree.js @@ -94,7 +94,7 @@ function cachedLink() } } -function getScript(scriptName,func,show) +function getScript(scriptName,func) { var head = document.getElementsByTagName("head")[0]; var script = document.createElement('script'); @@ -124,7 +124,7 @@ function createIndent(o,domNode,node,level) node.plus_img.innerHTML=arrowRight; node.expanded = false; } else { - expandNode(o, node, false, false); + expandNode(o, node, false, true); } } node.expandToggle.appendChild(imgNode); @@ -265,15 +265,15 @@ function showRoot() })(); } -function expandNode(o, node, imm, showRoot) +function expandNode(o, node, imm, setFocus) { if (node.childrenData && !node.expanded) { if (typeof(node.childrenData)==='string') { var varName = node.childrenData; getScript(node.relpath+varName,function(){ node.childrenData = getData(varName); - expandNode(o, node, imm, showRoot); - }, showRoot); + expandNode(o, node, imm, setFocus); + }); } else { if (!node.childrenVisited) { getNode(o, node); @@ -281,6 +281,9 @@ function expandNode(o, node, imm, showRoot) $(node.getChildrenUL()).slideDown("fast"); node.plus_img.innerHTML = arrowDown; node.expanded = true; + if (setFocus) { + $(node.expandToggle).focus(); + } } } } @@ -325,11 +328,14 @@ function selectAndHighlight(hash,n) $(n.itemDiv).addClass('selected'); $(n.itemDiv).attr('id','selected'); } + var topOffset=5; + if (typeof page_layout!=='undefined' && page_layout==1) { + topOffset+=$('#top').outerHeight(); + } if ($('#nav-tree-contents .item:first').hasClass('selected')) { - $('#nav-sync').css('top','30px'); - } else { - $('#nav-sync').css('top','5px'); + topOffset+=25; } + $('#nav-sync').css('top',topOffset+'px'); showRoot(); } @@ -341,7 +347,7 @@ function showNode(o, node, index, hash) getScript(node.relpath+varName,function(){ node.childrenData = getData(varName); showNode(o,node,index,hash); - },true); + }); } else { if (!node.childrenVisited) { getNode(o, node); @@ -359,11 +365,11 @@ function showNode(o, node, index, hash) n.childrenData = getData(varName); node.expanded=false; showNode(o,node,index,hash); // retry with child node expanded - },true); + }); } else { var rootBase = stripPath(o.toroot.replace(/\..+$/, '')); if (rootBase=="index" || rootBase=="pages" || rootBase=="search") { - expandNode(o, n, true, true); + expandNode(o, n, true, false); } selectAndHighlight(hash,n); } @@ -441,7 +447,7 @@ function navTo(o,root,hash,relpath) if (navTreeSubIndices[i]) { gotoNode(o,i,root,hash,relpath); } - },true); + }); } } @@ -542,5 +548,12 @@ function initNavTree(toroot,relpath) navTo(o,toroot,hashUrl(),relpath); } }) + + $("div.toc a[href]").click(function(e) { + e.preventDefault(); + var docContent = $('#doc-content'); + var aname = $(this).attr("href"); + gotoAnchor($(aname),aname,true); + }) } /* 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b/doc/html/search/mag_d.svg new file mode 100644 index 0000000..4122773 --- /dev/null +++ b/doc/html/search/mag_d.svg @@ -0,0 +1,24 @@ + + + + + + + diff --git a/doc/html/search/mag_sel.svg b/doc/html/search/mag_sel.svg index 03626f6..553dba8 100644 --- a/doc/html/search/mag_sel.svg +++ b/doc/html/search/mag_sel.svg @@ -1,59 +1,17 @@ - + - - - - image/svg+xml - - - - - + > - + /> + /> diff --git a/doc/html/search/mag_seld.svg b/doc/html/search/mag_seld.svg new file mode 100644 index 0000000..c906f84 --- /dev/null +++ b/doc/html/search/mag_seld.svg @@ -0,0 +1,31 @@ + + + + + + + + + diff --git a/doc/html/search/pages_0.js b/doc/html/search/pages_0.js index 67579df..5dd9040 100644 --- a/doc/html/search/pages_0.js +++ b/doc/html/search/pages_0.js @@ -1,4 +1,4 @@ var searchData= [ - ['libdriver_20w25qxx_575',['LibDriver W25QXX',['../index.html',1,'']]] + ['libdriver_20w25qxx_0',['LibDriver W25QXX',['../index.html',1,'']]] ]; diff --git a/doc/html/search/pages_1.js b/doc/html/search/pages_1.js new file mode 100644 index 0000000..5412124 --- /dev/null +++ b/doc/html/search/pages_1.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['w25qxx_0',['LibDriver W25QXX',['../index.html',1,'']]] +]; diff --git a/doc/html/search/search.css b/doc/html/search/search.css index 9074198..19f76f9 100644 --- a/doc/html/search/search.css +++ b/doc/html/search/search.css @@ -1,10 +1,33 @@ -/*---------------- Search Box */ +/*---------------- Search Box positioning */ + +#main-menu > li:last-child { + /* This
  • object is the parent of the search bar */ + display: flex; + justify-content: center; + align-items: center; + height: 36px; + margin-right: 1em; +} + +/*---------------- Search box styling */ + +.SRPage * { + font-weight: normal; + line-height: normal; +} + +dark-mode-toggle { + margin-left: 5px; + display: flex; + float: right; +} #MSearchBox { + display: inline-block; white-space : nowrap; - background: white; + background: var(--search-background-color); border-radius: 0.65em; - box-shadow: inset 0.5px 0.5px 3px 0px #555; + box-shadow: var(--search-box-shadow); z-index: 102; } @@ -17,28 +40,47 @@ #MSearchSelect { display: inline-block; vertical-align: middle; - height: 1.4em; - padding: 0 0 0 0.3em; - margin: 0; + width: 20px; + height: 19px; + background-image: var(--search-magnification-select-image); + margin: 0 0 0 0.3em; + padding: 0; +} + +#MSearchSelectExt { + display: inline-block; + vertical-align: middle; + width: 10px; + height: 19px; + background-image: var(--search-magnification-image); + margin: 0 0 0 0.5em; + padding: 0; } + #MSearchField { display: inline-block; vertical-align: middle; width: 7.5em; - height: 1.1em; + height: 19px; margin: 0 0.15em; padding: 0; line-height: 1em; border:none; - color: #909090; + color: var(--search-foreground-color); outline: none; - font-family: Arial, Verdana, sans-serif; + font-family: var(--font-family-search); -webkit-border-radius: 0px; border-radius: 0px; background: none; } +@media(hover: none) { + /* to avoid zooming on iOS */ + #MSearchField { + font-size: 16px; + } +} #MSearchBox .right { display: inline-block; @@ -59,23 +101,15 @@ } #MSearchCloseImg { - height: 1.4em; padding: 0.3em; margin: 0; } .MSearchBoxActive #MSearchField { - color: #000000; + color: var(--search-active-color); } -#main-menu > li:last-child { - /* This
  • object is the parent of the search bar */ - display: flex; - justify-content: center; - align-items: center; - height: 36px; - margin-right: 1em; -} + /*---------------- Search filter selection */ @@ -83,8 +117,8 @@ display: none; position: absolute; left: 0; top: 0; - border: 1px solid #90A5CE; - background-color: #F9FAFC; + border: 1px solid var(--search-filter-border-color); + background-color: var(--search-filter-background-color); z-index: 10001; padding-top: 4px; padding-bottom: 4px; @@ -97,7 +131,7 @@ } .SelectItem { - font: 8pt Arial, Verdana, sans-serif; + font: 8pt var(--font-family-search); padding-left: 2px; padding-right: 12px; border: 0px; @@ -105,7 +139,7 @@ span.SelectionMark { margin-right: 4px; - font-family: monospace; + font-family: var(--font-family-monospace); outline-style: none; text-decoration: none; } @@ -113,7 +147,7 @@ span.SelectionMark { a.SelectItem { display: block; outline-style: none; - color: #000000; + color: var(--search-filter-foreground-color); text-decoration: none; padding-left: 6px; padding-right: 12px; @@ -121,14 +155,14 @@ a.SelectItem { a.SelectItem:focus, a.SelectItem:active { - color: #000000; + color: var(--search-filter-foreground-color); outline-style: none; text-decoration: none; } a.SelectItem:hover { - color: #FFFFFF; - background-color: #3D578C; + color: var(--search-filter-highlight-text-color); + background-color: var(--search-filter-highlight-bg-color); outline-style: none; text-decoration: none; cursor: pointer; @@ -138,7 +172,7 @@ a.SelectItem:hover { /*---------------- Search results window */ iframe#MSearchResults { - width: 60ex; + /*width: 60ex;*/ height: 15em; } @@ -146,9 +180,12 @@ iframe#MSearchResults { display: none; position: absolute; left: 0; top: 0; - border: 1px solid #000; - background-color: #EEF1F7; + border: 1px solid var(--search-results-border-color); + background-color: var(--search-results-background-color); z-index:10000; + width: 300px; + height: 400px; + overflow: auto; } /* ----------------------------------- */ @@ -156,7 +193,6 @@ iframe#MSearchResults { #SRIndex { clear:both; - padding-bottom: 15px; } .SREntry { @@ -169,8 +205,9 @@ iframe#MSearchResults { padding: 1px 5px; } -body.SRPage { +div.SRPage { margin: 5px 2px; + background-color: var(--search-results-background-color); } .SRChildren { @@ -182,17 +219,18 @@ body.SRPage { } .SRSymbol { - font-weight: bold; - color: #425E97; - font-family: Arial, Verdana, sans-serif; + font-weight: bold; + color: var(--search-results-foreground-color); + font-family: var(--font-family-search); text-decoration: none; outline: none; } a.SRScope { display: block; - color: #425E97; - font-family: Arial, Verdana, sans-serif; + color: var(--search-results-foreground-color); + font-family: var(--font-family-search); + font-size: 8pt; text-decoration: none; outline: none; } @@ -204,14 +242,14 @@ a.SRScope:focus, a.SRScope:active { span.SRScope { padding-left: 4px; - font-family: Arial, Verdana, sans-serif; + font-family: var(--font-family-search); } .SRPage .SRStatus { padding: 2px 5px; font-size: 8pt; font-style: italic; - font-family: Arial, Verdana, sans-serif; + font-family: var(--font-family-search); } .SRResult { @@ -225,14 +263,10 @@ div.searchresults { /*---------------- External search page results */ -.searchresult { - background-color: #F0F3F8; -} - .pages b { color: white; padding: 5px 5px 3px 5px; - background-image: url("../tab_a.png"); + background-image: var(--nav-gradient-active-image-parent); background-repeat: repeat-x; text-shadow: 0 1px 1px #000000; } diff --git a/doc/html/search/search.js b/doc/html/search/search.js index fb226f7..6fd40c6 100644 --- a/doc/html/search/search.js +++ b/doc/html/search/search.js @@ -73,6 +73,8 @@ function getYPos(item) return y; } +var searchResults = new SearchResults("searchResults"); + /* A class handling everything associated with the search panel. Parameters: @@ -80,7 +82,7 @@ function getYPos(item) storing this instance. Is needed to be able to set timeouts. resultPath - path to use for external files */ -function SearchBox(name, resultsPath, inFrame, label, extension) +function SearchBox(name, resultsPath, extension) { if (!name || !resultsPath) { alert("Missing parameters to SearchBox."); } if (!extension || extension == "") { extension = ".html"; } @@ -96,8 +98,6 @@ function SearchBox(name, resultsPath, inFrame, label, extension) this.hideTimeout = 0; this.searchIndex = 0; this.searchActive = false; - this.insideFrame = inFrame; - this.searchLabel = label; this.extension = extension; // ----------- DOM Elements @@ -136,30 +136,14 @@ function SearchBox(name, resultsPath, inFrame, label, extension) var searchSelectWindow = this.DOMSearchSelectWindow(); var searchField = this.DOMSearchSelect(); - if (this.insideFrame) - { - var left = getXPos(searchField); - var top = getYPos(searchField); - left += searchField.offsetWidth + 6; - top += searchField.offsetHeight; - - // show search selection popup - searchSelectWindow.style.display='block'; - left -= searchSelectWindow.offsetWidth; - searchSelectWindow.style.left = left + 'px'; - searchSelectWindow.style.top = top + 'px'; - } - else - { - var left = getXPos(searchField); - var top = getYPos(searchField); - top += searchField.offsetHeight; + var left = getXPos(searchField); + var top = getYPos(searchField); + top += searchField.offsetHeight; - // show search selection popup - searchSelectWindow.style.display='block'; - searchSelectWindow.style.left = left + 'px'; - searchSelectWindow.style.top = top + 'px'; - } + // show search selection popup + searchSelectWindow.style.display='block'; + searchSelectWindow.style.left = left + 'px'; + searchSelectWindow.style.top = top + 'px'; // stop selection hide timer if (this.hideTimeout) @@ -172,7 +156,7 @@ function SearchBox(name, resultsPath, inFrame, label, extension) this.OnSearchSelectHide = function() { - this.hideTimeout = setTimeout(this.name +".CloseSelectionWindow()", + this.hideTimeout = setTimeout(this.CloseSelectionWindow.bind(this), this.closeSelectionTimeout); } @@ -205,11 +189,13 @@ function SearchBox(name, resultsPath, inFrame, label, extension) } else { - window.frames.MSearchResults.postMessage("take_focus", "*"); + var elem = searchResults.NavNext(0); + if (elem) elem.focus(); } } else if (e.keyCode==27) // Escape out of the search field { + e.stopPropagation(); this.DOMSearchField().blur(); this.DOMPopupSearchResultsWindow().style.display = 'none'; this.DOMSearchClose().style.display = 'none'; @@ -226,7 +212,7 @@ function SearchBox(name, resultsPath, inFrame, label, extension) if (searchValue != "") // non-empty search { // set timer for search update - this.keyTimeout = setTimeout(this.name + '.Search()', + this.keyTimeout = setTimeout(this.Search.bind(this), this.keyTimeoutLength); } else // empty search field @@ -304,6 +290,7 @@ function SearchBox(name, resultsPath, inFrame, label, extension) } else if (e.keyCode==13 || e.keyCode==27) { + e.stopPropagation(); this.OnSelectItem(this.searchIndex); this.CloseSelectionWindow(); this.DOMSearchField().focus(); @@ -341,55 +328,70 @@ function SearchBox(name, resultsPath, inFrame, label, extension) idxChar = searchValue.substr(0, 2); } - var resultsPage; - var resultsPageWithSearch; - var hasResultsPage; + var jsFile; var idx = indexSectionsWithContent[this.searchIndex].indexOf(idxChar); if (idx!=-1) { var hexCode=idx.toString(16); - resultsPage = this.resultsPath + '/' + indexSectionNames[this.searchIndex] + '_' + hexCode + this.extension; - resultsPageWithSearch = resultsPage+'?'+escape(searchValue); - hasResultsPage = true; + jsFile = this.resultsPath + indexSectionNames[this.searchIndex] + '_' + hexCode + '.js'; } - else // nothing available for this search term - { - resultsPage = this.resultsPath + '/nomatches' + this.extension; - resultsPageWithSearch = resultsPage; - hasResultsPage = false; + + var loadJS = function(url, impl, loc){ + var scriptTag = document.createElement('script'); + scriptTag.src = url; + scriptTag.onload = impl; + scriptTag.onreadystatechange = impl; + loc.appendChild(scriptTag); } - window.frames.MSearchResults.location = resultsPageWithSearch; var domPopupSearchResultsWindow = this.DOMPopupSearchResultsWindow(); + var domSearchBox = this.DOMSearchBox(); + var domPopupSearchResults = this.DOMPopupSearchResults(); + var domSearchClose = this.DOMSearchClose(); + var resultsPath = this.resultsPath; + + var handleResults = function() { + document.getElementById("Loading").style.display="none"; + if (typeof searchData !== 'undefined') { + createResults(resultsPath); + document.getElementById("NoMatches").style.display="none"; + } + + if (idx!=-1) { + searchResults.Search(searchValue); + } else { // no file with search results => force empty search results + searchResults.Search('===='); + } - if (domPopupSearchResultsWindow.style.display!='block') - { - var domSearchBox = this.DOMSearchBox(); - this.DOMSearchClose().style.display = 'inline-block'; - if (this.insideFrame) - { - var domPopupSearchResults = this.DOMPopupSearchResults(); - domPopupSearchResultsWindow.style.position = 'relative'; - domPopupSearchResultsWindow.style.display = 'block'; - var width = document.body.clientWidth - 8; // the -8 is for IE :-( - domPopupSearchResultsWindow.style.width = width + 'px'; - domPopupSearchResults.style.width = width + 'px'; - } - else - { - var domPopupSearchResults = this.DOMPopupSearchResults(); - var left = getXPos(domSearchBox) + 150; // domSearchBox.offsetWidth; - var top = getYPos(domSearchBox) + 20; // domSearchBox.offsetHeight + 1; - domPopupSearchResultsWindow.style.display = 'block'; - left -= domPopupSearchResults.offsetWidth; - domPopupSearchResultsWindow.style.top = top + 'px'; - domPopupSearchResultsWindow.style.left = left + 'px'; - } + if (domPopupSearchResultsWindow.style.display!='block') + { + domSearchClose.style.display = 'inline-block'; + var left = getXPos(domSearchBox) + 150; + var top = getYPos(domSearchBox) + 20; + domPopupSearchResultsWindow.style.display = 'block'; + left -= domPopupSearchResults.offsetWidth; + var maxWidth = document.body.clientWidth; + var maxHeight = document.body.clientHeight; + var width = 300; + if (left<10) left=10; + if (width+left+8>maxWidth) width=maxWidth-left-8; + var height = 400; + if (height+top+8>maxHeight) height=maxHeight-top-8; + domPopupSearchResultsWindow.style.top = top + 'px'; + domPopupSearchResultsWindow.style.left = left + 'px'; + domPopupSearchResultsWindow.style.width = width + 'px'; + domPopupSearchResultsWindow.style.height = height + 'px'; + } + } + + if (jsFile) { + loadJS(jsFile, handleResults, this.DOMPopupSearchResultsWindow()); + } else { + handleResults(); } this.lastSearchValue = searchValue; - this.lastResultsPage = resultsPage; } // -------- Activation Functions @@ -403,22 +405,15 @@ function SearchBox(name, resultsPath, inFrame, label, extension) ) { this.DOMSearchBox().className = 'MSearchBoxActive'; - - var searchField = this.DOMSearchField(); - - if (searchField.value == this.searchLabel) // clear "Search" term upon entry - { - searchField.value = ''; - this.searchActive = true; - } + this.searchActive = true; } else if (!isActive) // directly remove the panel { this.DOMSearchBox().className = 'MSearchBoxInactive'; - this.DOMSearchField().value = this.searchLabel; this.searchActive = false; this.lastSearchValue = '' this.lastResultsPage = ''; + this.DOMSearchField().value = ''; } } } @@ -647,7 +642,7 @@ function SearchResults(name) } else // return focus to search field { - parent.document.getElementById("MSearchField").focus(); + document.getElementById("MSearchField").focus(); } } else if (this.lastKey==40) // Down @@ -677,8 +672,9 @@ function SearchResults(name) } else if (this.lastKey==27) // Escape { - parent.searchBox.CloseResultsWindow(); - parent.document.getElementById("MSearchField").focus(); + e.stopPropagation(); + searchBox.CloseResultsWindow(); + document.getElementById("MSearchField").focus(); } else if (this.lastKey==13) // Enter { @@ -720,8 +716,9 @@ function SearchResults(name) } else if (this.lastKey==27) // Escape { - parent.searchBox.CloseResultsWindow(); - parent.document.getElementById("MSearchField").focus(); + e.stopPropagation(); + searchBox.CloseResultsWindow(); + document.getElementById("MSearchField").focus(); } else if (this.lastKey==13) // Enter { @@ -744,9 +741,10 @@ function setClassAttr(elem,attr) elem.setAttribute('className',attr); } -function createResults() +function createResults(resultsPath) { var results = document.getElementById("SRResults"); + results.innerHTML = ''; for (var e=0; e - + - - + + LibDriver W25QXX: w25qxx_handle_s Struct Reference @@ -23,11 +23,10 @@
    - + - @@ -36,21 +35,22 @@
    -
    LibDriver W25QXX -  1.0.0 +
    		+
    LibDriver W25QXX 1.0.0
    W25QXX full function driver
    - + +/* @license-end */ +
@@ -64,7 +64,7 @@
@@ -78,16 +78,22 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
Data Fields
-
-
w25qxx_handle_s Struct Reference
w25qxx driver function » w25qxx basic driver function
+
w25qxx_handle_s Struct Reference
w25qxx driver function » w25qxx basic driver function
@@ -96,37 +102,37 @@

#include <driver_w25qxx.h>

- - + - + - + - + - + - + - + - + - + - + - + - + - + - + - +

+

Data Fields

uint8_t(* spi_qspi_init )(void)
uint8_t(* spi_qspi_init )(void)
 
uint8_t(* spi_qspi_deinit )(void)
uint8_t(* spi_qspi_deinit )(void)
 
uint8_t(* spi_qspi_write_read )(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
uint8_t(* spi_qspi_write_read )(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
 
void(* delay_ms )(uint32_t ms)
void(* delay_ms )(uint32_t ms)
 
void(* delay_us )(uint32_t us)
void(* delay_us )(uint32_t us)
 
void(* debug_print )(const char *const fmt,...)
void(* debug_print )(const char *const fmt,...)
 
uint8_t inited
uint8_t inited
 
uint16_t type
uint16_t type
 
uint8_t address_mode
uint8_t address_mode
 
uint8_t param
uint8_t param
 
uint8_t dummy
uint8_t dummy
 
uint8_t dual_quad_spi_enable
uint8_t dual_quad_spi_enable
 
uint8_t spi_qspi
uint8_t spi_qspi
 
uint8_t buf [256+6]
uint8_t buf [256+6]
 
uint8_t buf_4k [4096+1]
uint8_t buf_4k [4096+1]
 

Detailed Description

@@ -134,8 +140,8 @@

Definition at line 209 of file driver_w25qxx.h.

Field Documentation

- -

◆ address_mode

+ +

◆ address_mode

@@ -151,8 +157,8 @@

-

◆ buf

+ +

◆ buf

@@ -168,8 +174,8 @@

-

◆ buf_4k

+ +

◆ buf_4k

@@ -185,8 +191,8 @@

-

◆ debug_print

+ +

◆ debug_print

@@ -202,8 +208,8 @@

-

◆ delay_ms

+ +

◆ delay_ms

@@ -219,8 +225,8 @@

-

◆ delay_us

+ +

◆ delay_us

@@ -236,8 +242,8 @@

-

◆ dual_quad_spi_enable

+ +

◆ dual_quad_spi_enable

@@ -253,8 +259,8 @@

-

◆ dummy

+ +

◆ dummy

@@ -270,8 +276,8 @@

-

◆ inited

+ +

◆ inited

@@ -287,8 +293,8 @@

-

◆ param

+ +

◆ param

@@ -304,8 +310,8 @@

-

◆ spi_qspi

+ +

◆ spi_qspi

@@ -321,8 +327,8 @@

-

◆ spi_qspi_deinit

+ +

◆ spi_qspi_deinit

@@ -338,8 +344,8 @@

-

◆ spi_qspi_init

+ +

◆ spi_qspi_init

@@ -355,8 +361,8 @@

-

◆ spi_qspi_write_read

+ +

◆ spi_qspi_write_read

@@ -372,8 +378,8 @@

-

◆ type

+ +

◆ type

@@ -398,7 +404,7 @@

diff --git a/doc/html/structw25qxx__info__s.html b/doc/html/structw25qxx__info__s.html index d703927..4efaf67 100644 --- a/doc/html/structw25qxx__info__s.html +++ b/doc/html/structw25qxx__info__s.html @@ -1,9 +1,9 @@ - + - - + + LibDriver W25QXX: w25qxx_info_s Struct Reference @@ -23,11 +23,10 @@
- + - @@ -36,21 +35,22 @@
-
LibDriver W25QXX -  1.0.0 +
+
LibDriver W25QXX 1.0.0
W25QXX full function driver
- + +/* @license-end */ +
@@ -64,7 +64,7 @@

@@ -78,16 +78,22 @@
- +
+
+
+
+
Loading...
+
Searching...
+
No Matches
+
+
+
Data Fields
-
-
w25qxx_info_s Struct Reference
w25qxx driver function » w25qxx basic driver function
+
w25qxx_info_s Struct Reference
w25qxx driver function » w25qxx basic driver function
@@ -96,25 +102,25 @@

#include <driver_w25qxx.h>

- - + - + - + - + - + - + - + - + - +

+

Data Fields

char chip_name [32]
char chip_name [32]
 
char manufacturer_name [32]
char manufacturer_name [32]
 
char interface [16]
char interface [16]
 
float supply_voltage_min_v
float supply_voltage_min_v
 
float supply_voltage_max_v
float supply_voltage_max_v
 
float max_current_ma
float max_current_ma
 
float temperature_min
float temperature_min
 
float temperature_max
float temperature_max
 
uint32_t driver_version
uint32_t driver_version
 

Detailed Description

@@ -122,8 +128,8 @@

Definition at line 235 of file driver_w25qxx.h.

Field Documentation

- -

◆ chip_name

+ +

◆ chip_name

@@ -139,8 +145,8 @@

-

◆ driver_version

+ +

◆ driver_version

@@ -156,8 +162,8 @@

-

◆ interface

+ +

◆ interface

@@ -173,8 +179,8 @@

-

◆ manufacturer_name

+ +

◆ manufacturer_name

@@ -190,8 +196,8 @@

-

◆ max_current_ma

+ +

◆ max_current_ma

@@ -207,8 +213,8 @@

-

◆ supply_voltage_max_v

+ +

◆ supply_voltage_max_v

@@ -224,8 +230,8 @@

-

◆ supply_voltage_min_v

+ +

◆ supply_voltage_min_v

@@ -241,8 +247,8 @@

-

◆ temperature_max

+ +

◆ temperature_max

@@ -258,8 +264,8 @@

-

◆ temperature_min

+ +

◆ temperature_min

@@ -284,7 +290,7 @@

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a/doc/html/topics.html b/doc/html/topics.html new file mode 100644 index 0000000..3b7503c --- /dev/null +++ b/doc/html/topics.html @@ -0,0 +1,118 @@ + + + + + + + +LibDriver W25QXX: Topics + + + + + + + + + + + + + +
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LibDriver W25QXX 1.0.0 +
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W25QXX full function driver
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Loading...
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Topics
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Here is a list of all topics with brief descriptions:
+
[detail level 12]
+ + + + + + + + +
 ▼w25qxx driver functionW25qxx driver modules
 w25qxx link driver functionW25qxx link driver modules
 w25qxx basic driver functionW25qxx basic driver modules
 w25qxx advance driver functionW25qxx advance driver modules
 w25qxx extern driver functionW25qxx extern driver modules
 w25qxx interface driver functionW25qxx interface driver modules
 w25qxx example driver functionW25qxx example driver modules
 w25qxx test driver functionW25qxx test driver modules
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+ + + + diff --git a/doc/html/topics.js b/doc/html/topics.js new file mode 100644 index 0000000..8a0f18a --- /dev/null +++ b/doc/html/topics.js @@ -0,0 +1,4 @@ +var topics = +[ + [ "w25qxx driver function", "group__w25qxx__driver.html", "group__w25qxx__driver" ] +]; \ No newline at end of file diff --git a/doc/tagfile b/doc/tagfile new file mode 100644 index 0000000..0c661e5 --- /dev/null +++ b/doc/tagfile @@ -0,0 +1,4087 @@ + + + + mainpage.h + doc/mainpage/ + mainpage_8h.html + + + driver_w25qxx_advance.c + example/ + driver__w25qxx__advance_8c.html + driver_w25qxx_advance.h + + uint8_t + w25qxx_advance_init + group__w25qxx__example__driver.html + ga413b420bc199d09ce5cafee4a4debb28 + (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable) + + + uint8_t + w25qxx_advance_deinit + group__w25qxx__example__driver.html + gaf390bbb2c4140f49d25822d963ead722 + (void) + + + uint8_t + w25qxx_advance_write + group__w25qxx__example__driver.html + ga63f4e1dce2ef7c7de56461524fd22d04 + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_read + group__w25qxx__example__driver.html + ga013a389763200b54daaa345adf9329dc + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_power_down + group__w25qxx__example__driver.html + ga5599de31797633ae75a63bcd5a8f4736 + (void) + + + uint8_t + w25qxx_advance_wake_up + group__w25qxx__example__driver.html + ga8a57e2d056d452abc14b0a08d4223251 + (void) + + + uint8_t + w25qxx_advance_chip_erase + group__w25qxx__example__driver.html + ga15cb243f227ef8d897ef3208b622bded + (void) + + + uint8_t + w25qxx_advance_get_id + group__w25qxx__example__driver.html + ga0f49d960f8b6c6498ab293b369ffc389 + (uint8_t *manufacturer, uint8_t *device_id) + + + uint8_t + w25qxx_advance_page_program + group__w25qxx__example__driver.html + ga39ff13988a3d451231cec3260c13a4cd + (uint32_t addr, uint8_t *data, uint16_t len) + + + uint8_t + w25qxx_advance_sector_erase_4k + group__w25qxx__example__driver.html + ga9325acc424c95624f15e11631082201d + (uint32_t addr) + + + uint8_t + w25qxx_advance_block_erase_32k + group__w25qxx__example__driver.html + gaee04edb9e97785e423dffe14a1cad780 + (uint32_t addr) + + + uint8_t + w25qxx_advance_block_erase_64k + group__w25qxx__example__driver.html + gae7cba4e0b22a1043fe304e46148fa13c + (uint32_t addr) + + + uint8_t + w25qxx_advance_fast_read + group__w25qxx__example__driver.html + ga7ade25a387b9d03ddecefd86fb328389 + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_only_spi_read + group__w25qxx__example__driver.html + gac1c7f320706dd6d6d937da75b8a4da93 + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_only_spi_fast_read_dual_output + group__w25qxx__example__driver.html + ga364d891407cf323d3686d36ad6357604 + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_only_spi_fast_read_quad_output + group__w25qxx__example__driver.html + gaf5f978c432de7d6adaf41cd256724a01 + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_only_spi_fast_read_dual_io + group__w25qxx__example__driver.html + ga4bbaf1a989fae25d16d07edb1e38ca4f + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_only_spi_fast_read_quad_io + group__w25qxx__example__driver.html + ga395add1fa33f4f70d0ba52b38842dbdb + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_only_spi_word_read_quad_io + group__w25qxx__example__driver.html + gaca6b4c6ea32dd96a4ae8714e2862d67a + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_only_spi_octal_word_read_quad_io + group__w25qxx__example__driver.html + ga825a567c535236d7d18ffccf07df59e9 + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_only_spi_page_program_quad_input + group__w25qxx__example__driver.html + gad243655eb738e44c50e6079c983fd782 + (uint32_t addr, uint8_t *data, uint16_t len) + + + uint8_t + w25qxx_advance_get_status1 + group__w25qxx__example__driver.html + ga4c1be6979b4dc878d07ec86b8624c9d2 + (uint8_t *status) + + + uint8_t + w25qxx_advance_get_status2 + group__w25qxx__example__driver.html + gaf4736fff906c2f0c1dbed26b20847052 + (uint8_t *status) + + + uint8_t + w25qxx_advance_get_status3 + group__w25qxx__example__driver.html + ga31bcd3d2cc68d2fc589685b5087bd8b3 + (uint8_t *status) + + + uint8_t + w25qxx_advance_set_status1 + group__w25qxx__example__driver.html + ga5e4938b4575c417ae22fa82079459b1a + (uint8_t status) + + + uint8_t + w25qxx_advance_set_status2 + group__w25qxx__example__driver.html + ga9bc0e696b700d66f15b3605e10d33718 + (uint8_t status) + + + uint8_t + w25qxx_advance_set_status3 + group__w25qxx__example__driver.html + gab5c990ebd4874137b7d23f2b896d4601 + (uint8_t status) + + + uint8_t + w25qxx_advance_only_spi_get_manufacturer_device_id_dual_io + group__w25qxx__example__driver.html + gac0d9e08a37ee37563c8dbb501608a668 + (uint8_t *manufacturer, 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gaee04edb9e97785e423dffe14a1cad780 + (uint32_t addr) + + + uint8_t + w25qxx_advance_block_erase_64k + group__w25qxx__example__driver.html + gae7cba4e0b22a1043fe304e46148fa13c + (uint32_t addr) + + + uint8_t + w25qxx_advance_fast_read + group__w25qxx__example__driver.html + ga7ade25a387b9d03ddecefd86fb328389 + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_get_status1 + group__w25qxx__example__driver.html + ga4c1be6979b4dc878d07ec86b8624c9d2 + (uint8_t *status) + + + uint8_t + w25qxx_advance_get_status2 + group__w25qxx__example__driver.html + gaf4736fff906c2f0c1dbed26b20847052 + (uint8_t *status) + + + uint8_t + w25qxx_advance_get_status3 + group__w25qxx__example__driver.html + ga31bcd3d2cc68d2fc589685b5087bd8b3 + (uint8_t *status) + + + uint8_t + w25qxx_advance_set_status1 + group__w25qxx__example__driver.html + ga5e4938b4575c417ae22fa82079459b1a + (uint8_t status) + + + uint8_t + w25qxx_advance_set_status2 + group__w25qxx__example__driver.html + ga9bc0e696b700d66f15b3605e10d33718 + (uint8_t status) + + + uint8_t + w25qxx_advance_set_status3 + group__w25qxx__example__driver.html + gab5c990ebd4874137b7d23f2b896d4601 + (uint8_t status) + + + uint8_t + w25qxx_advance_get_get_jedec_id + group__w25qxx__example__driver.html + gacc7435a39b61c44f0ce16690d5da896b + (uint8_t *manufacturer, uint8_t device_id[2]) + + + uint8_t + w25qxx_advance_global_block_lock + group__w25qxx__example__driver.html + ga2cbcc018dc11a870d2e0fc3a8946b1d8 + (void) + + + uint8_t + w25qxx_advance_global_block_unlock + group__w25qxx__example__driver.html + ga67c70da103511d1cff9274e61a08ce56 + (void) + + + uint8_t + w25qxx_advance_individual_block_lock + group__w25qxx__example__driver.html + gaa7af99e92b3e81f5b202575b55dc3a7c + (uint32_t addr) + + + uint8_t + w25qxx_advance_individual_block_unlock + group__w25qxx__example__driver.html + ga66726fc451c7804e8fec6eb46a6a77d6 + (uint32_t addr) + + + uint8_t + w25qxx_advance_read_block_lock + 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ga6142b5a1e8602e2990dec34015812615 + (uint8_t *manufacturer, uint8_t *device_id) + + + uint8_t + w25qxx_advance_only_spi_get_unique_id + group__w25qxx__example__driver.html + ga374d35b73fa61d5f7464c3effdae1d57 + (uint8_t id[8]) + + + uint8_t + w25qxx_advance_only_spi_get_sfdp + group__w25qxx__example__driver.html + ga9b1854e0ae52f57523bc2fa7cc0656df + (uint8_t sfdp[256]) + + + uint8_t + w25qxx_advance_only_spi_write_security_register + group__w25qxx__example__driver.html + gaa6c5f97106e769ba071973cc2e782ad4 + (w25qxx_security_register_t num, uint8_t data[256]) + + + uint8_t + w25qxx_advance_only_spi_read_security_register + group__w25qxx__example__driver.html + ga02652a58ee418b432cf77505809d7d42 + (w25qxx_security_register_t num, uint8_t data[256]) + + + uint8_t + w25qxx_advance_only_spi_set_burst_with_wrap + group__w25qxx__example__driver.html + ga16411577fcb794f7485912f5db1bdde9 + (w25qxx_burst_wrap_t wrap) + + + uint8_t + w25qxx_advance_only_qspi_set_read_parameters + group__w25qxx__example__driver.html + gace2a5b7acd9798cfcaa2b5eb2f18e1d1 + (w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length) + + + + driver_w25qxx_basic.c + example/ + driver__w25qxx__basic_8c.html + driver_w25qxx_basic.h + + uint8_t + w25qxx_basic_init + group__w25qxx__example__driver.html + ga1e20768311dfdf33c77b442fa874b61a + (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable) + + + uint8_t + w25qxx_basic_deinit + group__w25qxx__example__driver.html + gaeb167c2924a3490e9a8d11e0c57d2dc0 + (void) + + + uint8_t + w25qxx_basic_power_down + group__w25qxx__example__driver.html + ga572c9f7a0bf2e7ab43dc078121162ec3 + (void) + + + uint8_t + w25qxx_basic_wake_up + group__w25qxx__example__driver.html + ga02914409a9db38f35bc89d9fc4d96a17 + (void) + + + uint8_t + w25qxx_basic_chip_erase + group__w25qxx__example__driver.html + gaf78e9f136e29b826c1a2b337b8451d6d + (void) + + + uint8_t + w25qxx_basic_get_id + group__w25qxx__example__driver.html + gacdda3af55c024b55fc9939aa23650356 + (uint8_t *manufacturer, uint8_t *device_id) + + + uint8_t + w25qxx_basic_write + group__w25qxx__example__driver.html + ga5cf24fc78e1b45e845d02ec9133f46ab + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_basic_read + group__w25qxx__example__driver.html + ga143fa1f19a792142339f3d4e9ce078d0 + (uint32_t addr, uint8_t *data, uint32_t len) + + + + driver_w25qxx_basic.h + example/ + driver__w25qxx__basic_8h.html + driver_w25qxx_interface.h + + uint8_t + w25qxx_basic_init + group__w25qxx__example__driver.html + ga1e20768311dfdf33c77b442fa874b61a + (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable) + + + uint8_t + w25qxx_basic_deinit + group__w25qxx__example__driver.html + gaeb167c2924a3490e9a8d11e0c57d2dc0 + (void) + + + uint8_t + w25qxx_basic_power_down + group__w25qxx__example__driver.html + ga572c9f7a0bf2e7ab43dc078121162ec3 + (void) + + + uint8_t + w25qxx_basic_wake_up + group__w25qxx__example__driver.html + ga02914409a9db38f35bc89d9fc4d96a17 + (void) + + + uint8_t + w25qxx_basic_chip_erase + group__w25qxx__example__driver.html + gaf78e9f136e29b826c1a2b337b8451d6d + (void) + + + uint8_t + w25qxx_basic_get_id + group__w25qxx__example__driver.html + gacdda3af55c024b55fc9939aa23650356 + (uint8_t *manufacturer, uint8_t *device_id) + + + uint8_t + w25qxx_basic_write + group__w25qxx__example__driver.html + ga5cf24fc78e1b45e845d02ec9133f46ab + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_basic_read + group__w25qxx__example__driver.html + ga143fa1f19a792142339f3d4e9ce078d0 + (uint32_t addr, uint8_t *data, uint32_t len) + + + + driver_w25qxx_interface.h + interface/ + driver__w25qxx__interface_8h.html + driver_w25qxx.h + + uint8_t + w25qxx_interface_spi_qspi_init + group__w25qxx__interface__driver.html + ga2bdc17a556f1c801a38656331f3bb7b6 + (void) + + + uint8_t + w25qxx_interface_spi_qspi_deinit + group__w25qxx__interface__driver.html + ga091f3607fcdd47f9e5f94cf1397bd46a + (void) + + + uint8_t + w25qxx_interface_spi_qspi_write_read + group__w25qxx__interface__driver.html + ga3d76ea1f431978f6b55edfd0628c94cd + (uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line) + + + void + w25qxx_interface_delay_ms + group__w25qxx__interface__driver.html + ga964fa232abf98737cb98458eebfff82c + (uint32_t ms) + + + void + w25qxx_interface_delay_us + group__w25qxx__interface__driver.html + ga38e79039b913154c9dd1036ff52bb420 + (uint32_t us) + + + void + w25qxx_interface_debug_print + group__w25qxx__interface__driver.html + ga5325474fa17f6833744e631613fd2a0e + (const char *const fmt,...) + + + + driver_w25qxx_interface_template.c + interface/ + driver__w25qxx__interface__template_8c.html + driver_w25qxx_interface.h + + uint8_t + w25qxx_interface_spi_qspi_init + group__w25qxx__interface__driver.html + ga2bdc17a556f1c801a38656331f3bb7b6 + (void) + + + uint8_t + w25qxx_interface_spi_qspi_deinit + group__w25qxx__interface__driver.html + ga091f3607fcdd47f9e5f94cf1397bd46a + (void) + + + uint8_t + w25qxx_interface_spi_qspi_write_read + group__w25qxx__interface__driver.html + ga3d76ea1f431978f6b55edfd0628c94cd + (uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line) + + + void + w25qxx_interface_delay_ms + group__w25qxx__interface__driver.html + ga964fa232abf98737cb98458eebfff82c + (uint32_t ms) + + + void + w25qxx_interface_delay_us + group__w25qxx__interface__driver.html + ga38e79039b913154c9dd1036ff52bb420 + (uint32_t us) + + + void + w25qxx_interface_debug_print + group__w25qxx__interface__driver.html + ga5325474fa17f6833744e631613fd2a0e + (const char *const fmt,...) + + + + driver_w25qxx.c + src/ + driver__w25qxx_8c.html + driver_w25qxx.h + + #define + CHIP_NAME + driver__w25qxx_8c.html + adc9da0a24824ca1239b593f6459b3954 + + + + #define + MANUFACTURER_NAME + driver__w25qxx_8c.html + aaa2b8f5b105c3019df0cb346f472e803 + + + + #define + SUPPLY_VOLTAGE_MIN + driver__w25qxx_8c.html + aac8d8cbd899667d609787ef4cf37054d + + + + #define + SUPPLY_VOLTAGE_MAX + driver__w25qxx_8c.html + a68eba8b601afe11f1b871d944976c035 + + + + #define + MAX_CURRENT + driver__w25qxx_8c.html + a2989837a37d6d63b59c6dd541b785435 + + + + #define + TEMPERATURE_MIN + driver__w25qxx_8c.html + aab353db5bf4eb787f86a2080f609a551 + + + + #define + TEMPERATURE_MAX + driver__w25qxx_8c.html + a90c0b20d54005712fcc8cb01281360e9 + + + + #define + DRIVER_VERSION + driver__w25qxx_8c.html + ae578001fe043b4cca7a0edd801cfe9c4 + + + + #define + W25QXX_COMMAND_WRITE_ENABLE + driver__w25qxx_8c.html + af0708c46377cfee2dff1ff429d8675d5 + + + + #define + W25QXX_COMMAND_VOLATILE_SR_WRITE_ENABLE + driver__w25qxx_8c.html + a7c9e980e30f499dd97b02935c91f2c02 + + + + #define + W25QXX_COMMAND_WRITE_DISABLE + driver__w25qxx_8c.html + a36dfb1951fe152d63e3715a161646713 + + + + #define + W25QXX_COMMAND_READ_STATUS_REG1 + driver__w25qxx_8c.html + adf682969c34f4b31a87dd92dd18ccea3 + + + + #define + W25QXX_COMMAND_READ_STATUS_REG2 + driver__w25qxx_8c.html + a4a8cdc5b6ce75029df877263bdf35f2a + + + + #define + W25QXX_COMMAND_READ_STATUS_REG3 + driver__w25qxx_8c.html + a09798bdb3fabdf7bb4cfd8bce18100ce + + + + #define + W25QXX_COMMAND_WRITE_STATUS_REG1 + driver__w25qxx_8c.html + a932f54ff92de8bbab4602ab85ac6c155 + + + + #define + W25QXX_COMMAND_WRITE_STATUS_REG2 + driver__w25qxx_8c.html + a4be10ed873d56bb183d9b1bde9105135 + + + + #define + W25QXX_COMMAND_WRITE_STATUS_REG3 + driver__w25qxx_8c.html + a6d099dc6afb59cc950d3abe96b840158 + + + + #define + W25QXX_COMMAND_CHIP_ERASE + driver__w25qxx_8c.html + a63ec9ecd709fcb69107756f253616a6e + + + + #define + W25QXX_COMMAND_ERASE_PROGRAM_SUSPEND + driver__w25qxx_8c.html + a43f9a1e3c03d4a7d2a991e81f0e89f51 + + + + #define + W25QXX_COMMAND_ERASE_PROGRAM_RESUME + driver__w25qxx_8c.html + a0daeb46fb8b219a3d6b37d426c5c0e95 + + + + #define + W25QXX_COMMAND_POWER_DOWN + driver__w25qxx_8c.html + a6fe4d603e33b7c8b8310a884e02a130b + + + + #define + W25QXX_COMMAND_RELEASE_POWER_DOWN + driver__w25qxx_8c.html + ad344065461b2c71521017984f040b425 + + + + #define + W25QXX_COMMAND_READ_MANUFACTURER + driver__w25qxx_8c.html + af6d9a5bc0b57b041e22af80b85e53f56 + + + + #define + W25QXX_COMMAND_JEDEC_ID + driver__w25qxx_8c.html + a54f3ece548cd5eadc94642235442315a + + + + #define + W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_LOCK + driver__w25qxx_8c.html + af81bc9ddfc8da8eb911435e835536ffb + + + + #define + W25QXX_COMMAND_GLOBAL_BLOCK_SECTOR_UNLOCK + driver__w25qxx_8c.html + ab96d2ad8602a5a50c988b8c09d4bbbc5 + + + + #define + W25QXX_COMMAND_ENTER_QSPI_MODE + driver__w25qxx_8c.html + a052d5373086b473bf0d450ea1bd73828 + + + + #define + W25QXX_COMMAND_ENABLE_RESET + driver__w25qxx_8c.html + a6dae3a832abc19d1861fafb32f231d94 + + + + #define + W25QXX_COMMAND_RESET_DEVICE + driver__w25qxx_8c.html + ab25182298c921c8f7f42216e0d5aa56b + + + + #define + W25QXX_COMMAND_READ_UNIQUE_ID + driver__w25qxx_8c.html + a6aeed0a651b31064f25ab2f57fdacf2f + + + + #define + W25QXX_COMMAND_PAGE_PROGRAM + driver__w25qxx_8c.html + aebca01f1f7fd279523d29e579998574a + + + + #define + W25QXX_COMMAND_QUAD_PAGE_PROGRAM + driver__w25qxx_8c.html + a8212fac3d1e43024621b6b560a8dddfe + + + + #define + W25QXX_COMMAND_SECTOR_ERASE_4K + driver__w25qxx_8c.html + a6e7cd159f91e23930450725fd6910f9c + + + + #define + W25QXX_COMMAND_BLOCK_ERASE_32K + driver__w25qxx_8c.html + a8bfb4e869985f5fa21ea7d1d262f90ad + + + + #define + W25QXX_COMMAND_BLOCK_ERASE_64K + driver__w25qxx_8c.html + a4c5a1ed46f4d662a61bc06573ab548a0 + + + + #define + W25QXX_COMMAND_READ_DATA + driver__w25qxx_8c.html + a23fcd6d9b067580d534d626c43b7cff3 + + + + #define + W25QXX_COMMAND_FAST_READ + driver__w25qxx_8c.html + ac957b31a68db8c14f88a196a98b0aa18 + + + + #define + W25QXX_COMMAND_FAST_READ_DUAL_OUTPUT + driver__w25qxx_8c.html + a8d49efa8b978ae8fd3eb18d0e5ae73e8 + + + + #define + W25QXX_COMMAND_FAST_READ_QUAD_OUTPUT + driver__w25qxx_8c.html + a54ddb3d948c4bb95cc62199676c817b2 + + + + #define + W25QXX_COMMAND_READ_SFDP_REGISTER + driver__w25qxx_8c.html + a63774c5ebbdf5445466d840fad567bf6 + + + + #define + W25QXX_COMMAND_ERASE_SECURITY_REGISTER + driver__w25qxx_8c.html + a842f8d646fc8f8ed72422fc1d789498c + + + + #define + W25QXX_COMMAND_PROGRAM_SECURITY_REGISTER + driver__w25qxx_8c.html + a915ab53f5f2d1cad6b954205e76cb4d5 + + + + #define + W25QXX_COMMAND_READ_SECURITY_REGISTER + driver__w25qxx_8c.html + a4dc5fb2c3c15ef86df56b534b874a919 + + + + #define + W25QXX_COMMAND_INDIVIDUAL_BLOCK_LOCK + driver__w25qxx_8c.html + a328f6a9635b1ec6868410375de90b0df + + + + #define + W25QXX_COMMAND_INDIVIDUAL_BLOCK_UNLOCK + driver__w25qxx_8c.html + a3cc8b61583b5eb9d7c1ecd6831689718 + + + + #define + W25QXX_COMMAND_READ_BLOCK_LOCK + driver__w25qxx_8c.html + a19e055bec30de0ad30e7f8ab5feea6a8 + + + + #define + W25QXX_COMMAND_FAST_READ_DUAL_IO + driver__w25qxx_8c.html + a2232ada3558228c2902d654989ca65f1 + + + + #define + W25QXX_COMMAND_DEVICE_ID_DUAL_IO + driver__w25qxx_8c.html + a374c09f79cc61a3e7ac374bca5122e25 + + + + #define + W25QXX_COMMAND_SET_BURST_WITH_WRAP + driver__w25qxx_8c.html + acfb19490258b26729fa83fdd60c4d822 + + + + #define + W25QXX_COMMAND_FAST_READ_QUAD_IO + driver__w25qxx_8c.html + a80d19998d9d1218d0fa69e7d4d6b0ecb + + + + #define + W25QXX_COMMAND_WORD_READ_QUAD_IO + driver__w25qxx_8c.html + a947382a74ac06eb8a2ff8f5bcb1b744d + + + + #define + W25QXX_COMMAND_OCTAL_WORD_READ_QUAD_IO + driver__w25qxx_8c.html + acb7f8599b26c29356651690ec9b25e66 + + + + #define + W25QXX_COMMAND_DEVICE_ID_QUAD_IO + driver__w25qxx_8c.html + a7573bc250d850078be3221c29521bc5c + + + + uint8_t + w25qxx_set_dual_quad_spi + group__w25qxx__basic__driver.html + ga665139209b0abc386474a78d89cce6f2 + (w25qxx_handle_t *handle, w25qxx_bool_t enable) + + + uint8_t + w25qxx_get_dual_quad_spi + group__w25qxx__basic__driver.html + gad4c9b8b0a2d0916c13567f9d7e494cf8 + (w25qxx_handle_t *handle, w25qxx_bool_t *enable) + + + uint8_t + w25qxx_set_type + group__w25qxx__basic__driver.html + gaa57189cd4170b73f8b1300ca15e27de6 + (w25qxx_handle_t *handle, w25qxx_type_t type) + + + uint8_t + w25qxx_get_type + group__w25qxx__basic__driver.html + ga685379998dad173b6d9c0b0da270685c + (w25qxx_handle_t *handle, w25qxx_type_t *type) + + + uint8_t + w25qxx_set_interface + group__w25qxx__basic__driver.html + ga50a62003d566402d46ada2f272c41eb5 + (w25qxx_handle_t *handle, w25qxx_interface_t interface) + + + uint8_t + w25qxx_get_interface + group__w25qxx__basic__driver.html + ga86ef839d475f3926a0be46bbc18d4b45 + (w25qxx_handle_t *handle, w25qxx_interface_t *interface) + + + uint8_t + w25qxx_set_address_mode + group__w25qxx__basic__driver.html + gad0e125eff304ce66fb3956d2c8c80656 + (w25qxx_handle_t *handle, w25qxx_address_mode_t mode) + + + uint8_t + w25qxx_get_address_mode + group__w25qxx__basic__driver.html + ga3a52036a97b12fcbe2280b0901a80b90 + (w25qxx_handle_t *handle, w25qxx_address_mode_t *mode) + + + uint8_t + w25qxx_enable_write + group__w25qxx__advance__driver.html + gaeb269123feec054eaaf70f2ffb5797a3 + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_enable_volatile_sr_write + group__w25qxx__advance__driver.html + ga0f8889d6a25c32e150a2ab30753d461d + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_disable_write + group__w25qxx__advance__driver.html + gac16a31269277051baad6c28fe4254b4a + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_get_status1 + group__w25qxx__advance__driver.html + gaa77d2b00b4fb9cf586f77ace827ea7c6 + (w25qxx_handle_t *handle, uint8_t *status) + + + uint8_t + w25qxx_get_status2 + group__w25qxx__advance__driver.html + gaa21237ecbd5951b8017799066e7db5d9 + (w25qxx_handle_t *handle, uint8_t *status) + + + uint8_t + w25qxx_get_status3 + group__w25qxx__advance__driver.html + ga99cf6a325a00921d4531004f0c1d75b1 + (w25qxx_handle_t *handle, uint8_t *status) + + + uint8_t + w25qxx_set_status1 + group__w25qxx__advance__driver.html + ga246e0bb07c8bbb39731f17906779c012 + (w25qxx_handle_t *handle, uint8_t status) + + + uint8_t + w25qxx_set_status2 + group__w25qxx__advance__driver.html + gaab5f28e8930d50dbc2178e39bc9fa456 + (w25qxx_handle_t *handle, uint8_t status) + + + uint8_t + w25qxx_set_status3 + group__w25qxx__advance__driver.html + gada897a6c6d6acb99f4dd4ff9b65ad8ee + (w25qxx_handle_t *handle, uint8_t status) + + + uint8_t + w25qxx_chip_erase + group__w25qxx__basic__driver.html + ga0862833b36831f92684980b2e21f2e39 + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_erase_program_suspend + group__w25qxx__advance__driver.html + gac7fbabc574c250eec100be861f5918ff + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_erase_program_resume + group__w25qxx__advance__driver.html + ga05c69ac66309544eba4ff38a69f24c00 + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_power_down + group__w25qxx__basic__driver.html + gae4effce67e36120325e3c7b245b90142 + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_release_power_down + group__w25qxx__basic__driver.html + ga09c9b52877516a2ee4c080dc249e7331 + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_get_manufacturer_device_id + group__w25qxx__basic__driver.html + ga921836a777b082ff4d0f322ccfda6b22 + (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id) + + + uint8_t + w25qxx_get_manufacturer_device_id_dual_io + group__w25qxx__advance__driver.html + ga1cd3aec1bdeabbaed5f049fbf83ceeb4 + (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id) + + + uint8_t + w25qxx_get_manufacturer_device_id_quad_io + group__w25qxx__advance__driver.html + ga61bd3ce40b76b6862c6a53e0e37a3455 + (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id) + + + uint8_t + w25qxx_get_jedec_id + group__w25qxx__advance__driver.html + ga8a93ba14a032e10a27f1495fdcf56058 + (w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2]) + + + uint8_t + w25qxx_global_block_lock + group__w25qxx__advance__driver.html + gab5579bc42bc07a7657848140888a817c + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_global_block_unlock + group__w25qxx__advance__driver.html + ga6d62f7d14945cfde7cde7a0e9a4e3afb + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_set_read_parameters + group__w25qxx__advance__driver.html + ga9ad10781d888b32b43b9eba45d049624 + (w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length) + + + uint8_t + w25qxx_enter_qspi_mode + group__w25qxx__advance__driver.html + gaa5ab3548707a95ded115255432224c5a + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_exit_qspi_mode + group__w25qxx__advance__driver.html + ga6b9f75f7426a54ffdb1f5a057f8188f4 + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_enable_reset + group__w25qxx__advance__driver.html + gab55b4e071e20feb58584025287949438 + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_reset_device + group__w25qxx__advance__driver.html + ga2abebfe2a8d9377eb88448ffca73f222 + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_get_unique_id + group__w25qxx__advance__driver.html + ga11af244389478de68a6777076ee82d69 + (w25qxx_handle_t *handle, uint8_t id[8]) + + + uint8_t + w25qxx_get_sfdp + group__w25qxx__advance__driver.html + ga244a91b9c0c32e899ca89e1943045624 + (w25qxx_handle_t *handle, uint8_t sfdp[256]) + + + uint8_t + w25qxx_erase_security_register + group__w25qxx__advance__driver.html + gaf297e2c6877c64f8fd10a555f783ddaf + (w25qxx_handle_t *handle, w25qxx_security_register_t num) + + + uint8_t + w25qxx_program_security_register + group__w25qxx__advance__driver.html + ga4e9c059ff78866e478e835cb27a92899 + (w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256]) + + + uint8_t + w25qxx_read_security_register + group__w25qxx__advance__driver.html + ga4c65debc4947bd9a61e0073105164b9c + (w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256]) + + + uint8_t + w25qxx_only_spi_read + group__w25qxx__basic__driver.html + ga1e9ebf198137d23558dbf6470213c472 + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_fast_read + group__w25qxx__basic__driver.html + gac345ba10af5ad355578fa97697487123 + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_fast_read_dual_output + group__w25qxx__advance__driver.html + ga7a19230ca3916816ea8fb7421483d293 + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_fast_read_quad_output + group__w25qxx__advance__driver.html + gaf4bfafd1f80aa0316a4b1a15183dcd50 + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_fast_read_dual_io + group__w25qxx__advance__driver.html + gac894f4650905cba10dd3a31284de6d5e + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_fast_read_quad_io + group__w25qxx__advance__driver.html + gab97a64bd3776874518f60381d921ae41 + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_word_read_quad_io + group__w25qxx__advance__driver.html + gad97d7e410dd77c49334097a0fd332660 + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_octal_word_read_quad_io + group__w25qxx__advance__driver.html + ga88a62ec42e86db821ff3f0d3ab541dbb + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_page_program + group__w25qxx__basic__driver.html + ga6280e7e4ab26306436e2c210617a28b3 + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len) + + + uint8_t + w25qxx_page_program_quad_input + group__w25qxx__advance__driver.html + ga1f80bbbaaa852eecfffb87737889363d + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len) + + + uint8_t + w25qxx_sector_erase_4k + group__w25qxx__basic__driver.html + ga9a03c51b4c84655350c15fbfce0a6b40 + (w25qxx_handle_t *handle, uint32_t addr) + + + uint8_t + w25qxx_block_erase_32k + group__w25qxx__basic__driver.html + ga39c8fb382e8c3e4d57232dfa79af781c + (w25qxx_handle_t *handle, uint32_t addr) + + + uint8_t + w25qxx_block_erase_64k + group__w25qxx__basic__driver.html + gaf53bc5f6073482b9b74efd417ec7ac83 + (w25qxx_handle_t *handle, uint32_t addr) + + + uint8_t + w25qxx_individual_block_lock + group__w25qxx__advance__driver.html + ga4f00c2c169cb7c3084841c6cd795e76b + (w25qxx_handle_t *handle, uint32_t addr) + + + uint8_t + w25qxx_individual_block_unlock + group__w25qxx__advance__driver.html + ga7f88cedf7619071b3235ba094915b2a7 + (w25qxx_handle_t *handle, uint32_t addr) + + + uint8_t + w25qxx_read_block_lock + group__w25qxx__advance__driver.html + ga59e655ca78a175037ca810bbc8539a96 + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *value) + + + uint8_t + w25qxx_set_burst_with_wrap + group__w25qxx__advance__driver.html + gac19c1d0f3fd48968ea2a93c1dbe3d75d + (w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap) + + + uint8_t + w25qxx_init + group__w25qxx__basic__driver.html + ga8e7a163b3d255b8c7fc035d0d60f2491 + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_deinit + group__w25qxx__basic__driver.html + gaa293c3a46c4010a3af597a83e646de0d + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_read + group__w25qxx__basic__driver.html + gae7479fc9ce911a52e3c5b6f1a615b879 + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_write + group__w25qxx__basic__driver.html + gaaee8264d840e51460821cb6e609338ee + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_write_read_reg + group__w25qxx__extern__driver.html + ga9623a3bec148b148498480518a66cb2b + (w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line) + + + uint8_t + w25qxx_info + group__w25qxx__basic__driver.html + ga996e2d3009432e7f8c1a5175c4438a57 + (w25qxx_info_t *info) + + + + driver_w25qxx.h + src/ + driver__w25qxx_8h.html + w25qxx_handle_s + w25qxx_info_s + + #define + DRIVER_W25QXX_LINK_INIT + group__w25qxx__link__driver.html + ga995378489f95bc6bbddbe710557e3384 + (HANDLE, STRUCTURE) + + + #define + DRIVER_W25QXX_LINK_SPI_QSPI_INIT + group__w25qxx__link__driver.html + gab2587de93f1dba5664eede8cd787a88a + (HANDLE, FUC) + + + #define + DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT + group__w25qxx__link__driver.html + gaec8b55e83b46907be1dd9e7c50be550d + (HANDLE, FUC) + + + #define + DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ + group__w25qxx__link__driver.html + gac8f0ca0a725790bace3241d1d616e3d1 + (HANDLE, FUC) + + + #define + DRIVER_W25QXX_LINK_DELAY_MS + group__w25qxx__link__driver.html + ga7555618f13d2de0003ae6d9483085180 + (HANDLE, FUC) + + + #define + DRIVER_W25QXX_LINK_DELAY_US + group__w25qxx__link__driver.html + gafc81bf850c80dfa316f0c6ab40be6e67 + (HANDLE, FUC) + + + #define + DRIVER_W25QXX_LINK_DEBUG_PRINT + group__w25qxx__link__driver.html + gab8d49ef9dca942fe5f37c30dcd7e22a6 + (HANDLE, FUC) + + + struct w25qxx_handle_s + w25qxx_handle_t + group__w25qxx__basic__driver.html + ga56d8a7b5f8b7eaed8df0b6dc90c266be + + + + struct w25qxx_info_s + w25qxx_info_t + group__w25qxx__basic__driver.html + ga601d841ddd0ff8ad3ab52e07c679ef19 + + + + + w25qxx_type_t + group__w25qxx__basic__driver.html + ga6cb4e5164464df549201dd96cb7a58b1 + + + + W25Q80 + group__w25qxx__basic__driver.html + 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uint8_t + w25qxx_get_dual_quad_spi + group__w25qxx__basic__driver.html + gad4c9b8b0a2d0916c13567f9d7e494cf8 + (w25qxx_handle_t *handle, w25qxx_bool_t *enable) + + + uint8_t + w25qxx_set_type + group__w25qxx__basic__driver.html + gaa57189cd4170b73f8b1300ca15e27de6 + (w25qxx_handle_t *handle, w25qxx_type_t type) + + + uint8_t + w25qxx_get_type + group__w25qxx__basic__driver.html + ga685379998dad173b6d9c0b0da270685c + (w25qxx_handle_t *handle, w25qxx_type_t *type) + + + uint8_t + w25qxx_set_interface + group__w25qxx__basic__driver.html + ga50a62003d566402d46ada2f272c41eb5 + (w25qxx_handle_t *handle, w25qxx_interface_t interface) + + + uint8_t + w25qxx_get_interface + group__w25qxx__basic__driver.html + ga86ef839d475f3926a0be46bbc18d4b45 + (w25qxx_handle_t *handle, w25qxx_interface_t *interface) + + + uint8_t + w25qxx_set_address_mode + group__w25qxx__basic__driver.html + gad0e125eff304ce66fb3956d2c8c80656 + (w25qxx_handle_t *handle, w25qxx_address_mode_t mode) + + + uint8_t + w25qxx_get_address_mode + group__w25qxx__basic__driver.html + ga3a52036a97b12fcbe2280b0901a80b90 + (w25qxx_handle_t *handle, w25qxx_address_mode_t *mode) + + + uint8_t + w25qxx_init + group__w25qxx__basic__driver.html + ga8e7a163b3d255b8c7fc035d0d60f2491 + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_deinit + group__w25qxx__basic__driver.html + gaa293c3a46c4010a3af597a83e646de0d + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_read + group__w25qxx__basic__driver.html + gae7479fc9ce911a52e3c5b6f1a615b879 + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_write + group__w25qxx__basic__driver.html + gaaee8264d840e51460821cb6e609338ee + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_only_spi_read + group__w25qxx__basic__driver.html + ga1e9ebf198137d23558dbf6470213c472 + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_fast_read + group__w25qxx__basic__driver.html + gac345ba10af5ad355578fa97697487123 + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_page_program + group__w25qxx__basic__driver.html + ga6280e7e4ab26306436e2c210617a28b3 + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len) + + + uint8_t + w25qxx_sector_erase_4k + group__w25qxx__basic__driver.html + ga9a03c51b4c84655350c15fbfce0a6b40 + (w25qxx_handle_t *handle, uint32_t addr) + + + uint8_t + w25qxx_block_erase_32k + group__w25qxx__basic__driver.html + ga39c8fb382e8c3e4d57232dfa79af781c + (w25qxx_handle_t *handle, uint32_t addr) + + + uint8_t + w25qxx_block_erase_64k + group__w25qxx__basic__driver.html + gaf53bc5f6073482b9b74efd417ec7ac83 + (w25qxx_handle_t *handle, uint32_t addr) + + + uint8_t + w25qxx_chip_erase + group__w25qxx__basic__driver.html + ga0862833b36831f92684980b2e21f2e39 + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_power_down + group__w25qxx__basic__driver.html + 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ga0f8889d6a25c32e150a2ab30753d461d + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_disable_write + group__w25qxx__advance__driver.html + gac16a31269277051baad6c28fe4254b4a + (w25qxx_handle_t *handle) + + + uint8_t + w25qxx_get_status1 + group__w25qxx__advance__driver.html + gaa77d2b00b4fb9cf586f77ace827ea7c6 + (w25qxx_handle_t *handle, uint8_t *status) + + + uint8_t + w25qxx_get_status2 + group__w25qxx__advance__driver.html + gaa21237ecbd5951b8017799066e7db5d9 + (w25qxx_handle_t *handle, uint8_t *status) + + + uint8_t + w25qxx_get_status3 + group__w25qxx__advance__driver.html + ga99cf6a325a00921d4531004f0c1d75b1 + (w25qxx_handle_t *handle, uint8_t *status) + + + uint8_t + w25qxx_set_status1 + group__w25qxx__advance__driver.html + ga246e0bb07c8bbb39731f17906779c012 + (w25qxx_handle_t *handle, uint8_t status) + + + uint8_t + w25qxx_set_status2 + group__w25qxx__advance__driver.html + gaab5f28e8930d50dbc2178e39bc9fa456 + (w25qxx_handle_t *handle, uint8_t status) + + + uint8_t + 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uint8_t data[256]) + + + uint8_t + w25qxx_individual_block_lock + group__w25qxx__advance__driver.html + ga4f00c2c169cb7c3084841c6cd795e76b + (w25qxx_handle_t *handle, uint32_t addr) + + + uint8_t + w25qxx_individual_block_unlock + group__w25qxx__advance__driver.html + ga7f88cedf7619071b3235ba094915b2a7 + (w25qxx_handle_t *handle, uint32_t addr) + + + uint8_t + w25qxx_read_block_lock + group__w25qxx__advance__driver.html + ga59e655ca78a175037ca810bbc8539a96 + (w25qxx_handle_t *handle, uint32_t addr, uint8_t *value) + + + uint8_t + w25qxx_set_burst_with_wrap + group__w25qxx__advance__driver.html + gac19c1d0f3fd48968ea2a93c1dbe3d75d + (w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap) + + + uint8_t + w25qxx_write_read_reg + group__w25qxx__extern__driver.html + ga9623a3bec148b148498480518a66cb2b + (w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line) + + + + driver_w25qxx_read_test.c + test/ + driver__w25qxx__read__test_8c.html + driver_w25qxx_read_test.h + + uint8_t + w25qxx_read_test + group__w25qxx__test__driver.html + ga4ce42ca34d33cd64cb823040780999af + (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable) + + + + driver_w25qxx_read_test.h + test/ + driver__w25qxx__read__test_8h.html + driver_w25qxx_interface.h + + #define + W25QXX_ENABLE_ERASE_READ_TEST + group__w25qxx__test__driver.html + ga8be86baae6f8448171125c70da1fbfa0 + + + + uint8_t + w25qxx_read_test + group__w25qxx__test__driver.html + ga4ce42ca34d33cd64cb823040780999af + (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable) + + + + driver_w25qxx_register_test.c + test/ + driver__w25qxx__register__test_8c.html + driver_w25qxx_register_test.h + + uint8_t + w25qxx_register_test + group__w25qxx__test__driver.html + ga05d07036254d102ebea0d0b1e83862c8 + (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable) + + + + driver_w25qxx_register_test.h + test/ + driver__w25qxx__register__test_8h.html + driver_w25qxx_interface.h + + uint8_t + w25qxx_register_test + group__w25qxx__test__driver.html + ga05d07036254d102ebea0d0b1e83862c8 + (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable) + + + + w25qxx_handle_s + structw25qxx__handle__s.html + + uint8_t(* + spi_qspi_init + structw25qxx__handle__s.html + aec834df46e5185868dfdcc6fcec2e801 + )(void) + + + uint8_t(* + spi_qspi_deinit + structw25qxx__handle__s.html + a4568e23228174b7d32678d9a96d2420c + )(void) + + + uint8_t(* + spi_qspi_write_read + structw25qxx__handle__s.html + a2d39cde883403779e3da9dd39c32bec5 + )(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line) + + + void(* + delay_ms + structw25qxx__handle__s.html + a406c9433252b7366de417b7a60915c81 + )(uint32_t ms) + + + void(* + delay_us + structw25qxx__handle__s.html + a97ffc4fce945527bd6ab25a3596caef7 + )(uint32_t us) + + + void(* + debug_print + structw25qxx__handle__s.html + a769d5b3a6c14790a0e126e8fe70b384b + )(const char *const fmt,...) + + + uint8_t + inited + structw25qxx__handle__s.html + a19bedf28d2b9748f6a62d9ae93f4e68f + + + + uint16_t + type + structw25qxx__handle__s.html + acb5cfd209ba75c853d03f701e7f91679 + + + + uint8_t + address_mode + structw25qxx__handle__s.html + a5aafa09a37ea9bdb7d3788ff5d39c729 + + + + uint8_t + param + structw25qxx__handle__s.html + a3d28993689552e18d554dc0644efcf16 + + + + uint8_t + dummy + structw25qxx__handle__s.html + aff7b59f569ec689a7580bd6911daafd5 + + + + uint8_t + dual_quad_spi_enable + structw25qxx__handle__s.html + ac2bd5f4f7f52f548fd421c9eedbce1c7 + + + + uint8_t + spi_qspi + structw25qxx__handle__s.html + a9bdb5522ed967c80572351dd53dafe70 + + + + uint8_t + buf + structw25qxx__handle__s.html + a2121914a1858618e9216fa2daf0a42a2 + [256+6] + + + uint8_t + buf_4k + structw25qxx__handle__s.html + ac80aa2927adf500634749513e88c474b + [4096+1] + + + + w25qxx_info_s + structw25qxx__info__s.html + + char + chip_name + structw25qxx__info__s.html + af890958c72bd715cc6454a10dc846ae6 + [32] + + + char + manufacturer_name + structw25qxx__info__s.html + ad25285dbf810c90f8eaf3fcef6f2b2ea + [32] + + + char + interface + structw25qxx__info__s.html + a5778305279cae46b2ecf862e97f73600 + [16] + + + float + supply_voltage_min_v + structw25qxx__info__s.html + ad8bde6ddadaf43d951e62f3befb9d35a + + + + float + supply_voltage_max_v + structw25qxx__info__s.html + a3d2b12bcac7a85ea8646bff9debe8660 + + + + float + max_current_ma + structw25qxx__info__s.html + a9db82802561bf22d799b03a345f1d1dc + + + + float + temperature_min + structw25qxx__info__s.html + a8f9dbe66ac0b66ebae0a36fcb4ba368e + + + + float + temperature_max + structw25qxx__info__s.html + a3366a5dce9b829e03c3d321c2b4df3f6 + + + + uint32_t + driver_version + structw25qxx__info__s.html + a41b0bd442708b70d252c50b92c75265a + + + + + w25qxx_driver + w25qxx driver function + group__w25qxx__driver.html + w25qxx_link_driver + w25qxx_basic_driver + w25qxx_advance_driver + w25qxx_extern_driver + w25qxx_interface_driver + w25qxx_example_driver + w25qxx_test_driver + + + w25qxx_link_driver + w25qxx link driver function + group__w25qxx__link__driver.html + + #define + DRIVER_W25QXX_LINK_INIT + group__w25qxx__link__driver.html + ga995378489f95bc6bbddbe710557e3384 + (HANDLE, STRUCTURE) + + + #define + DRIVER_W25QXX_LINK_SPI_QSPI_INIT + group__w25qxx__link__driver.html + gab2587de93f1dba5664eede8cd787a88a + (HANDLE, FUC) + + + #define + DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT + group__w25qxx__link__driver.html + gaec8b55e83b46907be1dd9e7c50be550d + (HANDLE, FUC) + + + #define + DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ + group__w25qxx__link__driver.html + gac8f0ca0a725790bace3241d1d616e3d1 + (HANDLE, FUC) + + + #define + DRIVER_W25QXX_LINK_DELAY_MS + group__w25qxx__link__driver.html + ga7555618f13d2de0003ae6d9483085180 + (HANDLE, FUC) + + + #define + DRIVER_W25QXX_LINK_DELAY_US + group__w25qxx__link__driver.html + gafc81bf850c80dfa316f0c6ab40be6e67 + (HANDLE, FUC) + + + #define + DRIVER_W25QXX_LINK_DEBUG_PRINT + group__w25qxx__link__driver.html + gab8d49ef9dca942fe5f37c30dcd7e22a6 + (HANDLE, FUC) + + + + w25qxx_basic_driver + w25qxx basic driver function + group__w25qxx__basic__driver.html + w25qxx_handle_s + w25qxx_info_s + + struct w25qxx_handle_s + w25qxx_handle_t + group__w25qxx__basic__driver.html + ga56d8a7b5f8b7eaed8df0b6dc90c266be + + + + struct w25qxx_info_s + w25qxx_info_t + group__w25qxx__basic__driver.html + ga601d841ddd0ff8ad3ab52e07c679ef19 + + + + + w25qxx_type_t + group__w25qxx__basic__driver.html + ga6cb4e5164464df549201dd96cb7a58b1 + + + + W25Q80 + group__w25qxx__basic__driver.html + gga6cb4e5164464df549201dd96cb7a58b1a1ad4f72437de5f26cb7b212d4d91e7c2 + + + + W25Q16 + group__w25qxx__basic__driver.html + gga6cb4e5164464df549201dd96cb7a58b1a66acb81a2d520a7d92ce1d37210c6435 + + + + W25Q32 + group__w25qxx__basic__driver.html + gga6cb4e5164464df549201dd96cb7a58b1a4fdad551be6485441db5951f196db7cb + + + + W25Q64 + group__w25qxx__basic__driver.html + gga6cb4e5164464df549201dd96cb7a58b1a3ea98b2b3e06afa29441c51548bbb16e + + + + W25Q128 + group__w25qxx__basic__driver.html + gga6cb4e5164464df549201dd96cb7a58b1a75afcbe71906d3884f4fcc119c1cabd5 + + + + W25Q256 + group__w25qxx__basic__driver.html + gga6cb4e5164464df549201dd96cb7a58b1ab6db6bd31731e4e95040e8d47f0e45ca + + + + + w25qxx_interface_t + group__w25qxx__basic__driver.html + gacbf327a42336baf10713a1796ff4f2fe + + + + W25QXX_INTERFACE_SPI + group__w25qxx__basic__driver.html + ggacbf327a42336baf10713a1796ff4f2feafea09c65f02cf1a91216205ed21cf4e8 + + + + W25QXX_INTERFACE_QSPI + group__w25qxx__basic__driver.html + ggacbf327a42336baf10713a1796ff4f2fea895dcb5c91da89fad1c12161ffd2d5d4 + + + + + w25qxx_bool_t + group__w25qxx__basic__driver.html + gafb2690946f5baf4be6f3a63dde5491fb + + + + W25QXX_BOOL_FALSE + group__w25qxx__basic__driver.html + ggafb2690946f5baf4be6f3a63dde5491fba02afbdc2c6c3d761cd31ac39c857ee9a + + + + W25QXX_BOOL_TRUE + group__w25qxx__basic__driver.html + ggafb2690946f5baf4be6f3a63dde5491fbae2a935d12b0b1bc9fc321246ee0e0df8 + + + + + w25qxx_address_mode_t + group__w25qxx__basic__driver.html + gaa4c45f146d1ade8a2da8e751818fa4a2 + + + + W25QXX_ADDRESS_MODE_3_BYTE + group__w25qxx__basic__driver.html + ggaa4c45f146d1ade8a2da8e751818fa4a2a3ed0d9a1ce66f96f0ef6baba28869503 + + + + W25QXX_ADDRESS_MODE_4_BYTE + group__w25qxx__basic__driver.html + ggaa4c45f146d1ade8a2da8e751818fa4a2aa29a90b6728795aa010735e44a5292fe + + + + uint8_t + w25qxx_info + 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group__w25qxx__example__driver.html + gaa7af99e92b3e81f5b202575b55dc3a7c + (uint32_t addr) + + + uint8_t + w25qxx_advance_individual_block_unlock + group__w25qxx__example__driver.html + ga66726fc451c7804e8fec6eb46a6a77d6 + (uint32_t addr) + + + uint8_t + w25qxx_advance_read_block_lock + group__w25qxx__example__driver.html + gac1773fe914a01825ca28346205601036 + (uint32_t addr, uint8_t *value) + + + uint8_t + w25qxx_advance_reset + group__w25qxx__example__driver.html + ga0f65053ad28443f19ed73dbc3412b5b2 + (void) + + + uint8_t + w25qxx_advance_only_spi_read + group__w25qxx__example__driver.html + gac1c7f320706dd6d6d937da75b8a4da93 + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_only_spi_fast_read_dual_output + group__w25qxx__example__driver.html + ga364d891407cf323d3686d36ad6357604 + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_only_spi_fast_read_quad_output + group__w25qxx__example__driver.html + gaf5f978c432de7d6adaf41cd256724a01 + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_only_spi_fast_read_dual_io + group__w25qxx__example__driver.html + ga4bbaf1a989fae25d16d07edb1e38ca4f + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_only_spi_fast_read_quad_io + group__w25qxx__example__driver.html + ga395add1fa33f4f70d0ba52b38842dbdb + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_only_spi_word_read_quad_io + group__w25qxx__example__driver.html + gaca6b4c6ea32dd96a4ae8714e2862d67a + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_only_spi_octal_word_read_quad_io + group__w25qxx__example__driver.html + ga825a567c535236d7d18ffccf07df59e9 + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_advance_only_spi_page_program_quad_input + group__w25qxx__example__driver.html + gad243655eb738e44c50e6079c983fd782 + (uint32_t addr, uint8_t *data, uint16_t len) + + + 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ga02652a58ee418b432cf77505809d7d42 + (w25qxx_security_register_t num, uint8_t data[256]) + + + uint8_t + w25qxx_advance_only_spi_set_burst_with_wrap + group__w25qxx__example__driver.html + ga16411577fcb794f7485912f5db1bdde9 + (w25qxx_burst_wrap_t wrap) + + + uint8_t + w25qxx_advance_only_qspi_set_read_parameters + group__w25qxx__example__driver.html + gace2a5b7acd9798cfcaa2b5eb2f18e1d1 + (w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length) + + + uint8_t + w25qxx_basic_init + group__w25qxx__example__driver.html + ga1e20768311dfdf33c77b442fa874b61a + (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable) + + + uint8_t + w25qxx_basic_deinit + group__w25qxx__example__driver.html + gaeb167c2924a3490e9a8d11e0c57d2dc0 + (void) + + + uint8_t + w25qxx_basic_power_down + group__w25qxx__example__driver.html + ga572c9f7a0bf2e7ab43dc078121162ec3 + (void) + + + uint8_t + w25qxx_basic_wake_up + group__w25qxx__example__driver.html + ga02914409a9db38f35bc89d9fc4d96a17 + (void) + + + uint8_t + w25qxx_basic_chip_erase + group__w25qxx__example__driver.html + gaf78e9f136e29b826c1a2b337b8451d6d + (void) + + + uint8_t + w25qxx_basic_get_id + group__w25qxx__example__driver.html + gacdda3af55c024b55fc9939aa23650356 + (uint8_t *manufacturer, uint8_t *device_id) + + + uint8_t + w25qxx_basic_write + group__w25qxx__example__driver.html + ga5cf24fc78e1b45e845d02ec9133f46ab + (uint32_t addr, uint8_t *data, uint32_t len) + + + uint8_t + w25qxx_basic_read + group__w25qxx__example__driver.html + ga143fa1f19a792142339f3d4e9ce078d0 + (uint32_t addr, uint8_t *data, uint32_t len) + + + + w25qxx_test_driver + w25qxx test driver function + group__w25qxx__test__driver.html + + #define + W25QXX_ENABLE_ERASE_READ_TEST + group__w25qxx__test__driver.html + ga8be86baae6f8448171125c70da1fbfa0 + + + + uint8_t + w25qxx_read_test + group__w25qxx__test__driver.html + ga4ce42ca34d33cd64cb823040780999af + (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable) + + + uint8_t + w25qxx_register_test + group__w25qxx__test__driver.html + ga05d07036254d102ebea0d0b1e83862c8 + (w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable) + + + + index + LibDriver W25QXX + index.html + +