overview

Click Here to edit this image in browser. Please submit a Pull Request if your modified xml represents more accurate information

The above image shows the data/control flow that applies to emulator binaries that are built from directories emulator/rv32_1stage emulator/rv32_2stage emulator/rv32_3stage emulator/rv32_5stage emulator/rv32_ucode of all branches

In all the configurations, the binaries are loaded into the processor's memory using the following sequence

• Configure system bus control and status (sbcs) register to set AUTOINCREMENT i.e. increment the address in sbaddress register on every access of sbdata0
• Write the desired address where the binary is to be loaded into sbaddress register of Debug Module
• Write data i.e. binary in 32-bit chunks to the sbdata0 register