diff --git a/CHANGELOG.md b/CHANGELOG.md
index 784b051f..b18c11fa 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -35,6 +35,8 @@ This release has an [MSRV][] of 1.88.
   The fallback level can be restored with the `force_support_fallback` cargo feature. We don't expect this to be necessary outside
   of tests.
 - Code generation for `select` and `unzip` operations on x86 has been improved. ([#115][] by [@valadaptive][])
+- Breaking change: The native-width associated types (`f32s`, `u8s`, etc.) for the `Avx2` struct have been widened from 128-bit
+  types (like `f32x4`) to 256-bit types (like `f32x8`). ([#123][] by [@valadaptive][])
 
 ### Removed
 
@@ -113,6 +115,7 @@ No changelog was kept for this release.
 [#99]: https://github.com/linebender/fearless_simd/pull/99
 [#105]: https://github.com/linebender/fearless_simd/pull/105
 [#115]: https://github.com/linebender/fearless_simd/pull/115
+[#123]: https://github.com/linebender/fearless_simd/pull/123
 
 [Unreleased]: https://github.com/linebender/fearless_simd/compare/v0.3.0...HEAD
 [0.3.0]: https://github.com/linebender/fearless_simd/compare/v0.3.0...v0.2.0
diff --git a/fearless_simd/src/generated/avx2.rs b/fearless_simd/src/generated/avx2.rs
index 9ddbc876..853a47e9 100644
--- a/fearless_simd/src/generated/avx2.rs
+++ b/fearless_simd/src/generated/avx2.rs
@@ -35,16 +35,16 @@ impl Avx2 {
 }
 impl Seal for Avx2 {}
 impl Simd for Avx2 {
-    type f32s = f32x4<Self>;
-    type u8s = u8x16<Self>;
-    type i8s = i8x16<Self>;
-    type u16s = u16x8<Self>;
-    type i16s = i16x8<Self>;
-    type u32s = u32x4<Self>;
-    type i32s = i32x4<Self>;
-    type mask8s = mask8x16<Self>;
-    type mask16s = mask16x8<Self>;
-    type mask32s = mask32x4<Self>;
+    type f32s = f32x8<Self>;
+    type u8s = u8x32<Self>;
+    type i8s = i8x32<Self>;
+    type u16s = u16x16<Self>;
+    type i16s = i16x16<Self>;
+    type u32s = u32x8<Self>;
+    type i32s = i32x8<Self>;
+    type mask8s = mask8x32<Self>;
+    type mask16s = mask16x16<Self>;
+    type mask32s = mask32x8<Self>;
     #[inline(always)]
     fn level(self) -> Level {
         Level::Avx2(self)
diff --git a/fearless_simd_gen/src/mk_avx2.rs b/fearless_simd_gen/src/mk_avx2.rs
index 88007383..2b9f681e 100644
--- a/fearless_simd_gen/src/mk_avx2.rs
+++ b/fearless_simd_gen/src/mk_avx2.rs
@@ -97,16 +97,16 @@ fn mk_simd_impl() -> TokenStream {
     // be factored out for DRY.
     quote! {
         impl Simd for #level_tok {
-            type f32s = f32x4<Self>;
-            type u8s = u8x16<Self>;
-            type i8s = i8x16<Self>;
-            type u16s = u16x8<Self>;
-            type i16s = i16x8<Self>;
-            type u32s = u32x4<Self>;
-            type i32s = i32x4<Self>;
-            type mask8s = mask8x16<Self>;
-            type mask16s = mask16x8<Self>;
-            type mask32s = mask32x4<Self>;
+            type f32s = f32x8<Self>;
+            type u8s = u8x32<Self>;
+            type i8s = i8x32<Self>;
+            type u16s = u16x16<Self>;
+            type i16s = i16x16<Self>;
+            type u32s = u32x8<Self>;
+            type i32s = i32x8<Self>;
+            type mask8s = mask8x32<Self>;
+            type mask16s = mask16x16<Self>;
+            type mask32s = mask32x8<Self>;
             #[inline(always)]
             fn level(self) -> Level {
                 Level::#level_tok(self)