diff --git a/lib/Conversion/HWArithToHW/HWArithToHW.cpp b/lib/Conversion/HWArithToHW/HWArithToHW.cpp
index 2311f0c0f054..4af3a313aa2e 100644
--- a/lib/Conversion/HWArithToHW/HWArithToHW.cpp
+++ b/lib/Conversion/HWArithToHW/HWArithToHW.cpp
@@ -119,6 +119,8 @@ static bool isSignednessType(Type type) {
           })
           .Case<hw::InOutType>(
               [](auto type) { return isSignednessType(type.getElementType()); })
+          .Case<hw::TypeAliasType>(
+              [](auto type) { return isSignednessType(type.getInnerType()); })
           .Default([](auto type) { return false; });
 
   return match;
@@ -378,6 +380,10 @@ Type HWArithToHWTypeConverter::removeSignedness(Type type) {
           .Case<hw::InOutType>([this](auto type) {
             return hw::InOutType::get(removeSignedness(type.getElementType()));
           })
+          .Case<hw::TypeAliasType>([this](auto type) {
+            return hw::TypeAliasType::get(
+                type.getRef(), removeSignedness(type.getInnerType()));
+          })
           .Default([](auto type) { return type; });
 
   return convertedType;
diff --git a/test/Conversion/HWArithToHW/test_basic.mlir b/test/Conversion/HWArithToHW/test_basic.mlir
index 11d4c5282ac6..a75986b8d951 100644
--- a/test/Conversion/HWArithToHW/test_basic.mlir
+++ b/test/Conversion/HWArithToHW/test_basic.mlir
@@ -360,3 +360,24 @@ hw.module @wires () {
   sv.assign %r52, %c0_ui2 : ui2
   sv.assign %r53, %c0_ui2 : ui2
 }
+
+// -----
+
+// CHECK:  hw.type_scope @pycde {
+// CHECK:    hw.typedecl @MMIOIntermediateCmd : !hw.struct<offset: i32>
+// CHECK:  }
+// CHECK:  hw.module @MMIOAxiReadWriteMux(out cmd : !hw.typealias<@pycde::@MMIOIntermediateCmd, !hw.struct<offset: i32>>) {
+// CHECK:    %c0_i32 = hw.constant 0 : i32
+// CHECK:    [[R0:%.+]] = hw.struct_create (%c0_i32) : !hw.typealias<@pycde::@MMIOIntermediateCmd, !hw.struct<offset: i32>>
+// CHECK:    hw.output [[R0]] : !hw.typealias<@pycde::@MMIOIntermediateCmd, !hw.struct<offset: i32>>
+// CHECK:  }
+
+hw.type_scope @pycde {
+  hw.typedecl @MMIOIntermediateCmd : !hw.struct<offset: ui32>
+}
+hw.module @MMIOAxiReadWriteMux(out cmd : !hw.typealias<@pycde::@MMIOIntermediateCmd, !hw.struct<offset: ui32>>) {
+  %2 = hw.constant 0 : i32
+  %3 = hwarith.cast %2 : (i32) -> ui32
+  %4 = hw.struct_create (%3) : !hw.typealias<@pycde::@MMIOIntermediateCmd, !hw.struct<offset: ui32>>
+  hw.output %4: !hw.typealias<@pycde::@MMIOIntermediateCmd, !hw.struct<offset: ui32>>
+}