From aae068d048c3a8a1541c23b92f6eec69df14c776 Mon Sep 17 00:00:00 2001 From: Nandor Licker Date: Thu, 9 Nov 2023 09:40:38 -0800 Subject: [PATCH] Revert "[FIRRTL] Simplify muxes when a particular bit value selects the same value. (#6382)" This reverts commit e49b521e5946e03f8db0b0f16523e0740a638094. --- lib/Dialect/FIRRTL/FIRRTLFolds.cpp | 62 ----------------------- test/Dialect/FIRRTL/canonicalization.mlir | 9 ---- 2 files changed, 71 deletions(-) diff --git a/lib/Dialect/FIRRTL/FIRRTLFolds.cpp b/lib/Dialect/FIRRTL/FIRRTLFolds.cpp index aec90c670531..dbc78f00bce8 100644 --- a/lib/Dialect/FIRRTL/FIRRTLFolds.cpp +++ b/lib/Dialect/FIRRTL/FIRRTLFolds.cpp @@ -1692,68 +1692,6 @@ LogicalResult MultibitMuxOp::canonicalize(MultibitMuxOp op, } } - // Eliminate unneeded bits in the index. These arise from duplicate values in - // the mux. This is done by slicing the mux into a mux tree. - // multibit_mux(index, {a, b, a, c}) -> multibit_mux(index[0], - // multibit_mux(index[1], a,a), multibit_mux(index[1]}, {b,c})) Search for - // identities in specific bit slices. This is robust to unknown width - // indexes. - for (uint64_t bit = 0, - lastbit = op.getIndex().getType().getBitWidthOrSentinel(); - bit < lastbit; ++bit) { - for (int curval = 0; curval <= 1; ++curval) { - // We don't collect values here as the normal case is we don't find a - // match, so we don't want to move data around and do allocations. - Value v; - uint64_t count = 0; - for (uint64_t i = 0, e = op.getInputs().size(); i < e; ++i) { - if (((i >> bit) & 1) != curval) - continue; - ++count; - if (!v) - v = op.getInputs()[i]; - if (v != op.getInputs()[i]) { - v = {}; - break; - } - } - if (!v || count == 1) - continue; - // Found match, collect varying side of the future mux - SmallVector nonSimple; - for (uint64_t i = 0, e = op.getInputs().size(); i < e; ++i) { - if (((i >> bit) & 1) != curval) - nonSimple.push_back(op.getInputs()[i]); - } - Value indBit = rewriter.createOrFold(op.getLoc(), - op.getIndex(), bit, bit); - Value indBitRemLow; - if (bit) - indBitRemLow = rewriter.createOrFold( - op.getLoc(), op.getIndex(), bit - 1, 0); - else - indBitRemLow = rewriter.create( - op.getLoc(), IntType::get(op.getContext(), false, 0), - APInt(0U, 0UL)); - Value indBitRemHigh; - if (bit == lastbit - 1) - indBitRemHigh = rewriter.create( - op.getLoc(), IntType::get(op.getContext(), false, 0), - APInt(0U, 0UL)); - else - indBitRemHigh = rewriter.createOrFold( - op.getLoc(), op.getIndex(), lastbit - 1, bit + 1); - Value indBitRem = rewriter.createOrFold( - op.getLoc(), indBitRemHigh, indBitRemLow); - Value otherSide = - rewriter.create(op.getLoc(), indBitRem, nonSimple); - Value high = curval ? otherSide : v; - Value low = curval ? v : otherSide; - replaceOpWithNewOpAndCopyName(rewriter, op, indBit, high, low); - return success(); - } - } - // If the size is 2, canonicalize into a normal mux to introduce more folds. if (op.getInputs().size() != 2) return failure(); diff --git a/test/Dialect/FIRRTL/canonicalization.mlir b/test/Dialect/FIRRTL/canonicalization.mlir index 25ab5a5d8b1e..6587c21a017f 100644 --- a/test/Dialect/FIRRTL/canonicalization.mlir +++ b/test/Dialect/FIRRTL/canonicalization.mlir @@ -3309,13 +3309,4 @@ firrtl.module @Whens(in %clock: !firrtl.clock, in %a: !firrtl.uint<1>, in %reset } } -// CHECK-LABEL: firrtl.module @UselessIndexBit -firrtl.module @UselessIndexBit(in %a: !firrtl.uint<3>, out %b: !firrtl.uint<4>, in %c: !firrtl.uint<4>, in %d: !firrtl.uint<4>, in %e: !firrtl.uint<4>) attributes {convention = #firrtl} { - %c0_ui4 = firrtl.constant 0 : !firrtl.uint<4> {name = "ttable_2"} - %0 = firrtl.multibit_mux %a, %c0_ui4, %c0_ui4, %c0_ui4, %c0_ui4, %c0_ui4, %c0_ui4, %d, %c : !firrtl.uint<3>, !firrtl.uint<4> - firrtl.strictconnect %b, %0 : !firrtl.uint<4> - // CHECK: firrtl.mux({{.*}}, %d, %c) - // CHECK: firrtl.mux({{.*}}, %c0_ui4, {{.*}}) -} - }