diff --git a/include/circt/Support/FVInt.h b/include/circt/Support/FVInt.h
index dfafb5b96481..9c057fa0b8c0 100644
--- a/include/circt/Support/FVInt.h
+++ b/include/circt/Support/FVInt.h
@@ -616,6 +616,7 @@ class FVInt {
   SmallString<16> toString(unsigned radix = 10, bool uppercase = true) const {
     SmallString<16> str;
     bool success = tryToString(str, radix, uppercase);
+    (void)success;
     assert(success && "radix cannot represent FVInt");
     return str;
   }
diff --git a/lib/Dialect/AIG/Transforms/LowerVariadic.cpp b/lib/Dialect/AIG/Transforms/LowerVariadic.cpp
index 913a066d665d..a5983a89b81b 100644
--- a/lib/Dialect/AIG/Transforms/LowerVariadic.cpp
+++ b/lib/Dialect/AIG/Transforms/LowerVariadic.cpp
@@ -58,6 +58,8 @@ static Value lowerVariadicAndInverterOp(AndInverterOp op, OperandRange operands,
                                    inverts.drop_front(firstHalf), rewriter);
     return rewriter.create<AndInverterOp>(op.getLoc(), lhs, rhs);
   }
+
+  return Value();
 }
 
 struct VariadicOpConversion : OpRewritePattern<aig::AndInverterOp> {
diff --git a/lib/Dialect/FIRRTL/Transforms/IMDeadCodeElim.cpp b/lib/Dialect/FIRRTL/Transforms/IMDeadCodeElim.cpp
index 65e7a76efa8f..13f8c8a2363e 100644
--- a/lib/Dialect/FIRRTL/Transforms/IMDeadCodeElim.cpp
+++ b/lib/Dialect/FIRRTL/Transforms/IMDeadCodeElim.cpp
@@ -540,8 +540,7 @@ void IMDeadCodeElimPass::visitSubelement(Operation *op) {
 }
 
 void IMDeadCodeElimPass::rewriteModuleBody(FModuleOp module) {
-  auto *body = module.getBodyBlock();
-  assert(isBlockExecutable(body) &&
+  assert(isBlockExecutable(module.getBodyBlock()) &&
          "unreachable modules must be already deleted");
 
   auto removeDeadNonLocalAnnotations = [&](int _, Annotation anno) -> bool {
diff --git a/lib/Dialect/LLHD/IR/LLHDOps.cpp b/lib/Dialect/LLHD/IR/LLHDOps.cpp
index 1395173432a4..30c135d22491 100644
--- a/lib/Dialect/LLHD/IR/LLHDOps.cpp
+++ b/lib/Dialect/LLHD/IR/LLHDOps.cpp
@@ -263,6 +263,7 @@ DeletionKind SigArrayGetOp::rewire(const DestructurableMemorySlot &slot,
                                    const DataLayout &dataLayout) {
   APInt idx;
   bool result = matchPattern(getIndex(), m_ConstantInt(&idx));
+  (void)result;
   assert(result);
   auto index =
       IntegerAttr::get(IndexType::get(getContext()), idx.getZExtValue());
diff --git a/lib/Dialect/LLHD/Transforms/TemporalCodeMotionPass.cpp b/lib/Dialect/LLHD/Transforms/TemporalCodeMotionPass.cpp
index b9eb9c39e4e8..ec615eebd11a 100644
--- a/lib/Dialect/LLHD/Transforms/TemporalCodeMotionPass.cpp
+++ b/lib/Dialect/LLHD/Transforms/TemporalCodeMotionPass.cpp
@@ -174,6 +174,7 @@ LogicalResult TemporalCodeMotionPass::runOnProcess(llhd::ProcessOp procOp) {
   // TODO: consider the case where a wait brances to itself
   for (unsigned currTR = 0; currTR < numTRs; ++currTR) {
     unsigned numTRSuccs = trAnalysis.getNumTRSuccessors(currTR);
+    (void)numTRSuccs;
     // NOTE: Above error checks make this impossible to trigger, but the above
     // are changed this one might have to be promoted to a proper error message.
     assert((numTRSuccs == 1 ||
diff --git a/test/CAPI/firrtl.c b/test/CAPI/firrtl.c
index 40c5cd141418..351700dcd7af 100644
--- a/test/CAPI/firrtl.c
+++ b/test/CAPI/firrtl.c
@@ -48,6 +48,7 @@ void testExport(MlirContext ctx) {
       mlirModuleCreateParse(ctx, mlirStringRefCreateFromCString(testFIR));
 
   MlirLogicalResult result = mlirExportFIRRTL(module, dumpCallback, NULL);
+  (void)result;
   assert(mlirLogicalResultIsSuccess(result));
 
   // CHECK: FIRRTL version 4.1.0
@@ -78,12 +79,11 @@ void testValueFoldFlow(MlirContext ctx) {
   MlirBlock firModule = mlirRegionGetFirstBlock(
       mlirOperationGetRegion(mlirBlockGetFirstOperation(firCircuit), 0));
 
-  MlirValue in = mlirBlockGetArgument(firModule, 0);
-  MlirValue out = mlirBlockGetArgument(firModule, 1);
-
-  assert(firrtlValueFoldFlow(in, FIRRTL_VALUE_FLOW_SOURCE) ==
+  assert(firrtlValueFoldFlow(mlirBlockGetArgument(firModule, 0),
+                             FIRRTL_VALUE_FLOW_SOURCE) ==
          FIRRTL_VALUE_FLOW_SOURCE);
-  assert(firrtlValueFoldFlow(out, FIRRTL_VALUE_FLOW_SOURCE) ==
+  assert(firrtlValueFoldFlow(mlirBlockGetArgument(firModule, 1),
+                             FIRRTL_VALUE_FLOW_SOURCE) ==
          FIRRTL_VALUE_FLOW_SINK);
 }
 
@@ -107,6 +107,7 @@ void testImportAnnotations(MlirContext ctx) {
   bool succeeded = firrtlImportAnnotationsFromJSONRaw(
       ctx, mlirStringRefCreateFromCString(rawAnnotationsJSON),
       &rawAnnotationsAttr);
+  (void)succeeded;
   assert(succeeded);
   mlirOperationSetAttributeByName(
       firCircuit, mlirStringRefCreateFromCString("rawAnnotations"),
@@ -226,11 +227,10 @@ void testTypeGetMaskType(MlirContext ctx) {
           .type = firrtlTypeGetUInt(ctx, 1),
       },
   };
-  MlirType lhsBundle =
-      firrtlTypeGetBundle(ctx, ARRAY_SIZE(lhsFields), lhsFields);
-  MlirType rhsBundle =
-      firrtlTypeGetBundle(ctx, ARRAY_SIZE(rhsFields), rhsFields);
-  assert(mlirTypeEqual(firrtlTypeGetMaskType(lhsBundle), rhsBundle));
+  assert(mlirTypeEqual(
+      firrtlTypeGetMaskType(
+          firrtlTypeGetBundle(ctx, ARRAY_SIZE(lhsFields), lhsFields)),
+      firrtlTypeGetBundle(ctx, ARRAY_SIZE(rhsFields), rhsFields)));
 }
 
 int main(void) {