From ff186c4cb511b925f83c50a12ca705c5674bfb8f Mon Sep 17 00:00:00 2001
From: Jingren Wang <34462943+wjrforcyber@users.noreply.github.com>
Date: Tue, 24 Sep 2024 13:57:00 +0800
Subject: [PATCH] Refactor(Changelog): Implemented `aig_resubstitution2`
 instead of `xag_resubstitution2` (#659)

---
 docs/changelog.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/changelog.rst b/docs/changelog.rst
index f5dd5874e..1f3b2c828 100644
--- a/docs/changelog.rst
+++ b/docs/changelog.rst
@@ -19,7 +19,7 @@ v0.4 (not yet released)
     - Adding a new network type to represent multi-output gates (`block_network`) `#623 <https://github.com/lsils/mockturtle/pull/623>`_
 * Algorithms:
     - AIG balancing (`aig_balance`) `#580 <https://github.com/lsils/mockturtle/pull/580>`_
-    - AIG resubstitution (`xag_resubstitution2`) `#658 <https://github.com/lsils/mockturtle/pull/658>`_
+    - AIG resubstitution (`aig_resubstitution2`) `#658 <https://github.com/lsils/mockturtle/pull/658>`_
     - Cost-generic resubstitution (`cost_generic_resub`) `#554 <https://github.com/lsils/mockturtle/pull/554>`_
     - Cost aware resynthesis solver (`cost_resyn`) `#554 <https://github.com/lsils/mockturtle/pull/554>`_
     - Resynthesis based on SOP factoring (`sop_factoring`) `#579 <https://github.com/lsils/mockturtle/pull/579>`_