From 34d96b3483334de64c165d254a86831ecc0db6c1 Mon Sep 17 00:00:00 2001 From: sadko4u Date: Sat, 25 Nov 2023 18:45:16 +0300 Subject: [PATCH] Improved performance of logarithm values calculations --- CHANGELOG | 1 + .../dsp/arch/aarch64/asimd/pmath/log.h | 33 +++++-------------- 2 files changed, 10 insertions(+), 24 deletions(-) diff --git a/CHANGELOG b/CHANGELOG index 1ec2f543..6fb1bfcc 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -5,6 +5,7 @@ === 1.0.20 === * Optimization of compressor and gate functions using AVX-512 instruction set. * Introduced SIMD-optimized expander curve and gain functions. +* Improved performance of logarithm values calculations. * Updated build scripts. === 1.0.19 === diff --git a/include/private/dsp/arch/aarch64/asimd/pmath/log.h b/include/private/dsp/arch/aarch64/asimd/pmath/log.h index 81354954..d7b49863 100644 --- a/include/private/dsp/arch/aarch64/asimd/pmath/log.h +++ b/include/private/dsp/arch/aarch64/asimd/pmath/log.h @@ -35,14 +35,12 @@ namespace lsp { LSP_DSP_VEC4(0x007fffff), // MM = frac LSP_DSP_VEC4(0x0000007f), // ME = 127 - LSP_DSP_VEC4(0x3d888889), // C0 = 1/15 = 0.0666666701436043 - LSP_DSP_VEC4(0x3d9d89d9), // C1 = 1/13 = 0.0769230797886848 - LSP_DSP_VEC4(0x3dba2e8c), // C2 = 1/11 = 0.0909090936183929 - LSP_DSP_VEC4(0x3de38e39), // C3 = 1/9 = 0.1111111119389534 - LSP_DSP_VEC4(0x3e124925), // C4 = 1/7 = 0.1428571492433548 - LSP_DSP_VEC4(0x3e4ccccd), // C5 = 1/5 = 0.2000000029802322 - LSP_DSP_VEC4(0x3eaaaaab), // C6 = 1/3 = 0.3333333432674408 - LSP_DSP_VEC4(0x3f800000), // C7 = 1.0f + LSP_DSP_VEC4(0x3dba2e8c), // C0 = 1/11 = 0.0909090936183929 + LSP_DSP_VEC4(0x3de38e39), // C1 = 1/9 = 0.1111111119389534 + LSP_DSP_VEC4(0x3e124925), // C2 = 1/7 = 0.1428571492433548 + LSP_DSP_VEC4(0x3e4ccccd), // C3 = 1/5 = 0.2000000029802322 + LSP_DSP_VEC4(0x3eaaaaab), // C4 = 1/3 = 0.3333333432674408 + LSP_DSP_VEC4(0x3f800000), // C5 = 1.0f }; static const float LOGB_C[] __lsp_aligned16 = @@ -115,15 +113,7 @@ namespace lsp __ASM_EMIT("fmul v7.4s, v7.4s, v5.4s") \ __ASM_EMIT("fadd v6.4s, v6.4s, " C5 ".4s") /* v6 = C5+Y*(C4+Y*(C3+Y*(C2+Y*(C1+C0*Y)))) */ \ __ASM_EMIT("fadd v7.4s, v7.4s, " C5 ".4s") \ - __ASM_EMIT("fmul v6.4s, v6.4s, v4.4s") /* v6 = Y*(C5+Y*(C4+Y*(C3+Y*(C2+Y*(C1+C0*Y))))) */ \ - __ASM_EMIT("fmul v7.4s, v7.4s, v5.4s") \ - __ASM_EMIT("fadd v6.4s, v6.4s, " C6 ".4s") /* v6 = C6+Y*(C5+Y*(C4+Y*(C3+Y*(C2+Y*(C1+C0*Y))))) */ \ - __ASM_EMIT("fadd v7.4s, v7.4s, " C6 ".4s") \ - __ASM_EMIT("fmul v6.4s, v6.4s, v4.4s") /* v6 = Y*(C6+Y*(C5+Y*(C4+Y*(C3+Y*(C2+Y*(C1+C0*Y)))))) */ \ - __ASM_EMIT("fmul v7.4s, v7.4s, v5.4s") \ - __ASM_EMIT("fadd v6.4s, v6.4s, " C7 ".4s") /* v6 = C7+Y*(C6+Y*(C5+Y*(C4+Y*(C3+Y*(C2+Y*(C1+C0*Y)))))) */ \ - __ASM_EMIT("fadd v7.4s, v7.4s, " C7 ".4s") \ - __ASM_EMIT("fmul v0.4s, v0.4s, v6.4s") /* v0 = y*(C7+Y*(C6+Y*(C5+Y*(C4+Y*(C3+Y*(C2+Y*(C1+C0*Y))))))) */ \ + __ASM_EMIT("fmul v0.4s, v0.4s, v6.4s") /* v0 = y*(C5+Y*(C4+Y*(C3+Y*(C2+Y*(C1+C0*Y))))) */ \ __ASM_EMIT("fmul v1.4s, v1.4s, v7.4s") \ /* v0 = y*L, v2 = R */ @@ -154,11 +144,7 @@ namespace lsp __ASM_EMIT("fadd v6.4s, v6.4s, " C4 ".4s") /* v6 = C4+Y*(C3+Y*(C2+Y*(C1+C0*Y))) */ \ __ASM_EMIT("fmul v6.4s, v6.4s, v4.4s") /* v6 = Y*(C4+Y*(C3+Y*(C2+Y*(C1+C0*Y)))) */ \ __ASM_EMIT("fadd v6.4s, v6.4s, " C5 ".4s") /* v6 = C5+Y*(C4+Y*(C3+Y*(C2+Y*(C1+C0*Y)))) */ \ - __ASM_EMIT("fmul v6.4s, v6.4s, v4.4s") /* v6 = Y*(C5+Y*(C4+Y*(C3+Y*(C2+Y*(C1+C0*Y))))) */ \ - __ASM_EMIT("fadd v6.4s, v6.4s, " C6 ".4s") /* v6 = C6+Y*(C5+Y*(C4+Y*(C3+Y*(C2+Y*(C1+C0*Y))))) */ \ - __ASM_EMIT("fmul v6.4s, v6.4s, v4.4s") /* v6 = Y*(C6+Y*(C5+Y*(C4+Y*(C3+Y*(C2+Y*(C1+C0*Y)))))) */ \ - __ASM_EMIT("fadd v6.4s, v6.4s, " C7 ".4s") /* v6 = C7+Y*(C6+Y*(C5+Y*(C4+Y*(C3+Y*(C2+Y*(C1+C0*Y)))))) */ \ - __ASM_EMIT("fmul v0.4s, v0.4s, v6.4s") /* v0 = y*(C7+Y*(C6+Y*(C5+Y*(C4+Y*(C3+Y*(C2+Y*(C1+C0*Y))))))) */ \ + __ASM_EMIT("fmul v0.4s, v0.4s, v6.4s") /* v0 = y*(C5+Y*(C4+Y*(C3+Y*(C2+Y*(C1+C0*Y))))) */ \ /* v0 = y*L, v2 = R */ #define LOGN_CORE_LOAD \ @@ -166,8 +152,7 @@ namespace lsp __ASM_EMIT("ldp q16, q17, [%[L2C], #0x00]") /* v16 = MM, v17 = ME */ \ __ASM_EMIT("ldp q18, q19, [%[L2C], #0x20]") /* v18 = C0, v19 = C1 */ \ __ASM_EMIT("ldp q20, q21, [%[L2C], #0x40]") /* v20 = C2, v21 = C3 */ \ - __ASM_EMIT("ldp q22, q23, [%[L2C], #0x60]") /* v22 = C4, v23 = C5 */ \ - __ASM_EMIT("ldp q24, q25, [%[L2C], #0x80]") /* v24 = C6, v25 = C7 */ + __ASM_EMIT("ldp q22, q23, [%[L2C], #0x60]") /* v22 = C4, v23 = C5 */ #define LOGB_CORE_X8_NOLOAD \ /* in: v0 = x1, v1 = x2 */ \