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riscv_machine.c
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riscv_machine.c
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/*
* RISCV machine
*
* Copyright (c) 2016-2017 Fabrice Bellard
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <stdlib.h>
#include <stdio.h>
#include <stdarg.h>
#include <string.h>
#include <inttypes.h>
#include <assert.h>
#include <fcntl.h>
#include <errno.h>
#include <unistd.h>
#include <time.h>
#include "cutils.h"
#include "iomem.h"
#include "riscv_cpu.h"
#include "virtio.h"
#include "machine.h"
#include "elf.h"
#include "compress.h"
#define _info(...) {} ////
// #define _info printf ////
#ifdef NOTUSED
uint8_t elf_data2[] = { ////
0x7F, 0x45, 0x4C, 0x46, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x00, 0xF3, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x04, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x09, 0x00, 0x08, 0x00,
0x13, 0x01, 0x01, 0xFA, 0x23, 0x3C, 0x11, 0x04, 0x23, 0x38, 0x81, 0x04, 0x13, 0x04, 0x01, 0x06,
0x13, 0x00, 0x00, 0x00, 0x23, 0x34, 0xA4, 0xFE, 0x23, 0x30, 0xB4, 0xFE, 0x1B, 0x05, 0xD0, 0x03,
0x23, 0x2E, 0xA4, 0xFC, 0x1B, 0x05, 0x10, 0x00, 0x23, 0x38, 0xA4, 0xFC, 0x17, 0x05, 0x00, 0x00,
0x13, 0x05, 0x05, 0x00, 0x23, 0x34, 0xA4, 0xFC, 0x1B, 0x05, 0xF0, 0x00, 0x23, 0x30, 0xA4, 0xFC,
0x03, 0x25, 0xC4, 0xFD, 0x13, 0x15, 0x05, 0x02, 0x13, 0x55, 0x05, 0x02, 0x23, 0x3C, 0xA4, 0xFA,
0x03, 0x35, 0x04, 0xFD, 0x23, 0x38, 0xA4, 0xFA, 0x03, 0x35, 0x84, 0xFC, 0x23, 0x34, 0xA4, 0xFA,
0x03, 0x35, 0x04, 0xFC, 0x23, 0x30, 0xA4, 0xFA, 0x13, 0x05, 0xD0, 0x03, 0x93, 0x05, 0x10, 0x00,
0x37, 0x06, 0x08, 0x00, 0x1B, 0x06, 0x16, 0x10, 0x13, 0x16, 0xC6, 0x00, 0x93, 0x06, 0xF0, 0x00,
0x73, 0x00, 0x00, 0x00, 0x01, 0x00, 0x6F, 0x00, 0x00, 0x00, 0x83, 0x30, 0x81, 0x05, 0x03, 0x34,
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0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x09, 0x00, 0x00, 0x00, 0x12, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x18, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x74, 0x61, 0x2E, 0x72, 0x6F, 0x00, 0x2E, 0x62, 0x73, 0x73, 0x00, 0x2E, 0x73, 0x79, 0x6D, 0x74,
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0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x07, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x0D, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x16, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x1B, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x78, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x23, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x2B, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x36, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
}; ////
const int elf_len2 = sizeof(elf_data2); //// TODO
#endif // NOTUSED
/* RISCV machine */
typedef struct RISCVMachine {
VirtMachine common;
PhysMemoryMap *mem_map;
int max_xlen;
RISCVCPUState *cpu_state;
uint64_t ram_size;
/* RTC */
BOOL rtc_real_time;
uint64_t rtc_start_time;
uint64_t timecmp;
/* PLIC */
uint32_t plic_pending_irq, plic_served_irq;
IRQSignal plic_irq[32]; /* IRQ 0 is not used */
/* HTIF */
uint64_t htif_tohost, htif_fromhost;
VIRTIODevice *keyboard_dev;
VIRTIODevice *mouse_dev;
int virtio_count;
} RISCVMachine;
#define LOW_RAM_SIZE 0x00010000 // TODO: 64KB at 0x0
#define RAM_BASE_ADDR 0x50200000
#define CLINT_BASE_ADDR 0x02000000 // TODO: Unused
#define CLINT_SIZE 0x000c0000 // TODO: Unused
#define DEFAULT_HTIF_BASE_ADDR 0x40008000
#define VIRTIO_BASE_ADDR 0x40010000
#define VIRTIO_SIZE 0x1000
#define VIRTIO_IRQ 20 // UART3 IRQ
#define PLIC_BASE_ADDR 0xe0000000ul
#define PLIC_SIZE 0x00400000
#define FRAMEBUFFER_BASE_ADDR 0x41000000
#define RTC_FREQ 10000000
#define RTC_FREQ_DIV 16 /* arbitrary, relative to CPU freq to have a
10 MHz frequency */
void set_timecmp(RISCVMachine *machine0, uint64_t timecmp);
void print_console(RISCVMachine *machine0, const char *buf, int len);
uint64_t ecall_addr = 0;
uint64_t rdtime_addr = 0;
uint64_t dcache_iall_addr = 0;
uint64_t sync_s_addr = 0;
uint64_t real_time = 0;
uint8_t elf_data[4096];
int elf_len = 0;
static uint64_t rtc_get_real_time(RISCVMachine *s)
{
struct timespec ts;
clock_gettime(CLOCK_MONOTONIC, &ts);
return (uint64_t)ts.tv_sec * RTC_FREQ +
(ts.tv_nsec / (1000000000 / RTC_FREQ));
}
static uint64_t rtc_get_time(RISCVMachine *m)
{
uint64_t val;
if (m->rtc_real_time) {
val = rtc_get_real_time(m) - m->rtc_start_time;
} else {
val = riscv_cpu_get_cycles(m->cpu_state) / RTC_FREQ_DIV;
}
// printf("rtc_time=%" PRId64 "\n", val);
return val;
}
static uint32_t htif_read(void *opaque, uint32_t offset,
int size_log2)
{
RISCVMachine *s = opaque;
uint32_t val;
assert(size_log2 == 2);
switch(offset) {
case 0:
val = s->htif_tohost;
break;
case 4:
val = s->htif_tohost >> 32;
break;
case 8:
val = s->htif_fromhost;
break;
case 12:
val = s->htif_fromhost >> 32;
break;
default:
val = 0;
break;
}
return val;
}
static void htif_handle_cmd(RISCVMachine *s)
{
uint32_t device, cmd;
device = s->htif_tohost >> 56;
cmd = (s->htif_tohost >> 48) & 0xff;
if (s->htif_tohost == 1) {
/* shuthost */
printf("\nPower off.\n");
exit(0);
} else if (device == 1 && cmd == 1) {
uint8_t buf[1];
buf[0] = s->htif_tohost & 0xff;
s->common.console->write_data(s->common.console->opaque, buf, 1);
s->htif_tohost = 0;
s->htif_fromhost = ((uint64_t)device << 56) | ((uint64_t)cmd << 48);
} else if (device == 1 && cmd == 0) {
/* request keyboard interrupt */
s->htif_tohost = 0;
} else {
printf("HTIF: unsupported tohost=0x%016" PRIx64 "\n", s->htif_tohost);
}
}
static void htif_write(void *opaque, uint32_t offset, uint32_t val,
int size_log2)
{
RISCVMachine *s = opaque;
assert(size_log2 == 2);
switch(offset) {
case 0:
s->htif_tohost = (s->htif_tohost & ~0xffffffff) | val;
break;
case 4:
s->htif_tohost = (s->htif_tohost & 0xffffffff) | ((uint64_t)val << 32);
htif_handle_cmd(s);
break;
case 8:
s->htif_fromhost = (s->htif_fromhost & ~0xffffffff) | val;
break;
case 12:
s->htif_fromhost = (s->htif_fromhost & 0xffffffff) |
(uint64_t)val << 32;
break;
default:
break;
}
}
#if 0
static void htif_poll(RISCVMachine *s)
{
uint8_t buf[1];
int ret;
if (s->htif_fromhost == 0) {
ret = s->console->read_data(s->console->opaque, buf, 1);
if (ret == 1) {
s->htif_fromhost = ((uint64_t)1 << 56) | ((uint64_t)0 << 48) |
buf[0];
}
}
}
#endif
static uint32_t clint_read(void *opaque, uint32_t offset, int size_log2)
{
RISCVMachine *m = opaque;
uint32_t val;
assert(size_log2 == 2);
switch(offset) {
case 0xbff8:
val = rtc_get_time(m);
break;
case 0xbffc:
val = rtc_get_time(m) >> 32;
break;
case 0x4000:
val = m->timecmp;
break;
case 0x4004:
val = m->timecmp >> 32;
break;
default:
val = 0;
break;
}
return val;
}
static void clint_write(void *opaque, uint32_t offset, uint32_t val,
int size_log2)
{
RISCVMachine *m = opaque;
assert(size_log2 == 2);
switch(offset) {
case 0x4000:
m->timecmp = (m->timecmp & ~0xffffffff) | val;
riscv_cpu_reset_mip(m->cpu_state, MIP_MTIP);
break;
case 0x4004:
m->timecmp = (m->timecmp & 0xffffffff) | ((uint64_t)val << 32);
riscv_cpu_reset_mip(m->cpu_state, MIP_MTIP);
break;
default:
break;
}
}
static void plic_update_mip(RISCVMachine *s)
{
RISCVCPUState *cpu = s->cpu_state;
uint32_t mask;
mask = s->plic_pending_irq & ~s->plic_served_irq;
if (mask) {
_info("plic_update_mip: set_mip, pending=0x%x, served=0x%x\n", s->plic_pending_irq, s->plic_served_irq);////
riscv_cpu_set_mip(cpu, MIP_MEIP | MIP_SEIP);
} else {
_info("plic_update_mip: reset_mip, pending=0x%x, served=0x%x\n", s->plic_pending_irq, s->plic_served_irq);////
riscv_cpu_reset_mip(cpu, MIP_MEIP | MIP_SEIP);
}
}
#define PLIC_HART_BASE 0x201000 // Hart 0 S-Mode Priority Threshold
#define PLIC_HART_SIZE 0x1000
static uint32_t plic_read(void *opaque, uint32_t offset, int size_log2)
{
_info("plic_read: offset=0x%x\n", offset);////
RISCVMachine *s = opaque;
uint32_t val, mask;
int i;
assert(size_log2 == 2);
switch(offset) {
case PLIC_HART_BASE:
val = 0;
break;
case PLIC_HART_BASE + 4:
mask = s->plic_pending_irq & ~s->plic_served_irq;
if (mask != 0) {
i = ctz32(mask);
s->plic_served_irq |= 1 << i;
plic_update_mip(s);
val = i + 1;
} else {
val = 0;
}
break;
default:
val = 0;
break;
}
return val;
}
static void plic_write(void *opaque, uint32_t offset, uint32_t val,
int size_log2)
{
_info("plic_write: offset=0x%x, val=0x%x\n", offset, val);////
RISCVMachine *s = opaque;
assert(size_log2 == 2);
switch(offset) {
case PLIC_HART_BASE + 4:
val--;
if (val < 32) {
s->plic_served_irq &= ~(1 << val);
plic_update_mip(s);
}
break;
default:
break;
}
}
static void plic_set_irq(void *opaque, int irq_num, int state)
{
_info("plic_set_irq: irq_num=%d, state=%d\n", irq_num, state);////
RISCVMachine *s = opaque;
uint32_t mask;
mask = 1 << (irq_num - 1);
if (state)
s->plic_pending_irq |= mask;
else
s->plic_pending_irq &= ~mask;
plic_update_mip(s);
}
static uint8_t *get_ram_ptr(RISCVMachine *s, uint64_t paddr, BOOL is_rw)
{
return phys_mem_get_ram_ptr(s->mem_map, paddr, is_rw);
}
/* FDT machine description */
#define FDT_MAGIC 0xd00dfeed
#define FDT_VERSION 17
struct fdt_header {
uint32_t magic;
uint32_t totalsize;
uint32_t off_dt_struct;
uint32_t off_dt_strings;
uint32_t off_mem_rsvmap;
uint32_t version;
uint32_t last_comp_version; /* <= 17 */
uint32_t boot_cpuid_phys;
uint32_t size_dt_strings;
uint32_t size_dt_struct;
};
struct fdt_reserve_entry {
uint64_t address;
uint64_t size;
};
#define FDT_BEGIN_NODE 1
#define FDT_END_NODE 2
#define FDT_PROP 3
#define FDT_NOP 4
#define FDT_END 9
typedef struct {
uint32_t *tab;
int tab_len;
int tab_size;
int open_node_count;
char *string_table;
int string_table_len;
int string_table_size;
} FDTState;
static FDTState *fdt_init(void)
{
FDTState *s;
s = mallocz(sizeof(*s));
return s;
}
static void fdt_alloc_len(FDTState *s, int len)
{
int new_size;
if (unlikely(len > s->tab_size)) {
new_size = max_int(len, s->tab_size * 3 / 2);
s->tab = realloc(s->tab, new_size * sizeof(uint32_t));
s->tab_size = new_size;
}
}
static void fdt_put32(FDTState *s, int v)
{
fdt_alloc_len(s, s->tab_len + 1);
s->tab[s->tab_len++] = cpu_to_be32(v);
}
/* the data is zero padded */
static void fdt_put_data(FDTState *s, const uint8_t *data, int len)
{
int len1;
len1 = (len + 3) / 4;
fdt_alloc_len(s, s->tab_len + len1);
memcpy(s->tab + s->tab_len, data, len);
memset((uint8_t *)(s->tab + s->tab_len) + len, 0, -len & 3);
s->tab_len += len1;
}
static void fdt_begin_node(FDTState *s, const char *name)
{
fdt_put32(s, FDT_BEGIN_NODE);
fdt_put_data(s, (uint8_t *)name, strlen(name) + 1);
s->open_node_count++;
}
static void fdt_begin_node_num(FDTState *s, const char *name, uint64_t n)
{
char buf[256];
snprintf(buf, sizeof(buf), "%s@%" PRIx64, name, n);
fdt_begin_node(s, buf);
}
static void fdt_end_node(FDTState *s)
{
fdt_put32(s, FDT_END_NODE);
s->open_node_count--;
}
static int fdt_get_string_offset(FDTState *s, const char *name)
{
int pos, new_size, name_size, new_len;
pos = 0;
while (pos < s->string_table_len) {
if (!strcmp(s->string_table + pos, name))
return pos;
pos += strlen(s->string_table + pos) + 1;
}
/* add a new string */
name_size = strlen(name) + 1;
new_len = s->string_table_len + name_size;
if (new_len > s->string_table_size) {
new_size = max_int(new_len, s->string_table_size * 3 / 2);
s->string_table = realloc(s->string_table, new_size);
s->string_table_size = new_size;
}
pos = s->string_table_len;
memcpy(s->string_table + pos, name, name_size);
s->string_table_len = new_len;
return pos;
}
static void fdt_prop(FDTState *s, const char *prop_name,
const void *data, int data_len)
{
fdt_put32(s, FDT_PROP);
fdt_put32(s, data_len);
fdt_put32(s, fdt_get_string_offset(s, prop_name));
fdt_put_data(s, data, data_len);
}
static void fdt_prop_tab_u32(FDTState *s, const char *prop_name,
uint32_t *tab, int tab_len)
{
int i;
fdt_put32(s, FDT_PROP);
fdt_put32(s, tab_len * sizeof(uint32_t));
fdt_put32(s, fdt_get_string_offset(s, prop_name));
for(i = 0; i < tab_len; i++)
fdt_put32(s, tab[i]);
}
static void fdt_prop_u32(FDTState *s, const char *prop_name, uint32_t val)
{
fdt_prop_tab_u32(s, prop_name, &val, 1);
}
static void fdt_prop_tab_u64(FDTState *s, const char *prop_name,
uint64_t v0)
{
uint32_t tab[2];
tab[0] = v0 >> 32;
tab[1] = v0;
fdt_prop_tab_u32(s, prop_name, tab, 2);
}
static void fdt_prop_tab_u64_2(FDTState *s, const char *prop_name,
uint64_t v0, uint64_t v1)
{
uint32_t tab[4];
tab[0] = v0 >> 32;
tab[1] = v0;
tab[2] = v1 >> 32;
tab[3] = v1;
fdt_prop_tab_u32(s, prop_name, tab, 4);
}
static void fdt_prop_str(FDTState *s, const char *prop_name,
const char *str)
{
fdt_prop(s, prop_name, str, strlen(str) + 1);
}
/* NULL terminated string list */
static void fdt_prop_tab_str(FDTState *s, const char *prop_name,
...)
{
va_list ap;
int size, str_size;
char *ptr, *tab;
va_start(ap, prop_name);
size = 0;
for(;;) {
ptr = va_arg(ap, char *);
if (!ptr)
break;
str_size = strlen(ptr) + 1;
size += str_size;
}
va_end(ap);
tab = malloc(size);
va_start(ap, prop_name);
size = 0;
for(;;) {
ptr = va_arg(ap, char *);
if (!ptr)
break;
str_size = strlen(ptr) + 1;
memcpy(tab + size, ptr, str_size);
size += str_size;
}
va_end(ap);
fdt_prop(s, prop_name, tab, size);
free(tab);
}
/* write the FDT to 'dst1'. return the FDT size in bytes */
int fdt_output(FDTState *s, uint8_t *dst)
{
struct fdt_header *h;
struct fdt_reserve_entry *re;
int dt_struct_size;
int dt_strings_size;
int pos;
assert(s->open_node_count == 0);
fdt_put32(s, FDT_END);
dt_struct_size = s->tab_len * sizeof(uint32_t);
dt_strings_size = s->string_table_len;
h = (struct fdt_header *)dst;
h->magic = cpu_to_be32(FDT_MAGIC);
h->version = cpu_to_be32(FDT_VERSION);
h->last_comp_version = cpu_to_be32(16);
h->boot_cpuid_phys = cpu_to_be32(0);
h->size_dt_strings = cpu_to_be32(dt_strings_size);
h->size_dt_struct = cpu_to_be32(dt_struct_size);
pos = sizeof(struct fdt_header);
h->off_dt_struct = cpu_to_be32(pos);
memcpy(dst + pos, s->tab, dt_struct_size);
pos += dt_struct_size;
/* align to 8 */
while ((pos & 7) != 0) {
dst[pos++] = 0;
}
h->off_mem_rsvmap = cpu_to_be32(pos);
re = (struct fdt_reserve_entry *)(dst + pos);
re->address = 0; /* no reserved entry */
re->size = 0;
pos += sizeof(struct fdt_reserve_entry);
h->off_dt_strings = cpu_to_be32(pos);
memcpy(dst + pos, s->string_table, dt_strings_size);
pos += dt_strings_size;
/* align to 8, just in case */
while ((pos & 7) != 0) {
dst[pos++] = 0;
}
h->totalsize = cpu_to_be32(pos);
return pos;
}
void fdt_end(FDTState *s)
{
free(s->tab);
free(s->string_table);
free(s);
}
static int riscv_build_fdt(RISCVMachine *m, uint8_t *dst,
uint64_t kernel_start, uint64_t kernel_size,
const char *cmd_line,
uint64_t initrd_start, uint64_t initrd_size)
{
FDTState *s;
int size, max_xlen, i, cur_phandle, intc_phandle, plic_phandle;
char isa_string[128], *q;
uint32_t misa;
uint32_t tab[4];
FBDevice *fb_dev;
s = fdt_init();
cur_phandle = 1;
fdt_begin_node(s, "");
fdt_prop_u32(s, "#address-cells", 2);
fdt_prop_u32(s, "#size-cells", 2);
fdt_prop_str(s, "compatible", "ucbbar,riscvemu-bar_dev");
fdt_prop_str(s, "model", "ucbbar,riscvemu-bare");
/* CPU list */
fdt_begin_node(s, "cpus");
fdt_prop_u32(s, "#address-cells", 1);
fdt_prop_u32(s, "#size-cells", 0);
fdt_prop_u32(s, "timebase-frequency", RTC_FREQ);
/* cpu */
fdt_begin_node_num(s, "cpu", 0);
fdt_prop_str(s, "device_type", "cpu");
fdt_prop_u32(s, "reg", 0);
fdt_prop_str(s, "status", "okay");
fdt_prop_str(s, "compatible", "riscv");
max_xlen = m->max_xlen;
misa = riscv_cpu_get_misa(m->cpu_state);
q = isa_string;
q += snprintf(isa_string, sizeof(isa_string), "rv%d", max_xlen);
for(i = 0; i < 26; i++) {
if (misa & (1 << i))
*q++ = 'a' + i;
}
*q = '\0';
fdt_prop_str(s, "riscv,isa", isa_string);
fdt_prop_str(s, "mmu-type", max_xlen <= 32 ? "riscv,sv32" : "riscv,sv48");
fdt_prop_u32(s, "clock-frequency", 2000000000);
fdt_begin_node(s, "interrupt-controller");
fdt_prop_u32(s, "#interrupt-cells", 1);
fdt_prop(s, "interrupt-controller", NULL, 0);
fdt_prop_str(s, "compatible", "riscv,cpu-intc");
intc_phandle = cur_phandle++;
fdt_prop_u32(s, "phandle", intc_phandle);
fdt_end_node(s); /* interrupt-controller */
fdt_end_node(s); /* cpu */
fdt_end_node(s); /* cpus */
fdt_begin_node_num(s, "memory", RAM_BASE_ADDR);
fdt_prop_str(s, "device_type", "memory");
tab[0] = (uint64_t)RAM_BASE_ADDR >> 32;
tab[1] = RAM_BASE_ADDR;
tab[2] = m->ram_size >> 32;
tab[3] = m->ram_size;
fdt_prop_tab_u32(s, "reg", tab, 4);
fdt_end_node(s); /* memory */
fdt_begin_node(s, "htif");
fdt_prop_str(s, "compatible", "ucb,htif0");
fdt_end_node(s); /* htif */
fdt_begin_node(s, "soc");
fdt_prop_u32(s, "#address-cells", 2);
fdt_prop_u32(s, "#size-cells", 2);
fdt_prop_tab_str(s, "compatible",
"ucbbar,riscvemu-bar-soc", "simple-bus", NULL);
fdt_prop(s, "ranges", NULL, 0);
fdt_begin_node_num(s, "clint", CLINT_BASE_ADDR);
fdt_prop_str(s, "compatible", "riscv,clint0");
tab[0] = intc_phandle;
tab[1] = 3; /* M IPI irq */
tab[2] = intc_phandle;
tab[3] = 7; /* M timer irq */
fdt_prop_tab_u32(s, "interrupts-extended", tab, 4);
fdt_prop_tab_u64_2(s, "reg", CLINT_BASE_ADDR, CLINT_SIZE);
fdt_end_node(s); /* clint */
fdt_begin_node_num(s, "plic", PLIC_BASE_ADDR);
fdt_prop_u32(s, "#interrupt-cells", 1);
fdt_prop(s, "interrupt-controller", NULL, 0);
fdt_prop_str(s, "compatible", "riscv,plic0");
fdt_prop_u32(s, "riscv,ndev", 31);
fdt_prop_tab_u64_2(s, "reg", PLIC_BASE_ADDR, PLIC_SIZE);
tab[0] = intc_phandle;
tab[1] = 9; /* S ext irq */
tab[2] = intc_phandle;
tab[3] = 11; /* M ext irq */
fdt_prop_tab_u32(s, "interrupts-extended", tab, 4);
plic_phandle = cur_phandle++;
fdt_prop_u32(s, "phandle", plic_phandle);
fdt_end_node(s); /* plic */
for(i = 0; i < m->virtio_count; i++) {
fdt_begin_node_num(s, "virtio", VIRTIO_BASE_ADDR + i * VIRTIO_SIZE);
fdt_prop_str(s, "compatible", "virtio,mmio");
fdt_prop_tab_u64_2(s, "reg", VIRTIO_BASE_ADDR + i * VIRTIO_SIZE,
VIRTIO_SIZE);
tab[0] = plic_phandle;
tab[1] = VIRTIO_IRQ + i;
fdt_prop_tab_u32(s, "interrupts-extended", tab, 2);
fdt_end_node(s); /* virtio */
}
fb_dev = m->common.fb_dev;
if (fb_dev) {
fdt_begin_node_num(s, "framebuffer", FRAMEBUFFER_BASE_ADDR);
fdt_prop_str(s, "compatible", "simple-framebuffer");
fdt_prop_tab_u64_2(s, "reg", FRAMEBUFFER_BASE_ADDR, fb_dev->fb_size);
fdt_prop_u32(s, "width", fb_dev->width);
fdt_prop_u32(s, "height", fb_dev->height);
fdt_prop_u32(s, "stride", fb_dev->stride);
fdt_prop_str(s, "format", "a8r8g8b8");
fdt_end_node(s); /* framebuffer */
}
fdt_end_node(s); /* soc */
fdt_begin_node(s, "chosen");
fdt_prop_str(s, "bootargs", cmd_line ? cmd_line : "");
if (kernel_size > 0) {
fdt_prop_tab_u64(s, "riscv,kernel-start", kernel_start);
fdt_prop_tab_u64(s, "riscv,kernel-end", kernel_start + kernel_size);
}
if (initrd_size > 0) {
fdt_prop_tab_u64(s, "linux,initrd-start", initrd_start);
fdt_prop_tab_u64(s, "linux,initrd-end", initrd_start + initrd_size);
}
fdt_end_node(s); /* chosen */
fdt_end_node(s); /* / */
size = fdt_output(s, dst);
#if 0
{
FILE *f;
f = fopen("/tmp/riscvemu.dtb", "wb");
fwrite(dst, 1, size, f);
fclose(f);
}
#endif
fdt_end(s);
return size;
}
static void copy_bios(RISCVMachine *s, const uint8_t *buf, int buf_len,
const uint8_t *kernel_buf, int kernel_buf_len,
const char *cmd_line,
const uint8_t *initrd_buf, int initrd_buf_len)
{
uint64_t fdt_addr, kernel_align, kernel_base, kernel_size;
uint64_t bios_base, bios_size, initrd_base, initrd_size;
uint64_t image_start, image_len;
uint8_t *ram_ptr;
uint32_t *q;
int res;
ram_ptr = get_ram_ptr(s, RAM_BASE_ADDR, TRUE);
/* copy the bios */
if (elf_detect_magic(buf, buf_len)) {
if (elf_load(buf, buf_len, ram_ptr, s->ram_size,
&image_start, &image_len) == -1) {
vm_error("Failed to load ELF BIOS\n");
exit(1);
}
bios_base = image_start - RAM_BASE_ADDR;
bios_size = image_len;
} else {
if (buf_len > s->ram_size) {
vm_error("BIOS too big\n");
exit(1);
}
memcpy(ram_ptr, buf, buf_len);
bios_base = RAM_BASE_ADDR;
bios_size = buf_len;
}
/* copy the kernel if present */
if (kernel_buf_len > 0) {
if (s->max_xlen == 32)
kernel_align = 4 << 20; /* 4 MB page align */
else
kernel_align = 2 << 20; /* 2 MB page align */
kernel_base = (buf_len + kernel_align - 1) & ~(kernel_align - 1);
if (elf_detect_magic(kernel_buf, kernel_buf_len)) {
if (elf_load(kernel_buf, kernel_buf_len,
ram_ptr + kernel_base,
s->ram_size - kernel_base,
&image_start, &image_len) == -1) {
vm_error("Failed to load ELF kernel\n");
exit(1);
}
kernel_base += image_start;
kernel_size = image_len;
} else {
memcpy(ram_ptr + kernel_base, kernel_buf, kernel_buf_len);
kernel_size = kernel_buf_len;
}
} else {
kernel_base = 0;
kernel_size = 0;
}
/* copy the initrd if present */
if (initrd_buf_len > 0) {
if (kernel_size > 0) {
initrd_base = kernel_base + kernel_size;
} else {
initrd_base = bios_base + bios_size;
}
initrd_base &= ~(DEVRAM_PAGE_SIZE - 1);
initrd_base += DEVRAM_PAGE_SIZE;
if (initrd_base + initrd_buf_len > s->ram_size) {
vm_error("initrd too big\n");
exit(1);
}
#ifdef CONFIG_COMPRESSED_INITRAMFS
if (compress_detect_magic(initrd_buf, initrd_buf_len)) {
res = decompress(initrd_buf, initrd_buf_len,
ram_ptr + initrd_base,
s->ram_size - kernel_base);
if (res == -1) {
vm_error("Failed to decompress initramfs image\n");
exit(1);
}
initrd_size = (uint64_t)res;
} else {
#else
{
#endif
memcpy(ram_ptr + initrd_base, initrd_buf, initrd_buf_len);
initrd_size = initrd_buf_len;
}
} else {
initrd_base = 0;
initrd_size = 0;
}
ram_ptr = get_ram_ptr(s, 0, TRUE);
fdt_addr = 0x1000 + 8 * 8;
riscv_build_fdt(s, ram_ptr + fdt_addr,
RAM_BASE_ADDR + kernel_base,
kernel_size, cmd_line,
RAM_BASE_ADDR + initrd_base,
initrd_size);
/* jump_addr = RAM_BASE_ADDR */
q = (uint32_t *)(ram_ptr + 0x1000);
q[0] = 0x297 + RAM_BASE_ADDR - 0x1000; /* auipc t0, jump_addr */
q[1] = 0x597; /* auipc a1, dtb */
q[2] = 0x58593 + ((fdt_addr - 4) << 20); /* addi a1, a1, dtb */
q[3] = 0xf1402573; /* csrr a0, mhartid */
//// Previously: Jump to RAM_BASE_ADDR in Machine Mode
// q[4] = 0x00028067; /* jalr zero, t0, jump_addr */
//// Begin Test: Start in Supervisor Mode
uint32_t pc = 4;
// Set exception and interrupt delegation for S-mode
// WRITE_CSR(medeleg, 0xffff);
q[pc++] = 0x000167c1; // lui a5, 0x10 ; nop
q[pc++] = 0x000137fd; // addiw a5, a5, -1 ; nop
q[pc++] = 0x30279073; // csrw medeleg, a5
// WRITE_CSR(mideleg, 0xffff);
q[pc++] = 0x30379073; // csrw mideleg, a5
// TODO: Follow the OpenSBI Settings for Ox64
// Boot HART MIDELEG : 0x0000000000000222
// Boot HART MEDELEG : 0x000000000000b109
// Set mstatus to S-mode and enable SUM
// CLEAR_CSR(mstatus, ~MSTATUS_MPP_MASK);
q[pc++] = 0x000177f9; // lui a5, 0xffffe ; nop
q[pc++] = 0x7ff7879b; // addiw a5, a5, 2047
q[pc++] = 0x3007b073; // csrc mstatus, a5
// SET_CSR(mstatus, MSTATUS_MPPS | SSTATUS_SUM);
q[pc++] = 0x000417b7; // lui a5, 0x41
q[pc++] = 0x8007879b; // addiw a5, a5, -2048
q[pc++] = 0x3007a073; // csrs mstatus, a5
// Jump to RAM_BASE_ADDR in Supervisor Mode
q[pc++] = 0x34129073; // csrw mepc, t0
q[pc++] = 0x30200073; // mret
// Patch the Unknown Instructions to become ECALL and handle later
uint8_t *kernel_ptr = get_ram_ptr(s, RAM_BASE_ADDR, TRUE);
for (int i = 0; i < 0x10000; i++) {
// ECALL Instruction
// 00000073 ecall
const uint8_t ecall[] = { 0x73, 0x00, 0x00, 0x00 };
if (memcmp(&kernel_ptr[i], ecall, sizeof(ecall)) == 0) {
ecall_addr = RAM_BASE_ADDR + i;