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Copy pathreaction_game_erika.cycdx
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reaction_game_erika.cycdx
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<?xml version="1.0" encoding="utf-8"?>
<blockRegMap version="1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://cypress.com/xsd/cyblockregmap cyblockregmap.xsd" xmlns="http://cypress.com/xsd/cyblockregmap">
<block name="TFT_SPI" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="VirtualMux_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="IntClock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="BSPIM" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
</block>
<block name="JOYSTICK_ADC_XY" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="or_internal" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="BusClock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="FinalBuf" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Sync" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="IRQ" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="TempBuf" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_analog_virtualmux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="JOYSTICK_ADC_XY_SAR" BASE="0x0" SIZE="0x0" desc="SAR ADC" visible="true" hidden="false">
<block name="ZeroTerminal_7" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_6" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Clock_VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_8" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_constant_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_5" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ADC_SAR" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vRef_Vdda_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_analog_noconnect_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="or_internalClock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="noconnect_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_analog_virtualmux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_analog_virtualmux_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_analog_virtualmux_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="noconnect" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_analog_virtualmux_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="SAR_TR0" address="0x40004614" bitWidth="8" desc="SAR trim register" hidden="false" />
<register name="SAR_CSR0" address="0x40005900" bitWidth="8" desc="SAR status and control register 0" hidden="false" />
<register name="SAR_CSR1" address="0x40005901" bitWidth="8" desc="SAR status and control register 1" hidden="false" />
<register name="SAR_CSR2" address="0x40005902" bitWidth="8" desc="SAR status and control register 2" hidden="false" />
<register name="SAR_CSR3" address="0x40005903" bitWidth="8" desc="SAR status and control register 3" hidden="false" />
<register name="SAR_CSR4" address="0x40005904" bitWidth="8" desc="SAR status and control register 4" hidden="false" />
<register name="SAR_CSR5" address="0x40005905" bitWidth="8" desc="SAR status and control register 5" hidden="false" />
<register name="SAR_CSR6" address="0x40005906" bitWidth="8" desc="SAR status and control register 6" hidden="false" />
<register name="SAR_SW0" address="0x40005B20" bitWidth="8" desc="SAR Analog Routing Register 0" hidden="false" />
<register name="SAR_SW2" address="0x40005B22" bitWidth="8" desc="SAR Analog Routing Register 2" hidden="false" />
<register name="SAR_SW3" address="0x40005B23" bitWidth="8" desc="SAR Analog Routing Register 3" hidden="false" />
<register name="SAR_SW4" address="0x40005B24" bitWidth="8" desc="SAR Analog Routing Register 4" hidden="false" />
<register name="SAR_SW6" address="0x40005B26" bitWidth="8" desc="SAR Analog Routing Register 6" hidden="false" />
<register name="SAR_CLK" address="0x40005B27" bitWidth="8" desc="SAR Clock Selection Register" hidden="false" />
<register name="SAR_WRK" address="0x40005BA0" bitWidth="16" desc="SAR working register" hidden="false" />
</block>
<block name="AMuxHw_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="IntClock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="bSAR_SEQ" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
</block>
<block name="JOYSTICK_Y" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="TFT_RES" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="TFT_DC" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="TFT_SCL" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="JOYSTICK_X" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="RGB_G" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="RGB_R" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="RGB_PWM_blue" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="vmIRQ" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmTC" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="FFKillMux" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmCompare" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="PWMUDB" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="RGB_PWM_blue_COMPARE_Reg" address="0x4000642C" bitWidth="16" desc="UDB.D0 - Assigned Compare Value" hidden="false" />
<register name="RGB_PWM_blue_Control_Reg" address="0x4000647D" bitWidth="8" desc="UDB Control Register - Assigned Control Register Value" hidden="false">
<field name="CTRL_ENABLE" from="7" to="7" access="RW" resetVal="" desc="Enable the PWM" hidden="false" />
<field name="CTRL_CMPMODE2" from="5" to="3" access="RW" resetVal="" desc="Compare mode 2" hidden="false" />
<field name="CTRL_CMPMODE1" from="2" to="0" access="RW" resetVal="" desc="Compare mode 1" hidden="false" />
</register>
<register name="RGB_PWM_blue_STATUS_AUX_CTRLDP0" address="0x4000649C" bitWidth="8" desc="UDB Auxilliary Control Register" hidden="false">
<field name="FIFO0_CLR" from="0" to="0" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO1_CLR" from="1" to="1" access="RW" resetVal="" desc="FIFO1 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO0_LVL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="FIFO1_LVL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="INT_EN" from="4" to="4" access="RW" resetVal="" desc="" hidden="false">
<value name="E_INT_EN0" value="0" desc="Interrupt disabled" />
<value name="E_INT_EN1" value="1" desc="Interrupt enabled" />
</field>
<field name="CNT_START" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_CNT_START0" value="0" desc="Disable counter" />
<value name="E_CNT_START1" value="1" desc="Enable counter" />
</field>
</register>
<register name="RGB_PWM_blue_STATUS_AUX_CTRLDP1" address="0x4000649D" bitWidth="8" desc="UDB Auxilliary Control Register" hidden="false">
<field name="FIFO0_CLR" from="0" to="0" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO1_CLR" from="1" to="1" access="RW" resetVal="" desc="FIFO1 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO0_LVL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="FIFO1_LVL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="INT_EN" from="4" to="4" access="RW" resetVal="" desc="" hidden="false">
<value name="E_INT_EN0" value="0" desc="Interrupt disabled" />
<value name="E_INT_EN1" value="1" desc="Interrupt enabled" />
</field>
<field name="CNT_START" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_CNT_START0" value="0" desc="Disable counter" />
<value name="E_CNT_START1" value="1" desc="Enable counter" />
</field>
</register>
</block>
<block name="isr_Button_Joystick" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="BUTTON_JOYSTICK" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="RGB_B" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="CLK_LED" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="TFT_BackLight" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="vmIRQ" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmCompare" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="FFKillMux" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmTC" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="PWMHW" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="TFT_BackLight_GLOBAL_ENABLE" address="0x400043A3" bitWidth="8" desc="PM.ACT.CFG" hidden="false">
<field name="en_timer" from="3" to="0" access="RW" resetVal="" desc="Enable timer/counters." hidden="false" />
</register>
<register name="TFT_BackLight_CONTROL" address="0x40004F00" bitWidth="8" desc="TMRx.CFG0" hidden="false">
<field name="EN" from="0" to="0" access="RW" resetVal="" desc="Enables timer/comparator." hidden="false" />
<field name="MODE" from="1" to="1" access="RW" resetVal="" desc="Mode. (0 = Timer; 1 = Comparator)" hidden="false">
<value name="Timer" value="0" desc="Timer mode. CNT/CMP register holds timer count value." />
<value name="Comparator" value="1" desc="Comparator mode. CNT/CMP register holds comparator threshold value." />
</field>
<field name="ONESHOT" from="2" to="2" access="RW" resetVal="" desc="Timer stops upon reaching stop condition defined by TMR_CFG bits. Can be restarted by asserting TIMER RESET or disabling and re-enabling block." hidden="false" />
<field name="CMP_BUFF" from="3" to="3" access="RW" resetVal="" desc="Buffer compare register. Compare register updates only on timer terminal count." hidden="false" />
<field name="INV" from="4" to="4" access="RW" resetVal="" desc="Invert sense of TIMEREN signal" hidden="false" />
<field name="DB" from="5" to="5" access="RW" resetVal="" desc="Deadband mode--Deadband phases phi1 and phi2 are outputted on CMP and TC output pins respectively." hidden="false">
<value name="Timer" value="0" desc="CMP and TC are output." />
<value name="Deadband" value="1" desc="PHI1 (instead of CMP) and PHI2 (instead of TC) are output." />
</field>
<field name="DEADBAND_PERIOD" from="7" to="6" access="RW" resetVal="" desc="Deadband Period" hidden="false" />
</register>
<register name="TFT_BackLight_CONTROL2" address="0x40004F01" bitWidth="8" desc="TMRx.CFG1" hidden="false">
<field name="IRQ_SEL" from="0" to="0" access="RW" resetVal="" desc="Irq selection. (0 = raw interrupts; 1 = status register interrupts)" hidden="false" />
<field name="FTC" from="1" to="1" access="RW" resetVal="" desc="First Terminal Count (FTC). Setting this bit forces a single pulse on the TC pin when first enabled." hidden="false">
<value name="Disable FTC" value="0" desc="Disable the single cycle pulse, which signifies the timer is starting." />
<value name="Enable FTC" value="1" desc="Enable the single cycle pulse, which signifies the timer is starting." />
</field>
<field name="DCOR" from="2" to="2" access="RW" resetVal="" desc="Disable Clear on Read (DCOR) of Status Register SR0." hidden="false" />
<field name="DBMODE" from="3" to="3" access="RW" resetVal="" desc="Deadband mode (asynchronous/synchronous). CMP output pin is also affected when not in deadband mode (CFG0.DEADBAND)." hidden="false" />
<field name="CLK_BUS_EN_SEL" from="6" to="4" access="RW" resetVal="" desc="Digital Global Clock selection." hidden="false" />
<field name="BUS_CLK_SEL" from="7" to="7" access="RW" resetVal="" desc="Bus Clock selection." hidden="false" />
</register>
<register name="TFT_BackLight_CONTROL3_" address="0x40004F02" bitWidth="8" desc="TMRx.CFG2" hidden="false">
<field name="TMR_CFG" from="1" to="0" access="RW" resetVal="" desc="Timer configuration (MODE = 0): 000 = Continuous; 001 = Pulsewidth; 010 = Period; 011 = Stop on IRQ" hidden="false">
<value name="Continuous" value="0" desc="Timer runs while EN bit of CFG0 register is set to '1'." />
<value name="Pulsewidth" value="1" desc="Timer runs from positive to negative edge of TIMEREN." />
<value name="Period" value="10" desc="Timer runs from positive to positive edge of TIMEREN." />
<value name="Irq" value="11" desc="Timer runs until IRQ." />
</field>
<field name="COD" from="2" to="2" access="RW" resetVal="" desc="Clear On Disable (COD). Clears or gates outputs to zero." hidden="false" />
<field name="ROD" from="3" to="3" access="RW" resetVal="" desc="Reset On Disable (ROD). Resets internal state of output logic" hidden="false" />
<field name="CMP_CFG" from="6" to="4" access="RW" resetVal="" desc="Comparator configurations" hidden="false">
<value name="Equal" value="0" desc="Compare Equal " />
<value name="Less than" value="1" desc="Compare Less Than " />
<value name="Less than or equal" value="10" desc="Compare Less Than or Equal ." />
<value name="Greater" value="11" desc="Compare Greater Than ." />
<value name="Greater than or equal" value="100" desc="Compare Greater Than or Equal " />
</field>
<field name="HW_EN" from="7" to="7" access="RW" resetVal="" desc="When set Timer Enable controls counting." hidden="false" />
</register>
<register name="TFT_BackLight_PERIOD" address="0x40004F04" bitWidth="8" desc="TMRx.PER0 - Assigned Period" hidden="false" />
<register name="TFT_BackLight_COMPARE" address="0x40004F06" bitWidth="8" desc="TMRx.CNT_CMP0 - Assigned Compare Value" hidden="false" />
</block>
<block name="TFT_SDA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Em_EEPROM_Dynamic" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_boot" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_constant_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_constant_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="PWR_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="GND_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="TFT_CS" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_constant_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="TFT_LED" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="R_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SEVEN_SELECT" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SEVEN_DP" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SEVEN_G" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="isr_Button" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="BUTTON_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SEVEN_reg" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SEVEN_reg_CONTROL_REG" address="0x40006479" bitWidth="8" desc="" hidden="false" />
</block>
<block name="SEVEN_F" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SEVEN_B" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SEVEN_A" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ErikaOS_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SEVEN_E" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SEVEN_D" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SEVEN_C" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="UART_LOG" BASE="0x0" SIZE="0x0" desc="UART" visible="true" hidden="false">
<block name="IntClock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="BUART" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="RX_UART_LOG_RX_ADDRESS1" address="0x4000652B" bitWidth="8" desc="RX Address1 Register" hidden="false" />
<register name="RX_UART_LOG_RX_ADDRESS2" address="0x4000653B" bitWidth="8" desc="RX Address2 Register" hidden="false" />
<register name="TX_UART_LOG_TX_DATA" address="0x40006546" bitWidth="8" desc="TX Data Register" hidden="false" />
<register name="RX_UART_LOG_RX_DATA" address="0x4000654B" bitWidth="8" desc="RX Data Register" hidden="false" />
<register name="TX_UART_LOG_TX_STATUS" address="0x40006565" bitWidth="8" desc="TX status register" hidden="false">
<field name="UART_LOG_TX_STS_COMPLETE" from="0" to="0" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_TX_STS_FIFO_EMPTY" from="1" to="1" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_TX_STS_FIFO_FULL" from="2" to="2" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_TX_STS_FIFO_NOT_FULL" from="3" to="3" access="R" resetVal="" desc="" hidden="false" />
</register>
<register name="RX_UART_LOG_RX_STATUS" address="0x4000656B" bitWidth="8" desc="RX status register" hidden="false">
<field name="UART_LOG_RX_STS_MRKSPC" from="0" to="0" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_RX_STS_BREAK" from="1" to="1" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_RX_STS_PAR_ERROR" from="2" to="2" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_RX_STS_STOP_ERROR" from="3" to="3" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_RX_STS_OVERRUN" from="4" to="4" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_RX_STS_FIFO_NOTEMPTY" from="5" to="5" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_RX_STS_ADDR_MATCH" from="6" to="6" access="R" resetVal="" desc="" hidden="false" />
</register>
</block>
<block name="DEBUG_RX" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="DEBUG_TX" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="RGB_PWM_green" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="vmIRQ" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmTC" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="FFKillMux" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmCompare" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="PWMUDB" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="RGB_PWM_green_COMPARE_Reg" address="0x4000642E" bitWidth="16" desc="UDB.D0 - Assigned Compare Value" hidden="false" />
<register name="RGB_PWM_green_Control_Reg" address="0x4000647E" bitWidth="8" desc="UDB Control Register - Assigned Control Register Value" hidden="false">
<field name="CTRL_ENABLE" from="7" to="7" access="RW" resetVal="" desc="Enable the PWM" hidden="false" />
<field name="CTRL_CMPMODE2" from="5" to="3" access="RW" resetVal="" desc="Compare mode 2" hidden="false" />
<field name="CTRL_CMPMODE1" from="2" to="0" access="RW" resetVal="" desc="Compare mode 1" hidden="false" />
</register>
<register name="RGB_PWM_green_STATUS_AUX_CTRLDP0" address="0x4000649E" bitWidth="8" desc="UDB Auxilliary Control Register" hidden="false">
<field name="FIFO0_CLR" from="0" to="0" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO1_CLR" from="1" to="1" access="RW" resetVal="" desc="FIFO1 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO0_LVL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="FIFO1_LVL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="INT_EN" from="4" to="4" access="RW" resetVal="" desc="" hidden="false">
<value name="E_INT_EN0" value="0" desc="Interrupt disabled" />
<value name="E_INT_EN1" value="1" desc="Interrupt enabled" />
</field>
<field name="CNT_START" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_CNT_START0" value="0" desc="Disable counter" />
<value name="E_CNT_START1" value="1" desc="Enable counter" />
</field>
</register>
<register name="RGB_PWM_green_STATUS_AUX_CTRLDP1" address="0x4000649F" bitWidth="8" desc="UDB Auxilliary Control Register" hidden="false">
<field name="FIFO0_CLR" from="0" to="0" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO1_CLR" from="1" to="1" access="RW" resetVal="" desc="FIFO1 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO0_LVL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="FIFO1_LVL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="INT_EN" from="4" to="4" access="RW" resetVal="" desc="" hidden="false">
<value name="E_INT_EN0" value="0" desc="Interrupt disabled" />
<value name="E_INT_EN1" value="1" desc="Interrupt enabled" />
</field>
<field name="CNT_START" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_CNT_START0" value="0" desc="Disable counter" />
<value name="E_CNT_START1" value="1" desc="Enable counter" />
</field>
</register>
</block>
<block name="PWM_Clock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="RGB_PWM_red" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="vmIRQ" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmTC" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="FFKillMux" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmCompare" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="PWMUDB" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="RGB_PWM_red_COMPARE_Reg" address="0x4000642A" bitWidth="16" desc="UDB.D0 - Assigned Compare Value" hidden="false" />
<register name="RGB_PWM_red_Control_Reg" address="0x40006477" bitWidth="8" desc="UDB Control Register - Assigned Control Register Value" hidden="false">
<field name="CTRL_ENABLE" from="7" to="7" access="RW" resetVal="" desc="Enable the PWM" hidden="false" />
<field name="CTRL_CMPMODE2" from="5" to="3" access="RW" resetVal="" desc="Compare mode 2" hidden="false" />
<field name="CTRL_CMPMODE1" from="2" to="0" access="RW" resetVal="" desc="Compare mode 1" hidden="false" />
</register>
<register name="RGB_PWM_red_STATUS_AUX_CTRLDP0" address="0x4000649A" bitWidth="8" desc="UDB Auxilliary Control Register" hidden="false">
<field name="FIFO0_CLR" from="0" to="0" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO1_CLR" from="1" to="1" access="RW" resetVal="" desc="FIFO1 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO0_LVL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="FIFO1_LVL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="INT_EN" from="4" to="4" access="RW" resetVal="" desc="" hidden="false">
<value name="E_INT_EN0" value="0" desc="Interrupt disabled" />
<value name="E_INT_EN1" value="1" desc="Interrupt enabled" />
</field>
<field name="CNT_START" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_CNT_START0" value="0" desc="Disable counter" />
<value name="E_CNT_START1" value="1" desc="Enable counter" />
</field>
</register>
<register name="RGB_PWM_red_STATUS_AUX_CTRLDP1" address="0x4000649B" bitWidth="8" desc="UDB Auxilliary Control Register" hidden="false">
<field name="FIFO0_CLR" from="0" to="0" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO1_CLR" from="1" to="1" access="RW" resetVal="" desc="FIFO1 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO0_LVL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="FIFO1_LVL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="INT_EN" from="4" to="4" access="RW" resetVal="" desc="" hidden="false">
<value name="E_INT_EN0" value="0" desc="Interrupt disabled" />
<value name="E_INT_EN1" value="1" desc="Interrupt enabled" />
</field>
<field name="CNT_START" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_CNT_START0" value="0" desc="Disable counter" />
<value name="E_CNT_START1" value="1" desc="Enable counter" />
</field>
</register>
</block>
<block name="LED_green" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="BUTTON_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="BUTTON_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="BUTTON_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="LED_yellow" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="LED_red" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="or_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
</blockRegMap>