Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[SM6.9] Generate native vectors operations for elementwise intrinsics #7120

Open
Tracked by #7067
pow2clk opened this issue Feb 4, 2025 · 0 comments
Open
Tracked by #7067
Assignees
Labels
enhancement Feature suggestion sm6.9 Shader Model 6.9

Comments

@pow2clk
Copy link
Member

pow2clk commented Feb 4, 2025

In SM6.9, long vectors should be usable on the following HLSL intrinsics:

  • Trigonometry : acos, asin, atan, atan2, cos, cosh, degrees, radians, sin, sinh, tan, tanh
  • Math: abs, ceil, clamp, exp, exp2, floor, fma, fmod, frac, frexp, ldexp, lerp, log, log10, log2, mad, max, min, pow, rcp, round, rsqrt, sign, smoothstep, sqrt, step, trunc
  • Float Ops: f16tof32, f32tof16, isfinite, isinf, isnan, modf, saturate
  • Bitwise Ops: reversebits, countbits, firstbithigh, firstbitlow
  • Logic Ops: and, or, select
  • Reductions: all, any, clamp, dot
  • Quad Ops: ddx, ddx_coarse, ddx_fine, ddy, ddy_coarse, ddy_fine, fwidth, QuadReadLaneAt, QuadReadLaneAcrossX, QuadReadLaneAcrossY, QuadReadLaneAcrossDiagonal
  • Wave Ops: WaveActiveBitAnd, WaveActiveBitOr, WaveActiveBitXor, WaveActiveProduct, WaveActiveSum, WaveActiveMin, WaveActiveMax, WaveMultiPrefixBitAnd, WaveMultiPrefixBitOr, WaveMultiPrefixBitXor, WaveMultiPrefixProduct, WaveMultiPrefixSum, WavePrefixSum, WavePrefixProduct, WaveReadLaneAt, WaveReadLaneFirst
  • Wave Reductions: WaveActiveAllEqual, WaveMatch
  • Type Conversions: asdouble, asfloat, asfloat16, asint, asint16, asuint, asuint16

In addition to this, any vector used for these intrinsics should produce DXIL that uses native vectors as parameters.

Some of these are trivially convertable into corresponding DXIL intrinsics that will form vector variants with similar if not identical arguments. Some others expand into a few operations that may involve multiple DXIL intrinsics or intrinsics paired with native operators. In either case, the generated DXIL should use vector variants of the operations to implement the intent.

Implementation will mostly differ little from that done for operators in #7123. The exception might be intrinsics that scalarize themselves as part of their lowering, which will need to change to preserve the vectors until the scalarization pass runs or doesn't depending on compile-time flags. This is a separate issue in spite of that since many intrinsic lowering involves native operators and testing will be involved and can be separated. This does depend on #7123.

@pow2clk pow2clk changed the title generating native vectors operations for elementwise intrinsics Generate native vectors operations for elementwise intrinsics Feb 4, 2025
@pow2clk pow2clk changed the title Generate native vectors operations for elementwise intrinsics [SM6.9] Generate native vectors operations for elementwise intrinsics Feb 4, 2025
@pow2clk pow2clk added sm6.9 Shader Model 6.9 enhancement Feature suggestion labels Feb 4, 2025
@pow2clk pow2clk self-assigned this Feb 4, 2025
@pow2clk pow2clk moved this to Active in HLSL Support Feb 4, 2025
@pow2clk pow2clk moved this from Active to Planning in HLSL Support Feb 4, 2025
@damyanp damyanp moved this from Planning to Active in HLSL Support Feb 10, 2025
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
enhancement Feature suggestion sm6.9 Shader Model 6.9
Projects
None yet
Development

No branches or pull requests

1 participant