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cvbasic_6502_prologue.asm
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cvbasic_6502_prologue.asm
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;
; CVBasic prologue (BASIC compiler, 6502 target)
;
; by Oscar Toledo G.
; https://nanochess.org/
;
; Creation date: Aug/05/2024.
; Revision date: Aug/06/2024. Ported music player from Z80 CVBasic.
; Revision date: Aug/07/2024. Ported Pletter decompressor from Z80 CVBasic.
; Added VDP delays.
; Revision date: Aug/16/2024. Corrected bug in define_char_unpack.
; Revision date: Aug/21/2024. Added support for keypad.
; Revision date: Aug/30/2024. Changed mode bit to bit 3 (avoids collision
; with flicker flag).
; Revision date: Oct/15/2024. Added LDIRMV.
; Revision date: Nov/12/2024. Saves the VDP status.
;
CPU 6502
BIOS_NMI_RESET_ADDR: EQU $F808
BIOS_READ_CONTROLLERS: EQU $FA00
BIOS_WRITE_PSG: EQU $FE77
;
; Platforms supported:
; o Vtech Creativision.
; o Dick Smith's Wizzard.
;
;
; CVBasic variables in zero page.
;
; This is a block of 8 bytes that should stay together.
temp: equ $02
temp2: equ $04
result: equ $06
pointer: equ $08
read_pointer: equ $0a
cursor: equ $0c
pletter_off: equ $0e ; Used by Pletter
; Zero page $00-$01 and $10-$1f are used by
; the Creativision BIOS to read the controllers.
joy1_dir: equ $11
joy2_dir: equ $13
joy1_buttons: equ $16
joy2_buttons: equ $17
joy1_data: equ $20
joy2_data: equ $21
key1_data: equ $22
key2_data: equ $23
frame: equ $24
lfsr: equ $26
mode: equ $28
flicker: equ $29
sprite_data: equ $2a
ntsc: equ $2e
pletter_bit: equ $2f
vdp_status: equ $30
IF CVBASIC_MUSIC_PLAYER
music_playing: EQU $4f
music_timing: EQU $31
music_start: EQU $32
music_pointer: EQU $34
music_note_counter: EQU $36
music_instrument_1: EQU $37
music_note_1: EQU $38
music_counter_1: EQU $39
music_instrument_2: EQU $3a
music_note_2: EQU $3b
music_counter_2: EQU $3c
music_instrument_3: EQU $3d
music_note_3: EQU $3e
music_counter_3: EQU $3f
music_drum: EQU $40
music_counter_4: EQU $41
audio_freq1: EQU $42
audio_freq2: EQU $44
audio_freq3: EQU $46
audio_vol1: EQU $48
audio_vol2: EQU $49
audio_vol3: EQU $4a
audio_vol4hw: EQU $4b
audio_noise: EQU $4c
audio_control: EQU $4d
music_mode: EQU $4e
ENDIF
sprites: equ $0180
ORG $4000+$4000*SMALL_ROM
WRTVDP:
STA $3001
TXA
ORA #$80
STA $3001
RTS
SETWRT:
STA $3001 ; 4
TYA ; 2
ORA #$40 ; 2
STA $3001 ; 4
RTS ; 6
SETRD:
STA $3001 ; 4
TYA ; 2
AND #$3F ; 2
STA $3001 ; 4
RTS ; 6
; VDP delays calculated for 6502 running at 2 mhz.
WRTVRM:
JSR SETWRT ; 6
TXA ; 2
NOP ; 2
NOP ; 2
NOP ; 2 = RTS + 14 = Minimum cycles
NOP ; 2
STA $3000 ; 4
RTS ; 6
RDVRM:
JSR SETRD ; 6
NOP ; 2
NOP ; 2
NOP ; 2
NOP ; 2
NOP ; 2
NOP ; 2
NOP ; 2
NOP ; 2
NOP ; 2
NOP ; 2
NOP ; 2
LDA $2000 ; 4
RTS ; 6
FILVRM:
LDA pointer
LDY pointer+1
JSR SETWRT
LDA temp2
BEQ .1
INC temp2+1
.1:
LDA temp ; 3
STA $3000 ; 4
NOP ; 2
NOP ; 2
DEC temp2 ; 5
BNE .1 ; 2/3/4
DEC temp2+1 ; 5
BNE .1 ; 2/3/4
RTS
LDIRMV:
LDA temp
LDY temp+1
JSR SETRD
LDA temp2
BEQ .1
INC temp2+1
.1:
LDY #0
.2:
LDA $3000 ; 4
STA (pointer),Y ; 5/6
INC pointer ; 5
BNE .3 ; 2/3/4
INC pointer+1 ; 5
.3:
DEC temp2 ; 5
BNE .2 ; 2/3/4
DEC temp2+1 ; 5
BNE .2 ; 2/3/4
RTS
LDIRVM:
LDA pointer
LDY pointer+1
JSR SETWRT
LDA temp2
BEQ .1
INC temp2+1
.1:
LDY #0
.2:
LDA (temp),Y ; 5/6
STA $3000 ; 4
INC temp ; 5
BNE .3 ; 2/3/4
INC temp+1 ; 5
.3:
DEC temp2 ; 5
BNE .2 ; 2/3/4
DEC temp2+1 ; 5
BNE .2 ; 2/3/4
RTS
LDIRVM3:
JSR .1
JSR .1
.1: LDA temp
PHA
LDA temp+1
PHA
LDA temp2
PHA
LDA temp2+1
PHA
JSR LDIRVM
LDA pointer+1
CLC
ADC #8
STA pointer+1
PLA
STA temp2+1
PLA
STA temp2
PLA
STA temp+1
PLA
STA temp
RTS
DISSCR:
SEI
LDA #$A2
LDX #$01
JSR WRTVDP
CLI
RTS
ENASCR:
SEI
LDA #$E2
LDX #$01
JSR WRTVDP
CLI
RTS
CPYBLK:
SEI
.1:
LDA temp2
PHA
LDA temp2+1
PHA
TXA
PHA
TYA
PHA
LDA temp
PHA
LDA temp+1
PHA
LDA #0
STA temp2+1
JSR LDIRVM
PLA
STA temp+1
PLA
STA temp
PLA
STA temp2+1
PLA
STA temp2
LDA temp
CLC
ADC temp2
STA temp
LDA temp+1
ADC temp2+1
STA temp+1
LDX temp2
LDY temp2+1
PLA
STA temp2+1
PLA
STA temp2
LDA pointer
CLC
ADC #$20
STA pointer
LDA pointer+1
ADC #$00
STA pointer+1
DEC temp2+1
BNE .1
CLI
RTS
cls:
lda #$00
ldy #$18
sta cursor
sty cursor+1
sta pointer
sty pointer+1
ldy #$03
sta temp2
sty temp2+1
lda #$20
sta temp
sei
jsr FILVRM
cli
rts
print_string_cursor_constant:
PLA
STA temp
PLA
STA temp+1
LDY #1
LDA (temp),Y
STA cursor
INY
LDA (temp),Y
STA cursor+1
INY
LDA (temp),Y
STA temp2
TYA
CLC
ADC temp
STA temp
BCC $+4
INC temp+1
LDA temp2
BNE print_string.2
print_string_cursor:
STA cursor
STY cursor+1
print_string:
PLA
STA temp
PLA
STA temp+1
LDY #1
LDA (temp),Y
STA temp2
INC temp
BNE $+4
INC temp+1
.2: CLC
ADC temp
TAY
LDA #0
ADC temp+1
PHA
TYA
PHA
INC temp
BNE $+4
INC temp+1
LDA temp2
PHA
LDA #0
STA temp2+1
LDA cursor
STA pointer
LDA cursor+1
AND #$07
ORA #$18
STA pointer+1
SEI
JSR LDIRVM
CLI
PLA
CLC
ADC cursor
STA cursor
BCC .1
INC cursor+1
.1:
RTS
print_number:
LDX #0
STX temp
SEI
print_number5:
LDX #10000
STX temp2
LDX #10000/256
STX temp2+1
JSR print_digit
print_number4:
LDX #1000
STX temp2
LDX #1000/256
STX temp2+1
JSR print_digit
print_number3:
LDX #100
STX temp2
LDX #0
STX temp2+1
JSR print_digit
print_number2:
LDX #10
STX temp2
LDX #0
STX temp2+1
JSR print_digit
print_number1:
LDX #1
STX temp2
STX temp
LDX #0
STX temp2+1
JSR print_digit
CLI
RTS
print_digit:
LDX #$2F
.2:
INX
SEC
SBC temp2
PHA
TYA
SBC temp2+1
TAY
PLA
BCS .2
CLC
ADC temp2
PHA
TYA
ADC temp2+1
TAY
PLA
CPX #$30
BNE .3
LDX temp
BNE .4
RTS
.4: DEX
BEQ .6
LDX temp+1
BNE .5
.6:
LDX #$30
.3: PHA
LDA #1
STA temp
PLA
.5: PHA
TYA
PHA
LDA cursor+1
AND #$07
ORA #$18
TAY
LDA cursor
JSR WRTVRM
INC cursor
BNE .1
INC cursor+1
.1:
PLA
TAY
PLA
RTS
define_sprite:
sta temp2
lda #0
sta temp2+1
lda #7
sta pointer+1
lda pointer
asl a
asl a
asl a
rol pointer+1
asl a
rol pointer+1
asl a
rol pointer+1
sta pointer
lda temp2
asl a
rol temp2+1
asl a
rol temp2+1
asl a
rol temp2+1
asl a
rol temp2+1
asl a
rol temp2+1
sta temp2
sei
jsr LDIRVM
cli
rts
define_char:
sta temp2
lda #0
sta pointer+1
sta temp2+1
lda pointer
asl a
rol pointer+1
asl a
rol pointer+1
asl a
rol pointer+1
sta pointer
lda temp2
asl a
rol temp2+1
asl a
rol temp2+1
asl a
rol temp2+1
sta temp2
sei
lda mode
and #$08
bne .1
jsr LDIRVM3
cli
rts
.1: jsr LDIRVM
cli
rts
define_color:
sta temp2
lda #0
sta temp2+1
lda #$04
sta pointer+1
lda pointer
asl a
rol pointer+1
asl a
rol pointer+1
asl a
rol pointer+1
sta pointer
lda temp2
asl a
rol temp2+1
asl a
rol temp2+1
asl a
rol temp2+1
sta temp2
sei
jsr LDIRVM3
cli
rts
update_sprite:
ASL A
ASL A
ORA #$80
STA pointer
LDA #$01
STA pointer+1
LDY #0
LDA sprite_data+0
STA (pointer),Y
INY
LDA sprite_data+1
STA (pointer),Y
INY
LDA sprite_data+2
STA (pointer),Y
INY
LDA sprite_data+3
STA (pointer),Y
RTS
_abs16:
PHA
TYA
BPL _neg16.1
PLA
_neg16:
EOR #$FF
CLC
ADC #1
PHA
TYA
EOR #$FF
ADC #0
TAY
.1:
PLA
RTS
_sgn16:
STY temp
ORA temp
BEQ .1
TYA
BMI .2
LDA #0
TAY
LDA #1
RTS
.2: LDA #$FF
.1: TAY
RTS
_read16:
JSR _read8
PHA
JSR _read8
TAY
PLA
RTS
_read8:
LDY #0
LDA (read_pointer),Y
INC read_pointer
BNE .1
INC read_pointer+1
.1:
RTS
_peek8:
STA pointer
STY pointer+1
LDY #0
LDA (pointer),Y
RTS
_peek16:
STA pointer
STY pointer+1
LDY #0
LDA (pointer),Y
PHA
INY
LDA (pointer),Y
TAY
PLA
RTS
; temp2 contains left side (dividend)
; temp contains right side (divisor)
; 16-bit multiplication.
_mul16:
PLA
STA result
PLA
STA result+1
PLA
STA temp2+1
PLA
STA temp2
LDA result+1
PHA
LDA result
PHA
LDA #0
STA result
STA result+1
LDX #15
.1:
LSR temp2+1
ROR temp2
BCC .2
LDA result
CLC
ADC temp
STA result
LDA result+1
ADC temp+1
STA result+1
.2: ASL temp
ROL temp+1
DEX
BPL .1
LDA result
LDY result+1
RTS
; 16-bit signed modulo.
_mod16s:
PLA
STA result
PLA
STA result+1
PLA
STA temp2+1
PLA
STA temp2
LDA result+1
PHA
LDA result
PHA
LDY temp2+1
PHP
BPL .1
LDA temp2
JSR _neg16
STA temp2
STY temp2+1
.1:
LDY temp+1
BPL .2
LDA temp
JSR _neg16
STA temp
STY temp+1
.2:
JSR _mod16.1
PLP
BPL .3
JMP _neg16
.3:
RTS
; 16-bit signed division.
_div16s:
PLA
STA result
PLA
STA result+1
PLA
STA temp2+1
PLA
STA temp2
LDA result+1
PHA
LDA result
PHA
LDA temp+1
EOR temp2+1
PHP
LDY temp2+1
BPL .1
LDA temp2
JSR _neg16
STA temp2
STY temp2+1
.1:
LDY temp+1
BPL .2
LDA temp
JSR _neg16
STA temp
STY temp+1
.2:
JSR _div16.1
PLP
BPL .3
JMP _neg16
.3:
RTS
_div16:
PLA
STA result
PLA
STA result+1
PLA
STA temp2+1
PLA
STA temp2
LDA result+1
PHA
LDA result
PHA
.1:
LDA #0
STA result
STA result+1
LDX #15
.2:
ROL temp2
ROL temp2+1
ROL result
ROL result+1
LDA result
SEC
SBC temp
STA result
LDA result+1
SBC temp+1
STA result+1
BCS .3
LDA result
ADC temp
STA result
LDA result+1
ADC temp+1
STA result+1
CLC
.3:
DEX
BPL .2
ROL temp2
ROL temp2+1
LDA temp2
LDY temp2+1
RTS
_mod16:
PLA
STA result
PLA
STA result+1
PLA
STA temp2+1
PLA
STA temp2
LDA result+1
PHA
LDA result
PHA
.1:
LDA #0
STA result
STA result+1
LDX #15
.2:
ROL temp2
ROL temp2+1
ROL result
ROL result+1
LDA result
SEC
SBC temp
STA result
LDA result+1
SBC temp+1
STA result+1
BCS .3
LDA result
ADC temp
STA result
LDA result+1
ADC temp+1
STA result+1
CLC
.3:
DEX
BPL .2
LDA result
LDY result+1
RTS
; Random number generator.
; From my game Mecha Eight.
random:
LDA lfsr
ORA lfsr+1
BNE .0
LDA #$11
STA lfsr
LDA #$78
STA lfsr+1
.0: LDA lfsr+1
ROR A
ROR A
ROR A
EOR lfsr+1
STA temp
LDA lfsr+1
ROR A
ROR A
EOR temp
STA temp
LDA lfsr
ASL A
ASL A
EOR temp
ROL A
ROR lfsr+1
ROR lfsr
LDA lfsr
LDY lfsr+1
RTS
sn76489_freq:
STA temp
STY temp+1
STX temp2
AND #$0f
ORA temp2
JSR BIOS_WRITE_PSG
LDA temp+1
ASL temp
ROL A
ASL temp
ROL A
ASL temp
ROL A
ASL temp
ROL A
AND #$3f
JMP BIOS_WRITE_PSG
sn76489_vol:
STX temp2
EOR #$ff
AND #$0f
ORA temp2
JMP BIOS_WRITE_PSG
sn76489_control:
AND #$0f
ORA #$e0
JMP BIOS_WRITE_PSG
vdp_generic_mode:
SEI
LDX #$00
JSR WRTVDP
LDA #$A2
INX
JSR WRTVDP
LDA #$06 ; $1800 for pattern table.
INX
JSR WRTVDP
TYA
INX ; for color table.
JSR WRTVDP
LDA temp+1
INX ; for bitmap table.
JSR WRTVDP
LDA #$36 ; $1b00 for sprite attribute table.
INX
JSR WRTVDP
LDA #$07 ; $3800 for sprites bitmaps.
INX
JSR WRTVDP
LDA #$01
INX
JSR WRTVDP
LDA #font_bitmaps
LDY #font_bitmaps>>8
STA temp
STY temp+1
LDA #$00
STA pointer
STA temp2
LDA #$01
STA pointer+1
LDA #$03
STA temp2+1
RTS
mode_0:
LDA mode
AND #$F7
STA mode
LDY #$ff ; $2000 for color table.
LDA #$03 ; $0000 for bitmaps
STA temp+1
LDA #$02
JSR vdp_generic_mode
JSR LDIRVM3
SEI
LDA #$f0
STA temp
LDA #$00
STA pointer
STA temp2
LDY #$2000>>8
STY pointer+1
LDY #$1800>>8
STY temp2+1
JSR FILVRM
CLI
JSR cls
vdp_generic_sprites:
LDA #$d1
STA temp
LDA #$00
STA pointer
STA temp2+1
LDY #$1b00>>8
STY pointer+1
LDA #$80