-
Notifications
You must be signed in to change notification settings - Fork 2
/
Copy path0999-SPI-ralink-mt7621-half-transfer.patch
334 lines (322 loc) · 7.9 KB
/
0999-SPI-ralink-mt7621-half-transfer.patch
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
--- a/drivers/spi/spi-mt7621.c 2017-07-12 17:25:42.443742496 +0800
+++ b/drivers/spi/spi-mt7621.c 2017-07-14 19:20:48.939085943 +0800
@@ -27,6 +27,7 @@
#include <linux/swab.h>
#include <ralink_regs.h>
+#include <linux/delay.h> /*time*/
#define SPI_BPW_MASK(bits) BIT((bits) - 1)
@@ -56,6 +57,9 @@
#define MT7621_LSB_FIRST BIT(3)
#define RT2880_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | SPI_CS_HIGH)
+//Fix me by seven 20160614
+#define MT7621_MB_STRANS /* allow word transfer */
+//#undef MT7621_MB_STRANS
struct mt7621_spi;
@@ -197,10 +201,7 @@
if (!buf)
continue;
- if (t->speed_hz < speed)
- speed = t->speed_hz;
-
- if (WARN_ON(len + rlen > 36)) {
+ if (WARN_ON(len + t->len > 36)) {
status = -EIO;
goto msg_done;
}
@@ -264,13 +265,291 @@
return 0;
}
+#ifdef MT7621_MB_STRANS
+/*
+* more-byte-mode for reading and writing data
+*/
+static int mt7621_spi_mb_transfer_half_duplex
+(
+ struct spi_master *master,
+ struct spi_message *m
+)
+{
+ struct mt7621_spi *rs = spi_master_get_devdata(master);
+ struct spi_device *spi = m->spi;
+ unsigned int speed = spi->max_speed_hz;
+ struct spi_transfer *t = NULL;
+ int status = 0;
+ int i = 0, len = 0;
+ u8 is_write = 0;
+ u32 data[9] = { 0 };
+ u32 val = 0;
+ u32 transfer_len = 0;
+ int cs_active = 0;
+
+ mt7621_spi_wait_till_ready(spi);
+ dev_dbg(&spi->dev, "seven spidev test ->cs:\n");
+
+ list_for_each_entry(t, &m->transfers, transfer_list) {
+ const u8 *txbuf = t->tx_buf;
+ u8 *rxbuf = t->rx_buf;
+
+ if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) {
+ dev_err(&spi->dev,
+ "message rejected: invalid transfer data buffers\n");
+ status = -EIO;
+ goto msg_done;
+ }
+
+ if (rxbuf)
+ is_write = 0;
+ else if(txbuf)
+ is_write = 1;
+
+ if (mt7621_spi_prepare(spi, speed)) {
+ status = -EIO;
+ goto msg_done;
+ }
+
+ transfer_len = t->len/4;
+ //mt7621_spi_set_cs(spi, 1);
+ if (!cs_active) {
+ mt7621_spi_set_cs(spi, 1);
+ cs_active = 1;
+ }
+ //printk("seven %s %d tlen:%d, transfer_len:%d, write:%d\n", __func__, __LINE__, t->len, transfer_len, is_write);
+
+ if(transfer_len){ /* for word transfer */
+ u32 u32TxNum = 0;
+
+ while ( transfer_len > 0 )
+ {
+ u32TxNum = transfer_len%8;
+ if ( !u32TxNum )
+ u32TxNum = 8;
+
+ for ( i=0; i<u32TxNum*4; i++)
+ {
+ if ( is_write ){ /* for write transfer */
+ data[i / 4] |= *txbuf++ << (8 * (i & 3));
+ }
+ //else /* for read transfer */
+
+ }
+#if 0
+ for(i=0; i<u32TxNum*4; i += 4)
+ printk("0x%x, ", data[i/4]);
+
+ printk("\n");
+#endif
+ data[0] = swab32(data[0]);
+ val = 0;
+ if(is_write){
+ for(i=0; i<u32TxNum*4; i += 4)
+ mt7621_spi_write(rs, MT7621_SPI_OPCODE + i, data[i / 4]);
+
+ val = (min_t(int, u32TxNum*4, 4) * 8) << 24; /* must be set 32 */
+ val |= ((u32TxNum*4) - 4) * 8; /* mosi_cnt */
+ }else
+ val |= ((u32TxNum*4) * 8) << 12; /* miso_cnt */
+
+ mt7621_spi_write(rs, MT7621_SPI_MOREBUF, val);
+ //mt7621_spi_set_cs(spi, 1);
+ val = mt7621_spi_read(rs, MT7621_SPI_TRANS);
+ val |= SPI_CTL_START;
+ mt7621_spi_write(rs, MT7621_SPI_TRANS, val);
+
+ mt7621_spi_wait_till_ready(spi);
+
+ if(!is_write){
+
+ for (i = 0; i < u32TxNum*4; i += 4)
+ data[i / 4] = mt7621_spi_read(rs, MT7621_SPI_DATA0 + i);
+
+ for (i = 0; i < u32TxNum*4; i++)
+ *rxbuf++ = data[i / 4] >> (8 * (i & 3));
+ }
+
+ len += u32TxNum*4;
+ transfer_len -= u32TxNum;
+ memset(data, 0, sizeof(data));
+
+ }
+
+ }
+
+ transfer_len = t->len%4;
+ if(transfer_len){ /* for bytes transfer 0-3bytes*/
+
+ for ( i=0; i<transfer_len; i++ ){
+ if(is_write)
+ data[i / 4] |= *txbuf++ << (8 * (i & 3));
+ }
+
+ data[0] = swab32(data[0]);
+ data[0] >>= (4 - transfer_len) * 8;
+
+ val = 0;
+ if(is_write){
+ for(i=0; i<transfer_len; i += 4)
+ mt7621_spi_write(rs, MT7621_SPI_OPCODE + i, data[i / 4]);
+
+ val = (min_t(int, transfer_len, 4) * 8) << 24; /* must be 32 */
+ //val |= (transfer_len - 4) * 8; /* mosi_cnt */
+ }else{
+ val |= (transfer_len* 8) << 12; /* miso_cnt */
+ }
+ mt7621_spi_write(rs, MT7621_SPI_MOREBUF, val);
+ val = mt7621_spi_read(rs, MT7621_SPI_TRANS);
+ val |= SPI_CTL_START;
+ mt7621_spi_write(rs, MT7621_SPI_TRANS, val);
+
+ mt7621_spi_wait_till_ready(spi);
+
+ if(!is_write){
+
+ for (i = 0; i < transfer_len; i += 4)
+ data[i / 4] = mt7621_spi_read(rs, MT7621_SPI_DATA0 + i);
+
+ for (i = 0; i < transfer_len; i++)
+ *rxbuf++ = data[i / 4] >> (8 * (i & 3));
+ }
+ len += transfer_len;
+ memset(data, 0, sizeof(data));
+ }
+
+ m->actual_length = len; //+ rx_len;
+ //mt7621_spi_set_cs(spi, 0);
+ if (t->cs_change) {
+ mt7621_spi_set_cs(spi, 0);
+ cs_active = 0;
+ }
+ }
+
+msg_done:
+ if (cs_active)
+ mt7621_spi_set_cs(spi, 0);
+ m->status = status;
+ spi_finalize_current_message(master);
+
+ return 0;
+}
+#else
+/*
+* one-byte-one for reading and writing data
+*/
+static int mt7621_spi_single_transfer_half_duplex
+(
+ struct spi_master *master,
+ struct spi_message *m
+)
+{
+ struct mt7621_spi *rs = spi_master_get_devdata(master);
+ struct spi_device *spi = m->spi;
+ unsigned int speed = spi->max_speed_hz;
+ struct spi_transfer *t = NULL;
+ int status = 0;
+ int len = 0;
+ u8 is_write = 0;
+ u32 data[9] = { 0 };
+ u32 val = 0;
+ u32 transfer_len = 0;
+ int cs_active = 0;
+ dev_dbg(&spi->dev, "seven spidev test ->cs:\n");
+ mt7621_spi_wait_till_ready(spi);
+
+ list_for_each_entry(t, &m->transfers, transfer_list) {
+ const u8 *txbuf = t->tx_buf;
+ u8 *rxbuf = t->rx_buf;
+
+ if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) {
+ dev_err(&spi->dev,
+ "message rejected: invalid transfer data buffers\n");
+ status = -EIO;
+ goto msg_done;
+ }
+
+ if (rxbuf)
+ is_write = 0;
+ else if(txbuf)
+ is_write = 1;
+
+ if (mt7621_spi_prepare(spi, speed)) {
+ status = -EIO;
+ goto msg_done;
+ }
+
+ //mt7621_spi_set_cs(spi, 1);
+ if (!cs_active) {
+ mt7621_spi_set_cs(spi, 1);
+ cs_active = 1;
+ }
+ transfer_len = t->len;
+ if(transfer_len){ /* for bytes transfer one byte one */
+ while(transfer_len){
+ memset(data, 0, sizeof(data));
+
+ if(is_write)
+ data[0] = *txbuf++;
+ data[0] = swab32(data[0]);
+ data[0] >>= 24;
+
+ val = 0;
+ if(is_write){
+ mt7621_spi_write(rs, MT7621_SPI_OPCODE, data[0]);
+
+ val = 8 << 24; /* must be 8 for single byte */
+ //val |= (transfer_len - 4) * 8; /* mosi_cnt */
+ }else{
+ //val |= (transfer_len* 8) << 12; /* miso_cnt */
+ val |= 8 << 12; /* miso_cnt */
+ }
+ mt7621_spi_write(rs, MT7621_SPI_MOREBUF, val);
+ val = mt7621_spi_read(rs, MT7621_SPI_TRANS);
+ val |= SPI_CTL_START;
+ mt7621_spi_write(rs, MT7621_SPI_TRANS, val);
+
+ mt7621_spi_wait_till_ready(spi);
+
+ if(!is_write)
+ *rxbuf++ = mt7621_spi_read(rs, MT7621_SPI_DATA0);
+
+ len ++;
+ transfer_len--;
+ } //while
+ }
+
+ m->actual_length = len; //+ rx_len;
+ //mt7621_spi_set_cs(spi, 0);
+ if (t->cs_change) {
+ mt7621_spi_set_cs(spi, 0);
+ cs_active = 0;
+ }
+ }
+
+msg_done:
+ if (cs_active)
+ mt7621_spi_set_cs(spi, 0);
+ m->status = status;
+ spi_finalize_current_message(master);
+
+ return 0;
+}
+#endif
+
static int mt7621_spi_transfer_one_message(struct spi_master *master,
struct spi_message *m)
{
struct spi_device *spi = m->spi;
int cs = spi->chip_select;
- return mt7621_spi_transfer_half_duplex(master, m);
+ if (cs)
+#ifdef MT7621_MB_STRANS
+ return mt7621_spi_mb_transfer_half_duplex(master, m); /* more bytes */
+#else
+ return mt7621_spi_single_transfer_half_duplex(master, m); /* single byte transfer */
+#endif
+ return mt7621_spi_transfer_half_duplex(master, m); /* only for spi-flash*/
}
static int mt7621_spi_setup(struct spi_device *spi)
@@ -339,7 +618,7 @@
master->setup = mt7621_spi_setup;
master->transfer_one_message = mt7621_spi_transfer_one_message;
- master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16);
+ master->bits_per_word_mask = SPI_BPW_MASK(8);
master->dev.of_node = pdev->dev.of_node;
master->num_chipselect = 2;