From 81e88d3482f1f866c7ca4df3dcefff4fff0fd5ef Mon Sep 17 00:00:00 2001 From: Joo Liang Cheah Date: Thu, 16 May 2024 22:34:08 +0800 Subject: [PATCH 1/3] Add Counter Output examples --- examples/counter_out/co_pulse_time.py | 20 ----------- .../counter_out/cont_gen_dig_pulse_train.py | 21 ++++++++++++ .../cont_gen_dig_pulse_train_buff_ext_clk.py | 33 +++++++++++++++++++ .../cont_gen_dig_pulse_train_buff_implicit.py | 32 ++++++++++++++++++ examples/counter_out/write_dig_pulse.py | 19 +++++++++++ 5 files changed, 105 insertions(+), 20 deletions(-) delete mode 100644 examples/counter_out/co_pulse_time.py create mode 100644 examples/counter_out/cont_gen_dig_pulse_train.py create mode 100644 examples/counter_out/cont_gen_dig_pulse_train_buff_ext_clk.py create mode 100644 examples/counter_out/cont_gen_dig_pulse_train_buff_implicit.py create mode 100644 examples/counter_out/write_dig_pulse.py diff --git a/examples/counter_out/co_pulse_time.py b/examples/counter_out/co_pulse_time.py deleted file mode 100644 index 4b9241233..000000000 --- a/examples/counter_out/co_pulse_time.py +++ /dev/null @@ -1,20 +0,0 @@ -"""Example of CO pulse time operation.""" - -import time - -import nidaqmx -from nidaqmx.constants import AcquisitionType -from nidaqmx.types import CtrTime - -with nidaqmx.Task() as task: - task.co_channels.add_co_pulse_chan_time("Dev1/ctr1", low_time=0.01, high_time=0.01) - task.timing.cfg_implicit_timing(sample_mode=AcquisitionType.CONTINUOUS) - task.start() - - print("Waiting before changing pulse specification...") - time.sleep(2) - - sample = CtrTime(high_time=0.001, low_time=0.002) - - print("1 Channel 1 Sample Write: ") - print(task.write(sample)) diff --git a/examples/counter_out/cont_gen_dig_pulse_train.py b/examples/counter_out/cont_gen_dig_pulse_train.py new file mode 100644 index 000000000..0328f7fd7 --- /dev/null +++ b/examples/counter_out/cont_gen_dig_pulse_train.py @@ -0,0 +1,21 @@ +"""Example for continuously generating digital pulse train. + +This example demonstrates how to generate a continuous digital +pulse train from a Counter Output Channel. The Frequency, Duty +Cycle, and Idle State are all configurable. +""" + +import nidaqmx +from nidaqmx.constants import AcquisitionType, Level + +with nidaqmx.Task() as task: + channel = task.co_channels.add_co_pulse_chan_freq( + "Dev1/ctr1", idle_state=Level.LOW, initial_delay=0.0, freq=100.0, duty_cycle=0.5 + ) + channel.co_pulse_term = "/Dev1/PFI13" + task.timing.cfg_implicit_timing(sample_mode=AcquisitionType.CONTINUOUS) + task.start() + + input("Generating pulse train. Press Enter to stop.\n") + + task.stop() diff --git a/examples/counter_out/cont_gen_dig_pulse_train_buff_ext_clk.py b/examples/counter_out/cont_gen_dig_pulse_train_buff_ext_clk.py new file mode 100644 index 000000000..70bf02420 --- /dev/null +++ b/examples/counter_out/cont_gen_dig_pulse_train_buff_ext_clk.py @@ -0,0 +1,33 @@ +"""Example for continuously generating digital pulse train with external timing. + +This example demonstrates how to generate a continuous buffered +sample clocked digital pulse train from a Counter Output +Channel. The Frequency, Duty Cycle, and Idle State are all +configurable. The default data generated is a pulse train with a +fixed frequency but a duty cycle that varies based on the Duty +Cycle Max/Min and the signal type. The duty cycle will update +with each sample clock edge. +""" + +import nidaqmx +from nidaqmx.constants import AcquisitionType, Level +from nidaqmx.types import CtrFreq + +with nidaqmx.Task() as task: + duty_min = 0.5 + duty_max = 0.8 + duty_step = (duty_max - duty_min) / 1000 + ctr_freq_data: CtrFreq = [CtrFreq(1000, (duty_min + duty_step * i)) for i in range(1000)] + + channel = task.co_channels.add_co_pulse_chan_freq( + "Dev1/ctr1", idle_state=Level.LOW, initial_delay=0.0, freq=100.0, duty_cycle=0.5 + ) + channel.co_pulse_term = "/Dev1/PFI13" + task.timing.cfg_samp_clk_timing(1000.0, "/Dev1/PFI4", sample_mode=AcquisitionType.CONTINUOUS) + task.out_stream.output_buf_size = 1000 + task.write(ctr_freq_data) + task.start() + + input("Generating pulse train. Press Enter to stop.\n") + + task.stop() diff --git a/examples/counter_out/cont_gen_dig_pulse_train_buff_implicit.py b/examples/counter_out/cont_gen_dig_pulse_train_buff_implicit.py new file mode 100644 index 000000000..b7df6db94 --- /dev/null +++ b/examples/counter_out/cont_gen_dig_pulse_train_buff_implicit.py @@ -0,0 +1,32 @@ +"""Example for continuously generating digital pulse train with implicit timing. + +This example demonstrates how to generate a continuous buffered +implicit timed digital pulse train from a Counter Output +Channel. The Frequency, Duty Cycle, and Idle State are all +configurable. The default data generated is a pulse train with a +fixed frequency but a duty cycle that varies based on the Duty +Cycle Max/Min and the signal type. The duty cycle will update +with each sample generated. +""" + +import nidaqmx +from nidaqmx.constants import AcquisitionType, Level +from nidaqmx.types import CtrFreq + +with nidaqmx.Task() as task: + duty_min = 0.5 + duty_max = 0.8 + duty_step = (duty_max - duty_min) / 1000 + ctr_freq_data: CtrFreq = [CtrFreq(1000, (duty_min + duty_step * i)) for i in range(1000)] + + channel = task.co_channels.add_co_pulse_chan_freq( + "Dev1/ctr1", idle_state=Level.LOW, initial_delay=0.0, freq=100.0, duty_cycle=0.5 + ) + channel.co_pulse_term = "/Dev1/PFI13" + task.timing.cfg_implicit_timing(sample_mode=AcquisitionType.CONTINUOUS) + task.write(ctr_freq_data) + task.start() + + input("Generating pulse train. Press Enter to stop.\n") + + task.stop() diff --git a/examples/counter_out/write_dig_pulse.py b/examples/counter_out/write_dig_pulse.py new file mode 100644 index 000000000..7d9945b69 --- /dev/null +++ b/examples/counter_out/write_dig_pulse.py @@ -0,0 +1,19 @@ +"""Example for generating digital pulse. + +This example demonstrates how to generate a single digital pulse +from a Counter Output Channel. The Initial Delay, High Time, Low +Time, and Idle State are all configurable. +""" + +import nidaqmx +from nidaqmx.constants import Level + +with nidaqmx.Task() as task: + channel = task.co_channels.add_co_pulse_chan_time( + "Dev1/ctr1", idle_state=Level.LOW, initial_delay=0.0, low_time=0.01, high_time=0.01 + ) + channel.co_pulse_term = "/Dev1/PFI13" + + task.start() + task.wait_until_done(timeout=10) + task.stop() From 63faf9f7f16ed93aad5b2794b298f1bf9da4eec5 Mon Sep 17 00:00:00 2001 From: Joo Liang Cheah Date: Fri, 17 May 2024 17:05:52 +0800 Subject: [PATCH 2/3] reworked on comments --- examples/counter_out/cont_gen_dig_pulse_train.py | 4 ++-- .../counter_out/cont_gen_dig_pulse_train_buff_ext_clk.py | 8 ++++---- .../counter_out/cont_gen_dig_pulse_train_buff_implicit.py | 4 ++-- .../{write_dig_pulse.py => write_single_dig_pulse.py} | 6 +++--- 4 files changed, 11 insertions(+), 11 deletions(-) rename examples/counter_out/{write_dig_pulse.py => write_single_dig_pulse.py} (68%) diff --git a/examples/counter_out/cont_gen_dig_pulse_train.py b/examples/counter_out/cont_gen_dig_pulse_train.py index 0328f7fd7..725f063df 100644 --- a/examples/counter_out/cont_gen_dig_pulse_train.py +++ b/examples/counter_out/cont_gen_dig_pulse_train.py @@ -10,9 +10,9 @@ with nidaqmx.Task() as task: channel = task.co_channels.add_co_pulse_chan_freq( - "Dev1/ctr1", idle_state=Level.LOW, initial_delay=0.0, freq=100.0, duty_cycle=0.5 + "Dev1/ctr0", idle_state=Level.LOW, initial_delay=0.0, freq=1.0, duty_cycle=0.5 ) - channel.co_pulse_term = "/Dev1/PFI13" + channel.co_pulse_term = "/Dev1/PFI12" task.timing.cfg_implicit_timing(sample_mode=AcquisitionType.CONTINUOUS) task.start() diff --git a/examples/counter_out/cont_gen_dig_pulse_train_buff_ext_clk.py b/examples/counter_out/cont_gen_dig_pulse_train_buff_ext_clk.py index 70bf02420..dd32e61a6 100644 --- a/examples/counter_out/cont_gen_dig_pulse_train_buff_ext_clk.py +++ b/examples/counter_out/cont_gen_dig_pulse_train_buff_ext_clk.py @@ -20,12 +20,12 @@ ctr_freq_data: CtrFreq = [CtrFreq(1000, (duty_min + duty_step * i)) for i in range(1000)] channel = task.co_channels.add_co_pulse_chan_freq( - "Dev1/ctr1", idle_state=Level.LOW, initial_delay=0.0, freq=100.0, duty_cycle=0.5 + "Dev1/ctr0", idle_state=Level.LOW, initial_delay=0.0, freq=1.0, duty_cycle=0.5 ) - channel.co_pulse_term = "/Dev1/PFI13" - task.timing.cfg_samp_clk_timing(1000.0, "/Dev1/PFI4", sample_mode=AcquisitionType.CONTINUOUS) + channel.co_pulse_term = "/Dev1/PFI12" + task.timing.cfg_samp_clk_timing(1000.0, "/Dev1/PFI0", sample_mode=AcquisitionType.CONTINUOUS) task.out_stream.output_buf_size = 1000 - task.write(ctr_freq_data) + task.write(ctr_freq_data, auto_start=False) task.start() input("Generating pulse train. Press Enter to stop.\n") diff --git a/examples/counter_out/cont_gen_dig_pulse_train_buff_implicit.py b/examples/counter_out/cont_gen_dig_pulse_train_buff_implicit.py index b7df6db94..cda06a642 100644 --- a/examples/counter_out/cont_gen_dig_pulse_train_buff_implicit.py +++ b/examples/counter_out/cont_gen_dig_pulse_train_buff_implicit.py @@ -20,9 +20,9 @@ ctr_freq_data: CtrFreq = [CtrFreq(1000, (duty_min + duty_step * i)) for i in range(1000)] channel = task.co_channels.add_co_pulse_chan_freq( - "Dev1/ctr1", idle_state=Level.LOW, initial_delay=0.0, freq=100.0, duty_cycle=0.5 + "Dev1/ctr0", idle_state=Level.LOW, initial_delay=0.0, freq=1.0, duty_cycle=0.5 ) - channel.co_pulse_term = "/Dev1/PFI13" + channel.co_pulse_term = "/Dev1/PFI12" task.timing.cfg_implicit_timing(sample_mode=AcquisitionType.CONTINUOUS) task.write(ctr_freq_data) task.start() diff --git a/examples/counter_out/write_dig_pulse.py b/examples/counter_out/write_single_dig_pulse.py similarity index 68% rename from examples/counter_out/write_dig_pulse.py rename to examples/counter_out/write_single_dig_pulse.py index 7d9945b69..0036b4fe5 100644 --- a/examples/counter_out/write_dig_pulse.py +++ b/examples/counter_out/write_single_dig_pulse.py @@ -1,4 +1,4 @@ -"""Example for generating digital pulse. +"""Example for generating a single digital pulse. This example demonstrates how to generate a single digital pulse from a Counter Output Channel. The Initial Delay, High Time, Low @@ -10,9 +10,9 @@ with nidaqmx.Task() as task: channel = task.co_channels.add_co_pulse_chan_time( - "Dev1/ctr1", idle_state=Level.LOW, initial_delay=0.0, low_time=0.01, high_time=0.01 + "Dev1/ctr0", idle_state=Level.LOW, initial_delay=0.0, low_time=0.5, high_time=1.0 ) - channel.co_pulse_term = "/Dev1/PFI13" + channel.co_pulse_term = "/Dev1/PFI12" task.start() task.wait_until_done(timeout=10) From 8cedd94578f1b95ad21e1e999cb60231a09bccd3 Mon Sep 17 00:00:00 2001 From: Joo Liang Cheah Date: Sat, 18 May 2024 01:55:38 +0800 Subject: [PATCH 3/3] CtrFreq type hint and auto_start --- examples/counter_out/cont_gen_dig_pulse_train_buff_ext_clk.py | 4 ++-- .../counter_out/cont_gen_dig_pulse_train_buff_implicit.py | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/examples/counter_out/cont_gen_dig_pulse_train_buff_ext_clk.py b/examples/counter_out/cont_gen_dig_pulse_train_buff_ext_clk.py index dd32e61a6..9f0eb00af 100644 --- a/examples/counter_out/cont_gen_dig_pulse_train_buff_ext_clk.py +++ b/examples/counter_out/cont_gen_dig_pulse_train_buff_ext_clk.py @@ -17,7 +17,7 @@ duty_min = 0.5 duty_max = 0.8 duty_step = (duty_max - duty_min) / 1000 - ctr_freq_data: CtrFreq = [CtrFreq(1000, (duty_min + duty_step * i)) for i in range(1000)] + ctr_freq_data = [CtrFreq(1000, (duty_min + duty_step * i)) for i in range(1000)] channel = task.co_channels.add_co_pulse_chan_freq( "Dev1/ctr0", idle_state=Level.LOW, initial_delay=0.0, freq=1.0, duty_cycle=0.5 @@ -25,7 +25,7 @@ channel.co_pulse_term = "/Dev1/PFI12" task.timing.cfg_samp_clk_timing(1000.0, "/Dev1/PFI0", sample_mode=AcquisitionType.CONTINUOUS) task.out_stream.output_buf_size = 1000 - task.write(ctr_freq_data, auto_start=False) + task.write(ctr_freq_data) task.start() input("Generating pulse train. Press Enter to stop.\n") diff --git a/examples/counter_out/cont_gen_dig_pulse_train_buff_implicit.py b/examples/counter_out/cont_gen_dig_pulse_train_buff_implicit.py index cda06a642..5a5a8aa04 100644 --- a/examples/counter_out/cont_gen_dig_pulse_train_buff_implicit.py +++ b/examples/counter_out/cont_gen_dig_pulse_train_buff_implicit.py @@ -17,7 +17,7 @@ duty_min = 0.5 duty_max = 0.8 duty_step = (duty_max - duty_min) / 1000 - ctr_freq_data: CtrFreq = [CtrFreq(1000, (duty_min + duty_step * i)) for i in range(1000)] + ctr_freq_data = [CtrFreq(1000, (duty_min + duty_step * i)) for i in range(1000)] channel = task.co_channels.add_co_pulse_chan_freq( "Dev1/ctr0", idle_state=Level.LOW, initial_delay=0.0, freq=1.0, duty_cycle=0.5