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When I used registers to store data, I found that the value read was -1 when the register cell size was defined to be 72 bits, but this did not happen with 64 bits. I found in the p4 learning tutorial that the maximum register cell size is defined as 64 bits. Does this mean trying to define the size of register cells to be 64 bits or less when using registers.
The text was updated successfully, but these errors were encountered:
This problem has been solved.The answer is as follows:While p4c and simple_switch support as wide a bit width W as you wish for array elements for packet processing, the Thrift API (used by , and perhaps some switch controller software) only supports control plane read and write operations for array elements up to 64 bits wide (see the type in file standard.thrift, which is a 64-bit integer as of January 2022). The P4Runtime API does not have this limitation, but there is no P4Runtime implementation of register read and write operations yet for simple_switch.
When I used registers to store data, I found that the value read was -1 when the register cell size was defined to be 72 bits, but this did not happen with 64 bits. I found in the p4 learning tutorial that the maximum register cell size is defined as 64 bits. Does this mean trying to define the size of register cells to be 64 bits or less when using registers.
The text was updated successfully, but these errors were encountered: