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README.md

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# SBC (for Teensy 3.6)
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This codes uses a Teensy to emulate hardware of a **6502** based computer apart from CPU itself.
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This codes uses a Teensy to emulate hardware of a **65C02** based computer apart from CPU itself.
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The following parts can be emulated :
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- Clock (mandatory)
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> 3. If you emulate a component, make sure a real IC is not actually connected, as both Teensy and the IC will put data on the bus at the same time !
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### ROM configuration
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If you emulate a ROM, provide it as a C Array in a file called `rom.h`. Two ROMs are provided here:
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If you emulate a ROM, provide it as a C Array in a file called `rom.h`. Three ROMs are provided here:
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1. **OSI Basic ROM** (rom.h.OSI)
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- Uses a 6850.
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- ACIADDRESS: 0xA000
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- ROMADDRESS: 0xB000
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3. **Java6502** (rom.h)
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My own ROM using Microsoft Basic 2
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- RAMSIZE(max): 0xC000
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- ACIADDRESS: 0xC100
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- ROMADDRESS: 0xD000
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You can replace with your own ROM, using srec_cat to generate the C Array. See my [ROM Software repo](https://github.com/olivierjan/ROM-software-for-6502-SBC) for more details.
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The code is very basic but is meant to help debug a hombrew computer. It can be greatly optimised and I will try to add new features over time (usable debugging, support for VIAs and other components, etc...).
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**WARNING:** Teensy 3.6 is only 3.3v and will provide power to the whole circuit. A 5V version should be possible using Teensy 3.5 but I haven't tested yet.
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**WARNING:** Teensy 3.6 is only 3.3v and will provide power to the whole circuit. A 5V version should be possible using Teensy 3.5 but I can't get this to work on Teensy 3.5 at the moment.
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### PCB Board
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A PCB to host the Teensy and the 65C02 is provided, I designed it using EasyEDA and ordered it from JLCPCB.
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I provided the design here in Altium and Gerber format, but haven't tested these, only the EasyEDA.
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The PCB can be plugged in an existing circuit, and you can choose to power the circuit from Teensy or not using the jumper.
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Any comments welcome !
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rom.h.java65

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schematics/6502 Debugger_2020-04-26_19-41-09.json

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schematics/6502-Debugger_2020-04-26_19-41-25.schdoc

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schematics/6502-SBC-Using-Teensy/6502-SBC-Using-Teensy-cache.lib

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schematics/6502-SBC-Using-Teensy/6502-SBC-Using-Teensy.kicad_pcb

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