FPGA toolchain tests for the IO logic tiles (IOI)
This repository contains several test designs to test the IO logic on Kintex devices.
This primitive has been tested working in a DDR3 memory design: https://github.com/kintex-chatter/demo-projects/tree/main/litex-ddr-stlv7325
A basic test shows it seems to work as intended:
This primitive has also been tested working in a DDR3 memory design: https://github.com/kintex-chatter/demo-projects/tree/main/litex-ddr-stlv7325
Basic test works!
Basic test works!
