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Merge pull request #157 from hhe07/master
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fix to unbreak verilator compatability
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stffrdhrn committed Jun 5, 2024
2 parents 2fb1b41 + 722b6ef commit 61540af
Showing 1 changed file with 3 additions and 5 deletions.
8 changes: 3 additions & 5 deletions rtl/verilog/mor1kx_cpu.v
Original file line number Diff line number Diff line change
Expand Up @@ -198,13 +198,11 @@ module mor1kx_cpu
// synthesis translate_off
`ifndef SYNTHESIS
/* Provide interface hooks for register functions. */
`include "mor1kx_utils.vh"
localparam RF_ADDR_WIDTH = calc_rf_addr_width(OPTION_RF_ADDR_WIDTH,
OPTION_RF_NUM_SHADOW_GPR);
generate
if (OPTION_CPU=="CAPPUCCINO") begin : monitor

`include "mor1kx_utils.vh"
localparam RF_ADDR_WIDTH = calc_rf_addr_width(OPTION_RF_ADDR_WIDTH,
OPTION_RF_NUM_SHADOW_GPR);

function [OPTION_OPERAND_WIDTH-1:0] get_gpr;
// verilator public
input [RF_ADDR_WIDTH-1:0] gpr_num;
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