From 722b6ef849c8cd4cddf19f0874eb4e5f2e0cffa6 Mon Sep 17 00:00:00 2001 From: hhe07 Date: Mon, 3 Jun 2024 12:06:10 -0600 Subject: [PATCH] fix to unbreak verilator compatability --- rtl/verilog/mor1kx_cpu.v | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/rtl/verilog/mor1kx_cpu.v b/rtl/verilog/mor1kx_cpu.v index 371ab7ac..ca82ab61 100644 --- a/rtl/verilog/mor1kx_cpu.v +++ b/rtl/verilog/mor1kx_cpu.v @@ -198,13 +198,11 @@ module mor1kx_cpu // synthesis translate_off `ifndef SYNTHESIS /* Provide interface hooks for register functions. */ + `include "mor1kx_utils.vh" + localparam RF_ADDR_WIDTH = calc_rf_addr_width(OPTION_RF_ADDR_WIDTH, + OPTION_RF_NUM_SHADOW_GPR); generate if (OPTION_CPU=="CAPPUCCINO") begin : monitor - -`include "mor1kx_utils.vh" - localparam RF_ADDR_WIDTH = calc_rf_addr_width(OPTION_RF_ADDR_WIDTH, - OPTION_RF_NUM_SHADOW_GPR); - function [OPTION_OPERAND_WIDTH-1:0] get_gpr; // verilator public input [RF_ADDR_WIDTH-1:0] gpr_num;