Repositories list

• tensor-core

  Public
  SystemVerilog

  •0•2•0•1•Updated Mar 12, 2025Mar 12, 2025

• embench-iot-aftx07

  Public
  The main Embench repository

  C

  •

  GNU General Public License v3.0

  •113•0•0•0•Updated Mar 12, 2025Mar 12, 2025

• RISCVBusiness

  Public
  SystemVerilog

  •

  Other

  •8•8•1•5•Updated Mar 12, 2025Mar 12, 2025

• intro-socet

  Public
  SystemVerilog

  •1•0•0•0•Updated Mar 11, 2025Mar 11, 2025

• chiplet-components

  Public
  SystemVerilog

  •0•1•0•0•Updated Mar 11, 2025Mar 11, 2025

• intro-2-stopwatch

  Public
  C++

  •0•1•0•0•Updated Mar 10, 2025Mar 10, 2025

• gpgpu-sim_distribution

  Public
  GPGPU-Sim provides a detailed simulation model of contemporary NVIDIA GPUs running CUDA and/or OpenCL workloads. It includes support for features such as TensorCores and CUDA Dynamic Parallelism as well as a performance visualization tool, AerialVisoin, and an integrated energy model, GPUWattch.

  C++

  •

  Other

  •542•0•0•0•Updated Mar 10, 2025Mar 10, 2025

• vito-uart

  Public
  SystemVerilog

  •

  Apache License 2.0

  •2•0•1•0•Updated Mar 7, 2025Mar 7, 2025

• riscv_intro

  Public
  SystemVerilog

  •0•0•0•0•Updated Mar 6, 2025Mar 6, 2025

• AXI-UVM

  Public
  SystemVerilog

  •0•0•0•0•Updated Mar 2, 2025Mar 2, 2025

• vortexS25

  Public
  Verilog

  •

  Apache License 2.0

  •299•0•0•0•Updated Feb 26, 2025Feb 26, 2025

• vortex-f24

  Public
  Verilog

  •

  Apache License 2.0

  •299•1•0•0•Updated Feb 23, 2025Feb 23, 2025

• UVM-Jumpstart

  Public
  This repo gives quick practical introduction to UVM.

  SystemVerilog

  •0•2•0•0•Updated Feb 20, 2025Feb 20, 2025

• 25S-Test-Engineering-Synopsys-Flow

  Public
  This is the previous full Synopsy Flow for test engineering members to reference

  0•0•0•0•Updated Feb 9, 2025Feb 9, 2025

• UVM_1.2

  Public
  UVM 1.2 Library

  SystemVerilog

  •

  Apache License 2.0

  •0•0•0•0•Updated Feb 3, 2025Feb 3, 2025

• amp-compiler

  Public
  0•0•0•0•Updated Jan 22, 2025Jan 22, 2025

• amp-llvm

  Public
  The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.

  LLVM

  •

  Other

  •13k•0•0•0•Updated Jan 22, 2025Jan 22, 2025

• tc-kernels

  Public
  Python

  •0•0•0•0•Updated Dec 2, 2024Dec 2, 2024

• FPU

  Public
  Floating-point unit for RISC-V core

  SystemVerilog

  •1•2•0•0•Updated Nov 24, 2024Nov 24, 2024

• tt09-purdue-socet

  Public
  Purdue SoCET - 11/2024 Tapeout with Tiny Tapeout

  SystemVerilog

  •

  Apache License 2.0

  •0•0•0•0•Updated Nov 10, 2024Nov 10, 2024

• fatfs-aft

  Public
  FatFs - Generic FAT File System Module

  C

  •

  Other

  •100•0•0•0•Updated Nov 6, 2024Nov 6, 2024

• li-singh-uart

  Public
  SystemVerilog

  •

  Apache License 2.0

  •2•0•0•0•Updated Sep 23, 2024Sep 23, 2024

• AFTx07-Doom

  Public
  A port of prBoom to the AFTx07.

  C

  •32•0•0•0•Updated Aug 27, 2024Aug 27, 2024

• Purdue-SoCET.github.io

  Public
  HTML

  •0•0•0•0•Updated Aug 19, 2024Aug 19, 2024

• doom-aftx07

  Public
  Easily portable doom

  C

  •

  GNU General Public License v2.0

  •2.6k•0•0•0•Updated Jul 9, 2024Jul 9, 2024

• Digital-Mux-Test-Bench

  Public
  SystemVerilog

  •0•0•0•0•Updated May 7, 2024May 7, 2024

• Phase-Locked-Loop

  Public
  SystemVerilog

  •0•0•0•0•Updated May 2, 2024May 2, 2024

• Vortex-SCLR

  Public
  End of Spring 2024 Fork into SoCET Ownership

  Verilog

  •

  Apache License 2.0

  •299•0•0•0•Updated Apr 23, 2024Apr 23, 2024

• SMTAttack

  Public
  SMT Attack

  Python

  •7•0•0•0•Updated Jan 31, 2024Jan 31, 2024

• aft-hal

  Public
  Hardware abstraction library (HAL) for Purdue SoCET's system on chip.

  C++

  •0•0•0•0•Updated Dec 9, 2023Dec 9, 2023