diff --git a/RTL_testcases/RS_FPGA_PRIMITIVES_new/dffnre_primitive_inst/raptor_run.sh b/RTL_testcases/RS_FPGA_PRIMITIVES_new/dffnre_primitive_inst/raptor_run.sh index 4a01b489f..7bf7cd598 100755 --- a/RTL_testcases/RS_FPGA_PRIMITIVES_new/dffnre_primitive_inst/raptor_run.sh +++ b/RTL_testcases/RS_FPGA_PRIMITIVES_new/dffnre_primitive_inst/raptor_run.sh @@ -259,6 +259,9 @@ parse_cga exit 1; } else echo "" fi + echo "setup_lec_sim">>raptor_tcl.tcl + [ "$tool_name" = "iverilog" ] && echo "simulate gate icarus">>raptor_tcl.tcl || echo "simulate gate verilator">>raptor_tcl.tcl + [ "$tool_name" = "iverilog" ] && echo "simulate pnr icarus">>raptor_tcl.tcl || echo "simulate pnr verilator">>raptor_tcl.tcl echo "sta">>raptor_tcl.tcl echo "power">>raptor_tcl.tcl echo "bitstream $bitstream">>raptor_tcl.tcl diff --git a/RTL_testcases/RS_FPGA_PRIMITIVES_new/dffre_primitive_inst/raptor_run.sh b/RTL_testcases/RS_FPGA_PRIMITIVES_new/dffre_primitive_inst/raptor_run.sh index edb622d12..403d53c1a 100755 --- a/RTL_testcases/RS_FPGA_PRIMITIVES_new/dffre_primitive_inst/raptor_run.sh +++ b/RTL_testcases/RS_FPGA_PRIMITIVES_new/dffre_primitive_inst/raptor_run.sh @@ -259,6 +259,9 @@ parse_cga exit 1; } else echo "" fi + echo "setup_lec_sim">>raptor_tcl.tcl + [ "$tool_name" = "iverilog" ] && echo "simulate gate icarus">>raptor_tcl.tcl || echo "simulate gate verilator">>raptor_tcl.tcl + [ "$tool_name" = "iverilog" ] && echo "simulate pnr icarus">>raptor_tcl.tcl || echo "simulate pnr verilator">>raptor_tcl.tcl echo "sta">>raptor_tcl.tcl echo "power">>raptor_tcl.tcl echo "bitstream $bitstream">>raptor_tcl.tcl diff --git a/RTL_testcases/dffs_latches_instantiation/dffnre_inst/raptor_run.sh b/RTL_testcases/dffs_latches_instantiation/dffnre_inst/raptor_run.sh index 9d8a1ff0d..2fc937700 100755 --- a/RTL_testcases/dffs_latches_instantiation/dffnre_inst/raptor_run.sh +++ b/RTL_testcases/dffs_latches_instantiation/dffnre_inst/raptor_run.sh @@ -258,6 +258,9 @@ parse_cga exit 1; } else echo "" fi + echo "setup_lec_sim">>raptor_tcl.tcl + [ "$tool_name" = "iverilog" ] && echo "simulate gate icarus">>raptor_tcl.tcl || echo "simulate gate verilator">>raptor_tcl.tcl + [ "$tool_name" = "iverilog" ] && echo "simulate pnr icarus">>raptor_tcl.tcl || echo "simulate pnr verilator">>raptor_tcl.tcl echo "sta">>raptor_tcl.tcl echo "power">>raptor_tcl.tcl echo "bitstream $bitstream">>raptor_tcl.tcl diff --git a/RTL_testcases/dffs_latches_instantiation/dffre_inst/raptor_run.sh b/RTL_testcases/dffs_latches_instantiation/dffre_inst/raptor_run.sh index b6da769e8..10c489d5c 100755 --- a/RTL_testcases/dffs_latches_instantiation/dffre_inst/raptor_run.sh +++ b/RTL_testcases/dffs_latches_instantiation/dffre_inst/raptor_run.sh @@ -258,6 +258,9 @@ parse_cga exit 1; } else echo "" fi + echo "setup_lec_sim">>raptor_tcl.tcl + [ "$tool_name" = "iverilog" ] && echo "simulate gate icarus">>raptor_tcl.tcl || echo "simulate gate verilator">>raptor_tcl.tcl + [ "$tool_name" = "iverilog" ] && echo "simulate pnr icarus">>raptor_tcl.tcl || echo "simulate pnr verilator">>raptor_tcl.tcl echo "sta">>raptor_tcl.tcl echo "power">>raptor_tcl.tcl echo "bitstream $bitstream">>raptor_tcl.tcl