Merge pull request #430 from os-fpga/task/EDA-3187/add_setup_lec_sim

EDA-3187 added setup_lec_sim for counter120bitx5 and cxd9731

Author: NadeemYaseen

RTL_testcases/RTL_Benchmarks_Gap_Analysis/counter120bitx5/raptor_run.sh

@@ -258,6 +258,9 @@ parse_cga exit 1; }
         else
             echo ""
         fi
+    echo "setup_lec_sim 10 2">>raptor_tcl.tcl 
+    [ "$tool_name" = "iverilog" ] && echo "simulate gate icarus">>raptor_tcl.tcl || echo "simulate gate verilator">>raptor_tcl.tcl 
+    [ "$tool_name" = "iverilog" ] && echo "simulate pnr icarus">>raptor_tcl.tcl || echo "simulate pnr verilator">>raptor_tcl.tcl 
     echo "sta">>raptor_tcl.tcl  
     echo "power">>raptor_tcl.tcl  
     echo "bitstream $bitstream">>raptor_tcl.tcl  

RTL_testcases/RTL_Benchmarks_Gap_Analysis/cxd9731/raptor_run.sh

@@ -270,6 +270,9 @@ parse_cga exit 1; }
         else
             echo ""
         fi
+    echo "setup_lec_sim">>raptor_tcl.tcl 
+    [ "$tool_name" = "iverilog" ] && echo "simulate gate icarus">>raptor_tcl.tcl || echo "simulate gate verilator">>raptor_tcl.tcl 
+    [ "$tool_name" = "iverilog" ] && echo "simulate pnr icarus">>raptor_tcl.tcl || echo "simulate pnr verilator">>raptor_tcl.tcl 
     echo "sta">>raptor_tcl.tcl  
     echo "power">>raptor_tcl.tcl  
     echo "bitstream $bitstream">>raptor_tcl.tcl  

RTL_testcases/RTL_Benchmarks_Gap_Analysis/cxd9731/rtl/Top.v

@@ -12,6 +12,7 @@ wire [63:0] dna64bits;
 wire dna_valid;
 
 wire	SR_ena;
+wire 	SR_reg;
 
 wire [9:0] addra;
 wire [15:0] douta;