diff --git a/RTL_testcases/titan_benchmarks/cic_decimator/doc/cic_ug.pdf b/RTL_testcases/titan_benchmarks/cic_decimator_sv/doc/cic_ug.pdf similarity index 100% rename from RTL_testcases/titan_benchmarks/cic_decimator/doc/cic_ug.pdf rename to RTL_testcases/titan_benchmarks/cic_decimator_sv/doc/cic_ug.pdf diff --git a/RTL_testcases/titan_benchmarks/cic_decimator/raptor_run.sh b/RTL_testcases/titan_benchmarks/cic_decimator_sv/raptor_run.sh similarity index 93% rename from RTL_testcases/titan_benchmarks/cic_decimator/raptor_run.sh rename to RTL_testcases/titan_benchmarks/cic_decimator_sv/raptor_run.sh index ca8705eb1..7712d4bc8 100755 --- a/RTL_testcases/titan_benchmarks/cic_decimator/raptor_run.sh +++ b/RTL_testcases/titan_benchmarks/cic_decimator_sv/raptor_run.sh @@ -7,7 +7,7 @@ start=`date +%s` design="cic_d" ip_name="" #design_level #select tool (verilator, vcs, ghdl, iverilog) -tool_name="iverilog" +tool_name="verilator" #simulation stages post_synth_sim=false @@ -182,9 +182,14 @@ parse_cga exit 1; } [ -z "$ip_name" ] && echo "" || echo "add_design_file ./rapidsilicon/ip/$ip_name/v1_0/$design/src/$design.v">>raptor_tcl.tcl [ -z "$ip_name" ] && echo "add_include_path ./rtl">>raptor_tcl.tcl || echo "" - [ -z "$ip_name" ] && echo "add_library_path ./rtl">>raptor_tcl.tcl || echo "" - [ -z "$ip_name" ] && echo "add_library_ext .v .sv">>raptor_tcl.tcl || echo "" - [ -z "$ip_name" ] && echo "add_design_file ./rtl/$design.sv">>raptor_tcl.tcl || echo "" + # [ -z "$ip_name" ] && echo "add_library_path ./rtl">>raptor_tcl.tcl || echo "" + # [ -z "$ip_name" ] && echo "add_library_ext .v .sv">>raptor_tcl.tcl || echo "" + [ -z "$ip_name" ] && echo "add_design_file ./rtl/cic_package.sv">>raptor_tcl.tcl || echo "" + [ -z "$ip_name" ] && echo "add_design_file ./rtl/comb.sv">>raptor_tcl.tcl || echo "" + [ -z "$ip_name" ] && echo "add_design_file ./rtl/downsampler.sv">>raptor_tcl.tcl || echo "" + [ -z "$ip_name" ] && echo "add_design_file ./rtl/integrator.sv">>raptor_tcl.tcl || echo "" + [ -z "$ip_name" ] && echo "add_design_file ./rtl/cic_i.sv">>raptor_tcl.tcl || echo "" + [ -z "$ip_name" ] && echo "add_design_file ./rtl/cic_d.sv">>raptor_tcl.tcl || echo "" ##vary design to design echo "set_top_module $design">>raptor_tcl.tcl @@ -205,6 +210,8 @@ parse_cga exit 1; } [ -z "$custom_synth_script" ] && echo "" || echo "custom_synth_script $custom_synth_script">>raptor_tcl.tcl [ -z "$synth_options" ] && echo "" || echo "synth_options $synth_options">>raptor_tcl.tcl [ -z "$strategy" ] && echo "" || echo "synthesize $strategy">>raptor_tcl.tcl + echo "setup_lec_sim">>raptor_tcl.tcl + [ "$tool_name" = "iverilog" ] && echo "simulate gate icarus">>raptor_tcl.tcl || echo "simulate gate verilator">>raptor_tcl.tcl if [ "$post_synth_sim" == true ]; then echo "# Open the input file in read mode">>raptor_tcl.tcl echo "set input_file [open \"$design/run_1/synth_1_1/synthesis/$design\_post_synth.v\" r]">>raptor_tcl.tcl @@ -258,6 +265,7 @@ parse_cga exit 1; } else echo "" fi + [ "$tool_name" = "iverilog" ] && echo "simulate pnr icarus">>raptor_tcl.tcl || echo "simulate pnr verilator">>raptor_tcl.tcl echo "sta">>raptor_tcl.tcl echo "power">>raptor_tcl.tcl echo "bitstream $bitstream">>raptor_tcl.tcl diff --git a/RTL_testcases/titan_benchmarks/cic_decimator/rtl/cic_d.sv b/RTL_testcases/titan_benchmarks/cic_decimator_sv/rtl/cic_d.sv similarity index 100% rename from RTL_testcases/titan_benchmarks/cic_decimator/rtl/cic_d.sv rename to RTL_testcases/titan_benchmarks/cic_decimator_sv/rtl/cic_d.sv diff --git a/RTL_testcases/titan_benchmarks/cic_decimator/rtl/cic_i.sv b/RTL_testcases/titan_benchmarks/cic_decimator_sv/rtl/cic_i.sv similarity index 100% rename from RTL_testcases/titan_benchmarks/cic_decimator/rtl/cic_i.sv rename to RTL_testcases/titan_benchmarks/cic_decimator_sv/rtl/cic_i.sv diff --git a/RTL_testcases/titan_benchmarks/cic_decimator/rtl/cic_package.sv b/RTL_testcases/titan_benchmarks/cic_decimator_sv/rtl/cic_package.sv similarity index 97% rename from RTL_testcases/titan_benchmarks/cic_decimator/rtl/cic_package.sv rename to RTL_testcases/titan_benchmarks/cic_decimator_sv/rtl/cic_package.sv index bac565334..dc77f24b0 100644 --- a/RTL_testcases/titan_benchmarks/cic_decimator/rtl/cic_package.sv +++ b/RTL_testcases/titan_benchmarks/cic_decimator_sv/rtl/cic_package.sv @@ -6,7 +6,7 @@ function longint nchoosek; longint tmp; longint i; begin - tmp = 1.0; + tmp = 1; for (i=1;i<=(n-k);i++) tmp = tmp*(k+i)/i; nchoosek = tmp; @@ -35,7 +35,7 @@ function longint h; begin c_stop = k/(R*M); if ((j>=1)&&(j<=N)) begin - tmp=0.0; + tmp=0; for (i=0;i<=c_stop;i++) begin if (i%2) tmp = tmp - nchoosek(N,i)*nchoosek(N-j+k-R*M*i,k-R*M*i); @@ -61,7 +61,7 @@ function longint F; longint tmp; longint i; begin - tmp = 0.0; + tmp = 0; if (j<=M) c_stop=(((R*G-1)*M)+j-1); else diff --git a/RTL_testcases/titan_benchmarks/cic_decimator/rtl/comb.sv b/RTL_testcases/titan_benchmarks/cic_decimator_sv/rtl/comb.sv similarity index 100% rename from RTL_testcases/titan_benchmarks/cic_decimator/rtl/comb.sv rename to RTL_testcases/titan_benchmarks/cic_decimator_sv/rtl/comb.sv diff --git a/RTL_testcases/titan_benchmarks/cic_decimator/rtl/downsampler.sv b/RTL_testcases/titan_benchmarks/cic_decimator_sv/rtl/downsampler.sv similarity index 95% rename from RTL_testcases/titan_benchmarks/cic_decimator/rtl/downsampler.sv rename to RTL_testcases/titan_benchmarks/cic_decimator_sv/rtl/downsampler.sv index fea9ac0c8..da7ba28f3 100644 --- a/RTL_testcases/titan_benchmarks/cic_decimator/rtl/downsampler.sv +++ b/RTL_testcases/titan_benchmarks/cic_decimator_sv/rtl/downsampler.sv @@ -6,7 +6,7 @@ module downsampler input clk, input reset_n, input [dw-1:0] data_in, - output reg [dw-1:0] data_out, + output reg signed [dw-1:0] data_out, output reg dv ); /*********************************************************************************************/ diff --git a/RTL_testcases/titan_benchmarks/cic_decimator/rtl/integrator.sv b/RTL_testcases/titan_benchmarks/cic_decimator_sv/rtl/integrator.sv similarity index 100% rename from RTL_testcases/titan_benchmarks/cic_decimator/rtl/integrator.sv rename to RTL_testcases/titan_benchmarks/cic_decimator_sv/rtl/integrator.sv diff --git a/RTL_testcases/titan_benchmarks/cic_decimator/sim/cic_d_tb.sv b/RTL_testcases/titan_benchmarks/cic_decimator_sv/sim/cic_d_tb.sv similarity index 100% rename from RTL_testcases/titan_benchmarks/cic_decimator/sim/cic_d_tb.sv rename to RTL_testcases/titan_benchmarks/cic_decimator_sv/sim/cic_d_tb.sv diff --git a/RTL_testcases/titan_benchmarks/cic_decimator/sim/cic_d_tb_run.tcl b/RTL_testcases/titan_benchmarks/cic_decimator_sv/sim/cic_d_tb_run.tcl similarity index 100% rename from RTL_testcases/titan_benchmarks/cic_decimator/sim/cic_d_tb_run.tcl rename to RTL_testcases/titan_benchmarks/cic_decimator_sv/sim/cic_d_tb_run.tcl diff --git a/RTL_testcases/titan_benchmarks/cic_decimator/sim/cic_i_tb.sv b/RTL_testcases/titan_benchmarks/cic_decimator_sv/sim/cic_i_tb.sv similarity index 100% rename from RTL_testcases/titan_benchmarks/cic_decimator/sim/cic_i_tb.sv rename to RTL_testcases/titan_benchmarks/cic_decimator_sv/sim/cic_i_tb.sv diff --git a/RTL_testcases/titan_benchmarks/cic_decimator/sim/cic_i_tb_run.tcl b/RTL_testcases/titan_benchmarks/cic_decimator_sv/sim/cic_i_tb_run.tcl similarity index 100% rename from RTL_testcases/titan_benchmarks/cic_decimator/sim/cic_i_tb_run.tcl rename to RTL_testcases/titan_benchmarks/cic_decimator_sv/sim/cic_i_tb_run.tcl diff --git a/RTL_testcases/titan_benchmarks/cic_decimator/test.config b/RTL_testcases/titan_benchmarks/cic_decimator_sv/test.config similarity index 100% rename from RTL_testcases/titan_benchmarks/cic_decimator/test.config rename to RTL_testcases/titan_benchmarks/cic_decimator_sv/test.config