mkRouterCore.v

/*
 * These source files contain a hardware description of a network
 * automatically generated by CONNECT (CONfigurable NEtwork Creation Tool).
 *
 * This product includes a hardware design developed by Carnegie Mellon
 * University.
 *
 * Copyright (c) 2012 by Michael K. Papamichael, Carnegie Mellon University
 *
 * For more information, see the CONNECT project website at:
 *   http://www.ece.cmu.edu/~mpapamic/connect
 *
 * This design is provided for internal, non-commercial research use only, 
 * cannot be used for, or in support of, goods or services, and is not for
 * redistribution, with or without modifications.
 * 
 * You may not use the name "Carnegie Mellon University" or derivations
 * thereof to endorse or promote products derived from this software.
 *
 * THE SOFTWARE IS PROVIDED "AS-IS" WITHOUT ANY WARRANTY OF ANY KIND, EITHER
 * EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO ANY WARRANTY
 * THAT THE SOFTWARE WILL CONFORM TO SPECIFICATIONS OR BE ERROR-FREE AND ANY
 * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
 * TITLE, OR NON-INFRINGEMENT.  IN NO EVENT SHALL CARNEGIE MELLON UNIVERSITY
 * BE LIABLE FOR ANY DAMAGES, INCLUDING BUT NOT LIMITED TO DIRECT, INDIRECT,
 * SPECIAL OR CONSEQUENTIAL DAMAGES, ARISING OUT OF, RESULTING FROM, OR IN
 * ANY WAY CONNECTED WITH THIS SOFTWARE (WHETHER OR NOT BASED UPON WARRANTY,
 * CONTRACT, TORT OR OTHERWISE).
 *
 */


//
// Generated by Bluespec Compiler, version 2012.01.A (build 26572, 2012-01-17)
//
// On Thu Oct 30 05:09:35 EDT 2014
//
// Method conflict info:
// Method: in_ports_0_putRoutedFlit
// Conflict-free: in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
// Conflicts: in_ports_0_putRoutedFlit
//
// Method: in_ports_0_getCredits
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
//
// Method: in_ports_1_putRoutedFlit
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
// Conflicts: in_ports_1_putRoutedFlit
//
// Method: in_ports_1_getCredits
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
//
// Method: in_ports_2_putRoutedFlit
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
// Conflicts: in_ports_2_putRoutedFlit
//
// Method: in_ports_2_getCredits
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
//
// Method: in_ports_3_putRoutedFlit
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
// Conflicts: in_ports_3_putRoutedFlit
//
// Method: in_ports_3_getCredits
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
//
// Method: in_ports_4_putRoutedFlit
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
// Conflicts: in_ports_4_putRoutedFlit
//
// Method: in_ports_4_getCredits
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
//
// Method: out_ports_0_getFlit
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
// Conflicts: out_ports_0_getFlit
//
// Method: out_ports_0_putCredits
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
// Conflicts: out_ports_0_putCredits
//
// Method: out_ports_1_getFlit
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
// Conflicts: out_ports_1_getFlit
//
// Method: out_ports_1_putCredits
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
// Conflicts: out_ports_1_putCredits
//
// Method: out_ports_2_getFlit
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
// Conflicts: out_ports_2_getFlit
//
// Method: out_ports_2_putCredits
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
// Conflicts: out_ports_2_putCredits
//
// Method: out_ports_3_getFlit
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
// Conflicts: out_ports_3_getFlit
//
// Method: out_ports_3_putCredits
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_4_getFlit,
// 	       out_ports_4_putCredits
// Conflicts: out_ports_3_putCredits
//
// Method: out_ports_4_getFlit
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_putCredits
// Conflicts: out_ports_4_getFlit
//
// Method: out_ports_4_putCredits
// Conflict-free: in_ports_0_putRoutedFlit,
// 	       in_ports_0_getCredits,
// 	       in_ports_1_putRoutedFlit,
// 	       in_ports_1_getCredits,
// 	       in_ports_2_putRoutedFlit,
// 	       in_ports_2_getCredits,
// 	       in_ports_3_putRoutedFlit,
// 	       in_ports_3_getCredits,
// 	       in_ports_4_putRoutedFlit,
// 	       in_ports_4_getCredits,
// 	       out_ports_0_getFlit,
// 	       out_ports_0_putCredits,
// 	       out_ports_1_getFlit,
// 	       out_ports_1_putCredits,
// 	       out_ports_2_getFlit,
// 	       out_ports_2_putCredits,
// 	       out_ports_3_getFlit,
// 	       out_ports_3_putCredits,
// 	       out_ports_4_getFlit
// Conflicts: out_ports_4_putCredits
//
//
// Ports:
// Name                         I/O  size props
// in_ports_0_getCredits          O     3
// in_ports_1_getCredits          O     3
// in_ports_2_getCredits          O     3
// in_ports_3_getCredits          O     3
// in_ports_4_getCredits          O     3
// out_ports_0_getFlit            O    72
// out_ports_1_getFlit            O    72
// out_ports_2_getFlit            O    72
// out_ports_3_getFlit            O    72
// out_ports_4_getFlit            O    72
// CLK                            I     1 clock
// RST_N                          I     1 reset
// in_ports_0_putRoutedFlit_flit_in  I    75
// in_ports_1_putRoutedFlit_flit_in  I    75
// in_ports_2_putRoutedFlit_flit_in  I    75
// in_ports_3_putRoutedFlit_flit_in  I    75
// in_ports_4_putRoutedFlit_flit_in  I    75
// out_ports_0_putCredits_cr_in   I     3
// out_ports_1_putCredits_cr_in   I     3
// out_ports_2_putCredits_cr_in   I     3
// out_ports_3_putCredits_cr_in   I     3
// out_ports_4_putCredits_cr_in   I     3
// EN_in_ports_0_putRoutedFlit    I     1
// EN_in_ports_1_putRoutedFlit    I     1
// EN_in_ports_2_putRoutedFlit    I     1
// EN_in_ports_3_putRoutedFlit    I     1
// EN_in_ports_4_putRoutedFlit    I     1
// EN_out_ports_0_putCredits      I     1
// EN_out_ports_1_putCredits      I     1
// EN_out_ports_2_putCredits      I     1
// EN_out_ports_3_putCredits      I     1
// EN_out_ports_4_putCredits      I     1
// EN_in_ports_0_getCredits       I     1 unused
// EN_in_ports_1_getCredits       I     1 unused
// EN_in_ports_2_getCredits       I     1 unused
// EN_in_ports_3_getCredits       I     1 unused
// EN_in_ports_4_getCredits       I     1 unused
// EN_out_ports_0_getFlit         I     1
// EN_out_ports_1_getFlit         I     1
// EN_out_ports_2_getFlit         I     1
// EN_out_ports_3_getFlit         I     1
// EN_out_ports_4_getFlit         I     1
//
// No combinational paths from inputs to outputs
//
//

`ifdef BSV_ASSIGNMENT_DELAY
`else
`define BSV_ASSIGNMENT_DELAY
`endif

module mkRouterCore(CLK,
		    RST_N,

		    in_ports_0_putRoutedFlit_flit_in,
		    EN_in_ports_0_putRoutedFlit,

		    EN_in_ports_0_getCredits,
		    in_ports_0_getCredits,

		    in_ports_1_putRoutedFlit_flit_in,
		    EN_in_ports_1_putRoutedFlit,

		    EN_in_ports_1_getCredits,
		    in_ports_1_getCredits,

		    in_ports_2_putRoutedFlit_flit_in,
		    EN_in_ports_2_putRoutedFlit,

		    EN_in_ports_2_getCredits,
		    in_ports_2_getCredits,

		    in_ports_3_putRoutedFlit_flit_in,
		    EN_in_ports_3_putRoutedFlit,

		    EN_in_ports_3_getCredits,
		    in_ports_3_getCredits,

		    in_ports_4_putRoutedFlit_flit_in,
		    EN_in_ports_4_putRoutedFlit,

		    EN_in_ports_4_getCredits,
		    in_ports_4_getCredits,

		    EN_out_ports_0_getFlit,
		    out_ports_0_getFlit,

		    out_ports_0_putCredits_cr_in,
		    EN_out_ports_0_putCredits,

		    EN_out_ports_1_getFlit,
		    out_ports_1_getFlit,

		    out_ports_1_putCredits_cr_in,
		    EN_out_ports_1_putCredits,

		    EN_out_ports_2_getFlit,
		    out_ports_2_getFlit,

		    out_ports_2_putCredits_cr_in,
		    EN_out_ports_2_putCredits,

		    EN_out_ports_3_getFlit,
		    out_ports_3_getFlit,

		    out_ports_3_putCredits_cr_in,
		    EN_out_ports_3_putCredits,

		    EN_out_ports_4_getFlit,
		    out_ports_4_getFlit,

		    out_ports_4_putCredits_cr_in,
		    EN_out_ports_4_putCredits);
  input  CLK;
  input  RST_N;

  // action method in_ports_0_putRoutedFlit
  input  [74 : 0] in_ports_0_putRoutedFlit_flit_in;
  input  EN_in_ports_0_putRoutedFlit;

  // actionvalue method in_ports_0_getCredits
  input  EN_in_ports_0_getCredits;
  output [2 : 0] in_ports_0_getCredits;

  // action method in_ports_1_putRoutedFlit
  input  [74 : 0] in_ports_1_putRoutedFlit_flit_in;
  input  EN_in_ports_1_putRoutedFlit;

  // actionvalue method in_ports_1_getCredits
  input  EN_in_ports_1_getCredits;
  output [2 : 0] in_ports_1_getCredits;

  // action method in_ports_2_putRoutedFlit
  input  [74 : 0] in_ports_2_putRoutedFlit_flit_in;
  input  EN_in_ports_2_putRoutedFlit;

  // actionvalue method in_ports_2_getCredits
  input  EN_in_ports_2_getCredits;
  output [2 : 0] in_ports_2_getCredits;

  // action method in_ports_3_putRoutedFlit
  input  [74 : 0] in_ports_3_putRoutedFlit_flit_in;
  input  EN_in_ports_3_putRoutedFlit;

  // actionvalue method in_ports_3_getCredits
  input  EN_in_ports_3_getCredits;
  output [2 : 0] in_ports_3_getCredits;

  // action method in_ports_4_putRoutedFlit
  input  [74 : 0] in_ports_4_putRoutedFlit_flit_in;
  input  EN_in_ports_4_putRoutedFlit;

  // actionvalue method in_ports_4_getCredits
  input  EN_in_ports_4_getCredits;
  output [2 : 0] in_ports_4_getCredits;

  // actionvalue method out_ports_0_getFlit
  input  EN_out_ports_0_getFlit;
  output [71 : 0] out_ports_0_getFlit;

  // action method out_ports_0_putCredits
  input  [2 : 0] out_ports_0_putCredits_cr_in;
  input  EN_out_ports_0_putCredits;

  // actionvalue method out_ports_1_getFlit
  input  EN_out_ports_1_getFlit;
  output [71 : 0] out_ports_1_getFlit;

  // action method out_ports_1_putCredits
  input  [2 : 0] out_ports_1_putCredits_cr_in;
  input  EN_out_ports_1_putCredits;

  // actionvalue method out_ports_2_getFlit
  input  EN_out_ports_2_getFlit;
  output [71 : 0] out_ports_2_getFlit;

  // action method out_ports_2_putCredits
  input  [2 : 0] out_ports_2_putCredits_cr_in;
  input  EN_out_ports_2_putCredits;

  // actionvalue method out_ports_3_getFlit
  input  EN_out_ports_3_getFlit;
  output [71 : 0] out_ports_3_getFlit;

  // action method out_ports_3_putCredits
  input  [2 : 0] out_ports_3_putCredits_cr_in;
  input  EN_out_ports_3_putCredits;

  // actionvalue method out_ports_4_getFlit
  input  EN_out_ports_4_getFlit;
  output [71 : 0] out_ports_4_getFlit;

  // action method out_ports_4_putCredits
  input  [2 : 0] out_ports_4_putCredits_cr_in;
  input  EN_out_ports_4_putCredits;

  // signals for module outputs
  wire [71 : 0] out_ports_0_getFlit,
		out_ports_1_getFlit,
		out_ports_2_getFlit,
		out_ports_3_getFlit,
		out_ports_4_getFlit;
  wire [2 : 0] in_ports_0_getCredits,
	       in_ports_1_getCredits,
	       in_ports_2_getCredits,
	       in_ports_3_getCredits,
	       in_ports_4_getCredits;

  // inlined wires
  wire [71 : 0] hasFlitsToSend_perIn$wget,
		hasFlitsToSend_perIn_1$wget,
		hasFlitsToSend_perIn_2$wget,
		hasFlitsToSend_perIn_3$wget,
		hasFlitsToSend_perIn_4$wget;
  wire credits_clear_0$whas,
       credits_clear_0_1$whas,
       credits_clear_0_2$whas,
       credits_clear_0_3$whas,
       credits_clear_1$whas,
       credits_clear_1_1$whas,
       credits_clear_1_2$whas,
       credits_clear_1_3$whas,
       credits_clear_2$whas,
       credits_clear_2_1$whas,
       credits_clear_2_2$whas,
       credits_clear_2_3$whas,
       credits_clear_3$whas,
       credits_clear_3_1$whas,
       credits_clear_3_2$whas,
       credits_clear_3_3$whas,
       credits_clear_4$whas,
       credits_clear_4_1$whas,
       credits_clear_4_2$whas,
       credits_clear_4_3$whas,
       credits_set_0$whas,
       credits_set_0_1$whas,
       credits_set_0_2$whas,
       credits_set_0_3$whas,
       credits_set_1$whas,
       credits_set_1_1$whas,
       credits_set_1_2$whas,
       credits_set_1_3$whas,
       credits_set_2$whas,
       credits_set_2_1$whas,
       credits_set_2_2$whas,
       credits_set_2_3$whas,
       credits_set_3$whas,
       credits_set_3_1$whas,
       credits_set_3_2$whas,
       credits_set_3_3$whas,
       credits_set_4$whas,
       credits_set_4_1$whas,
       credits_set_4_2$whas,
       credits_set_4_3$whas;

  // register activeVC_perIn_reg
  reg [2 : 0] activeVC_perIn_reg;
  wire [2 : 0] activeVC_perIn_reg$D_IN;
  wire activeVC_perIn_reg$EN;

  // register activeVC_perIn_reg_1
  reg [2 : 0] activeVC_perIn_reg_1;
  wire [2 : 0] activeVC_perIn_reg_1$D_IN;
  wire activeVC_perIn_reg_1$EN;

  // register activeVC_perIn_reg_2
  reg [2 : 0] activeVC_perIn_reg_2;
  wire [2 : 0] activeVC_perIn_reg_2$D_IN;
  wire activeVC_perIn_reg_2$EN;

  // register activeVC_perIn_reg_3
  reg [2 : 0] activeVC_perIn_reg_3;
  wire [2 : 0] activeVC_perIn_reg_3$D_IN;
  wire activeVC_perIn_reg_3$EN;

  // register activeVC_perIn_reg_4
  reg [2 : 0] activeVC_perIn_reg_4;
  wire [2 : 0] activeVC_perIn_reg_4$D_IN;
  wire activeVC_perIn_reg_4$EN;

  // register credits_0
  reg [3 : 0] credits_0;
  wire [3 : 0] credits_0$D_IN;
  wire credits_0$EN;

  // register credits_0_1
  reg [3 : 0] credits_0_1;
  wire [3 : 0] credits_0_1$D_IN;
  wire credits_0_1$EN;

  // register credits_0_2
  reg [3 : 0] credits_0_2;
  wire [3 : 0] credits_0_2$D_IN;
  wire credits_0_2$EN;

  // register credits_0_3
  reg [3 : 0] credits_0_3;
  wire [3 : 0] credits_0_3$D_IN;
  wire credits_0_3$EN;

  // register credits_1
  reg [3 : 0] credits_1;
  wire [3 : 0] credits_1$D_IN;
  wire credits_1$EN;

  // register credits_1_1
  reg [3 : 0] credits_1_1;
  wire [3 : 0] credits_1_1$D_IN;
  wire credits_1_1$EN;

  // register credits_1_2
  reg [3 : 0] credits_1_2;
  wire [3 : 0] credits_1_2$D_IN;
  wire credits_1_2$EN;

  // register credits_1_3
  reg [3 : 0] credits_1_3;
  wire [3 : 0] credits_1_3$D_IN;
  wire credits_1_3$EN;

  // register credits_2
  reg [3 : 0] credits_2;
  wire [3 : 0] credits_2$D_IN;
  wire credits_2$EN;

  // register credits_2_1
  reg [3 : 0] credits_2_1;
  wire [3 : 0] credits_2_1$D_IN;
  wire credits_2_1$EN;

  // register credits_2_2
  reg [3 : 0] credits_2_2;
  wire [3 : 0] credits_2_2$D_IN;
  wire credits_2_2$EN;

  // register credits_2_3
  reg [3 : 0] credits_2_3;
  wire [3 : 0] credits_2_3$D_IN;
  wire credits_2_3$EN;

  // register credits_3
  reg [3 : 0] credits_3;
  wire [3 : 0] credits_3$D_IN;
  wire credits_3$EN;

  // register credits_3_1
  reg [3 : 0] credits_3_1;
  wire [3 : 0] credits_3_1$D_IN;
  wire credits_3_1$EN;

  // register credits_3_2
  reg [3 : 0] credits_3_2;
  wire [3 : 0] credits_3_2$D_IN;
  wire credits_3_2$EN;

  // register credits_3_3
  reg [3 : 0] credits_3_3;
  wire [3 : 0] credits_3_3$D_IN;
  wire credits_3_3$EN;

  // register credits_4
  reg [3 : 0] credits_4;
  wire [3 : 0] credits_4$D_IN;
  wire credits_4$EN;

  // register credits_4_1
  reg [3 : 0] credits_4_1;
  wire [3 : 0] credits_4_1$D_IN;
  wire credits_4_1$EN;

  // register credits_4_2
  reg [3 : 0] credits_4_2;
  wire [3 : 0] credits_4_2$D_IN;
  wire credits_4_2$EN;

  // register credits_4_3
  reg [3 : 0] credits_4_3;
  wire [3 : 0] credits_4_3$D_IN;
  wire credits_4_3$EN;

  // register inPortVL_0
  reg [2 : 0] inPortVL_0;
  wire [2 : 0] inPortVL_0$D_IN;
  wire inPortVL_0$EN;

  // register inPortVL_0_1
  reg [2 : 0] inPortVL_0_1;
  wire [2 : 0] inPortVL_0_1$D_IN;
  wire inPortVL_0_1$EN;

  // register inPortVL_0_2
  reg [2 : 0] inPortVL_0_2;
  wire [2 : 0] inPortVL_0_2$D_IN;
  wire inPortVL_0_2$EN;

  // register inPortVL_0_3
  reg [2 : 0] inPortVL_0_3;
  wire [2 : 0] inPortVL_0_3$D_IN;
  wire inPortVL_0_3$EN;

  // register inPortVL_1
  reg [2 : 0] inPortVL_1;
  wire [2 : 0] inPortVL_1$D_IN;
  wire inPortVL_1$EN;

  // register inPortVL_1_1
  reg [2 : 0] inPortVL_1_1;
  wire [2 : 0] inPortVL_1_1$D_IN;
  wire inPortVL_1_1$EN;

  // register inPortVL_1_2
  reg [2 : 0] inPortVL_1_2;
  wire [2 : 0] inPortVL_1_2$D_IN;
  wire inPortVL_1_2$EN;

  // register inPortVL_1_3
  reg [2 : 0] inPortVL_1_3;
  wire [2 : 0] inPortVL_1_3$D_IN;
  wire inPortVL_1_3$EN;

  // register inPortVL_2
  reg [2 : 0] inPortVL_2;
  wire [2 : 0] inPortVL_2$D_IN;
  wire inPortVL_2$EN;

  // register inPortVL_2_1
  reg [2 : 0] inPortVL_2_1;
  wire [2 : 0] inPortVL_2_1$D_IN;
  wire inPortVL_2_1$EN;

  // register inPortVL_2_2
  reg [2 : 0] inPortVL_2_2;
  wire [2 : 0] inPortVL_2_2$D_IN;
  wire inPortVL_2_2$EN;

  // register inPortVL_2_3
  reg [2 : 0] inPortVL_2_3;
  wire [2 : 0] inPortVL_2_3$D_IN;
  wire inPortVL_2_3$EN;

  // register inPortVL_3
  reg [2 : 0] inPortVL_3;
  wire [2 : 0] inPortVL_3$D_IN;
  wire inPortVL_3$EN;

  // register inPortVL_3_1
  reg [2 : 0] inPortVL_3_1;
  wire [2 : 0] inPortVL_3_1$D_IN;
  wire inPortVL_3_1$EN;

  // register inPortVL_3_2
  reg [2 : 0] inPortVL_3_2;
  wire [2 : 0] inPortVL_3_2$D_IN;
  wire inPortVL_3_2$EN;

  // register inPortVL_3_3
  reg [2 : 0] inPortVL_3_3;
  wire [2 : 0] inPortVL_3_3$D_IN;
  wire inPortVL_3_3$EN;

  // register inPortVL_4
  reg [2 : 0] inPortVL_4;
  wire [2 : 0] inPortVL_4$D_IN;
  wire inPortVL_4$EN;

  // register inPortVL_4_1
  reg [2 : 0] inPortVL_4_1;
  wire [2 : 0] inPortVL_4_1$D_IN;
  wire inPortVL_4_1$EN;

  // register inPortVL_4_2
  reg [2 : 0] inPortVL_4_2;
  wire [2 : 0] inPortVL_4_2$D_IN;
  wire inPortVL_4_2$EN;

  // register inPortVL_4_3
  reg [2 : 0] inPortVL_4_3;
  wire [2 : 0] inPortVL_4_3$D_IN;
  wire inPortVL_4_3$EN;

  // register lockedVL_0
  reg lockedVL_0;
  wire lockedVL_0$D_IN, lockedVL_0$EN;

  // register lockedVL_0_1
  reg lockedVL_0_1;
  wire lockedVL_0_1$D_IN, lockedVL_0_1$EN;

  // register lockedVL_0_2
  reg lockedVL_0_2;
  wire lockedVL_0_2$D_IN, lockedVL_0_2$EN;

  // register lockedVL_0_3
  reg lockedVL_0_3;
  wire lockedVL_0_3$D_IN, lockedVL_0_3$EN;

  // register lockedVL_1
  reg lockedVL_1;
  wire lockedVL_1$D_IN, lockedVL_1$EN;

  // register lockedVL_1_1
  reg lockedVL_1_1;
  wire lockedVL_1_1$D_IN, lockedVL_1_1$EN;

  // register lockedVL_1_2
  reg lockedVL_1_2;
  wire lockedVL_1_2$D_IN, lockedVL_1_2$EN;

  // register lockedVL_1_3
  reg lockedVL_1_3;
  wire lockedVL_1_3$D_IN, lockedVL_1_3$EN;

  // register lockedVL_2
  reg lockedVL_2;
  wire lockedVL_2$D_IN, lockedVL_2$EN;

  // register lockedVL_2_1
  reg lockedVL_2_1;
  wire lockedVL_2_1$D_IN, lockedVL_2_1$EN;

  // register lockedVL_2_2
  reg lockedVL_2_2;
  wire lockedVL_2_2$D_IN, lockedVL_2_2$EN;

  // register lockedVL_2_3
  reg lockedVL_2_3;
  wire lockedVL_2_3$D_IN, lockedVL_2_3$EN;

  // register lockedVL_3
  reg lockedVL_3;
  wire lockedVL_3$D_IN, lockedVL_3$EN;

  // register lockedVL_3_1
  reg lockedVL_3_1;
  wire lockedVL_3_1$D_IN, lockedVL_3_1$EN;

  // register lockedVL_3_2
  reg lockedVL_3_2;
  wire lockedVL_3_2$D_IN, lockedVL_3_2$EN;

  // register lockedVL_3_3
  reg lockedVL_3_3;
  wire lockedVL_3_3$D_IN, lockedVL_3_3$EN;

  // register lockedVL_4
  reg lockedVL_4;
  wire lockedVL_4$D_IN, lockedVL_4$EN;

  // register lockedVL_4_1
  reg lockedVL_4_1;
  wire lockedVL_4_1$D_IN, lockedVL_4_1$EN;

  // register lockedVL_4_2
  reg lockedVL_4_2;
  wire lockedVL_4_2$D_IN, lockedVL_4_2$EN;

  // register lockedVL_4_3
  reg lockedVL_4_3;
  wire lockedVL_4_3$D_IN, lockedVL_4_3$EN;

  // register selectedIO_reg_0
  reg selectedIO_reg_0;
  wire selectedIO_reg_0$D_IN, selectedIO_reg_0$EN;

  // register selectedIO_reg_0_1
  reg selectedIO_reg_0_1;
  wire selectedIO_reg_0_1$D_IN, selectedIO_reg_0_1$EN;

  // register selectedIO_reg_0_2
  reg selectedIO_reg_0_2;
  wire selectedIO_reg_0_2$D_IN, selectedIO_reg_0_2$EN;

  // register selectedIO_reg_0_3
  reg selectedIO_reg_0_3;
  wire selectedIO_reg_0_3$D_IN, selectedIO_reg_0_3$EN;

  // register selectedIO_reg_0_4
  reg selectedIO_reg_0_4;
  wire selectedIO_reg_0_4$D_IN, selectedIO_reg_0_4$EN;

  // register selectedIO_reg_1
  reg selectedIO_reg_1;
  wire selectedIO_reg_1$D_IN, selectedIO_reg_1$EN;

  // register selectedIO_reg_1_1
  reg selectedIO_reg_1_1;
  wire selectedIO_reg_1_1$D_IN, selectedIO_reg_1_1$EN;

  // register selectedIO_reg_1_2
  reg selectedIO_reg_1_2;
  wire selectedIO_reg_1_2$D_IN, selectedIO_reg_1_2$EN;

  // register selectedIO_reg_1_3
  reg selectedIO_reg_1_3;
  wire selectedIO_reg_1_3$D_IN, selectedIO_reg_1_3$EN;

  // register selectedIO_reg_1_4
  reg selectedIO_reg_1_4;
  wire selectedIO_reg_1_4$D_IN, selectedIO_reg_1_4$EN;

  // register selectedIO_reg_2
  reg selectedIO_reg_2;
  wire selectedIO_reg_2$D_IN, selectedIO_reg_2$EN;

  // register selectedIO_reg_2_1
  reg selectedIO_reg_2_1;
  wire selectedIO_reg_2_1$D_IN, selectedIO_reg_2_1$EN;

  // register selectedIO_reg_2_2
  reg selectedIO_reg_2_2;
  wire selectedIO_reg_2_2$D_IN, selectedIO_reg_2_2$EN;

  // register selectedIO_reg_2_3
  reg selectedIO_reg_2_3;
  wire selectedIO_reg_2_3$D_IN, selectedIO_reg_2_3$EN;

  // register selectedIO_reg_2_4
  reg selectedIO_reg_2_4;
  wire selectedIO_reg_2_4$D_IN, selectedIO_reg_2_4$EN;

  // register selectedIO_reg_3
  reg selectedIO_reg_3;
  wire selectedIO_reg_3$D_IN, selectedIO_reg_3$EN;

  // register selectedIO_reg_3_1
  reg selectedIO_reg_3_1;
  wire selectedIO_reg_3_1$D_IN, selectedIO_reg_3_1$EN;

  // register selectedIO_reg_3_2
  reg selectedIO_reg_3_2;
  wire selectedIO_reg_3_2$D_IN, selectedIO_reg_3_2$EN;

  // register selectedIO_reg_3_3
  reg selectedIO_reg_3_3;
  wire selectedIO_reg_3_3$D_IN, selectedIO_reg_3_3$EN;

  // register selectedIO_reg_3_4
  reg selectedIO_reg_3_4;
  wire selectedIO_reg_3_4$D_IN, selectedIO_reg_3_4$EN;

  // register selectedIO_reg_4
  reg selectedIO_reg_4;
  wire selectedIO_reg_4$D_IN, selectedIO_reg_4$EN;

  // register selectedIO_reg_4_1
  reg selectedIO_reg_4_1;
  wire selectedIO_reg_4_1$D_IN, selectedIO_reg_4_1$EN;

  // register selectedIO_reg_4_2
  reg selectedIO_reg_4_2;
  wire selectedIO_reg_4_2$D_IN, selectedIO_reg_4_2$EN;

  // register selectedIO_reg_4_3
  reg selectedIO_reg_4_3;
  wire selectedIO_reg_4_3$D_IN, selectedIO_reg_4_3$EN;

  // register selectedIO_reg_4_4
  reg selectedIO_reg_4_4;
  wire selectedIO_reg_4_4$D_IN, selectedIO_reg_4_4$EN;

  // ports of submodule flitBuffers
  wire [70 : 0] flitBuffers$deq, flitBuffers$enq_data_in;
  wire [3 : 0] flitBuffers$notEmpty;
  wire [1 : 0] flitBuffers$deq_fifo_out, flitBuffers$enq_fifo_in;
  wire flitBuffers$EN_deq, flitBuffers$EN_enq;

  // ports of submodule flitBuffers_1
  wire [70 : 0] flitBuffers_1$deq, flitBuffers_1$enq_data_in;
  wire [3 : 0] flitBuffers_1$notEmpty;
  wire [1 : 0] flitBuffers_1$deq_fifo_out, flitBuffers_1$enq_fifo_in;
  wire flitBuffers_1$EN_deq, flitBuffers_1$EN_enq;

  // ports of submodule flitBuffers_2
  wire [70 : 0] flitBuffers_2$deq, flitBuffers_2$enq_data_in;
  wire [3 : 0] flitBuffers_2$notEmpty;
  wire [1 : 0] flitBuffers_2$deq_fifo_out, flitBuffers_2$enq_fifo_in;
  wire flitBuffers_2$EN_deq, flitBuffers_2$EN_enq;

  // ports of submodule flitBuffers_3
  wire [70 : 0] flitBuffers_3$deq, flitBuffers_3$enq_data_in;
  wire [3 : 0] flitBuffers_3$notEmpty;
  wire [1 : 0] flitBuffers_3$deq_fifo_out, flitBuffers_3$enq_fifo_in;
  wire flitBuffers_3$EN_deq, flitBuffers_3$EN_enq;

  // ports of submodule flitBuffers_4
  wire [70 : 0] flitBuffers_4$deq, flitBuffers_4$enq_data_in;
  wire [3 : 0] flitBuffers_4$notEmpty;
  wire [1 : 0] flitBuffers_4$deq_fifo_out, flitBuffers_4$enq_fifo_in;
  wire flitBuffers_4$EN_deq, flitBuffers_4$EN_enq;

  // ports of submodule outPortFIFOs_0
  wire [2 : 0] outPortFIFOs_0$enq_sendData, outPortFIFOs_0$first;
  wire outPortFIFOs_0$EN_clear, outPortFIFOs_0$EN_deq, outPortFIFOs_0$EN_enq;

  // ports of submodule outPortFIFOs_0_1
  wire [2 : 0] outPortFIFOs_0_1$enq_sendData, outPortFIFOs_0_1$first;
  wire outPortFIFOs_0_1$EN_clear,
       outPortFIFOs_0_1$EN_deq,
       outPortFIFOs_0_1$EN_enq;

  // ports of submodule outPortFIFOs_0_2
  wire [2 : 0] outPortFIFOs_0_2$enq_sendData, outPortFIFOs_0_2$first;
  wire outPortFIFOs_0_2$EN_clear,
       outPortFIFOs_0_2$EN_deq,
       outPortFIFOs_0_2$EN_enq;

  // ports of submodule outPortFIFOs_0_3
  wire [2 : 0] outPortFIFOs_0_3$enq_sendData, outPortFIFOs_0_3$first;
  wire outPortFIFOs_0_3$EN_clear,
       outPortFIFOs_0_3$EN_deq,
       outPortFIFOs_0_3$EN_enq;

  // ports of submodule outPortFIFOs_1
  wire [2 : 0] outPortFIFOs_1$enq_sendData, outPortFIFOs_1$first;
  wire outPortFIFOs_1$EN_clear, outPortFIFOs_1$EN_deq, outPortFIFOs_1$EN_enq;

  // ports of submodule outPortFIFOs_1_1
  wire [2 : 0] outPortFIFOs_1_1$enq_sendData, outPortFIFOs_1_1$first;
  wire outPortFIFOs_1_1$EN_clear,
       outPortFIFOs_1_1$EN_deq,
       outPortFIFOs_1_1$EN_enq;

  // ports of submodule outPortFIFOs_1_2
  wire [2 : 0] outPortFIFOs_1_2$enq_sendData, outPortFIFOs_1_2$first;
  wire outPortFIFOs_1_2$EN_clear,
       outPortFIFOs_1_2$EN_deq,
       outPortFIFOs_1_2$EN_enq;

  // ports of submodule outPortFIFOs_1_3
  wire [2 : 0] outPortFIFOs_1_3$enq_sendData, outPortFIFOs_1_3$first;
  wire outPortFIFOs_1_3$EN_clear,
       outPortFIFOs_1_3$EN_deq,
       outPortFIFOs_1_3$EN_enq;

  // ports of submodule outPortFIFOs_2
  wire [2 : 0] outPortFIFOs_2$enq_sendData, outPortFIFOs_2$first;
  wire outPortFIFOs_2$EN_clear, outPortFIFOs_2$EN_deq, outPortFIFOs_2$EN_enq;

  // ports of submodule outPortFIFOs_2_1
  wire [2 : 0] outPortFIFOs_2_1$enq_sendData, outPortFIFOs_2_1$first;
  wire outPortFIFOs_2_1$EN_clear,
       outPortFIFOs_2_1$EN_deq,
       outPortFIFOs_2_1$EN_enq;

  // ports of submodule outPortFIFOs_2_2
  wire [2 : 0] outPortFIFOs_2_2$enq_sendData, outPortFIFOs_2_2$first;
  wire outPortFIFOs_2_2$EN_clear,
       outPortFIFOs_2_2$EN_deq,
       outPortFIFOs_2_2$EN_enq;

  // ports of submodule outPortFIFOs_2_3
  wire [2 : 0] outPortFIFOs_2_3$enq_sendData, outPortFIFOs_2_3$first;
  wire outPortFIFOs_2_3$EN_clear,
       outPortFIFOs_2_3$EN_deq,
       outPortFIFOs_2_3$EN_enq;

  // ports of submodule outPortFIFOs_3
  wire [2 : 0] outPortFIFOs_3$enq_sendData, outPortFIFOs_3$first;
  wire outPortFIFOs_3$EN_clear, outPortFIFOs_3$EN_deq, outPortFIFOs_3$EN_enq;

  // ports of submodule outPortFIFOs_3_1
  wire [2 : 0] outPortFIFOs_3_1$enq_sendData, outPortFIFOs_3_1$first;
  wire outPortFIFOs_3_1$EN_clear,
       outPortFIFOs_3_1$EN_deq,
       outPortFIFOs_3_1$EN_enq;

  // ports of submodule outPortFIFOs_3_2
  wire [2 : 0] outPortFIFOs_3_2$enq_sendData, outPortFIFOs_3_2$first;
  wire outPortFIFOs_3_2$EN_clear,
       outPortFIFOs_3_2$EN_deq,
       outPortFIFOs_3_2$EN_enq;

  // ports of submodule outPortFIFOs_3_3
  wire [2 : 0] outPortFIFOs_3_3$enq_sendData, outPortFIFOs_3_3$first;
  wire outPortFIFOs_3_3$EN_clear,
       outPortFIFOs_3_3$EN_deq,
       outPortFIFOs_3_3$EN_enq;

  // ports of submodule outPortFIFOs_4
  wire [2 : 0] outPortFIFOs_4$enq_sendData, outPortFIFOs_4$first;
  wire outPortFIFOs_4$EN_clear, outPortFIFOs_4$EN_deq, outPortFIFOs_4$EN_enq;

  // ports of submodule outPortFIFOs_4_1
  wire [2 : 0] outPortFIFOs_4_1$enq_sendData, outPortFIFOs_4_1$first;
  wire outPortFIFOs_4_1$EN_clear,
       outPortFIFOs_4_1$EN_deq,
       outPortFIFOs_4_1$EN_enq;

  // ports of submodule outPortFIFOs_4_2
  wire [2 : 0] outPortFIFOs_4_2$enq_sendData, outPortFIFOs_4_2$first;
  wire outPortFIFOs_4_2$EN_clear,
       outPortFIFOs_4_2$EN_deq,
       outPortFIFOs_4_2$EN_enq;

  // ports of submodule outPortFIFOs_4_3
  wire [2 : 0] outPortFIFOs_4_3$enq_sendData, outPortFIFOs_4_3$first;
  wire outPortFIFOs_4_3$EN_clear,
       outPortFIFOs_4_3$EN_deq,
       outPortFIFOs_4_3$EN_enq;

  // ports of submodule routerAlloc
  wire [24 : 0] routerAlloc$allocate, routerAlloc$allocate_alloc_input;
  wire routerAlloc$EN_allocate, routerAlloc$EN_next;

  // remaining internal signals
  reg [70 : 0] IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2412,
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2413,
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2414,
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2415;
  reg [3 : 0] CASE_outPortFIFOs_0_1first_credits_4_1_0_cred_ETC__q8,
	      CASE_outPortFIFOs_0_2first_credits_4_2_0_cred_ETC__q6,
	      CASE_outPortFIFOs_0_3first_credits_4_3_0_cred_ETC__q5,
	      CASE_outPortFIFOs_0first_credits_4_0_credits__ETC__q7,
	      CASE_outPortFIFOs_1_1first_credits_4_1_0_cred_ETC__q9,
	      CASE_outPortFIFOs_1_2first_credits_4_2_0_cred_ETC__q10,
	      CASE_outPortFIFOs_1_3first_credits_4_3_0_cred_ETC__q4,
	      CASE_outPortFIFOs_1first_credits_4_0_credits__ETC__q11,
	      CASE_outPortFIFOs_2_1first_credits_4_1_0_cred_ETC__q14,
	      CASE_outPortFIFOs_2_2first_credits_4_2_0_cred_ETC__q12,
	      CASE_outPortFIFOs_2_3first_credits_4_3_0_cred_ETC__q3,
	      CASE_outPortFIFOs_2first_credits_4_0_credits__ETC__q13,
	      CASE_outPortFIFOs_3_1first_credits_4_1_0_cred_ETC__q17,
	      CASE_outPortFIFOs_3_2first_credits_4_2_0_cred_ETC__q15,
	      CASE_outPortFIFOs_3_3first_credits_4_3_0_cred_ETC__q2,
	      CASE_outPortFIFOs_3first_credits_4_0_credits__ETC__q16,
	      CASE_outPortFIFOs_4_1first_credits_4_1_0_cred_ETC__q20,
	      CASE_outPortFIFOs_4_2first_credits_4_2_0_cred_ETC__q18,
	      CASE_outPortFIFOs_4_3first_credits_4_3_0_cred_ETC__q1,
	      CASE_outPortFIFOs_4first_credits_4_0_credits__ETC__q19;
  reg [1 : 0] IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1912,
	      IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1913,
	      IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1914,
	      IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1915;
  reg IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1610,
      IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1695,
      IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1780,
      IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1865,
      IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2448,
      IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2450,
      IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2452,
      IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2454;
  wire [70 : 0] IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1530,
		IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d2411;
  wire [14 : 0] IF_flitBuffers_4_notEmpty_BIT_0_THEN_IF_IF_out_ETC___d255;
  wire [4 : 0] IF_IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN__ETC___d406,
	       IF_IF_outPortFIFOs_0_2_first__62_EQ_0_63_THEN__ETC___d402,
	       IF_IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_cr_ETC___d410,
	       IF_IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN__ETC___d328,
	       IF_IF_outPortFIFOs_1_2_first__84_EQ_0_85_THEN__ETC___d324,
	       IF_IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_cr_ETC___d332,
	       IF_IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN__ETC___d249,
	       IF_IF_outPortFIFOs_2_2_first__05_EQ_0_06_THEN__ETC___d245,
	       IF_IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_cr_ETC___d253,
	       IF_IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN__ETC___d171,
	       IF_IF_outPortFIFOs_3_2_first__27_EQ_0_28_THEN__ETC___d167,
	       IF_IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_cr_ETC___d175,
	       IF_IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_cr_ETC___d93,
	       IF_IF_outPortFIFOs_4_2_first__9_EQ_0_0_THEN_cr_ETC___d89,
	       IF_IF_outPortFIFOs_4_first_EQ_0_THEN_credits_0_ETC___d97,
	       IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_IF_ETC___d2364,
	       IF_flitBuffers_1_notEmpty__56_BIT_2_83_THEN_IF_ETC___d2363,
	       IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_IF_ETC___d2361,
	       IF_flitBuffers_2_notEmpty__77_BIT_2_04_THEN_IF_ETC___d2360,
	       IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_IF__ETC___d2358,
	       IF_flitBuffers_3_notEmpty__9_BIT_2_26_THEN_IF__ETC___d2357,
	       IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_IF_IF_o_ETC___d2355,
	       IF_flitBuffers_4_notEmpty_BIT_2_8_THEN_IF_IF_o_ETC___d2354,
	       IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_IF_I_ETC___d2367,
	       IF_flitBuffers_notEmpty__34_BIT_2_61_THEN_IF_I_ETC___d2366;
  wire [3 : 0] credits_0_1_read__3_PLUS_1___d1939,
	       credits_0_2_read__1_PLUS_1___d1940,
	       credits_0_3_read__9_PLUS_1___d1941,
	       credits_0_read_PLUS_1___d1938,
	       credits_1_1_read__5_PLUS_1___d1943,
	       credits_1_2_read__3_PLUS_1___d1944,
	       credits_1_3_read__1_PLUS_1___d1945,
	       credits_1_read_PLUS_1___d1942,
	       credits_2_1_read__7_PLUS_1___d1947,
	       credits_2_2_read__5_PLUS_1___d1948,
	       credits_2_3_read__3_PLUS_1___d1949,
	       credits_2_read_PLUS_1___d1946,
	       credits_3_1_read__9_PLUS_1___d1951,
	       credits_3_2_read__7_PLUS_1___d1952,
	       credits_3_3_read__5_PLUS_1___d1953,
	       credits_3_read__1_PLUS_1___d1950,
	       credits_4_1_read__1_PLUS_1___d1955,
	       credits_4_2_read__9_PLUS_1___d1956,
	       credits_4_3_read__7_PLUS_1___d1957,
	       credits_4_read__3_PLUS_1___d1954,
	       outport_encoder___d2295,
	       outport_encoder___d2296,
	       outport_encoder___d2297,
	       outport_encoder___d2298,
	       outport_encoder___d2299,
	       x__h56835,
	       x__h57565,
	       x__h58295,
	       x__h59025,
	       x__h60072,
	       x__h60802,
	       x__h61532,
	       x__h62262,
	       x__h63309,
	       x__h64039,
	       x__h64769,
	       x__h65499,
	       x__h66546,
	       x__h67276,
	       x__h68006,
	       x__h68736,
	       x__h69783,
	       x__h70513,
	       x__h71243,
	       x__h71973;
  wire [2 : 0] IF_outport_encoder_24_BIT_3_25_THEN_IF_outport_ETC___d1934,
	       IF_outport_encoder_24_BIT_3_25_THEN_IF_outport_ETC___d1935,
	       IF_outport_encoder_24_BIT_3_25_THEN_IF_outport_ETC___d1936,
	       IF_outport_encoder_24_BIT_3_25_THEN_IF_outport_ETC___d1937,
	       IF_outport_encoder_60_BIT_3_61_THEN_IF_outport_ETC___d1926,
	       IF_outport_encoder_60_BIT_3_61_THEN_IF_outport_ETC___d1927,
	       IF_outport_encoder_60_BIT_3_61_THEN_IF_outport_ETC___d1928,
	       IF_outport_encoder_60_BIT_3_61_THEN_IF_outport_ETC___d1929,
	       IF_outport_encoder_92_BIT_3_93_THEN_IF_outport_ETC___d1930,
	       IF_outport_encoder_92_BIT_3_93_THEN_IF_outport_ETC___d1931,
	       IF_outport_encoder_92_BIT_3_93_THEN_IF_outport_ETC___d1932,
	       IF_outport_encoder_92_BIT_3_93_THEN_IF_outport_ETC___d1933,
	       active_in__h82277,
	       active_in__h84092,
	       active_in__h85907,
	       active_in__h87722;
  wire [1 : 0] IF_IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN__ETC___d460,
	       IF_IF_outPortFIFOs_0_2_first__62_EQ_0_63_THEN__ETC___d458,
	       IF_IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_cr_ETC___d462,
	       IF_IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN__ETC___d528,
	       IF_IF_outPortFIFOs_1_2_first__84_EQ_0_85_THEN__ETC___d526,
	       IF_IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_cr_ETC___d530,
	       IF_IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN__ETC___d596,
	       IF_IF_outPortFIFOs_2_2_first__05_EQ_0_06_THEN__ETC___d594,
	       IF_IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_cr_ETC___d598,
	       IF_IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN__ETC___d664,
	       IF_IF_outPortFIFOs_3_2_first__27_EQ_0_28_THEN__ETC___d662,
	       IF_IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_cr_ETC___d666,
	       IF_IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_cr_ETC___d732,
	       IF_IF_outPortFIFOs_4_2_first__9_EQ_0_0_THEN_cr_ETC___d730,
	       IF_IF_outPortFIFOs_4_first_EQ_0_THEN_credits_0_ETC___d734,
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1495,
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1911,
	       IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_IF_ETC___d1922,
	       IF_flitBuffers_1_notEmpty__56_BIT_2_83_THEN_IF_ETC___d1923,
	       IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_IF_ETC___d1920,
	       IF_flitBuffers_2_notEmpty__77_BIT_2_04_THEN_IF_ETC___d1921,
	       IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_IF__ETC___d1918,
	       IF_flitBuffers_3_notEmpty__9_BIT_2_26_THEN_IF__ETC___d1919,
	       IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_IF_IF_o_ETC___d1916,
	       IF_flitBuffers_4_notEmpty_BIT_2_8_THEN_IF_IF_o_ETC___d1917,
	       IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_IF_I_ETC___d1924,
	       IF_flitBuffers_notEmpty__34_BIT_2_61_THEN_IF_I_ETC___d1925,
	       fifo_out__h51388,
	       fifo_out__h52918,
	       fifo_out__h53619,
	       fifo_out__h54320,
	       fifo_out__h55021;
  wire IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1482,
       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1483,
       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1484,
       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1512,
       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1513,
       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1514,
       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1515,
       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d2446,
       IF_flitBuffers_1_notEmpty__56_BIT_0_57_THEN_NO_ETC___d558,
       IF_flitBuffers_1_notEmpty__56_BIT_0_57_THEN_NO_ETC___d572,
       IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_IF_ETC___d2373,
       IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_IF_ETC___d2375,
       IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_NO_ETC___d2393,
       IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_NO_ETC___d2417,
       IF_flitBuffers_1_notEmpty__56_BIT_2_83_THEN_NO_ETC___d2392,
       IF_flitBuffers_2_notEmpty__77_BIT_0_78_THEN_NO_ETC___d626,
       IF_flitBuffers_2_notEmpty__77_BIT_0_78_THEN_NO_ETC___d640,
       IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_IF_ETC___d2377,
       IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_IF_ETC___d2379,
       IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_NO_ETC___d2396,
       IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_NO_ETC___d2418,
       IF_flitBuffers_2_notEmpty__77_BIT_2_04_THEN_NO_ETC___d2395,
       IF_flitBuffers_3_notEmpty__9_BIT_0_00_THEN_NOT_ETC___d694,
       IF_flitBuffers_3_notEmpty__9_BIT_0_00_THEN_NOT_ETC___d708,
       IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_IF__ETC___d2381,
       IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_IF__ETC___d2383,
       IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_NOT_ETC___d2399,
       IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_NOT_ETC___d2419,
       IF_flitBuffers_3_notEmpty__9_BIT_2_26_THEN_NOT_ETC___d2398,
       IF_flitBuffers_4_notEmpty_BIT_0_THEN_NOT_flitB_ETC___d762,
       IF_flitBuffers_4_notEmpty_BIT_0_THEN_NOT_flitB_ETC___d776,
       IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_IF_outP_ETC___d2385,
       IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_IF_outP_ETC___d2387,
       IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_NOT_IF__ETC___d2402,
       IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_NOT_IF__ETC___d2420,
       IF_flitBuffers_4_notEmpty_BIT_2_8_THEN_NOT_IF__ETC___d2401,
       IF_flitBuffers_notEmpty__34_BIT_0_35_THEN_NOT__ETC___d490,
       IF_flitBuffers_notEmpty__34_BIT_0_35_THEN_NOT__ETC___d504,
       IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_IF_o_ETC___d2369,
       IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_IF_o_ETC___d2371,
       IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_NOT__ETC___d2390,
       IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_NOT__ETC___d2416,
       IF_flitBuffers_notEmpty__34_BIT_2_61_THEN_NOT__ETC___d2389,
       IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN_cre_ETC___d485,
       IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN_cre_ETC___d497,
       IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_credi_ETC___d477,
       IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_credi_ETC___d487,
       IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_credi_ETC___d499,
       IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN_cre_ETC___d553,
       IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN_cre_ETC___d565,
       IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_credi_ETC___d545,
       IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_credi_ETC___d555,
       IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_credi_ETC___d567,
       IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN_cre_ETC___d621,
       IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN_cre_ETC___d633,
       IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_credi_ETC___d613,
       IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_credi_ETC___d623,
       IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_credi_ETC___d635,
       IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN_cre_ETC___d689,
       IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN_cre_ETC___d701,
       IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_credi_ETC___d681,
       IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_credi_ETC___d691,
       IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_credi_ETC___d703,
       IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_credi_ETC___d757,
       IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_credi_ETC___d769,
       IF_outPortFIFOs_4_first_EQ_0_THEN_credits_0_re_ETC___d749,
       IF_outPortFIFOs_4_first_EQ_0_THEN_credits_0_re_ETC___d759,
       IF_outPortFIFOs_4_first_EQ_0_THEN_credits_0_re_ETC___d771,
       IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2062,
       IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2072,
       IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2080,
       IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2088,
       IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2096,
       IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2329,
       IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2334,
       IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2339,
       IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2344,
       IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2349,
       IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2179,
       IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2268,
       IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2269,
       IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2270,
       IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2178,
       IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2188,
       IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2190,
       IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2192,
       IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2194,
       IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2283,
       IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2284,
       IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2285,
       IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2286,
       IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2287,
       IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2314,
       IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2318,
       IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2320,
       IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2331,
       IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2336,
       IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2341,
       IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2346,
       IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2351,
       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2059,
       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2070,
       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2078,
       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2086,
       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2094,
       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2312,
       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2317,
       IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2330,
       IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2335,
       IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2340,
       IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2345,
       IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2350,
       NOT_IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN_ETC___d1254,
       NOT_IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN_ETC___d495,
       NOT_IF_outPortFIFOs_0_2_first__62_EQ_0_63_THEN_ETC___d1252,
       NOT_IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_c_ETC___d1256,
       NOT_IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN_ETC___d1285,
       NOT_IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN_ETC___d563,
       NOT_IF_outPortFIFOs_1_2_first__84_EQ_0_85_THEN_ETC___d1283,
       NOT_IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_c_ETC___d1287,
       NOT_IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN_ETC___d1316,
       NOT_IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN_ETC___d631,
       NOT_IF_outPortFIFOs_2_2_first__05_EQ_0_06_THEN_ETC___d1314,
       NOT_IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_c_ETC___d1318,
       NOT_IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN_ETC___d1347,
       NOT_IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN_ETC___d699,
       NOT_IF_outPortFIFOs_3_2_first__27_EQ_0_28_THEN_ETC___d1345,
       NOT_IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_c_ETC___d1349,
       NOT_IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_c_ETC___d1378,
       NOT_IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_c_ETC___d767,
       NOT_IF_outPortFIFOs_4_2_first__9_EQ_0_0_THEN_c_ETC___d1376,
       NOT_IF_outPortFIFOs_4_first_EQ_0_THEN_credits__ETC___d1380,
       NOT_flitBuffers_1_notEmpty__56_BIT_0_57_41_OR__ETC___d542,
       NOT_flitBuffers_1_notEmpty__56_BIT_0_57_41_OR__ETC___d547,
       NOT_flitBuffers_1_notEmpty__56_BIT_1_70_49_OR__ETC___d550,
       NOT_flitBuffers_1_notEmpty__56_BIT_2_83_61_OR__ETC___d2374,
       NOT_flitBuffers_2_notEmpty__77_BIT_0_78_09_OR__ETC___d610,
       NOT_flitBuffers_2_notEmpty__77_BIT_0_78_09_OR__ETC___d615,
       NOT_flitBuffers_2_notEmpty__77_BIT_1_91_17_OR__ETC___d618,
       NOT_flitBuffers_2_notEmpty__77_BIT_2_04_29_OR__ETC___d2378,
       NOT_flitBuffers_3_notEmpty__9_BIT_0_00_77_OR_I_ETC___d678,
       NOT_flitBuffers_3_notEmpty__9_BIT_0_00_77_OR_I_ETC___d683,
       NOT_flitBuffers_3_notEmpty__9_BIT_1_13_85_OR_I_ETC___d686,
       NOT_flitBuffers_3_notEmpty__9_BIT_2_26_97_OR_I_ETC___d2382,
       NOT_flitBuffers_4_notEmpty_BIT_0_45_OR_IF_outP_ETC___d746,
       NOT_flitBuffers_4_notEmpty_BIT_0_45_OR_IF_outP_ETC___d751,
       NOT_flitBuffers_4_notEmpty_BIT_1_0_53_OR_IF_ou_ETC___d754,
       NOT_flitBuffers_4_notEmpty_BIT_2_8_65_OR_IF_ou_ETC___d2386,
       NOT_flitBuffers_notEmpty__34_BIT_0_35_73_OR_IF_ETC___d474,
       NOT_flitBuffers_notEmpty__34_BIT_0_35_73_OR_IF_ETC___d479,
       NOT_flitBuffers_notEmpty__34_BIT_1_48_81_OR_IF_ETC___d482,
       NOT_flitBuffers_notEmpty__34_BIT_2_61_93_OR_IF_ETC___d2370,
       flitBuffers_1_notEmpty__56_BIT_0_57_AND_NOT_IF_ETC___d539,
       flitBuffers_1_notEmpty__56_BIT_1_70_AND_NOT_IF_ETC___d544,
       flitBuffers_1_notEmpty__56_BIT_2_83_AND_NOT_IF_ETC___d2372,
       flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d2391,
       flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d311,
       flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d313,
       flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d315,
       flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d318,
       flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d320,
       flitBuffers_2_notEmpty__77_BIT_0_78_AND_NOT_IF_ETC___d607,
       flitBuffers_2_notEmpty__77_BIT_1_91_AND_NOT_IF_ETC___d612,
       flitBuffers_2_notEmpty__77_BIT_2_04_AND_NOT_IF_ETC___d2376,
       flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d232,
       flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d234,
       flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d236,
       flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d239,
       flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d2394,
       flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d241,
       flitBuffers_3_notEmpty__9_BIT_0_00_AND_NOT_IF__ETC___d675,
       flitBuffers_3_notEmpty__9_BIT_1_13_AND_NOT_IF__ETC___d680,
       flitBuffers_3_notEmpty__9_BIT_2_26_AND_NOT_IF__ETC___d2380,
       flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d154,
       flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d156,
       flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d158,
       flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d161,
       flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d163,
       flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d2397,
       flitBuffers_4_notEmpty_BIT_0_AND_NOT_IF_outPor_ETC___d743,
       flitBuffers_4_notEmpty_BIT_1_0_AND_NOT_IF_outP_ETC___d748,
       flitBuffers_4_notEmpty_BIT_2_8_AND_NOT_IF_outP_ETC___d2384,
       flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d2400,
       flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d76,
       flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d78,
       flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d80,
       flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d83,
       flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d85,
       flitBuffers_notEmpty__34_BIT_0_35_AND_NOT_IF_o_ETC___d471,
       flitBuffers_notEmpty__34_BIT_1_48_AND_NOT_IF_o_ETC___d476,
       flitBuffers_notEmpty__34_BIT_2_61_AND_NOT_IF_o_ETC___d2368,
       flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d2388,
       flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d389,
       flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d391,
       flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d393,
       flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d396,
       flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d398,
       outport_encoder_24_BIT_3_25_AND_IF_flitBuffers_ETC___d1289,
       outport_encoder_28_BIT_3_29_AND_IF_flitBuffers_ETC___d1382,
       outport_encoder_56_BIT_3_57_AND_IF_flitBuffers_ETC___d1258,
       outport_encoder_60_BIT_3_61_AND_IF_flitBuffers_ETC___d1351,
       outport_encoder_92_BIT_3_93_AND_IF_flitBuffers_ETC___d1320;

  // actionvalue method in_ports_0_getCredits
  assign in_ports_0_getCredits =
	     { outport_encoder_56_BIT_3_57_AND_IF_flitBuffers_ETC___d1258,
	       fifo_out__h51388 } ;

  // actionvalue method in_ports_1_getCredits
  assign in_ports_1_getCredits =
	     { outport_encoder_24_BIT_3_25_AND_IF_flitBuffers_ETC___d1289,
	       fifo_out__h52918 } ;

  // actionvalue method in_ports_2_getCredits
  assign in_ports_2_getCredits =
	     { outport_encoder_92_BIT_3_93_AND_IF_flitBuffers_ETC___d1320,
	       fifo_out__h53619 } ;

  // actionvalue method in_ports_3_getCredits
  assign in_ports_3_getCredits =
	     { outport_encoder_60_BIT_3_61_AND_IF_flitBuffers_ETC___d1351,
	       fifo_out__h54320 } ;

  // actionvalue method in_ports_4_getCredits
  assign in_ports_4_getCredits =
	     { outport_encoder_28_BIT_3_29_AND_IF_flitBuffers_ETC___d1382,
	       fifo_out__h55021 } ;

  // actionvalue method out_ports_0_getFlit
  assign out_ports_0_getFlit =
	     { IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2178 &&
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1515,
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d2411 } ;

  // actionvalue method out_ports_1_getFlit
  assign out_ports_1_getFlit =
	     { IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2188 &&
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1610,
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2412 } ;

  // actionvalue method out_ports_2_getFlit
  assign out_ports_2_getFlit =
	     { IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2190 &&
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1695,
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2413 } ;

  // actionvalue method out_ports_3_getFlit
  assign out_ports_3_getFlit =
	     { IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2192 &&
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1780,
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2414 } ;

  // actionvalue method out_ports_4_getFlit
  assign out_ports_4_getFlit =
	     { IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2194 &&
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1865,
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2415 } ;

  // submodule flitBuffers
  mkInputVCQueues flitBuffers(.CLK(CLK),
			      .RST_N(RST_N),
			      .deq_fifo_out(flitBuffers$deq_fifo_out),
			      .enq_data_in(flitBuffers$enq_data_in),
			      .enq_fifo_in(flitBuffers$enq_fifo_in),
			      .EN_enq(flitBuffers$EN_enq),
			      .EN_deq(flitBuffers$EN_deq),
			      .deq(flitBuffers$deq),
			      .notEmpty(flitBuffers$notEmpty),
			      .notFull());

  // submodule flitBuffers_1
  mkInputVCQueues flitBuffers_1(.CLK(CLK),
				.RST_N(RST_N),
				.deq_fifo_out(flitBuffers_1$deq_fifo_out),
				.enq_data_in(flitBuffers_1$enq_data_in),
				.enq_fifo_in(flitBuffers_1$enq_fifo_in),
				.EN_enq(flitBuffers_1$EN_enq),
				.EN_deq(flitBuffers_1$EN_deq),
				.deq(flitBuffers_1$deq),
				.notEmpty(flitBuffers_1$notEmpty),
				.notFull());

  // submodule flitBuffers_2
  mkInputVCQueues flitBuffers_2(.CLK(CLK),
				.RST_N(RST_N),
				.deq_fifo_out(flitBuffers_2$deq_fifo_out),
				.enq_data_in(flitBuffers_2$enq_data_in),
				.enq_fifo_in(flitBuffers_2$enq_fifo_in),
				.EN_enq(flitBuffers_2$EN_enq),
				.EN_deq(flitBuffers_2$EN_deq),
				.deq(flitBuffers_2$deq),
				.notEmpty(flitBuffers_2$notEmpty),
				.notFull());

  // submodule flitBuffers_3
  mkInputVCQueues flitBuffers_3(.CLK(CLK),
				.RST_N(RST_N),
				.deq_fifo_out(flitBuffers_3$deq_fifo_out),
				.enq_data_in(flitBuffers_3$enq_data_in),
				.enq_fifo_in(flitBuffers_3$enq_fifo_in),
				.EN_enq(flitBuffers_3$EN_enq),
				.EN_deq(flitBuffers_3$EN_deq),
				.deq(flitBuffers_3$deq),
				.notEmpty(flitBuffers_3$notEmpty),
				.notFull());

  // submodule flitBuffers_4
  mkInputVCQueues flitBuffers_4(.CLK(CLK),
				.RST_N(RST_N),
				.deq_fifo_out(flitBuffers_4$deq_fifo_out),
				.enq_data_in(flitBuffers_4$enq_data_in),
				.enq_fifo_in(flitBuffers_4$enq_fifo_in),
				.EN_enq(flitBuffers_4$EN_enq),
				.EN_deq(flitBuffers_4$EN_deq),
				.deq(flitBuffers_4$deq),
				.notEmpty(flitBuffers_4$notEmpty),
				.notFull());

  // submodule outPortFIFOs_0
  mkOutPortFIFO outPortFIFOs_0(.CLK(CLK),
			       .RST_N(RST_N),
			       .enq_sendData(outPortFIFOs_0$enq_sendData),
			       .EN_enq(outPortFIFOs_0$EN_enq),
			       .EN_deq(outPortFIFOs_0$EN_deq),
			       .EN_clear(outPortFIFOs_0$EN_clear),
			       .RDY_enq(),
			       .RDY_deq(),
			       .first(outPortFIFOs_0$first),
			       .RDY_first(),
			       .notFull(),
			       .RDY_notFull(),
			       .notEmpty(),
			       .RDY_notEmpty(),
			       .count(),
			       .RDY_count(),
			       .RDY_clear());

  // submodule outPortFIFOs_0_1
  mkOutPortFIFO outPortFIFOs_0_1(.CLK(CLK),
				 .RST_N(RST_N),
				 .enq_sendData(outPortFIFOs_0_1$enq_sendData),
				 .EN_enq(outPortFIFOs_0_1$EN_enq),
				 .EN_deq(outPortFIFOs_0_1$EN_deq),
				 .EN_clear(outPortFIFOs_0_1$EN_clear),
				 .RDY_enq(),
				 .RDY_deq(),
				 .first(outPortFIFOs_0_1$first),
				 .RDY_first(),
				 .notFull(),
				 .RDY_notFull(),
				 .notEmpty(),
				 .RDY_notEmpty(),
				 .count(),
				 .RDY_count(),
				 .RDY_clear());

  // submodule outPortFIFOs_0_2
  mkOutPortFIFO outPortFIFOs_0_2(.CLK(CLK),
				 .RST_N(RST_N),
				 .enq_sendData(outPortFIFOs_0_2$enq_sendData),
				 .EN_enq(outPortFIFOs_0_2$EN_enq),
				 .EN_deq(outPortFIFOs_0_2$EN_deq),
				 .EN_clear(outPortFIFOs_0_2$EN_clear),
				 .RDY_enq(),
				 .RDY_deq(),
				 .first(outPortFIFOs_0_2$first),
				 .RDY_first(),
				 .notFull(),
				 .RDY_notFull(),
				 .notEmpty(),
				 .RDY_notEmpty(),
				 .count(),
				 .RDY_count(),
				 .RDY_clear());

  // submodule outPortFIFOs_0_3
  mkOutPortFIFO outPortFIFOs_0_3(.CLK(CLK),
				 .RST_N(RST_N),
				 .enq_sendData(outPortFIFOs_0_3$enq_sendData),
				 .EN_enq(outPortFIFOs_0_3$EN_enq),
				 .EN_deq(outPortFIFOs_0_3$EN_deq),
				 .EN_clear(outPortFIFOs_0_3$EN_clear),
				 .RDY_enq(),
				 .RDY_deq(),
				 .first(outPortFIFOs_0_3$first),
				 .RDY_first(),
				 .notFull(),
				 .RDY_notFull(),
				 .notEmpty(),
				 .RDY_notEmpty(),
				 .count(),
				 .RDY_count(),
				 .RDY_clear());

  // submodule outPortFIFOs_1
  mkOutPortFIFO outPortFIFOs_1(.CLK(CLK),
			       .RST_N(RST_N),
			       .enq_sendData(outPortFIFOs_1$enq_sendData),
			       .EN_enq(outPortFIFOs_1$EN_enq),
			       .EN_deq(outPortFIFOs_1$EN_deq),
			       .EN_clear(outPortFIFOs_1$EN_clear),
			       .RDY_enq(),
			       .RDY_deq(),
			       .first(outPortFIFOs_1$first),
			       .RDY_first(),
			       .notFull(),
			       .RDY_notFull(),
			       .notEmpty(),
			       .RDY_notEmpty(),
			       .count(),
			       .RDY_count(),
			       .RDY_clear());

  // submodule outPortFIFOs_1_1
  mkOutPortFIFO outPortFIFOs_1_1(.CLK(CLK),
				 .RST_N(RST_N),
				 .enq_sendData(outPortFIFOs_1_1$enq_sendData),
				 .EN_enq(outPortFIFOs_1_1$EN_enq),
				 .EN_deq(outPortFIFOs_1_1$EN_deq),
				 .EN_clear(outPortFIFOs_1_1$EN_clear),
				 .RDY_enq(),
				 .RDY_deq(),
				 .first(outPortFIFOs_1_1$first),
				 .RDY_first(),
				 .notFull(),
				 .RDY_notFull(),
				 .notEmpty(),
				 .RDY_notEmpty(),
				 .count(),
				 .RDY_count(),
				 .RDY_clear());

  // submodule outPortFIFOs_1_2
  mkOutPortFIFO outPortFIFOs_1_2(.CLK(CLK),
				 .RST_N(RST_N),
				 .enq_sendData(outPortFIFOs_1_2$enq_sendData),
				 .EN_enq(outPortFIFOs_1_2$EN_enq),
				 .EN_deq(outPortFIFOs_1_2$EN_deq),
				 .EN_clear(outPortFIFOs_1_2$EN_clear),
				 .RDY_enq(),
				 .RDY_deq(),
				 .first(outPortFIFOs_1_2$first),
				 .RDY_first(),
				 .notFull(),
				 .RDY_notFull(),
				 .notEmpty(),
				 .RDY_notEmpty(),
				 .count(),
				 .RDY_count(),
				 .RDY_clear());

  // submodule outPortFIFOs_1_3
  mkOutPortFIFO outPortFIFOs_1_3(.CLK(CLK),
				 .RST_N(RST_N),
				 .enq_sendData(outPortFIFOs_1_3$enq_sendData),
				 .EN_enq(outPortFIFOs_1_3$EN_enq),
				 .EN_deq(outPortFIFOs_1_3$EN_deq),
				 .EN_clear(outPortFIFOs_1_3$EN_clear),
				 .RDY_enq(),
				 .RDY_deq(),
				 .first(outPortFIFOs_1_3$first),
				 .RDY_first(),
				 .notFull(),
				 .RDY_notFull(),
				 .notEmpty(),
				 .RDY_notEmpty(),
				 .count(),
				 .RDY_count(),
				 .RDY_clear());

  // submodule outPortFIFOs_2
  mkOutPortFIFO outPortFIFOs_2(.CLK(CLK),
			       .RST_N(RST_N),
			       .enq_sendData(outPortFIFOs_2$enq_sendData),
			       .EN_enq(outPortFIFOs_2$EN_enq),
			       .EN_deq(outPortFIFOs_2$EN_deq),
			       .EN_clear(outPortFIFOs_2$EN_clear),
			       .RDY_enq(),
			       .RDY_deq(),
			       .first(outPortFIFOs_2$first),
			       .RDY_first(),
			       .notFull(),
			       .RDY_notFull(),
			       .notEmpty(),
			       .RDY_notEmpty(),
			       .count(),
			       .RDY_count(),
			       .RDY_clear());

  // submodule outPortFIFOs_2_1
  mkOutPortFIFO outPortFIFOs_2_1(.CLK(CLK),
				 .RST_N(RST_N),
				 .enq_sendData(outPortFIFOs_2_1$enq_sendData),
				 .EN_enq(outPortFIFOs_2_1$EN_enq),
				 .EN_deq(outPortFIFOs_2_1$EN_deq),
				 .EN_clear(outPortFIFOs_2_1$EN_clear),
				 .RDY_enq(),
				 .RDY_deq(),
				 .first(outPortFIFOs_2_1$first),
				 .RDY_first(),
				 .notFull(),
				 .RDY_notFull(),
				 .notEmpty(),
				 .RDY_notEmpty(),
				 .count(),
				 .RDY_count(),
				 .RDY_clear());

  // submodule outPortFIFOs_2_2
  mkOutPortFIFO outPortFIFOs_2_2(.CLK(CLK),
				 .RST_N(RST_N),
				 .enq_sendData(outPortFIFOs_2_2$enq_sendData),
				 .EN_enq(outPortFIFOs_2_2$EN_enq),
				 .EN_deq(outPortFIFOs_2_2$EN_deq),
				 .EN_clear(outPortFIFOs_2_2$EN_clear),
				 .RDY_enq(),
				 .RDY_deq(),
				 .first(outPortFIFOs_2_2$first),
				 .RDY_first(),
				 .notFull(),
				 .RDY_notFull(),
				 .notEmpty(),
				 .RDY_notEmpty(),
				 .count(),
				 .RDY_count(),
				 .RDY_clear());

  // submodule outPortFIFOs_2_3
  mkOutPortFIFO outPortFIFOs_2_3(.CLK(CLK),
				 .RST_N(RST_N),
				 .enq_sendData(outPortFIFOs_2_3$enq_sendData),
				 .EN_enq(outPortFIFOs_2_3$EN_enq),
				 .EN_deq(outPortFIFOs_2_3$EN_deq),
				 .EN_clear(outPortFIFOs_2_3$EN_clear),
				 .RDY_enq(),
				 .RDY_deq(),
				 .first(outPortFIFOs_2_3$first),
				 .RDY_first(),
				 .notFull(),
				 .RDY_notFull(),
				 .notEmpty(),
				 .RDY_notEmpty(),
				 .count(),
				 .RDY_count(),
				 .RDY_clear());

  // submodule outPortFIFOs_3
  mkOutPortFIFO outPortFIFOs_3(.CLK(CLK),
			       .RST_N(RST_N),
			       .enq_sendData(outPortFIFOs_3$enq_sendData),
			       .EN_enq(outPortFIFOs_3$EN_enq),
			       .EN_deq(outPortFIFOs_3$EN_deq),
			       .EN_clear(outPortFIFOs_3$EN_clear),
			       .RDY_enq(),
			       .RDY_deq(),
			       .first(outPortFIFOs_3$first),
			       .RDY_first(),
			       .notFull(),
			       .RDY_notFull(),
			       .notEmpty(),
			       .RDY_notEmpty(),
			       .count(),
			       .RDY_count(),
			       .RDY_clear());

  // submodule outPortFIFOs_3_1
  mkOutPortFIFO outPortFIFOs_3_1(.CLK(CLK),
				 .RST_N(RST_N),
				 .enq_sendData(outPortFIFOs_3_1$enq_sendData),
				 .EN_enq(outPortFIFOs_3_1$EN_enq),
				 .EN_deq(outPortFIFOs_3_1$EN_deq),
				 .EN_clear(outPortFIFOs_3_1$EN_clear),
				 .RDY_enq(),
				 .RDY_deq(),
				 .first(outPortFIFOs_3_1$first),
				 .RDY_first(),
				 .notFull(),
				 .RDY_notFull(),
				 .notEmpty(),
				 .RDY_notEmpty(),
				 .count(),
				 .RDY_count(),
				 .RDY_clear());

  // submodule outPortFIFOs_3_2
  mkOutPortFIFO outPortFIFOs_3_2(.CLK(CLK),
				 .RST_N(RST_N),
				 .enq_sendData(outPortFIFOs_3_2$enq_sendData),
				 .EN_enq(outPortFIFOs_3_2$EN_enq),
				 .EN_deq(outPortFIFOs_3_2$EN_deq),
				 .EN_clear(outPortFIFOs_3_2$EN_clear),
				 .RDY_enq(),
				 .RDY_deq(),
				 .first(outPortFIFOs_3_2$first),
				 .RDY_first(),
				 .notFull(),
				 .RDY_notFull(),
				 .notEmpty(),
				 .RDY_notEmpty(),
				 .count(),
				 .RDY_count(),
				 .RDY_clear());

  // submodule outPortFIFOs_3_3
  mkOutPortFIFO outPortFIFOs_3_3(.CLK(CLK),
				 .RST_N(RST_N),
				 .enq_sendData(outPortFIFOs_3_3$enq_sendData),
				 .EN_enq(outPortFIFOs_3_3$EN_enq),
				 .EN_deq(outPortFIFOs_3_3$EN_deq),
				 .EN_clear(outPortFIFOs_3_3$EN_clear),
				 .RDY_enq(),
				 .RDY_deq(),
				 .first(outPortFIFOs_3_3$first),
				 .RDY_first(),
				 .notFull(),
				 .RDY_notFull(),
				 .notEmpty(),
				 .RDY_notEmpty(),
				 .count(),
				 .RDY_count(),
				 .RDY_clear());

  // submodule outPortFIFOs_4
  mkOutPortFIFO outPortFIFOs_4(.CLK(CLK),
			       .RST_N(RST_N),
			       .enq_sendData(outPortFIFOs_4$enq_sendData),
			       .EN_enq(outPortFIFOs_4$EN_enq),
			       .EN_deq(outPortFIFOs_4$EN_deq),
			       .EN_clear(outPortFIFOs_4$EN_clear),
			       .RDY_enq(),
			       .RDY_deq(),
			       .first(outPortFIFOs_4$first),
			       .RDY_first(),
			       .notFull(),
			       .RDY_notFull(),
			       .notEmpty(),
			       .RDY_notEmpty(),
			       .count(),
			       .RDY_count(),
			       .RDY_clear());

  // submodule outPortFIFOs_4_1
  mkOutPortFIFO outPortFIFOs_4_1(.CLK(CLK),
				 .RST_N(RST_N),
				 .enq_sendData(outPortFIFOs_4_1$enq_sendData),
				 .EN_enq(outPortFIFOs_4_1$EN_enq),
				 .EN_deq(outPortFIFOs_4_1$EN_deq),
				 .EN_clear(outPortFIFOs_4_1$EN_clear),
				 .RDY_enq(),
				 .RDY_deq(),
				 .first(outPortFIFOs_4_1$first),
				 .RDY_first(),
				 .notFull(),
				 .RDY_notFull(),
				 .notEmpty(),
				 .RDY_notEmpty(),
				 .count(),
				 .RDY_count(),
				 .RDY_clear());

  // submodule outPortFIFOs_4_2
  mkOutPortFIFO outPortFIFOs_4_2(.CLK(CLK),
				 .RST_N(RST_N),
				 .enq_sendData(outPortFIFOs_4_2$enq_sendData),
				 .EN_enq(outPortFIFOs_4_2$EN_enq),
				 .EN_deq(outPortFIFOs_4_2$EN_deq),
				 .EN_clear(outPortFIFOs_4_2$EN_clear),
				 .RDY_enq(),
				 .RDY_deq(),
				 .first(outPortFIFOs_4_2$first),
				 .RDY_first(),
				 .notFull(),
				 .RDY_notFull(),
				 .notEmpty(),
				 .RDY_notEmpty(),
				 .count(),
				 .RDY_count(),
				 .RDY_clear());

  // submodule outPortFIFOs_4_3
  mkOutPortFIFO outPortFIFOs_4_3(.CLK(CLK),
				 .RST_N(RST_N),
				 .enq_sendData(outPortFIFOs_4_3$enq_sendData),
				 .EN_enq(outPortFIFOs_4_3$EN_enq),
				 .EN_deq(outPortFIFOs_4_3$EN_deq),
				 .EN_clear(outPortFIFOs_4_3$EN_clear),
				 .RDY_enq(),
				 .RDY_deq(),
				 .first(outPortFIFOs_4_3$first),
				 .RDY_first(),
				 .notFull(),
				 .RDY_notFull(),
				 .notEmpty(),
				 .RDY_notEmpty(),
				 .count(),
				 .RDY_count(),
				 .RDY_clear());

  // submodule routerAlloc
  mkSepRouterAllocator routerAlloc(.pipeline(1'd0),
				   .CLK(CLK),
				   .RST_N(RST_N),
				   .allocate_alloc_input(routerAlloc$allocate_alloc_input),
				   .EN_allocate(routerAlloc$EN_allocate),
				   .EN_next(routerAlloc$EN_next),
				   .allocate(routerAlloc$allocate));

  // inlined wires
  assign hasFlitsToSend_perIn$wget = { 1'd1, flitBuffers$deq } ;
  assign hasFlitsToSend_perIn_1$wget = { 1'd1, flitBuffers_1$deq } ;
  assign hasFlitsToSend_perIn_2$wget = { 1'd1, flitBuffers_2$deq } ;
  assign hasFlitsToSend_perIn_3$wget = { 1'd1, flitBuffers_3$deq } ;
  assign hasFlitsToSend_perIn_4$wget = { 1'd1, flitBuffers_4$deq } ;
  assign credits_set_0$whas =
	     EN_out_ports_0_putCredits && out_ports_0_putCredits_cr_in[2] &&
	     out_ports_0_putCredits_cr_in[1:0] == 2'd0 ;
  assign credits_set_0_1$whas =
	     EN_out_ports_0_putCredits && out_ports_0_putCredits_cr_in[2] &&
	     out_ports_0_putCredits_cr_in[1:0] == 2'd1 ;
  assign credits_set_0_2$whas =
	     EN_out_ports_0_putCredits && out_ports_0_putCredits_cr_in[2] &&
	     out_ports_0_putCredits_cr_in[1:0] == 2'd2 ;
  assign credits_set_0_3$whas =
	     EN_out_ports_0_putCredits && out_ports_0_putCredits_cr_in[2] &&
	     out_ports_0_putCredits_cr_in[1:0] == 2'd3 ;
  assign credits_clear_0$whas =
	     EN_out_ports_0_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2178 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1911 ==
	     2'd0 ;
  assign credits_clear_0_1$whas =
	     EN_out_ports_0_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2178 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1911 ==
	     2'd1 ;
  assign credits_clear_0_2$whas =
	     EN_out_ports_0_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2178 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1911 ==
	     2'd2 ;
  assign credits_clear_0_3$whas =
	     EN_out_ports_0_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2178 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1911 ==
	     2'd3 ;
  assign credits_set_1$whas =
	     EN_out_ports_1_putCredits && out_ports_1_putCredits_cr_in[2] &&
	     out_ports_1_putCredits_cr_in[1:0] == 2'd0 ;
  assign credits_set_1_1$whas =
	     EN_out_ports_1_putCredits && out_ports_1_putCredits_cr_in[2] &&
	     out_ports_1_putCredits_cr_in[1:0] == 2'd1 ;
  assign credits_set_1_2$whas =
	     EN_out_ports_1_putCredits && out_ports_1_putCredits_cr_in[2] &&
	     out_ports_1_putCredits_cr_in[1:0] == 2'd2 ;
  assign credits_set_1_3$whas =
	     EN_out_ports_1_putCredits && out_ports_1_putCredits_cr_in[2] &&
	     out_ports_1_putCredits_cr_in[1:0] == 2'd3 ;
  assign credits_clear_1$whas =
	     EN_out_ports_1_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2188 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1912 ==
	     2'd0 ;
  assign credits_clear_1_1$whas =
	     EN_out_ports_1_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2188 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1912 ==
	     2'd1 ;
  assign credits_clear_1_2$whas =
	     EN_out_ports_1_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2188 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1912 ==
	     2'd2 ;
  assign credits_clear_1_3$whas =
	     EN_out_ports_1_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2188 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1912 ==
	     2'd3 ;
  assign credits_set_2$whas =
	     EN_out_ports_2_putCredits && out_ports_2_putCredits_cr_in[2] &&
	     out_ports_2_putCredits_cr_in[1:0] == 2'd0 ;
  assign credits_set_2_1$whas =
	     EN_out_ports_2_putCredits && out_ports_2_putCredits_cr_in[2] &&
	     out_ports_2_putCredits_cr_in[1:0] == 2'd1 ;
  assign credits_set_2_2$whas =
	     EN_out_ports_2_putCredits && out_ports_2_putCredits_cr_in[2] &&
	     out_ports_2_putCredits_cr_in[1:0] == 2'd2 ;
  assign credits_set_2_3$whas =
	     EN_out_ports_2_putCredits && out_ports_2_putCredits_cr_in[2] &&
	     out_ports_2_putCredits_cr_in[1:0] == 2'd3 ;
  assign credits_clear_2$whas =
	     EN_out_ports_2_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2190 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1913 ==
	     2'd0 ;
  assign credits_clear_2_1$whas =
	     EN_out_ports_2_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2190 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1913 ==
	     2'd1 ;
  assign credits_clear_2_2$whas =
	     EN_out_ports_2_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2190 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1913 ==
	     2'd2 ;
  assign credits_clear_2_3$whas =
	     EN_out_ports_2_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2190 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1913 ==
	     2'd3 ;
  assign credits_set_3$whas =
	     EN_out_ports_3_putCredits && out_ports_3_putCredits_cr_in[2] &&
	     out_ports_3_putCredits_cr_in[1:0] == 2'd0 ;
  assign credits_set_3_1$whas =
	     EN_out_ports_3_putCredits && out_ports_3_putCredits_cr_in[2] &&
	     out_ports_3_putCredits_cr_in[1:0] == 2'd1 ;
  assign credits_set_3_2$whas =
	     EN_out_ports_3_putCredits && out_ports_3_putCredits_cr_in[2] &&
	     out_ports_3_putCredits_cr_in[1:0] == 2'd2 ;
  assign credits_set_3_3$whas =
	     EN_out_ports_3_putCredits && out_ports_3_putCredits_cr_in[2] &&
	     out_ports_3_putCredits_cr_in[1:0] == 2'd3 ;
  assign credits_clear_3$whas =
	     EN_out_ports_3_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2192 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1914 ==
	     2'd0 ;
  assign credits_clear_3_1$whas =
	     EN_out_ports_3_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2192 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1914 ==
	     2'd1 ;
  assign credits_clear_3_2$whas =
	     EN_out_ports_3_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2192 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1914 ==
	     2'd2 ;
  assign credits_clear_3_3$whas =
	     EN_out_ports_3_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2192 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1914 ==
	     2'd3 ;
  assign credits_set_4$whas =
	     EN_out_ports_4_putCredits && out_ports_4_putCredits_cr_in[2] &&
	     out_ports_4_putCredits_cr_in[1:0] == 2'd0 ;
  assign credits_set_4_1$whas =
	     EN_out_ports_4_putCredits && out_ports_4_putCredits_cr_in[2] &&
	     out_ports_4_putCredits_cr_in[1:0] == 2'd1 ;
  assign credits_set_4_2$whas =
	     EN_out_ports_4_putCredits && out_ports_4_putCredits_cr_in[2] &&
	     out_ports_4_putCredits_cr_in[1:0] == 2'd2 ;
  assign credits_set_4_3$whas =
	     EN_out_ports_4_putCredits && out_ports_4_putCredits_cr_in[2] &&
	     out_ports_4_putCredits_cr_in[1:0] == 2'd3 ;
  assign credits_clear_4$whas =
	     EN_out_ports_4_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2194 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1915 ==
	     2'd0 ;
  assign credits_clear_4_1$whas =
	     EN_out_ports_4_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2194 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1915 ==
	     2'd1 ;
  assign credits_clear_4_2$whas =
	     EN_out_ports_4_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2194 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1915 ==
	     2'd2 ;
  assign credits_clear_4_3$whas =
	     EN_out_ports_4_getFlit &&
	     IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2194 &&
	     IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1915 ==
	     2'd3 ;

  // register activeVC_perIn_reg
  assign activeVC_perIn_reg$D_IN = 3'h0 ;
  assign activeVC_perIn_reg$EN = 1'b0 ;

  // register activeVC_perIn_reg_1
  assign activeVC_perIn_reg_1$D_IN = 3'h0 ;
  assign activeVC_perIn_reg_1$EN = 1'b0 ;

  // register activeVC_perIn_reg_2
  assign activeVC_perIn_reg_2$D_IN = 3'h0 ;
  assign activeVC_perIn_reg_2$EN = 1'b0 ;

  // register activeVC_perIn_reg_3
  assign activeVC_perIn_reg_3$D_IN = 3'h0 ;
  assign activeVC_perIn_reg_3$EN = 1'b0 ;

  // register activeVC_perIn_reg_4
  assign activeVC_perIn_reg_4$D_IN = 3'h0 ;
  assign activeVC_perIn_reg_4$EN = 1'b0 ;

  // register credits_0
  assign credits_0$D_IN =
	     (credits_set_0$whas && !credits_clear_0$whas) ?
	       credits_0_read_PLUS_1___d1938 :
	       x__h56835 ;
  assign credits_0$EN =
	     credits_set_0$whas && !credits_clear_0$whas ||
	     !credits_set_0$whas && credits_clear_0$whas ;

  // register credits_0_1
  assign credits_0_1$D_IN =
	     (credits_set_0_1$whas && !credits_clear_0_1$whas) ?
	       credits_0_1_read__3_PLUS_1___d1939 :
	       x__h57565 ;
  assign credits_0_1$EN =
	     credits_set_0_1$whas && !credits_clear_0_1$whas ||
	     !credits_set_0_1$whas && credits_clear_0_1$whas ;

  // register credits_0_2
  assign credits_0_2$D_IN =
	     (credits_set_0_2$whas && !credits_clear_0_2$whas) ?
	       credits_0_2_read__1_PLUS_1___d1940 :
	       x__h58295 ;
  assign credits_0_2$EN =
	     credits_set_0_2$whas && !credits_clear_0_2$whas ||
	     !credits_set_0_2$whas && credits_clear_0_2$whas ;

  // register credits_0_3
  assign credits_0_3$D_IN =
	     (credits_set_0_3$whas && !credits_clear_0_3$whas) ?
	       credits_0_3_read__9_PLUS_1___d1941 :
	       x__h59025 ;
  assign credits_0_3$EN =
	     credits_set_0_3$whas && !credits_clear_0_3$whas ||
	     !credits_set_0_3$whas && credits_clear_0_3$whas ;

  // register credits_1
  assign credits_1$D_IN =
	     (credits_set_1$whas && !credits_clear_1$whas) ?
	       credits_1_read_PLUS_1___d1942 :
	       x__h60072 ;
  assign credits_1$EN =
	     credits_set_1$whas && !credits_clear_1$whas ||
	     !credits_set_1$whas && credits_clear_1$whas ;

  // register credits_1_1
  assign credits_1_1$D_IN =
	     (credits_set_1_1$whas && !credits_clear_1_1$whas) ?
	       credits_1_1_read__5_PLUS_1___d1943 :
	       x__h60802 ;
  assign credits_1_1$EN =
	     credits_set_1_1$whas && !credits_clear_1_1$whas ||
	     !credits_set_1_1$whas && credits_clear_1_1$whas ;

  // register credits_1_2
  assign credits_1_2$D_IN =
	     (credits_set_1_2$whas && !credits_clear_1_2$whas) ?
	       credits_1_2_read__3_PLUS_1___d1944 :
	       x__h61532 ;
  assign credits_1_2$EN =
	     credits_set_1_2$whas && !credits_clear_1_2$whas ||
	     !credits_set_1_2$whas && credits_clear_1_2$whas ;

  // register credits_1_3
  assign credits_1_3$D_IN =
	     (credits_set_1_3$whas && !credits_clear_1_3$whas) ?
	       credits_1_3_read__1_PLUS_1___d1945 :
	       x__h62262 ;
  assign credits_1_3$EN =
	     credits_set_1_3$whas && !credits_clear_1_3$whas ||
	     !credits_set_1_3$whas && credits_clear_1_3$whas ;

  // register credits_2
  assign credits_2$D_IN =
	     (credits_set_2$whas && !credits_clear_2$whas) ?
	       credits_2_read_PLUS_1___d1946 :
	       x__h63309 ;
  assign credits_2$EN =
	     credits_set_2$whas && !credits_clear_2$whas ||
	     !credits_set_2$whas && credits_clear_2$whas ;

  // register credits_2_1
  assign credits_2_1$D_IN =
	     (credits_set_2_1$whas && !credits_clear_2_1$whas) ?
	       credits_2_1_read__7_PLUS_1___d1947 :
	       x__h64039 ;
  assign credits_2_1$EN =
	     credits_set_2_1$whas && !credits_clear_2_1$whas ||
	     !credits_set_2_1$whas && credits_clear_2_1$whas ;

  // register credits_2_2
  assign credits_2_2$D_IN =
	     (credits_set_2_2$whas && !credits_clear_2_2$whas) ?
	       credits_2_2_read__5_PLUS_1___d1948 :
	       x__h64769 ;
  assign credits_2_2$EN =
	     credits_set_2_2$whas && !credits_clear_2_2$whas ||
	     !credits_set_2_2$whas && credits_clear_2_2$whas ;

  // register credits_2_3
  assign credits_2_3$D_IN =
	     (credits_set_2_3$whas && !credits_clear_2_3$whas) ?
	       credits_2_3_read__3_PLUS_1___d1949 :
	       x__h65499 ;
  assign credits_2_3$EN =
	     credits_set_2_3$whas && !credits_clear_2_3$whas ||
	     !credits_set_2_3$whas && credits_clear_2_3$whas ;

  // register credits_3
  assign credits_3$D_IN =
	     (credits_set_3$whas && !credits_clear_3$whas) ?
	       credits_3_read__1_PLUS_1___d1950 :
	       x__h66546 ;
  assign credits_3$EN =
	     credits_set_3$whas && !credits_clear_3$whas ||
	     !credits_set_3$whas && credits_clear_3$whas ;

  // register credits_3_1
  assign credits_3_1$D_IN =
	     (credits_set_3_1$whas && !credits_clear_3_1$whas) ?
	       credits_3_1_read__9_PLUS_1___d1951 :
	       x__h67276 ;
  assign credits_3_1$EN =
	     credits_set_3_1$whas && !credits_clear_3_1$whas ||
	     !credits_set_3_1$whas && credits_clear_3_1$whas ;

  // register credits_3_2
  assign credits_3_2$D_IN =
	     (credits_set_3_2$whas && !credits_clear_3_2$whas) ?
	       credits_3_2_read__7_PLUS_1___d1952 :
	       x__h68006 ;
  assign credits_3_2$EN =
	     credits_set_3_2$whas && !credits_clear_3_2$whas ||
	     !credits_set_3_2$whas && credits_clear_3_2$whas ;

  // register credits_3_3
  assign credits_3_3$D_IN =
	     (credits_set_3_3$whas && !credits_clear_3_3$whas) ?
	       credits_3_3_read__5_PLUS_1___d1953 :
	       x__h68736 ;
  assign credits_3_3$EN =
	     credits_set_3_3$whas && !credits_clear_3_3$whas ||
	     !credits_set_3_3$whas && credits_clear_3_3$whas ;

  // register credits_4
  assign credits_4$D_IN =
	     (credits_set_4$whas && !credits_clear_4$whas) ?
	       credits_4_read__3_PLUS_1___d1954 :
	       x__h69783 ;
  assign credits_4$EN =
	     credits_set_4$whas && !credits_clear_4$whas ||
	     !credits_set_4$whas && credits_clear_4$whas ;

  // register credits_4_1
  assign credits_4_1$D_IN =
	     (credits_set_4_1$whas && !credits_clear_4_1$whas) ?
	       credits_4_1_read__1_PLUS_1___d1955 :
	       x__h70513 ;
  assign credits_4_1$EN =
	     credits_set_4_1$whas && !credits_clear_4_1$whas ||
	     !credits_set_4_1$whas && credits_clear_4_1$whas ;

  // register credits_4_2
  assign credits_4_2$D_IN =
	     (credits_set_4_2$whas && !credits_clear_4_2$whas) ?
	       credits_4_2_read__9_PLUS_1___d1956 :
	       x__h71243 ;
  assign credits_4_2$EN =
	     credits_set_4_2$whas && !credits_clear_4_2$whas ||
	     !credits_set_4_2$whas && credits_clear_4_2$whas ;

  // register credits_4_3
  assign credits_4_3$D_IN =
	     (credits_set_4_3$whas && !credits_clear_4_3$whas) ?
	       credits_4_3_read__7_PLUS_1___d1957 :
	       x__h71973 ;
  assign credits_4_3$EN =
	     credits_set_4_3$whas && !credits_clear_4_3$whas ||
	     !credits_set_4_3$whas && credits_clear_4_3$whas ;

  // register inPortVL_0
  assign inPortVL_0$D_IN = 3'h0 ;
  assign inPortVL_0$EN = 1'b0 ;

  // register inPortVL_0_1
  assign inPortVL_0_1$D_IN = 3'h0 ;
  assign inPortVL_0_1$EN = 1'b0 ;

  // register inPortVL_0_2
  assign inPortVL_0_2$D_IN = 3'h0 ;
  assign inPortVL_0_2$EN = 1'b0 ;

  // register inPortVL_0_3
  assign inPortVL_0_3$D_IN = 3'h0 ;
  assign inPortVL_0_3$EN = 1'b0 ;

  // register inPortVL_1
  assign inPortVL_1$D_IN = 3'h0 ;
  assign inPortVL_1$EN = 1'b0 ;

  // register inPortVL_1_1
  assign inPortVL_1_1$D_IN = 3'h0 ;
  assign inPortVL_1_1$EN = 1'b0 ;

  // register inPortVL_1_2
  assign inPortVL_1_2$D_IN = 3'h0 ;
  assign inPortVL_1_2$EN = 1'b0 ;

  // register inPortVL_1_3
  assign inPortVL_1_3$D_IN = 3'h0 ;
  assign inPortVL_1_3$EN = 1'b0 ;

  // register inPortVL_2
  assign inPortVL_2$D_IN = 3'h0 ;
  assign inPortVL_2$EN = 1'b0 ;

  // register inPortVL_2_1
  assign inPortVL_2_1$D_IN = 3'h0 ;
  assign inPortVL_2_1$EN = 1'b0 ;

  // register inPortVL_2_2
  assign inPortVL_2_2$D_IN = 3'h0 ;
  assign inPortVL_2_2$EN = 1'b0 ;

  // register inPortVL_2_3
  assign inPortVL_2_3$D_IN = 3'h0 ;
  assign inPortVL_2_3$EN = 1'b0 ;

  // register inPortVL_3
  assign inPortVL_3$D_IN = 3'h0 ;
  assign inPortVL_3$EN = 1'b0 ;

  // register inPortVL_3_1
  assign inPortVL_3_1$D_IN = 3'h0 ;
  assign inPortVL_3_1$EN = 1'b0 ;

  // register inPortVL_3_2
  assign inPortVL_3_2$D_IN = 3'h0 ;
  assign inPortVL_3_2$EN = 1'b0 ;

  // register inPortVL_3_3
  assign inPortVL_3_3$D_IN = 3'h0 ;
  assign inPortVL_3_3$EN = 1'b0 ;

  // register inPortVL_4
  assign inPortVL_4$D_IN = 3'h0 ;
  assign inPortVL_4$EN = 1'b0 ;

  // register inPortVL_4_1
  assign inPortVL_4_1$D_IN = 3'h0 ;
  assign inPortVL_4_1$EN = 1'b0 ;

  // register inPortVL_4_2
  assign inPortVL_4_2$D_IN = 3'h0 ;
  assign inPortVL_4_2$EN = 1'b0 ;

  // register inPortVL_4_3
  assign inPortVL_4_3$D_IN = 3'h0 ;
  assign inPortVL_4_3$EN = 1'b0 ;

  // register lockedVL_0
  assign lockedVL_0$D_IN = 1'b0 ;
  assign lockedVL_0$EN = 1'b0 ;

  // register lockedVL_0_1
  assign lockedVL_0_1$D_IN = 1'b0 ;
  assign lockedVL_0_1$EN = 1'b0 ;

  // register lockedVL_0_2
  assign lockedVL_0_2$D_IN = 1'b0 ;
  assign lockedVL_0_2$EN = 1'b0 ;

  // register lockedVL_0_3
  assign lockedVL_0_3$D_IN = 1'b0 ;
  assign lockedVL_0_3$EN = 1'b0 ;

  // register lockedVL_1
  assign lockedVL_1$D_IN = 1'b0 ;
  assign lockedVL_1$EN = 1'b0 ;

  // register lockedVL_1_1
  assign lockedVL_1_1$D_IN = 1'b0 ;
  assign lockedVL_1_1$EN = 1'b0 ;

  // register lockedVL_1_2
  assign lockedVL_1_2$D_IN = 1'b0 ;
  assign lockedVL_1_2$EN = 1'b0 ;

  // register lockedVL_1_3
  assign lockedVL_1_3$D_IN = 1'b0 ;
  assign lockedVL_1_3$EN = 1'b0 ;

  // register lockedVL_2
  assign lockedVL_2$D_IN = 1'b0 ;
  assign lockedVL_2$EN = 1'b0 ;

  // register lockedVL_2_1
  assign lockedVL_2_1$D_IN = 1'b0 ;
  assign lockedVL_2_1$EN = 1'b0 ;

  // register lockedVL_2_2
  assign lockedVL_2_2$D_IN = 1'b0 ;
  assign lockedVL_2_2$EN = 1'b0 ;

  // register lockedVL_2_3
  assign lockedVL_2_3$D_IN = 1'b0 ;
  assign lockedVL_2_3$EN = 1'b0 ;

  // register lockedVL_3
  assign lockedVL_3$D_IN = 1'b0 ;
  assign lockedVL_3$EN = 1'b0 ;

  // register lockedVL_3_1
  assign lockedVL_3_1$D_IN = 1'b0 ;
  assign lockedVL_3_1$EN = 1'b0 ;

  // register lockedVL_3_2
  assign lockedVL_3_2$D_IN = 1'b0 ;
  assign lockedVL_3_2$EN = 1'b0 ;

  // register lockedVL_3_3
  assign lockedVL_3_3$D_IN = 1'b0 ;
  assign lockedVL_3_3$EN = 1'b0 ;

  // register lockedVL_4
  assign lockedVL_4$D_IN = 1'b0 ;
  assign lockedVL_4$EN = 1'b0 ;

  // register lockedVL_4_1
  assign lockedVL_4_1$D_IN = 1'b0 ;
  assign lockedVL_4_1$EN = 1'b0 ;

  // register lockedVL_4_2
  assign lockedVL_4_2$D_IN = 1'b0 ;
  assign lockedVL_4_2$EN = 1'b0 ;

  // register lockedVL_4_3
  assign lockedVL_4_3$D_IN = 1'b0 ;
  assign lockedVL_4_3$EN = 1'b0 ;

  // register selectedIO_reg_0
  assign selectedIO_reg_0$D_IN = 1'b0 ;
  assign selectedIO_reg_0$EN = 1'b0 ;

  // register selectedIO_reg_0_1
  assign selectedIO_reg_0_1$D_IN = 1'b0 ;
  assign selectedIO_reg_0_1$EN = 1'b0 ;

  // register selectedIO_reg_0_2
  assign selectedIO_reg_0_2$D_IN = 1'b0 ;
  assign selectedIO_reg_0_2$EN = 1'b0 ;

  // register selectedIO_reg_0_3
  assign selectedIO_reg_0_3$D_IN = 1'b0 ;
  assign selectedIO_reg_0_3$EN = 1'b0 ;

  // register selectedIO_reg_0_4
  assign selectedIO_reg_0_4$D_IN = 1'b0 ;
  assign selectedIO_reg_0_4$EN = 1'b0 ;

  // register selectedIO_reg_1
  assign selectedIO_reg_1$D_IN = 1'b0 ;
  assign selectedIO_reg_1$EN = 1'b0 ;

  // register selectedIO_reg_1_1
  assign selectedIO_reg_1_1$D_IN = 1'b0 ;
  assign selectedIO_reg_1_1$EN = 1'b0 ;

  // register selectedIO_reg_1_2
  assign selectedIO_reg_1_2$D_IN = 1'b0 ;
  assign selectedIO_reg_1_2$EN = 1'b0 ;

  // register selectedIO_reg_1_3
  assign selectedIO_reg_1_3$D_IN = 1'b0 ;
  assign selectedIO_reg_1_3$EN = 1'b0 ;

  // register selectedIO_reg_1_4
  assign selectedIO_reg_1_4$D_IN = 1'b0 ;
  assign selectedIO_reg_1_4$EN = 1'b0 ;

  // register selectedIO_reg_2
  assign selectedIO_reg_2$D_IN = 1'b0 ;
  assign selectedIO_reg_2$EN = 1'b0 ;

  // register selectedIO_reg_2_1
  assign selectedIO_reg_2_1$D_IN = 1'b0 ;
  assign selectedIO_reg_2_1$EN = 1'b0 ;

  // register selectedIO_reg_2_2
  assign selectedIO_reg_2_2$D_IN = 1'b0 ;
  assign selectedIO_reg_2_2$EN = 1'b0 ;

  // register selectedIO_reg_2_3
  assign selectedIO_reg_2_3$D_IN = 1'b0 ;
  assign selectedIO_reg_2_3$EN = 1'b0 ;

  // register selectedIO_reg_2_4
  assign selectedIO_reg_2_4$D_IN = 1'b0 ;
  assign selectedIO_reg_2_4$EN = 1'b0 ;

  // register selectedIO_reg_3
  assign selectedIO_reg_3$D_IN = 1'b0 ;
  assign selectedIO_reg_3$EN = 1'b0 ;

  // register selectedIO_reg_3_1
  assign selectedIO_reg_3_1$D_IN = 1'b0 ;
  assign selectedIO_reg_3_1$EN = 1'b0 ;

  // register selectedIO_reg_3_2
  assign selectedIO_reg_3_2$D_IN = 1'b0 ;
  assign selectedIO_reg_3_2$EN = 1'b0 ;

  // register selectedIO_reg_3_3
  assign selectedIO_reg_3_3$D_IN = 1'b0 ;
  assign selectedIO_reg_3_3$EN = 1'b0 ;

  // register selectedIO_reg_3_4
  assign selectedIO_reg_3_4$D_IN = 1'b0 ;
  assign selectedIO_reg_3_4$EN = 1'b0 ;

  // register selectedIO_reg_4
  assign selectedIO_reg_4$D_IN = 1'b0 ;
  assign selectedIO_reg_4$EN = 1'b0 ;

  // register selectedIO_reg_4_1
  assign selectedIO_reg_4_1$D_IN = 1'b0 ;
  assign selectedIO_reg_4_1$EN = 1'b0 ;

  // register selectedIO_reg_4_2
  assign selectedIO_reg_4_2$D_IN = 1'b0 ;
  assign selectedIO_reg_4_2$EN = 1'b0 ;

  // register selectedIO_reg_4_3
  assign selectedIO_reg_4_3$D_IN = 1'b0 ;
  assign selectedIO_reg_4_3$EN = 1'b0 ;

  // register selectedIO_reg_4_4
  assign selectedIO_reg_4_4$D_IN = 1'b0 ;
  assign selectedIO_reg_4_4$EN = 1'b0 ;

  // submodule flitBuffers
  assign flitBuffers$deq_fifo_out = fifo_out__h51388 ;
  assign flitBuffers$enq_data_in = in_ports_0_putRoutedFlit_flit_in[73:3] ;
  assign flitBuffers$enq_fifo_in = in_ports_0_putRoutedFlit_flit_in[68:67] ;
  assign flitBuffers$EN_enq =
	     EN_in_ports_0_putRoutedFlit &&
	     in_ports_0_putRoutedFlit_flit_in[74] ;
  assign flitBuffers$EN_deq = outport_encoder___d2299[3] ;

  // submodule flitBuffers_1
  assign flitBuffers_1$deq_fifo_out = fifo_out__h52918 ;
  assign flitBuffers_1$enq_data_in = in_ports_1_putRoutedFlit_flit_in[73:3] ;
  assign flitBuffers_1$enq_fifo_in = in_ports_1_putRoutedFlit_flit_in[68:67] ;
  assign flitBuffers_1$EN_enq =
	     EN_in_ports_1_putRoutedFlit &&
	     in_ports_1_putRoutedFlit_flit_in[74] ;
  assign flitBuffers_1$EN_deq = outport_encoder___d2298[3] ;

  // submodule flitBuffers_2
  assign flitBuffers_2$deq_fifo_out = fifo_out__h53619 ;
  assign flitBuffers_2$enq_data_in = in_ports_2_putRoutedFlit_flit_in[73:3] ;
  assign flitBuffers_2$enq_fifo_in = in_ports_2_putRoutedFlit_flit_in[68:67] ;
  assign flitBuffers_2$EN_enq =
	     EN_in_ports_2_putRoutedFlit &&
	     in_ports_2_putRoutedFlit_flit_in[74] ;
  assign flitBuffers_2$EN_deq = outport_encoder___d2297[3] ;

  // submodule flitBuffers_3
  assign flitBuffers_3$deq_fifo_out = fifo_out__h54320 ;
  assign flitBuffers_3$enq_data_in = in_ports_3_putRoutedFlit_flit_in[73:3] ;
  assign flitBuffers_3$enq_fifo_in = in_ports_3_putRoutedFlit_flit_in[68:67] ;
  assign flitBuffers_3$EN_enq =
	     EN_in_ports_3_putRoutedFlit &&
	     in_ports_3_putRoutedFlit_flit_in[74] ;
  assign flitBuffers_3$EN_deq = outport_encoder___d2296[3] ;

  // submodule flitBuffers_4
  assign flitBuffers_4$deq_fifo_out = fifo_out__h55021 ;
  assign flitBuffers_4$enq_data_in = in_ports_4_putRoutedFlit_flit_in[73:3] ;
  assign flitBuffers_4$enq_fifo_in = in_ports_4_putRoutedFlit_flit_in[68:67] ;
  assign flitBuffers_4$EN_enq =
	     EN_in_ports_4_putRoutedFlit &&
	     in_ports_4_putRoutedFlit_flit_in[74] ;
  assign flitBuffers_4$EN_deq = outport_encoder___d2295[3] ;

  // submodule outPortFIFOs_0
  assign outPortFIFOs_0$enq_sendData = in_ports_0_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_0$EN_enq =
	     EN_in_ports_0_putRoutedFlit &&
	     in_ports_0_putRoutedFlit_flit_in[74] &&
	     in_ports_0_putRoutedFlit_flit_in[68:67] == 2'd0 ;
  assign outPortFIFOs_0$EN_deq =
	     outport_encoder___d2299[3] &&
	     flitBuffers_notEmpty__34_BIT_0_35_AND_NOT_IF_o_ETC___d471 ;
  assign outPortFIFOs_0$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_0_1
  assign outPortFIFOs_0_1$enq_sendData =
	     in_ports_0_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_0_1$EN_enq =
	     EN_in_ports_0_putRoutedFlit &&
	     in_ports_0_putRoutedFlit_flit_in[74] &&
	     in_ports_0_putRoutedFlit_flit_in[68:67] == 2'd1 ;
  assign outPortFIFOs_0_1$EN_deq =
	     outport_encoder___d2299[3] &&
	     NOT_flitBuffers_notEmpty__34_BIT_0_35_73_OR_IF_ETC___d479 ;
  assign outPortFIFOs_0_1$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_0_2
  assign outPortFIFOs_0_2$enq_sendData =
	     in_ports_0_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_0_2$EN_enq =
	     EN_in_ports_0_putRoutedFlit &&
	     in_ports_0_putRoutedFlit_flit_in[74] &&
	     in_ports_0_putRoutedFlit_flit_in[68:67] == 2'd2 ;
  assign outPortFIFOs_0_2$EN_deq =
	     outport_encoder___d2299[3] &&
	     NOT_flitBuffers_notEmpty__34_BIT_0_35_73_OR_IF_ETC___d474 &&
	     IF_flitBuffers_notEmpty__34_BIT_0_35_THEN_NOT__ETC___d490 ;
  assign outPortFIFOs_0_2$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_0_3
  assign outPortFIFOs_0_3$enq_sendData =
	     in_ports_0_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_0_3$EN_enq =
	     EN_in_ports_0_putRoutedFlit &&
	     in_ports_0_putRoutedFlit_flit_in[74] &&
	     in_ports_0_putRoutedFlit_flit_in[68:67] == 2'd3 ;
  assign outPortFIFOs_0_3$EN_deq =
	     outport_encoder___d2299[3] &&
	     NOT_flitBuffers_notEmpty__34_BIT_0_35_73_OR_IF_ETC___d474 &&
	     IF_flitBuffers_notEmpty__34_BIT_0_35_THEN_NOT__ETC___d504 ;
  assign outPortFIFOs_0_3$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_1
  assign outPortFIFOs_1$enq_sendData = in_ports_1_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_1$EN_enq =
	     EN_in_ports_1_putRoutedFlit &&
	     in_ports_1_putRoutedFlit_flit_in[74] &&
	     in_ports_1_putRoutedFlit_flit_in[68:67] == 2'd0 ;
  assign outPortFIFOs_1$EN_deq =
	     outport_encoder___d2298[3] &&
	     flitBuffers_1_notEmpty__56_BIT_0_57_AND_NOT_IF_ETC___d539 ;
  assign outPortFIFOs_1$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_1_1
  assign outPortFIFOs_1_1$enq_sendData =
	     in_ports_1_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_1_1$EN_enq =
	     EN_in_ports_1_putRoutedFlit &&
	     in_ports_1_putRoutedFlit_flit_in[74] &&
	     in_ports_1_putRoutedFlit_flit_in[68:67] == 2'd1 ;
  assign outPortFIFOs_1_1$EN_deq =
	     outport_encoder___d2298[3] &&
	     NOT_flitBuffers_1_notEmpty__56_BIT_0_57_41_OR__ETC___d547 ;
  assign outPortFIFOs_1_1$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_1_2
  assign outPortFIFOs_1_2$enq_sendData =
	     in_ports_1_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_1_2$EN_enq =
	     EN_in_ports_1_putRoutedFlit &&
	     in_ports_1_putRoutedFlit_flit_in[74] &&
	     in_ports_1_putRoutedFlit_flit_in[68:67] == 2'd2 ;
  assign outPortFIFOs_1_2$EN_deq =
	     outport_encoder___d2298[3] &&
	     NOT_flitBuffers_1_notEmpty__56_BIT_0_57_41_OR__ETC___d542 &&
	     IF_flitBuffers_1_notEmpty__56_BIT_0_57_THEN_NO_ETC___d558 ;
  assign outPortFIFOs_1_2$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_1_3
  assign outPortFIFOs_1_3$enq_sendData =
	     in_ports_1_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_1_3$EN_enq =
	     EN_in_ports_1_putRoutedFlit &&
	     in_ports_1_putRoutedFlit_flit_in[74] &&
	     in_ports_1_putRoutedFlit_flit_in[68:67] == 2'd3 ;
  assign outPortFIFOs_1_3$EN_deq =
	     outport_encoder___d2298[3] &&
	     NOT_flitBuffers_1_notEmpty__56_BIT_0_57_41_OR__ETC___d542 &&
	     IF_flitBuffers_1_notEmpty__56_BIT_0_57_THEN_NO_ETC___d572 ;
  assign outPortFIFOs_1_3$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_2
  assign outPortFIFOs_2$enq_sendData = in_ports_2_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_2$EN_enq =
	     EN_in_ports_2_putRoutedFlit &&
	     in_ports_2_putRoutedFlit_flit_in[74] &&
	     in_ports_2_putRoutedFlit_flit_in[68:67] == 2'd0 ;
  assign outPortFIFOs_2$EN_deq =
	     outport_encoder___d2297[3] &&
	     flitBuffers_2_notEmpty__77_BIT_0_78_AND_NOT_IF_ETC___d607 ;
  assign outPortFIFOs_2$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_2_1
  assign outPortFIFOs_2_1$enq_sendData =
	     in_ports_2_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_2_1$EN_enq =
	     EN_in_ports_2_putRoutedFlit &&
	     in_ports_2_putRoutedFlit_flit_in[74] &&
	     in_ports_2_putRoutedFlit_flit_in[68:67] == 2'd1 ;
  assign outPortFIFOs_2_1$EN_deq =
	     outport_encoder___d2297[3] &&
	     NOT_flitBuffers_2_notEmpty__77_BIT_0_78_09_OR__ETC___d615 ;
  assign outPortFIFOs_2_1$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_2_2
  assign outPortFIFOs_2_2$enq_sendData =
	     in_ports_2_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_2_2$EN_enq =
	     EN_in_ports_2_putRoutedFlit &&
	     in_ports_2_putRoutedFlit_flit_in[74] &&
	     in_ports_2_putRoutedFlit_flit_in[68:67] == 2'd2 ;
  assign outPortFIFOs_2_2$EN_deq =
	     outport_encoder___d2297[3] &&
	     NOT_flitBuffers_2_notEmpty__77_BIT_0_78_09_OR__ETC___d610 &&
	     IF_flitBuffers_2_notEmpty__77_BIT_0_78_THEN_NO_ETC___d626 ;
  assign outPortFIFOs_2_2$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_2_3
  assign outPortFIFOs_2_3$enq_sendData =
	     in_ports_2_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_2_3$EN_enq =
	     EN_in_ports_2_putRoutedFlit &&
	     in_ports_2_putRoutedFlit_flit_in[74] &&
	     in_ports_2_putRoutedFlit_flit_in[68:67] == 2'd3 ;
  assign outPortFIFOs_2_3$EN_deq =
	     outport_encoder___d2297[3] &&
	     NOT_flitBuffers_2_notEmpty__77_BIT_0_78_09_OR__ETC___d610 &&
	     IF_flitBuffers_2_notEmpty__77_BIT_0_78_THEN_NO_ETC___d640 ;
  assign outPortFIFOs_2_3$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_3
  assign outPortFIFOs_3$enq_sendData = in_ports_3_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_3$EN_enq =
	     EN_in_ports_3_putRoutedFlit &&
	     in_ports_3_putRoutedFlit_flit_in[74] &&
	     in_ports_3_putRoutedFlit_flit_in[68:67] == 2'd0 ;
  assign outPortFIFOs_3$EN_deq =
	     outport_encoder___d2296[3] &&
	     flitBuffers_3_notEmpty__9_BIT_0_00_AND_NOT_IF__ETC___d675 ;
  assign outPortFIFOs_3$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_3_1
  assign outPortFIFOs_3_1$enq_sendData =
	     in_ports_3_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_3_1$EN_enq =
	     EN_in_ports_3_putRoutedFlit &&
	     in_ports_3_putRoutedFlit_flit_in[74] &&
	     in_ports_3_putRoutedFlit_flit_in[68:67] == 2'd1 ;
  assign outPortFIFOs_3_1$EN_deq =
	     outport_encoder___d2296[3] &&
	     NOT_flitBuffers_3_notEmpty__9_BIT_0_00_77_OR_I_ETC___d683 ;
  assign outPortFIFOs_3_1$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_3_2
  assign outPortFIFOs_3_2$enq_sendData =
	     in_ports_3_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_3_2$EN_enq =
	     EN_in_ports_3_putRoutedFlit &&
	     in_ports_3_putRoutedFlit_flit_in[74] &&
	     in_ports_3_putRoutedFlit_flit_in[68:67] == 2'd2 ;
  assign outPortFIFOs_3_2$EN_deq =
	     outport_encoder___d2296[3] &&
	     NOT_flitBuffers_3_notEmpty__9_BIT_0_00_77_OR_I_ETC___d678 &&
	     IF_flitBuffers_3_notEmpty__9_BIT_0_00_THEN_NOT_ETC___d694 ;
  assign outPortFIFOs_3_2$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_3_3
  assign outPortFIFOs_3_3$enq_sendData =
	     in_ports_3_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_3_3$EN_enq =
	     EN_in_ports_3_putRoutedFlit &&
	     in_ports_3_putRoutedFlit_flit_in[74] &&
	     in_ports_3_putRoutedFlit_flit_in[68:67] == 2'd3 ;
  assign outPortFIFOs_3_3$EN_deq =
	     outport_encoder___d2296[3] &&
	     NOT_flitBuffers_3_notEmpty__9_BIT_0_00_77_OR_I_ETC___d678 &&
	     IF_flitBuffers_3_notEmpty__9_BIT_0_00_THEN_NOT_ETC___d708 ;
  assign outPortFIFOs_3_3$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_4
  assign outPortFIFOs_4$enq_sendData = in_ports_4_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_4$EN_enq =
	     EN_in_ports_4_putRoutedFlit &&
	     in_ports_4_putRoutedFlit_flit_in[74] &&
	     in_ports_4_putRoutedFlit_flit_in[68:67] == 2'd0 ;
  assign outPortFIFOs_4$EN_deq =
	     outport_encoder___d2295[3] &&
	     flitBuffers_4_notEmpty_BIT_0_AND_NOT_IF_outPor_ETC___d743 ;
  assign outPortFIFOs_4$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_4_1
  assign outPortFIFOs_4_1$enq_sendData =
	     in_ports_4_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_4_1$EN_enq =
	     EN_in_ports_4_putRoutedFlit &&
	     in_ports_4_putRoutedFlit_flit_in[74] &&
	     in_ports_4_putRoutedFlit_flit_in[68:67] == 2'd1 ;
  assign outPortFIFOs_4_1$EN_deq =
	     outport_encoder___d2295[3] &&
	     NOT_flitBuffers_4_notEmpty_BIT_0_45_OR_IF_outP_ETC___d751 ;
  assign outPortFIFOs_4_1$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_4_2
  assign outPortFIFOs_4_2$enq_sendData =
	     in_ports_4_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_4_2$EN_enq =
	     EN_in_ports_4_putRoutedFlit &&
	     in_ports_4_putRoutedFlit_flit_in[74] &&
	     in_ports_4_putRoutedFlit_flit_in[68:67] == 2'd2 ;
  assign outPortFIFOs_4_2$EN_deq =
	     outport_encoder___d2295[3] &&
	     NOT_flitBuffers_4_notEmpty_BIT_0_45_OR_IF_outP_ETC___d746 &&
	     IF_flitBuffers_4_notEmpty_BIT_0_THEN_NOT_flitB_ETC___d762 ;
  assign outPortFIFOs_4_2$EN_clear = 1'b0 ;

  // submodule outPortFIFOs_4_3
  assign outPortFIFOs_4_3$enq_sendData =
	     in_ports_4_putRoutedFlit_flit_in[2:0] ;
  assign outPortFIFOs_4_3$EN_enq =
	     EN_in_ports_4_putRoutedFlit &&
	     in_ports_4_putRoutedFlit_flit_in[74] &&
	     in_ports_4_putRoutedFlit_flit_in[68:67] == 2'd3 ;
  assign outPortFIFOs_4_3$EN_deq =
	     outport_encoder___d2295[3] &&
	     NOT_flitBuffers_4_notEmpty_BIT_0_45_OR_IF_outP_ETC___d746 &&
	     IF_flitBuffers_4_notEmpty_BIT_0_THEN_NOT_flitB_ETC___d776 ;
  assign outPortFIFOs_4_3$EN_clear = 1'b0 ;

  // submodule routerAlloc
  assign routerAlloc$allocate_alloc_input =
	     { IF_flitBuffers_4_notEmpty_BIT_0_THEN_IF_IF_out_ETC___d255,
	       flitBuffers_1$notEmpty[0] ?
		 IF_IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_cr_ETC___d332 :
		 IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_IF_ETC___d2364,
	       flitBuffers$notEmpty[0] ?
		 IF_IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_cr_ETC___d410 :
		 IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_IF_I_ETC___d2367 } ;
  assign routerAlloc$EN_allocate = 1'd1 ;
  assign routerAlloc$EN_next = 1'd1 ;

  // remaining internal signals
  module_outport_encoder instance_outport_encoder_1(.outport_encoder_vec({ { 1'd1 &&
									     routerAlloc$allocate[4],
									     1'd1 &&
									     routerAlloc$allocate[3],
									     1'd1 &&
									     routerAlloc$allocate[2] },
									   1'd1 &&
									   routerAlloc$allocate[1],
									   1'd1 &&
									   routerAlloc$allocate[0] }),
						    .outport_encoder(outport_encoder___d2299));
  module_outport_encoder instance_outport_encoder_0(.outport_encoder_vec({ { 1'd1 &&
									     routerAlloc$allocate[9],
									     1'd1 &&
									     routerAlloc$allocate[8],
									     1'd1 &&
									     routerAlloc$allocate[7] },
									   1'd1 &&
									   routerAlloc$allocate[6],
									   1'd1 &&
									   routerAlloc$allocate[5] }),
						    .outport_encoder(outport_encoder___d2298));
  module_outport_encoder instance_outport_encoder_2(.outport_encoder_vec({ { 1'd1 &&
									     routerAlloc$allocate[14],
									     1'd1 &&
									     routerAlloc$allocate[13],
									     1'd1 &&
									     routerAlloc$allocate[12] },
									   1'd1 &&
									   routerAlloc$allocate[11],
									   1'd1 &&
									   routerAlloc$allocate[10] }),
						    .outport_encoder(outport_encoder___d2297));
  module_outport_encoder instance_outport_encoder_3(.outport_encoder_vec({ { 1'd1 &&
									     routerAlloc$allocate[19],
									     1'd1 &&
									     routerAlloc$allocate[18],
									     1'd1 &&
									     routerAlloc$allocate[17] },
									   1'd1 &&
									   routerAlloc$allocate[16],
									   1'd1 &&
									   routerAlloc$allocate[15] }),
						    .outport_encoder(outport_encoder___d2296));
  module_outport_encoder instance_outport_encoder_4(.outport_encoder_vec({ { 1'd1 &&
									     routerAlloc$allocate[24],
									     1'd1 &&
									     routerAlloc$allocate[23],
									     1'd1 &&
									     routerAlloc$allocate[22] },
									   1'd1 &&
									   routerAlloc$allocate[21],
									   1'd1 &&
									   routerAlloc$allocate[20] }),
						    .outport_encoder(outport_encoder___d2295));
  assign IF_IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN__ETC___d406 =
	     (CASE_outPortFIFOs_0_1first_credits_4_1_0_cred_ETC__q8 == 4'd0) ?
	       IF_flitBuffers_notEmpty__34_BIT_2_61_THEN_IF_I_ETC___d2366 :
	       { outPortFIFOs_0_1$first == 3'd4,
		 outPortFIFOs_0_1$first == 3'd3,
		 outPortFIFOs_0_1$first == 3'd2,
		 outPortFIFOs_0_1$first == 3'd1,
		 outPortFIFOs_0_1$first == 3'd0 } ;
  assign IF_IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN__ETC___d460 =
	     (CASE_outPortFIFOs_0_1first_credits_4_1_0_cred_ETC__q8 == 4'd0) ?
	       IF_flitBuffers_notEmpty__34_BIT_2_61_THEN_IF_I_ETC___d1925 :
	       2'd1 ;
  assign IF_IF_outPortFIFOs_0_2_first__62_EQ_0_63_THEN__ETC___d402 =
	     (CASE_outPortFIFOs_0_2first_credits_4_2_0_cred_ETC__q6 == 4'd0) ?
	       { flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d389,
		 flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d391,
		 flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d393,
		 flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d396,
		 flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d398 } :
	       { outPortFIFOs_0_2$first == 3'd4,
		 outPortFIFOs_0_2$first == 3'd3,
		 outPortFIFOs_0_2$first == 3'd2,
		 outPortFIFOs_0_2$first == 3'd1,
		 outPortFIFOs_0_2$first == 3'd0 } ;
  assign IF_IF_outPortFIFOs_0_2_first__62_EQ_0_63_THEN__ETC___d458 =
	     (CASE_outPortFIFOs_0_2first_credits_4_2_0_cred_ETC__q6 == 4'd0) ?
	       2'd3 :
	       2'd2 ;
  assign IF_IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_cr_ETC___d410 =
	     (CASE_outPortFIFOs_0first_credits_4_0_credits__ETC__q7 == 4'd0) ?
	       IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_IF_I_ETC___d2367 :
	       { outPortFIFOs_0$first == 3'd4,
		 outPortFIFOs_0$first == 3'd3,
		 outPortFIFOs_0$first == 3'd2,
		 outPortFIFOs_0$first == 3'd1,
		 outPortFIFOs_0$first == 3'd0 } ;
  assign IF_IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_cr_ETC___d462 =
	     (CASE_outPortFIFOs_0first_credits_4_0_credits__ETC__q7 == 4'd0) ?
	       IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_IF_I_ETC___d1924 :
	       2'd0 ;
  assign IF_IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN__ETC___d328 =
	     (CASE_outPortFIFOs_1_1first_credits_4_1_0_cred_ETC__q9 == 4'd0) ?
	       IF_flitBuffers_1_notEmpty__56_BIT_2_83_THEN_IF_ETC___d2363 :
	       { outPortFIFOs_1_1$first == 3'd4,
		 outPortFIFOs_1_1$first == 3'd3,
		 outPortFIFOs_1_1$first == 3'd2,
		 outPortFIFOs_1_1$first == 3'd1,
		 outPortFIFOs_1_1$first == 3'd0 } ;
  assign IF_IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN__ETC___d528 =
	     (CASE_outPortFIFOs_1_1first_credits_4_1_0_cred_ETC__q9 == 4'd0) ?
	       IF_flitBuffers_1_notEmpty__56_BIT_2_83_THEN_IF_ETC___d1923 :
	       2'd1 ;
  assign IF_IF_outPortFIFOs_1_2_first__84_EQ_0_85_THEN__ETC___d324 =
	     (CASE_outPortFIFOs_1_2first_credits_4_2_0_cred_ETC__q10 ==
	      4'd0) ?
	       { flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d311,
		 flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d313,
		 flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d315,
		 flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d318,
		 flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d320 } :
	       { outPortFIFOs_1_2$first == 3'd4,
		 outPortFIFOs_1_2$first == 3'd3,
		 outPortFIFOs_1_2$first == 3'd2,
		 outPortFIFOs_1_2$first == 3'd1,
		 outPortFIFOs_1_2$first == 3'd0 } ;
  assign IF_IF_outPortFIFOs_1_2_first__84_EQ_0_85_THEN__ETC___d526 =
	     (CASE_outPortFIFOs_1_2first_credits_4_2_0_cred_ETC__q10 ==
	      4'd0) ?
	       2'd3 :
	       2'd2 ;
  assign IF_IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_cr_ETC___d332 =
	     (CASE_outPortFIFOs_1first_credits_4_0_credits__ETC__q11 ==
	      4'd0) ?
	       IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_IF_ETC___d2364 :
	       { outPortFIFOs_1$first == 3'd4,
		 outPortFIFOs_1$first == 3'd3,
		 outPortFIFOs_1$first == 3'd2,
		 outPortFIFOs_1$first == 3'd1,
		 outPortFIFOs_1$first == 3'd0 } ;
  assign IF_IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_cr_ETC___d530 =
	     (CASE_outPortFIFOs_1first_credits_4_0_credits__ETC__q11 ==
	      4'd0) ?
	       IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_IF_ETC___d1922 :
	       2'd0 ;
  assign IF_IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN__ETC___d249 =
	     (CASE_outPortFIFOs_2_1first_credits_4_1_0_cred_ETC__q14 ==
	      4'd0) ?
	       IF_flitBuffers_2_notEmpty__77_BIT_2_04_THEN_IF_ETC___d2360 :
	       { outPortFIFOs_2_1$first == 3'd4,
		 outPortFIFOs_2_1$first == 3'd3,
		 outPortFIFOs_2_1$first == 3'd2,
		 outPortFIFOs_2_1$first == 3'd1,
		 outPortFIFOs_2_1$first == 3'd0 } ;
  assign IF_IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN__ETC___d596 =
	     (CASE_outPortFIFOs_2_1first_credits_4_1_0_cred_ETC__q14 ==
	      4'd0) ?
	       IF_flitBuffers_2_notEmpty__77_BIT_2_04_THEN_IF_ETC___d1921 :
	       2'd1 ;
  assign IF_IF_outPortFIFOs_2_2_first__05_EQ_0_06_THEN__ETC___d245 =
	     (CASE_outPortFIFOs_2_2first_credits_4_2_0_cred_ETC__q12 ==
	      4'd0) ?
	       { flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d232,
		 flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d234,
		 flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d236,
		 flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d239,
		 flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d241 } :
	       { outPortFIFOs_2_2$first == 3'd4,
		 outPortFIFOs_2_2$first == 3'd3,
		 outPortFIFOs_2_2$first == 3'd2,
		 outPortFIFOs_2_2$first == 3'd1,
		 outPortFIFOs_2_2$first == 3'd0 } ;
  assign IF_IF_outPortFIFOs_2_2_first__05_EQ_0_06_THEN__ETC___d594 =
	     (CASE_outPortFIFOs_2_2first_credits_4_2_0_cred_ETC__q12 ==
	      4'd0) ?
	       2'd3 :
	       2'd2 ;
  assign IF_IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_cr_ETC___d253 =
	     (CASE_outPortFIFOs_2first_credits_4_0_credits__ETC__q13 ==
	      4'd0) ?
	       IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_IF_ETC___d2361 :
	       { outPortFIFOs_2$first == 3'd4,
		 outPortFIFOs_2$first == 3'd3,
		 outPortFIFOs_2$first == 3'd2,
		 outPortFIFOs_2$first == 3'd1,
		 outPortFIFOs_2$first == 3'd0 } ;
  assign IF_IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_cr_ETC___d598 =
	     (CASE_outPortFIFOs_2first_credits_4_0_credits__ETC__q13 ==
	      4'd0) ?
	       IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_IF_ETC___d1920 :
	       2'd0 ;
  assign IF_IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN__ETC___d171 =
	     (CASE_outPortFIFOs_3_1first_credits_4_1_0_cred_ETC__q17 ==
	      4'd0) ?
	       IF_flitBuffers_3_notEmpty__9_BIT_2_26_THEN_IF__ETC___d2357 :
	       { outPortFIFOs_3_1$first == 3'd4,
		 outPortFIFOs_3_1$first == 3'd3,
		 outPortFIFOs_3_1$first == 3'd2,
		 outPortFIFOs_3_1$first == 3'd1,
		 outPortFIFOs_3_1$first == 3'd0 } ;
  assign IF_IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN__ETC___d664 =
	     (CASE_outPortFIFOs_3_1first_credits_4_1_0_cred_ETC__q17 ==
	      4'd0) ?
	       IF_flitBuffers_3_notEmpty__9_BIT_2_26_THEN_IF__ETC___d1919 :
	       2'd1 ;
  assign IF_IF_outPortFIFOs_3_2_first__27_EQ_0_28_THEN__ETC___d167 =
	     (CASE_outPortFIFOs_3_2first_credits_4_2_0_cred_ETC__q15 ==
	      4'd0) ?
	       { flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d154,
		 flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d156,
		 flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d158,
		 flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d161,
		 flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d163 } :
	       { outPortFIFOs_3_2$first == 3'd4,
		 outPortFIFOs_3_2$first == 3'd3,
		 outPortFIFOs_3_2$first == 3'd2,
		 outPortFIFOs_3_2$first == 3'd1,
		 outPortFIFOs_3_2$first == 3'd0 } ;
  assign IF_IF_outPortFIFOs_3_2_first__27_EQ_0_28_THEN__ETC___d662 =
	     (CASE_outPortFIFOs_3_2first_credits_4_2_0_cred_ETC__q15 ==
	      4'd0) ?
	       2'd3 :
	       2'd2 ;
  assign IF_IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_cr_ETC___d175 =
	     (CASE_outPortFIFOs_3first_credits_4_0_credits__ETC__q16 ==
	      4'd0) ?
	       IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_IF__ETC___d2358 :
	       { outPortFIFOs_3$first == 3'd4,
		 outPortFIFOs_3$first == 3'd3,
		 outPortFIFOs_3$first == 3'd2,
		 outPortFIFOs_3$first == 3'd1,
		 outPortFIFOs_3$first == 3'd0 } ;
  assign IF_IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_cr_ETC___d666 =
	     (CASE_outPortFIFOs_3first_credits_4_0_credits__ETC__q16 ==
	      4'd0) ?
	       IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_IF__ETC___d1918 :
	       2'd0 ;
  assign IF_IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_cr_ETC___d732 =
	     (CASE_outPortFIFOs_4_1first_credits_4_1_0_cred_ETC__q20 ==
	      4'd0) ?
	       IF_flitBuffers_4_notEmpty_BIT_2_8_THEN_IF_IF_o_ETC___d1917 :
	       2'd1 ;
  assign IF_IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_cr_ETC___d93 =
	     (CASE_outPortFIFOs_4_1first_credits_4_1_0_cred_ETC__q20 ==
	      4'd0) ?
	       IF_flitBuffers_4_notEmpty_BIT_2_8_THEN_IF_IF_o_ETC___d2354 :
	       { outPortFIFOs_4_1$first == 3'd4,
		 outPortFIFOs_4_1$first == 3'd3,
		 outPortFIFOs_4_1$first == 3'd2,
		 outPortFIFOs_4_1$first == 3'd1,
		 outPortFIFOs_4_1$first == 3'd0 } ;
  assign IF_IF_outPortFIFOs_4_2_first__9_EQ_0_0_THEN_cr_ETC___d730 =
	     (CASE_outPortFIFOs_4_2first_credits_4_2_0_cred_ETC__q18 ==
	      4'd0) ?
	       2'd3 :
	       2'd2 ;
  assign IF_IF_outPortFIFOs_4_2_first__9_EQ_0_0_THEN_cr_ETC___d89 =
	     (CASE_outPortFIFOs_4_2first_credits_4_2_0_cred_ETC__q18 ==
	      4'd0) ?
	       { flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d76,
		 flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d78,
		 flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d80,
		 flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d83,
		 flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d85 } :
	       { outPortFIFOs_4_2$first == 3'd4,
		 outPortFIFOs_4_2$first == 3'd3,
		 outPortFIFOs_4_2$first == 3'd2,
		 outPortFIFOs_4_2$first == 3'd1,
		 outPortFIFOs_4_2$first == 3'd0 } ;
  assign IF_IF_outPortFIFOs_4_first_EQ_0_THEN_credits_0_ETC___d734 =
	     (CASE_outPortFIFOs_4first_credits_4_0_credits__ETC__q19 ==
	      4'd0) ?
	       IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_IF_IF_o_ETC___d1916 :
	       2'd0 ;
  assign IF_IF_outPortFIFOs_4_first_EQ_0_THEN_credits_0_ETC___d97 =
	     (CASE_outPortFIFOs_4first_credits_4_0_credits__ETC__q19 ==
	      4'd0) ?
	       IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_IF_IF_o_ETC___d2355 :
	       { outPortFIFOs_4$first == 3'd4,
		 outPortFIFOs_4$first == 3'd3,
		 outPortFIFOs_4$first == 3'd2,
		 outPortFIFOs_4$first == 3'd1,
		 outPortFIFOs_4$first == 3'd0 } ;
  assign IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1482 =
	     IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2270 ?
	       !outport_encoder___d2296[3] ||
	       !hasFlitsToSend_perIn_3$wget[71] :
	       outport_encoder___d2295[3] &&
	       outport_encoder___d2295[2:0] == 3'd0 &&
	       !hasFlitsToSend_perIn_4$wget[71] ;
  assign IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1483 =
	     IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2269 ?
	       !outport_encoder___d2297[3] ||
	       !hasFlitsToSend_perIn_2$wget[71] :
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1482 ;
  assign IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1484 =
	     IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2268 ?
	       !outport_encoder___d2298[3] ||
	       !hasFlitsToSend_perIn_1$wget[71] :
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1483 ;
  assign IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1495 =
	     IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2268 ?
	       hasFlitsToSend_perIn_1$wget[65:64] :
	       (IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2269 ?
		  hasFlitsToSend_perIn_2$wget[65:64] :
		  (IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2270 ?
		     hasFlitsToSend_perIn_3$wget[65:64] :
		     hasFlitsToSend_perIn_4$wget[65:64])) ;
  assign IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1512 =
	     IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2270 ?
	       outport_encoder___d2296[3] && hasFlitsToSend_perIn_3$wget[71] :
	       !outport_encoder___d2295[3] ||
	       outport_encoder___d2295[2:0] != 3'd0 ||
	       hasFlitsToSend_perIn_4$wget[71] ;
  assign IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1513 =
	     IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2269 ?
	       outport_encoder___d2297[3] && hasFlitsToSend_perIn_2$wget[71] :
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1512 ;
  assign IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1514 =
	     IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2268 ?
	       outport_encoder___d2298[3] && hasFlitsToSend_perIn_1$wget[71] :
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1513 ;
  assign IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1515 =
	     IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2179 ?
	       outport_encoder___d2299[3] && hasFlitsToSend_perIn$wget[71] :
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1514 ;
  assign IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1530 =
	     IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2269 ?
	       hasFlitsToSend_perIn_2$wget[70:0] :
	       (IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2270 ?
		  hasFlitsToSend_perIn_3$wget[70:0] :
		  hasFlitsToSend_perIn_4$wget[70:0]) ;
  assign IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1911 =
	     IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2179 ?
	       hasFlitsToSend_perIn$wget[65:64] :
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1495 ;
  assign IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d2411 =
	     IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2179 ?
	       hasFlitsToSend_perIn$wget[70:0] :
	       (IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2268 ?
		  hasFlitsToSend_perIn_1$wget[70:0] :
		  IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1530) ;
  assign IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d2446 =
	     IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2179 ?
	       !outport_encoder___d2299[3] || !hasFlitsToSend_perIn$wget[71] :
	       IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d1484 ;
  assign IF_flitBuffers_1_notEmpty__56_BIT_0_57_THEN_NO_ETC___d558 =
	     flitBuffers_1$notEmpty[0] ?
	       NOT_flitBuffers_1_notEmpty__56_BIT_1_70_49_OR__ETC___d550 &&
	       IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_credi_ETC___d555 :
	       NOT_flitBuffers_1_notEmpty__56_BIT_1_70_49_OR__ETC___d550 &&
	       IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_IF_ETC___d2373 ;
  assign IF_flitBuffers_1_notEmpty__56_BIT_0_57_THEN_NO_ETC___d572 =
	     flitBuffers_1$notEmpty[0] ?
	       NOT_flitBuffers_1_notEmpty__56_BIT_1_70_49_OR__ETC___d550 &&
	       IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_NO_ETC___d2417 &&
	       IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_credi_ETC___d567 :
	       NOT_flitBuffers_1_notEmpty__56_BIT_1_70_49_OR__ETC___d550 &&
	       IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_NO_ETC___d2417 &&
	       IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_IF_ETC___d2375 ;
  assign IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_IF_ETC___d1922 =
	     flitBuffers_1$notEmpty[1] ?
	       IF_IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN__ETC___d528 :
	       IF_flitBuffers_1_notEmpty__56_BIT_2_83_THEN_IF_ETC___d1923 ;
  assign IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_IF_ETC___d2364 =
	     flitBuffers_1$notEmpty[1] ?
	       IF_IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN__ETC___d328 :
	       IF_flitBuffers_1_notEmpty__56_BIT_2_83_THEN_IF_ETC___d2363 ;
  assign IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_IF_ETC___d2373 =
	     flitBuffers_1$notEmpty[1] ?
	       IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN_cre_ETC___d553 :
	       flitBuffers_1_notEmpty__56_BIT_2_83_AND_NOT_IF_ETC___d2372 ;
  assign IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_IF_ETC___d2375 =
	     flitBuffers_1$notEmpty[1] ?
	       IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN_cre_ETC___d565 :
	       NOT_flitBuffers_1_notEmpty__56_BIT_2_83_61_OR__ETC___d2374 ;
  assign IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_NO_ETC___d2393 =
	     flitBuffers_1$notEmpty[1] ?
	       NOT_IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN_ETC___d1285 :
	       IF_flitBuffers_1_notEmpty__56_BIT_2_83_THEN_NO_ETC___d2392 ;
  assign IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_NO_ETC___d2417 =
	     flitBuffers_1$notEmpty[1] ?
	       NOT_IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN_ETC___d563 :
	       NOT_flitBuffers_1_notEmpty__56_BIT_2_83_61_OR__ETC___d2374 ;
  assign IF_flitBuffers_1_notEmpty__56_BIT_2_83_THEN_IF_ETC___d1923 =
	     flitBuffers_1$notEmpty[2] ?
	       IF_IF_outPortFIFOs_1_2_first__84_EQ_0_85_THEN__ETC___d526 :
	       2'd3 ;
  assign IF_flitBuffers_1_notEmpty__56_BIT_2_83_THEN_IF_ETC___d2363 =
	     flitBuffers_1$notEmpty[2] ?
	       IF_IF_outPortFIFOs_1_2_first__84_EQ_0_85_THEN__ETC___d324 :
	       { flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d311,
		 flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d313,
		 flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d315,
		 flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d318,
		 flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d320 } ;
  assign IF_flitBuffers_1_notEmpty__56_BIT_2_83_THEN_NO_ETC___d2392 =
	     flitBuffers_1$notEmpty[2] ?
	       NOT_IF_outPortFIFOs_1_2_first__84_EQ_0_85_THEN_ETC___d1283 :
	       flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d2391 ;
  assign IF_flitBuffers_2_notEmpty__77_BIT_0_78_THEN_NO_ETC___d626 =
	     flitBuffers_2$notEmpty[0] ?
	       NOT_flitBuffers_2_notEmpty__77_BIT_1_91_17_OR__ETC___d618 &&
	       IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_credi_ETC___d623 :
	       NOT_flitBuffers_2_notEmpty__77_BIT_1_91_17_OR__ETC___d618 &&
	       IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_IF_ETC___d2377 ;
  assign IF_flitBuffers_2_notEmpty__77_BIT_0_78_THEN_NO_ETC___d640 =
	     flitBuffers_2$notEmpty[0] ?
	       NOT_flitBuffers_2_notEmpty__77_BIT_1_91_17_OR__ETC___d618 &&
	       IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_NO_ETC___d2418 &&
	       IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_credi_ETC___d635 :
	       NOT_flitBuffers_2_notEmpty__77_BIT_1_91_17_OR__ETC___d618 &&
	       IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_NO_ETC___d2418 &&
	       IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_IF_ETC___d2379 ;
  assign IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_IF_ETC___d1920 =
	     flitBuffers_2$notEmpty[1] ?
	       IF_IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN__ETC___d596 :
	       IF_flitBuffers_2_notEmpty__77_BIT_2_04_THEN_IF_ETC___d1921 ;
  assign IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_IF_ETC___d2361 =
	     flitBuffers_2$notEmpty[1] ?
	       IF_IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN__ETC___d249 :
	       IF_flitBuffers_2_notEmpty__77_BIT_2_04_THEN_IF_ETC___d2360 ;
  assign IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_IF_ETC___d2377 =
	     flitBuffers_2$notEmpty[1] ?
	       IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN_cre_ETC___d621 :
	       flitBuffers_2_notEmpty__77_BIT_2_04_AND_NOT_IF_ETC___d2376 ;
  assign IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_IF_ETC___d2379 =
	     flitBuffers_2$notEmpty[1] ?
	       IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN_cre_ETC___d633 :
	       NOT_flitBuffers_2_notEmpty__77_BIT_2_04_29_OR__ETC___d2378 ;
  assign IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_NO_ETC___d2396 =
	     flitBuffers_2$notEmpty[1] ?
	       NOT_IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN_ETC___d1316 :
	       IF_flitBuffers_2_notEmpty__77_BIT_2_04_THEN_NO_ETC___d2395 ;
  assign IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_NO_ETC___d2418 =
	     flitBuffers_2$notEmpty[1] ?
	       NOT_IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN_ETC___d631 :
	       NOT_flitBuffers_2_notEmpty__77_BIT_2_04_29_OR__ETC___d2378 ;
  assign IF_flitBuffers_2_notEmpty__77_BIT_2_04_THEN_IF_ETC___d1921 =
	     flitBuffers_2$notEmpty[2] ?
	       IF_IF_outPortFIFOs_2_2_first__05_EQ_0_06_THEN__ETC___d594 :
	       2'd3 ;
  assign IF_flitBuffers_2_notEmpty__77_BIT_2_04_THEN_IF_ETC___d2360 =
	     flitBuffers_2$notEmpty[2] ?
	       IF_IF_outPortFIFOs_2_2_first__05_EQ_0_06_THEN__ETC___d245 :
	       { flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d232,
		 flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d234,
		 flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d236,
		 flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d239,
		 flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d241 } ;
  assign IF_flitBuffers_2_notEmpty__77_BIT_2_04_THEN_NO_ETC___d2395 =
	     flitBuffers_2$notEmpty[2] ?
	       NOT_IF_outPortFIFOs_2_2_first__05_EQ_0_06_THEN_ETC___d1314 :
	       flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d2394 ;
  assign IF_flitBuffers_3_notEmpty__9_BIT_0_00_THEN_NOT_ETC___d694 =
	     flitBuffers_3$notEmpty[0] ?
	       NOT_flitBuffers_3_notEmpty__9_BIT_1_13_85_OR_I_ETC___d686 &&
	       IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_credi_ETC___d691 :
	       NOT_flitBuffers_3_notEmpty__9_BIT_1_13_85_OR_I_ETC___d686 &&
	       IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_IF__ETC___d2381 ;
  assign IF_flitBuffers_3_notEmpty__9_BIT_0_00_THEN_NOT_ETC___d708 =
	     flitBuffers_3$notEmpty[0] ?
	       NOT_flitBuffers_3_notEmpty__9_BIT_1_13_85_OR_I_ETC___d686 &&
	       IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_NOT_ETC___d2419 &&
	       IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_credi_ETC___d703 :
	       NOT_flitBuffers_3_notEmpty__9_BIT_1_13_85_OR_I_ETC___d686 &&
	       IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_NOT_ETC___d2419 &&
	       IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_IF__ETC___d2383 ;
  assign IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_IF__ETC___d1918 =
	     flitBuffers_3$notEmpty[1] ?
	       IF_IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN__ETC___d664 :
	       IF_flitBuffers_3_notEmpty__9_BIT_2_26_THEN_IF__ETC___d1919 ;
  assign IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_IF__ETC___d2358 =
	     flitBuffers_3$notEmpty[1] ?
	       IF_IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN__ETC___d171 :
	       IF_flitBuffers_3_notEmpty__9_BIT_2_26_THEN_IF__ETC___d2357 ;
  assign IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_IF__ETC___d2381 =
	     flitBuffers_3$notEmpty[1] ?
	       IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN_cre_ETC___d689 :
	       flitBuffers_3_notEmpty__9_BIT_2_26_AND_NOT_IF__ETC___d2380 ;
  assign IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_IF__ETC___d2383 =
	     flitBuffers_3$notEmpty[1] ?
	       IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN_cre_ETC___d701 :
	       NOT_flitBuffers_3_notEmpty__9_BIT_2_26_97_OR_I_ETC___d2382 ;
  assign IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_NOT_ETC___d2399 =
	     flitBuffers_3$notEmpty[1] ?
	       NOT_IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN_ETC___d1347 :
	       IF_flitBuffers_3_notEmpty__9_BIT_2_26_THEN_NOT_ETC___d2398 ;
  assign IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_NOT_ETC___d2419 =
	     flitBuffers_3$notEmpty[1] ?
	       NOT_IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN_ETC___d699 :
	       NOT_flitBuffers_3_notEmpty__9_BIT_2_26_97_OR_I_ETC___d2382 ;
  assign IF_flitBuffers_3_notEmpty__9_BIT_2_26_THEN_IF__ETC___d1919 =
	     flitBuffers_3$notEmpty[2] ?
	       IF_IF_outPortFIFOs_3_2_first__27_EQ_0_28_THEN__ETC___d662 :
	       2'd3 ;
  assign IF_flitBuffers_3_notEmpty__9_BIT_2_26_THEN_IF__ETC___d2357 =
	     flitBuffers_3$notEmpty[2] ?
	       IF_IF_outPortFIFOs_3_2_first__27_EQ_0_28_THEN__ETC___d167 :
	       { flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d154,
		 flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d156,
		 flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d158,
		 flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d161,
		 flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d163 } ;
  assign IF_flitBuffers_3_notEmpty__9_BIT_2_26_THEN_NOT_ETC___d2398 =
	     flitBuffers_3$notEmpty[2] ?
	       NOT_IF_outPortFIFOs_3_2_first__27_EQ_0_28_THEN_ETC___d1345 :
	       flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d2397 ;
  assign IF_flitBuffers_4_notEmpty_BIT_0_THEN_IF_IF_out_ETC___d255 =
	     { flitBuffers_4$notEmpty[0] ?
		 IF_IF_outPortFIFOs_4_first_EQ_0_THEN_credits_0_ETC___d97 :
		 IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_IF_IF_o_ETC___d2355,
	       flitBuffers_3$notEmpty[0] ?
		 IF_IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_cr_ETC___d175 :
		 IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_IF__ETC___d2358,
	       flitBuffers_2$notEmpty[0] ?
		 IF_IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_cr_ETC___d253 :
		 IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_IF_ETC___d2361 } ;
  assign IF_flitBuffers_4_notEmpty_BIT_0_THEN_NOT_flitB_ETC___d762 =
	     flitBuffers_4$notEmpty[0] ?
	       NOT_flitBuffers_4_notEmpty_BIT_1_0_53_OR_IF_ou_ETC___d754 &&
	       IF_outPortFIFOs_4_first_EQ_0_THEN_credits_0_re_ETC___d759 :
	       NOT_flitBuffers_4_notEmpty_BIT_1_0_53_OR_IF_ou_ETC___d754 &&
	       IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_IF_outP_ETC___d2385 ;
  assign IF_flitBuffers_4_notEmpty_BIT_0_THEN_NOT_flitB_ETC___d776 =
	     flitBuffers_4$notEmpty[0] ?
	       NOT_flitBuffers_4_notEmpty_BIT_1_0_53_OR_IF_ou_ETC___d754 &&
	       IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_NOT_IF__ETC___d2420 &&
	       IF_outPortFIFOs_4_first_EQ_0_THEN_credits_0_re_ETC___d771 :
	       NOT_flitBuffers_4_notEmpty_BIT_1_0_53_OR_IF_ou_ETC___d754 &&
	       IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_NOT_IF__ETC___d2420 &&
	       IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_IF_outP_ETC___d2387 ;
  assign IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_IF_IF_o_ETC___d1916 =
	     flitBuffers_4$notEmpty[1] ?
	       IF_IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_cr_ETC___d732 :
	       IF_flitBuffers_4_notEmpty_BIT_2_8_THEN_IF_IF_o_ETC___d1917 ;
  assign IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_IF_IF_o_ETC___d2355 =
	     flitBuffers_4$notEmpty[1] ?
	       IF_IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_cr_ETC___d93 :
	       IF_flitBuffers_4_notEmpty_BIT_2_8_THEN_IF_IF_o_ETC___d2354 ;
  assign IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_IF_outP_ETC___d2385 =
	     flitBuffers_4$notEmpty[1] ?
	       IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_credi_ETC___d757 :
	       flitBuffers_4_notEmpty_BIT_2_8_AND_NOT_IF_outP_ETC___d2384 ;
  assign IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_IF_outP_ETC___d2387 =
	     flitBuffers_4$notEmpty[1] ?
	       IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_credi_ETC___d769 :
	       NOT_flitBuffers_4_notEmpty_BIT_2_8_65_OR_IF_ou_ETC___d2386 ;
  assign IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_NOT_IF__ETC___d2402 =
	     flitBuffers_4$notEmpty[1] ?
	       NOT_IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_c_ETC___d1378 :
	       IF_flitBuffers_4_notEmpty_BIT_2_8_THEN_NOT_IF__ETC___d2401 ;
  assign IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_NOT_IF__ETC___d2420 =
	     flitBuffers_4$notEmpty[1] ?
	       NOT_IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_c_ETC___d767 :
	       NOT_flitBuffers_4_notEmpty_BIT_2_8_65_OR_IF_ou_ETC___d2386 ;
  assign IF_flitBuffers_4_notEmpty_BIT_2_8_THEN_IF_IF_o_ETC___d1917 =
	     flitBuffers_4$notEmpty[2] ?
	       IF_IF_outPortFIFOs_4_2_first__9_EQ_0_0_THEN_cr_ETC___d730 :
	       2'd3 ;
  assign IF_flitBuffers_4_notEmpty_BIT_2_8_THEN_IF_IF_o_ETC___d2354 =
	     flitBuffers_4$notEmpty[2] ?
	       IF_IF_outPortFIFOs_4_2_first__9_EQ_0_0_THEN_cr_ETC___d89 :
	       { flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d76,
		 flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d78,
		 flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d80,
		 flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d83,
		 flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d85 } ;
  assign IF_flitBuffers_4_notEmpty_BIT_2_8_THEN_NOT_IF__ETC___d2401 =
	     flitBuffers_4$notEmpty[2] ?
	       NOT_IF_outPortFIFOs_4_2_first__9_EQ_0_0_THEN_c_ETC___d1376 :
	       flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d2400 ;
  assign IF_flitBuffers_notEmpty__34_BIT_0_35_THEN_NOT__ETC___d490 =
	     flitBuffers$notEmpty[0] ?
	       NOT_flitBuffers_notEmpty__34_BIT_1_48_81_OR_IF_ETC___d482 &&
	       IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_credi_ETC___d487 :
	       NOT_flitBuffers_notEmpty__34_BIT_1_48_81_OR_IF_ETC___d482 &&
	       IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_IF_o_ETC___d2369 ;
  assign IF_flitBuffers_notEmpty__34_BIT_0_35_THEN_NOT__ETC___d504 =
	     flitBuffers$notEmpty[0] ?
	       NOT_flitBuffers_notEmpty__34_BIT_1_48_81_OR_IF_ETC___d482 &&
	       IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_NOT__ETC___d2416 &&
	       IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_credi_ETC___d499 :
	       NOT_flitBuffers_notEmpty__34_BIT_1_48_81_OR_IF_ETC___d482 &&
	       IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_NOT__ETC___d2416 &&
	       IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_IF_o_ETC___d2371 ;
  assign IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_IF_I_ETC___d1924 =
	     flitBuffers$notEmpty[1] ?
	       IF_IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN__ETC___d460 :
	       IF_flitBuffers_notEmpty__34_BIT_2_61_THEN_IF_I_ETC___d1925 ;
  assign IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_IF_I_ETC___d2367 =
	     flitBuffers$notEmpty[1] ?
	       IF_IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN__ETC___d406 :
	       IF_flitBuffers_notEmpty__34_BIT_2_61_THEN_IF_I_ETC___d2366 ;
  assign IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_IF_o_ETC___d2369 =
	     flitBuffers$notEmpty[1] ?
	       IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN_cre_ETC___d485 :
	       flitBuffers_notEmpty__34_BIT_2_61_AND_NOT_IF_o_ETC___d2368 ;
  assign IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_IF_o_ETC___d2371 =
	     flitBuffers$notEmpty[1] ?
	       IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN_cre_ETC___d497 :
	       NOT_flitBuffers_notEmpty__34_BIT_2_61_93_OR_IF_ETC___d2370 ;
  assign IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_NOT__ETC___d2390 =
	     flitBuffers$notEmpty[1] ?
	       NOT_IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN_ETC___d1254 :
	       IF_flitBuffers_notEmpty__34_BIT_2_61_THEN_NOT__ETC___d2389 ;
  assign IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_NOT__ETC___d2416 =
	     flitBuffers$notEmpty[1] ?
	       NOT_IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN_ETC___d495 :
	       NOT_flitBuffers_notEmpty__34_BIT_2_61_93_OR_IF_ETC___d2370 ;
  assign IF_flitBuffers_notEmpty__34_BIT_2_61_THEN_IF_I_ETC___d1925 =
	     flitBuffers$notEmpty[2] ?
	       IF_IF_outPortFIFOs_0_2_first__62_EQ_0_63_THEN__ETC___d458 :
	       2'd3 ;
  assign IF_flitBuffers_notEmpty__34_BIT_2_61_THEN_IF_I_ETC___d2366 =
	     flitBuffers$notEmpty[2] ?
	       IF_IF_outPortFIFOs_0_2_first__62_EQ_0_63_THEN__ETC___d402 :
	       { flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d389,
		 flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d391,
		 flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d393,
		 flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d396,
		 flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d398 } ;
  assign IF_flitBuffers_notEmpty__34_BIT_2_61_THEN_NOT__ETC___d2389 =
	     flitBuffers$notEmpty[2] ?
	       NOT_IF_outPortFIFOs_0_2_first__62_EQ_0_63_THEN_ETC___d1252 :
	       flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d2388 ;
  assign IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN_cre_ETC___d485 =
	     CASE_outPortFIFOs_0_1first_credits_4_1_0_cred_ETC__q8 == 4'd0 &&
	     flitBuffers_notEmpty__34_BIT_2_61_AND_NOT_IF_o_ETC___d2368 ;
  assign IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN_cre_ETC___d497 =
	     CASE_outPortFIFOs_0_1first_credits_4_1_0_cred_ETC__q8 == 4'd0 &&
	     NOT_flitBuffers_notEmpty__34_BIT_2_61_93_OR_IF_ETC___d2370 ;
  assign IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_credi_ETC___d477 =
	     CASE_outPortFIFOs_0first_credits_4_0_credits__ETC__q7 == 4'd0 &&
	     flitBuffers_notEmpty__34_BIT_1_48_AND_NOT_IF_o_ETC___d476 ;
  assign IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_credi_ETC___d487 =
	     CASE_outPortFIFOs_0first_credits_4_0_credits__ETC__q7 == 4'd0 &&
	     IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_IF_o_ETC___d2369 ;
  assign IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_credi_ETC___d499 =
	     CASE_outPortFIFOs_0first_credits_4_0_credits__ETC__q7 == 4'd0 &&
	     IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_IF_o_ETC___d2371 ;
  assign IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN_cre_ETC___d553 =
	     CASE_outPortFIFOs_1_1first_credits_4_1_0_cred_ETC__q9 == 4'd0 &&
	     flitBuffers_1_notEmpty__56_BIT_2_83_AND_NOT_IF_ETC___d2372 ;
  assign IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN_cre_ETC___d565 =
	     CASE_outPortFIFOs_1_1first_credits_4_1_0_cred_ETC__q9 == 4'd0 &&
	     NOT_flitBuffers_1_notEmpty__56_BIT_2_83_61_OR__ETC___d2374 ;
  assign IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_credi_ETC___d545 =
	     CASE_outPortFIFOs_1first_credits_4_0_credits__ETC__q11 == 4'd0 &&
	     flitBuffers_1_notEmpty__56_BIT_1_70_AND_NOT_IF_ETC___d544 ;
  assign IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_credi_ETC___d555 =
	     CASE_outPortFIFOs_1first_credits_4_0_credits__ETC__q11 == 4'd0 &&
	     IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_IF_ETC___d2373 ;
  assign IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_credi_ETC___d567 =
	     CASE_outPortFIFOs_1first_credits_4_0_credits__ETC__q11 == 4'd0 &&
	     IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_IF_ETC___d2375 ;
  assign IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN_cre_ETC___d621 =
	     CASE_outPortFIFOs_2_1first_credits_4_1_0_cred_ETC__q14 == 4'd0 &&
	     flitBuffers_2_notEmpty__77_BIT_2_04_AND_NOT_IF_ETC___d2376 ;
  assign IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN_cre_ETC___d633 =
	     CASE_outPortFIFOs_2_1first_credits_4_1_0_cred_ETC__q14 == 4'd0 &&
	     NOT_flitBuffers_2_notEmpty__77_BIT_2_04_29_OR__ETC___d2378 ;
  assign IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_credi_ETC___d613 =
	     CASE_outPortFIFOs_2first_credits_4_0_credits__ETC__q13 == 4'd0 &&
	     flitBuffers_2_notEmpty__77_BIT_1_91_AND_NOT_IF_ETC___d612 ;
  assign IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_credi_ETC___d623 =
	     CASE_outPortFIFOs_2first_credits_4_0_credits__ETC__q13 == 4'd0 &&
	     IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_IF_ETC___d2377 ;
  assign IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_credi_ETC___d635 =
	     CASE_outPortFIFOs_2first_credits_4_0_credits__ETC__q13 == 4'd0 &&
	     IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_IF_ETC___d2379 ;
  assign IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN_cre_ETC___d689 =
	     CASE_outPortFIFOs_3_1first_credits_4_1_0_cred_ETC__q17 == 4'd0 &&
	     flitBuffers_3_notEmpty__9_BIT_2_26_AND_NOT_IF__ETC___d2380 ;
  assign IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN_cre_ETC___d701 =
	     CASE_outPortFIFOs_3_1first_credits_4_1_0_cred_ETC__q17 == 4'd0 &&
	     NOT_flitBuffers_3_notEmpty__9_BIT_2_26_97_OR_I_ETC___d2382 ;
  assign IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_credi_ETC___d681 =
	     CASE_outPortFIFOs_3first_credits_4_0_credits__ETC__q16 == 4'd0 &&
	     flitBuffers_3_notEmpty__9_BIT_1_13_AND_NOT_IF__ETC___d680 ;
  assign IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_credi_ETC___d691 =
	     CASE_outPortFIFOs_3first_credits_4_0_credits__ETC__q16 == 4'd0 &&
	     IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_IF__ETC___d2381 ;
  assign IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_credi_ETC___d703 =
	     CASE_outPortFIFOs_3first_credits_4_0_credits__ETC__q16 == 4'd0 &&
	     IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_IF__ETC___d2383 ;
  assign IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_credi_ETC___d757 =
	     CASE_outPortFIFOs_4_1first_credits_4_1_0_cred_ETC__q20 == 4'd0 &&
	     flitBuffers_4_notEmpty_BIT_2_8_AND_NOT_IF_outP_ETC___d2384 ;
  assign IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_credi_ETC___d769 =
	     CASE_outPortFIFOs_4_1first_credits_4_1_0_cred_ETC__q20 == 4'd0 &&
	     NOT_flitBuffers_4_notEmpty_BIT_2_8_65_OR_IF_ou_ETC___d2386 ;
  assign IF_outPortFIFOs_4_first_EQ_0_THEN_credits_0_re_ETC___d749 =
	     CASE_outPortFIFOs_4first_credits_4_0_credits__ETC__q19 == 4'd0 &&
	     flitBuffers_4_notEmpty_BIT_1_0_AND_NOT_IF_outP_ETC___d748 ;
  assign IF_outPortFIFOs_4_first_EQ_0_THEN_credits_0_re_ETC___d759 =
	     CASE_outPortFIFOs_4first_credits_4_0_credits__ETC__q19 == 4'd0 &&
	     IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_IF_outP_ETC___d2385 ;
  assign IF_outPortFIFOs_4_first_EQ_0_THEN_credits_0_re_ETC___d771 =
	     CASE_outPortFIFOs_4first_credits_4_0_credits__ETC__q19 == 4'd0 &&
	     IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_IF_outP_ETC___d2387 ;
  assign IF_outport_encoder_24_BIT_3_25_THEN_IF_outport_ETC___d1934 =
	     outport_encoder___d2298[3] ?
	       ((outport_encoder___d2298[2:0] == 3'd1) ?
		  outport_encoder___d2298[2:0] :
		  3'd0) :
	       3'd0 ;
  assign IF_outport_encoder_24_BIT_3_25_THEN_IF_outport_ETC___d1935 =
	     outport_encoder___d2298[3] ?
	       ((outport_encoder___d2298[2:0] == 3'd2) ? 3'd1 : 3'd0) :
	       3'd0 ;
  assign IF_outport_encoder_24_BIT_3_25_THEN_IF_outport_ETC___d1936 =
	     outport_encoder___d2298[3] ?
	       ((outport_encoder___d2298[2:0] == 3'd3) ? 3'd1 : 3'd0) :
	       3'd0 ;
  assign IF_outport_encoder_24_BIT_3_25_THEN_IF_outport_ETC___d1937 =
	     outport_encoder___d2298[3] ?
	       ((outport_encoder___d2298[2:0] == 3'd4) ? 3'd1 : 3'd0) :
	       3'd0 ;
  assign IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2062 =
	     outport_encoder___d2298[3] ?
	       outport_encoder___d2298[2:0] != 3'd0 &&
	       (!outport_encoder___d2299[3] ||
		outport_encoder___d2299[2:0] != 3'd0) :
	       !outport_encoder___d2299[3] ||
	       outport_encoder___d2299[2:0] != 3'd0 ;
  assign IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2072 =
	     outport_encoder___d2298[3] ?
	       outport_encoder___d2298[2:0] != 3'd1 &&
	       (!outport_encoder___d2299[3] ||
		outport_encoder___d2299[2:0] != 3'd1) :
	       !outport_encoder___d2299[3] ||
	       outport_encoder___d2299[2:0] != 3'd1 ;
  assign IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2080 =
	     outport_encoder___d2298[3] ?
	       outport_encoder___d2298[2:0] != 3'd2 &&
	       (!outport_encoder___d2299[3] ||
		outport_encoder___d2299[2:0] != 3'd2) :
	       !outport_encoder___d2299[3] ||
	       outport_encoder___d2299[2:0] != 3'd2 ;
  assign IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2088 =
	     outport_encoder___d2298[3] ?
	       outport_encoder___d2298[2:0] != 3'd3 &&
	       (!outport_encoder___d2299[3] ||
		outport_encoder___d2299[2:0] != 3'd3) :
	       !outport_encoder___d2299[3] ||
	       outport_encoder___d2299[2:0] != 3'd3 ;
  assign IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2096 =
	     outport_encoder___d2298[3] ?
	       outport_encoder___d2298[2:0] != 3'd4 &&
	       (!outport_encoder___d2299[3] ||
		outport_encoder___d2299[2:0] != 3'd4) :
	       !outport_encoder___d2299[3] ||
	       outport_encoder___d2299[2:0] != 3'd4 ;
  assign IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2329 =
	     outport_encoder___d2298[3] ?
	       outport_encoder___d2298[2:0] == 3'd0 ||
	       outport_encoder___d2299[3] &&
	       outport_encoder___d2299[2:0] == 3'd0 :
	       outport_encoder___d2299[3] &&
	       outport_encoder___d2299[2:0] == 3'd0 ;
  assign IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2334 =
	     outport_encoder___d2298[3] ?
	       outport_encoder___d2298[2:0] == 3'd1 ||
	       outport_encoder___d2299[3] &&
	       outport_encoder___d2299[2:0] == 3'd1 :
	       outport_encoder___d2299[3] &&
	       outport_encoder___d2299[2:0] == 3'd1 ;
  assign IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2339 =
	     outport_encoder___d2298[3] ?
	       outport_encoder___d2298[2:0] == 3'd2 ||
	       outport_encoder___d2299[3] &&
	       outport_encoder___d2299[2:0] == 3'd2 :
	       outport_encoder___d2299[3] &&
	       outport_encoder___d2299[2:0] == 3'd2 ;
  assign IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2344 =
	     outport_encoder___d2298[3] ?
	       outport_encoder___d2298[2:0] == 3'd3 ||
	       outport_encoder___d2299[3] &&
	       outport_encoder___d2299[2:0] == 3'd3 :
	       outport_encoder___d2299[3] &&
	       outport_encoder___d2299[2:0] == 3'd3 ;
  assign IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2349 =
	     outport_encoder___d2298[3] ?
	       outport_encoder___d2298[2:0] == 3'd4 ||
	       outport_encoder___d2299[3] &&
	       outport_encoder___d2299[2:0] == 3'd4 :
	       outport_encoder___d2299[3] &&
	       outport_encoder___d2299[2:0] == 3'd4 ;
  assign IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2179 =
	     outport_encoder___d2295[3] ?
	       outport_encoder___d2295[2:0] != 3'd0 &&
	       IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2314 :
	       IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2314 ;
  assign IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2268 =
	     outport_encoder___d2295[3] ?
	       outport_encoder___d2295[2:0] != 3'd0 &&
	       IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2318 :
	       IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2318 ;
  assign IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2269 =
	     outport_encoder___d2295[3] ?
	       outport_encoder___d2295[2:0] != 3'd0 &&
	       IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2320 :
	       IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2320 ;
  assign IF_outport_encoder_28_BIT_3_29_THEN_NOT_outpor_ETC___d2270 =
	     outport_encoder___d2295[3] ?
	       outport_encoder___d2295[2:0] != 3'd0 &&
	       outport_encoder___d2296[3] &&
	       outport_encoder___d2296[2:0] == 3'd0 :
	       outport_encoder___d2296[3] &&
	       outport_encoder___d2296[2:0] == 3'd0 ;
  assign IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2178 =
	     outport_encoder___d2295[3] ?
	       outport_encoder___d2295[2:0] == 3'd0 ||
	       IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2331 :
	       IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2331 ;
  assign IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2188 =
	     outport_encoder___d2295[3] ?
	       outport_encoder___d2295[2:0] == 3'd1 ||
	       IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2336 :
	       IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2336 ;
  assign IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2190 =
	     outport_encoder___d2295[3] ?
	       outport_encoder___d2295[2:0] == 3'd2 ||
	       IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2341 :
	       IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2341 ;
  assign IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2192 =
	     outport_encoder___d2295[3] ?
	       outport_encoder___d2295[2:0] == 3'd3 ||
	       IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2346 :
	       IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2346 ;
  assign IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2194 =
	     outport_encoder___d2295[3] ?
	       outport_encoder___d2295[2:0] == 3'd4 ||
	       IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2351 :
	       IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2351 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_IF_outport_ETC___d1926 =
	     outport_encoder___d2296[3] ?
	       ((outport_encoder___d2296[2:0] == 3'd1) ?
		  3'd3 :
		  IF_outport_encoder_92_BIT_3_93_THEN_IF_outport_ETC___d1930) :
	       IF_outport_encoder_92_BIT_3_93_THEN_IF_outport_ETC___d1930 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_IF_outport_ETC___d1927 =
	     outport_encoder___d2296[3] ?
	       ((outport_encoder___d2296[2:0] == 3'd2) ?
		  3'd3 :
		  IF_outport_encoder_92_BIT_3_93_THEN_IF_outport_ETC___d1931) :
	       IF_outport_encoder_92_BIT_3_93_THEN_IF_outport_ETC___d1931 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_IF_outport_ETC___d1928 =
	     outport_encoder___d2296[3] ?
	       ((outport_encoder___d2296[2:0] == 3'd3) ?
		  outport_encoder___d2296[2:0] :
		  IF_outport_encoder_92_BIT_3_93_THEN_IF_outport_ETC___d1932) :
	       IF_outport_encoder_92_BIT_3_93_THEN_IF_outport_ETC___d1932 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_IF_outport_ETC___d1929 =
	     outport_encoder___d2296[3] ?
	       ((outport_encoder___d2296[2:0] == 3'd4) ?
		  3'd3 :
		  IF_outport_encoder_92_BIT_3_93_THEN_IF_outport_ETC___d1933) :
	       IF_outport_encoder_92_BIT_3_93_THEN_IF_outport_ETC___d1933 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2283 =
	     outport_encoder___d2296[3] ?
	       outport_encoder___d2296[2:0] != 3'd0 &&
	       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2059 :
	       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2059 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2284 =
	     outport_encoder___d2296[3] ?
	       outport_encoder___d2296[2:0] != 3'd1 &&
	       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2070 :
	       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2070 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2285 =
	     outport_encoder___d2296[3] ?
	       outport_encoder___d2296[2:0] != 3'd2 &&
	       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2078 :
	       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2078 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2286 =
	     outport_encoder___d2296[3] ?
	       outport_encoder___d2296[2:0] != 3'd3 &&
	       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2086 :
	       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2086 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2287 =
	     outport_encoder___d2296[3] ?
	       outport_encoder___d2296[2:0] != 3'd4 &&
	       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2094 :
	       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2094 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2314 =
	     outport_encoder___d2296[3] ?
	       outport_encoder___d2296[2:0] != 3'd0 &&
	       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2312 :
	       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2312 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2318 =
	     outport_encoder___d2296[3] ?
	       outport_encoder___d2296[2:0] != 3'd0 &&
	       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2317 :
	       IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2317 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2320 =
	     outport_encoder___d2296[3] ?
	       outport_encoder___d2296[2:0] != 3'd0 &&
	       outport_encoder___d2297[3] &&
	       outport_encoder___d2297[2:0] == 3'd0 :
	       outport_encoder___d2297[3] &&
	       outport_encoder___d2297[2:0] == 3'd0 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2331 =
	     outport_encoder___d2296[3] ?
	       outport_encoder___d2296[2:0] == 3'd0 ||
	       IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2330 :
	       IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2330 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2336 =
	     outport_encoder___d2296[3] ?
	       outport_encoder___d2296[2:0] == 3'd1 ||
	       IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2335 :
	       IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2335 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2341 =
	     outport_encoder___d2296[3] ?
	       outport_encoder___d2296[2:0] == 3'd2 ||
	       IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2340 :
	       IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2340 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2346 =
	     outport_encoder___d2296[3] ?
	       outport_encoder___d2296[2:0] == 3'd3 ||
	       IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2345 :
	       IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2345 ;
  assign IF_outport_encoder_60_BIT_3_61_THEN_outport_en_ETC___d2351 =
	     outport_encoder___d2296[3] ?
	       outport_encoder___d2296[2:0] == 3'd4 ||
	       IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2350 :
	       IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2350 ;
  assign IF_outport_encoder_92_BIT_3_93_THEN_IF_outport_ETC___d1930 =
	     outport_encoder___d2297[3] ?
	       ((outport_encoder___d2297[2:0] == 3'd1) ?
		  3'd2 :
		  IF_outport_encoder_24_BIT_3_25_THEN_IF_outport_ETC___d1934) :
	       IF_outport_encoder_24_BIT_3_25_THEN_IF_outport_ETC___d1934 ;
  assign IF_outport_encoder_92_BIT_3_93_THEN_IF_outport_ETC___d1931 =
	     outport_encoder___d2297[3] ?
	       ((outport_encoder___d2297[2:0] == 3'd2) ?
		  outport_encoder___d2297[2:0] :
		  IF_outport_encoder_24_BIT_3_25_THEN_IF_outport_ETC___d1935) :
	       IF_outport_encoder_24_BIT_3_25_THEN_IF_outport_ETC___d1935 ;
  assign IF_outport_encoder_92_BIT_3_93_THEN_IF_outport_ETC___d1932 =
	     outport_encoder___d2297[3] ?
	       ((outport_encoder___d2297[2:0] == 3'd3) ?
		  3'd2 :
		  IF_outport_encoder_24_BIT_3_25_THEN_IF_outport_ETC___d1936) :
	       IF_outport_encoder_24_BIT_3_25_THEN_IF_outport_ETC___d1936 ;
  assign IF_outport_encoder_92_BIT_3_93_THEN_IF_outport_ETC___d1933 =
	     outport_encoder___d2297[3] ?
	       ((outport_encoder___d2297[2:0] == 3'd4) ?
		  3'd2 :
		  IF_outport_encoder_24_BIT_3_25_THEN_IF_outport_ETC___d1937) :
	       IF_outport_encoder_24_BIT_3_25_THEN_IF_outport_ETC___d1937 ;
  assign IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2059 =
	     outport_encoder___d2297[3] ?
	       outport_encoder___d2297[2:0] != 3'd0 &&
	       IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2062 :
	       IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2062 ;
  assign IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2070 =
	     outport_encoder___d2297[3] ?
	       outport_encoder___d2297[2:0] != 3'd1 &&
	       IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2072 :
	       IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2072 ;
  assign IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2078 =
	     outport_encoder___d2297[3] ?
	       outport_encoder___d2297[2:0] != 3'd2 &&
	       IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2080 :
	       IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2080 ;
  assign IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2086 =
	     outport_encoder___d2297[3] ?
	       outport_encoder___d2297[2:0] != 3'd3 &&
	       IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2088 :
	       IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2088 ;
  assign IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2094 =
	     outport_encoder___d2297[3] ?
	       outport_encoder___d2297[2:0] != 3'd4 &&
	       IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2096 :
	       IF_outport_encoder_24_BIT_3_25_THEN_NOT_outpor_ETC___d2096 ;
  assign IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2312 =
	     outport_encoder___d2297[3] ?
	       outport_encoder___d2297[2:0] != 3'd0 &&
	       (!outport_encoder___d2298[3] ||
		outport_encoder___d2298[2:0] != 3'd0) :
	       !outport_encoder___d2298[3] ||
	       outport_encoder___d2298[2:0] != 3'd0 ;
  assign IF_outport_encoder_92_BIT_3_93_THEN_NOT_outpor_ETC___d2317 =
	     outport_encoder___d2297[3] ?
	       outport_encoder___d2297[2:0] != 3'd0 &&
	       outport_encoder___d2298[3] &&
	       outport_encoder___d2298[2:0] == 3'd0 :
	       outport_encoder___d2298[3] &&
	       outport_encoder___d2298[2:0] == 3'd0 ;
  assign IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2330 =
	     outport_encoder___d2297[3] ?
	       outport_encoder___d2297[2:0] == 3'd0 ||
	       IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2329 :
	       IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2329 ;
  assign IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2335 =
	     outport_encoder___d2297[3] ?
	       outport_encoder___d2297[2:0] == 3'd1 ||
	       IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2334 :
	       IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2334 ;
  assign IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2340 =
	     outport_encoder___d2297[3] ?
	       outport_encoder___d2297[2:0] == 3'd2 ||
	       IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2339 :
	       IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2339 ;
  assign IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2345 =
	     outport_encoder___d2297[3] ?
	       outport_encoder___d2297[2:0] == 3'd3 ||
	       IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2344 :
	       IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2344 ;
  assign IF_outport_encoder_92_BIT_3_93_THEN_outport_en_ETC___d2350 =
	     outport_encoder___d2297[3] ?
	       outport_encoder___d2297[2:0] == 3'd4 ||
	       IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2349 :
	       IF_outport_encoder_24_BIT_3_25_THEN_outport_en_ETC___d2349 ;
  assign NOT_IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN_ETC___d1254 =
	     CASE_outPortFIFOs_0_1first_credits_4_1_0_cred_ETC__q8 != 4'd0 ||
	     IF_flitBuffers_notEmpty__34_BIT_2_61_THEN_NOT__ETC___d2389 ;
  assign NOT_IF_outPortFIFOs_0_1_first__49_EQ_0_50_THEN_ETC___d495 =
	     CASE_outPortFIFOs_0_1first_credits_4_1_0_cred_ETC__q8 != 4'd0 ||
	     NOT_flitBuffers_notEmpty__34_BIT_2_61_93_OR_IF_ETC___d2370 ;
  assign NOT_IF_outPortFIFOs_0_2_first__62_EQ_0_63_THEN_ETC___d1252 =
	     CASE_outPortFIFOs_0_2first_credits_4_2_0_cred_ETC__q6 != 4'd0 ||
	     flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d2388 ;
  assign NOT_IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_c_ETC___d1256 =
	     CASE_outPortFIFOs_0first_credits_4_0_credits__ETC__q7 != 4'd0 ||
	     IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_NOT__ETC___d2390 ;
  assign NOT_IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN_ETC___d1285 =
	     CASE_outPortFIFOs_1_1first_credits_4_1_0_cred_ETC__q9 != 4'd0 ||
	     IF_flitBuffers_1_notEmpty__56_BIT_2_83_THEN_NO_ETC___d2392 ;
  assign NOT_IF_outPortFIFOs_1_1_first__71_EQ_0_72_THEN_ETC___d563 =
	     CASE_outPortFIFOs_1_1first_credits_4_1_0_cred_ETC__q9 != 4'd0 ||
	     NOT_flitBuffers_1_notEmpty__56_BIT_2_83_61_OR__ETC___d2374 ;
  assign NOT_IF_outPortFIFOs_1_2_first__84_EQ_0_85_THEN_ETC___d1283 =
	     CASE_outPortFIFOs_1_2first_credits_4_2_0_cred_ETC__q10 != 4'd0 ||
	     flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d2391 ;
  assign NOT_IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_c_ETC___d1287 =
	     CASE_outPortFIFOs_1first_credits_4_0_credits__ETC__q11 != 4'd0 ||
	     IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_NO_ETC___d2393 ;
  assign NOT_IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN_ETC___d1316 =
	     CASE_outPortFIFOs_2_1first_credits_4_1_0_cred_ETC__q14 != 4'd0 ||
	     IF_flitBuffers_2_notEmpty__77_BIT_2_04_THEN_NO_ETC___d2395 ;
  assign NOT_IF_outPortFIFOs_2_1_first__92_EQ_0_93_THEN_ETC___d631 =
	     CASE_outPortFIFOs_2_1first_credits_4_1_0_cred_ETC__q14 != 4'd0 ||
	     NOT_flitBuffers_2_notEmpty__77_BIT_2_04_29_OR__ETC___d2378 ;
  assign NOT_IF_outPortFIFOs_2_2_first__05_EQ_0_06_THEN_ETC___d1314 =
	     CASE_outPortFIFOs_2_2first_credits_4_2_0_cred_ETC__q12 != 4'd0 ||
	     flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d2394 ;
  assign NOT_IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_c_ETC___d1318 =
	     CASE_outPortFIFOs_2first_credits_4_0_credits__ETC__q13 != 4'd0 ||
	     IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_NO_ETC___d2396 ;
  assign NOT_IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN_ETC___d1347 =
	     CASE_outPortFIFOs_3_1first_credits_4_1_0_cred_ETC__q17 != 4'd0 ||
	     IF_flitBuffers_3_notEmpty__9_BIT_2_26_THEN_NOT_ETC___d2398 ;
  assign NOT_IF_outPortFIFOs_3_1_first__14_EQ_0_15_THEN_ETC___d699 =
	     CASE_outPortFIFOs_3_1first_credits_4_1_0_cred_ETC__q17 != 4'd0 ||
	     NOT_flitBuffers_3_notEmpty__9_BIT_2_26_97_OR_I_ETC___d2382 ;
  assign NOT_IF_outPortFIFOs_3_2_first__27_EQ_0_28_THEN_ETC___d1345 =
	     CASE_outPortFIFOs_3_2first_credits_4_2_0_cred_ETC__q15 != 4'd0 ||
	     flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d2397 ;
  assign NOT_IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_c_ETC___d1349 =
	     CASE_outPortFIFOs_3first_credits_4_0_credits__ETC__q16 != 4'd0 ||
	     IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_NOT_ETC___d2399 ;
  assign NOT_IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_c_ETC___d1378 =
	     CASE_outPortFIFOs_4_1first_credits_4_1_0_cred_ETC__q20 != 4'd0 ||
	     IF_flitBuffers_4_notEmpty_BIT_2_8_THEN_NOT_IF__ETC___d2401 ;
  assign NOT_IF_outPortFIFOs_4_1_first__1_EQ_0_2_THEN_c_ETC___d767 =
	     CASE_outPortFIFOs_4_1first_credits_4_1_0_cred_ETC__q20 != 4'd0 ||
	     NOT_flitBuffers_4_notEmpty_BIT_2_8_65_OR_IF_ou_ETC___d2386 ;
  assign NOT_IF_outPortFIFOs_4_2_first__9_EQ_0_0_THEN_c_ETC___d1376 =
	     CASE_outPortFIFOs_4_2first_credits_4_2_0_cred_ETC__q18 != 4'd0 ||
	     flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d2400 ;
  assign NOT_IF_outPortFIFOs_4_first_EQ_0_THEN_credits__ETC___d1380 =
	     CASE_outPortFIFOs_4first_credits_4_0_credits__ETC__q19 != 4'd0 ||
	     IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_NOT_IF__ETC___d2402 ;
  assign NOT_flitBuffers_1_notEmpty__56_BIT_0_57_41_OR__ETC___d542 =
	     !flitBuffers_1$notEmpty[0] ||
	     CASE_outPortFIFOs_1first_credits_4_0_credits__ETC__q11 == 4'd0 ;
  assign NOT_flitBuffers_1_notEmpty__56_BIT_0_57_41_OR__ETC___d547 =
	     NOT_flitBuffers_1_notEmpty__56_BIT_0_57_41_OR__ETC___d542 &&
	     (flitBuffers_1$notEmpty[0] ?
		IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_credi_ETC___d545 :
		flitBuffers_1_notEmpty__56_BIT_1_70_AND_NOT_IF_ETC___d544) ;
  assign NOT_flitBuffers_1_notEmpty__56_BIT_1_70_49_OR__ETC___d550 =
	     !flitBuffers_1$notEmpty[1] ||
	     CASE_outPortFIFOs_1_1first_credits_4_1_0_cred_ETC__q9 == 4'd0 ;
  assign NOT_flitBuffers_1_notEmpty__56_BIT_2_83_61_OR__ETC___d2374 =
	     !flitBuffers_1$notEmpty[2] ||
	     CASE_outPortFIFOs_1_2first_credits_4_2_0_cred_ETC__q10 == 4'd0 ;
  assign NOT_flitBuffers_2_notEmpty__77_BIT_0_78_09_OR__ETC___d610 =
	     !flitBuffers_2$notEmpty[0] ||
	     CASE_outPortFIFOs_2first_credits_4_0_credits__ETC__q13 == 4'd0 ;
  assign NOT_flitBuffers_2_notEmpty__77_BIT_0_78_09_OR__ETC___d615 =
	     NOT_flitBuffers_2_notEmpty__77_BIT_0_78_09_OR__ETC___d610 &&
	     (flitBuffers_2$notEmpty[0] ?
		IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_credi_ETC___d613 :
		flitBuffers_2_notEmpty__77_BIT_1_91_AND_NOT_IF_ETC___d612) ;
  assign NOT_flitBuffers_2_notEmpty__77_BIT_1_91_17_OR__ETC___d618 =
	     !flitBuffers_2$notEmpty[1] ||
	     CASE_outPortFIFOs_2_1first_credits_4_1_0_cred_ETC__q14 == 4'd0 ;
  assign NOT_flitBuffers_2_notEmpty__77_BIT_2_04_29_OR__ETC___d2378 =
	     !flitBuffers_2$notEmpty[2] ||
	     CASE_outPortFIFOs_2_2first_credits_4_2_0_cred_ETC__q12 == 4'd0 ;
  assign NOT_flitBuffers_3_notEmpty__9_BIT_0_00_77_OR_I_ETC___d678 =
	     !flitBuffers_3$notEmpty[0] ||
	     CASE_outPortFIFOs_3first_credits_4_0_credits__ETC__q16 == 4'd0 ;
  assign NOT_flitBuffers_3_notEmpty__9_BIT_0_00_77_OR_I_ETC___d683 =
	     NOT_flitBuffers_3_notEmpty__9_BIT_0_00_77_OR_I_ETC___d678 &&
	     (flitBuffers_3$notEmpty[0] ?
		IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_credi_ETC___d681 :
		flitBuffers_3_notEmpty__9_BIT_1_13_AND_NOT_IF__ETC___d680) ;
  assign NOT_flitBuffers_3_notEmpty__9_BIT_1_13_85_OR_I_ETC___d686 =
	     !flitBuffers_3$notEmpty[1] ||
	     CASE_outPortFIFOs_3_1first_credits_4_1_0_cred_ETC__q17 == 4'd0 ;
  assign NOT_flitBuffers_3_notEmpty__9_BIT_2_26_97_OR_I_ETC___d2382 =
	     !flitBuffers_3$notEmpty[2] ||
	     CASE_outPortFIFOs_3_2first_credits_4_2_0_cred_ETC__q15 == 4'd0 ;
  assign NOT_flitBuffers_4_notEmpty_BIT_0_45_OR_IF_outP_ETC___d746 =
	     !flitBuffers_4$notEmpty[0] ||
	     CASE_outPortFIFOs_4first_credits_4_0_credits__ETC__q19 == 4'd0 ;
  assign NOT_flitBuffers_4_notEmpty_BIT_0_45_OR_IF_outP_ETC___d751 =
	     NOT_flitBuffers_4_notEmpty_BIT_0_45_OR_IF_outP_ETC___d746 &&
	     (flitBuffers_4$notEmpty[0] ?
		IF_outPortFIFOs_4_first_EQ_0_THEN_credits_0_re_ETC___d749 :
		flitBuffers_4_notEmpty_BIT_1_0_AND_NOT_IF_outP_ETC___d748) ;
  assign NOT_flitBuffers_4_notEmpty_BIT_1_0_53_OR_IF_ou_ETC___d754 =
	     !flitBuffers_4$notEmpty[1] ||
	     CASE_outPortFIFOs_4_1first_credits_4_1_0_cred_ETC__q20 == 4'd0 ;
  assign NOT_flitBuffers_4_notEmpty_BIT_2_8_65_OR_IF_ou_ETC___d2386 =
	     !flitBuffers_4$notEmpty[2] ||
	     CASE_outPortFIFOs_4_2first_credits_4_2_0_cred_ETC__q18 == 4'd0 ;
  assign NOT_flitBuffers_notEmpty__34_BIT_0_35_73_OR_IF_ETC___d474 =
	     !flitBuffers$notEmpty[0] ||
	     CASE_outPortFIFOs_0first_credits_4_0_credits__ETC__q7 == 4'd0 ;
  assign NOT_flitBuffers_notEmpty__34_BIT_0_35_73_OR_IF_ETC___d479 =
	     NOT_flitBuffers_notEmpty__34_BIT_0_35_73_OR_IF_ETC___d474 &&
	     (flitBuffers$notEmpty[0] ?
		IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_credi_ETC___d477 :
		flitBuffers_notEmpty__34_BIT_1_48_AND_NOT_IF_o_ETC___d476) ;
  assign NOT_flitBuffers_notEmpty__34_BIT_1_48_81_OR_IF_ETC___d482 =
	     !flitBuffers$notEmpty[1] ||
	     CASE_outPortFIFOs_0_1first_credits_4_1_0_cred_ETC__q8 == 4'd0 ;
  assign NOT_flitBuffers_notEmpty__34_BIT_2_61_93_OR_IF_ETC___d2370 =
	     !flitBuffers$notEmpty[2] ||
	     CASE_outPortFIFOs_0_2first_credits_4_2_0_cred_ETC__q6 == 4'd0 ;
  assign active_in__h82277 =
	     outport_encoder___d2295[3] ?
	       ((outport_encoder___d2295[2:0] == 3'd1) ?
		  3'd4 :
		  IF_outport_encoder_60_BIT_3_61_THEN_IF_outport_ETC___d1926) :
	       IF_outport_encoder_60_BIT_3_61_THEN_IF_outport_ETC___d1926 ;
  assign active_in__h84092 =
	     outport_encoder___d2295[3] ?
	       ((outport_encoder___d2295[2:0] == 3'd2) ?
		  3'd4 :
		  IF_outport_encoder_60_BIT_3_61_THEN_IF_outport_ETC___d1927) :
	       IF_outport_encoder_60_BIT_3_61_THEN_IF_outport_ETC___d1927 ;
  assign active_in__h85907 =
	     outport_encoder___d2295[3] ?
	       ((outport_encoder___d2295[2:0] == 3'd3) ?
		  3'd4 :
		  IF_outport_encoder_60_BIT_3_61_THEN_IF_outport_ETC___d1928) :
	       IF_outport_encoder_60_BIT_3_61_THEN_IF_outport_ETC___d1928 ;
  assign active_in__h87722 =
	     outport_encoder___d2295[3] ?
	       ((outport_encoder___d2295[2:0] == 3'd4) ?
		  outport_encoder___d2295[2:0] :
		  IF_outport_encoder_60_BIT_3_61_THEN_IF_outport_ETC___d1929) :
	       IF_outport_encoder_60_BIT_3_61_THEN_IF_outport_ETC___d1929 ;
  assign credits_0_1_read__3_PLUS_1___d1939 = credits_0_1 + 4'd1 ;
  assign credits_0_2_read__1_PLUS_1___d1940 = credits_0_2 + 4'd1 ;
  assign credits_0_3_read__9_PLUS_1___d1941 = credits_0_3 + 4'd1 ;
  assign credits_0_read_PLUS_1___d1938 = credits_0 + 4'd1 ;
  assign credits_1_1_read__5_PLUS_1___d1943 = credits_1_1 + 4'd1 ;
  assign credits_1_2_read__3_PLUS_1___d1944 = credits_1_2 + 4'd1 ;
  assign credits_1_3_read__1_PLUS_1___d1945 = credits_1_3 + 4'd1 ;
  assign credits_1_read_PLUS_1___d1942 = credits_1 + 4'd1 ;
  assign credits_2_1_read__7_PLUS_1___d1947 = credits_2_1 + 4'd1 ;
  assign credits_2_2_read__5_PLUS_1___d1948 = credits_2_2 + 4'd1 ;
  assign credits_2_3_read__3_PLUS_1___d1949 = credits_2_3 + 4'd1 ;
  assign credits_2_read_PLUS_1___d1946 = credits_2 + 4'd1 ;
  assign credits_3_1_read__9_PLUS_1___d1951 = credits_3_1 + 4'd1 ;
  assign credits_3_2_read__7_PLUS_1___d1952 = credits_3_2 + 4'd1 ;
  assign credits_3_3_read__5_PLUS_1___d1953 = credits_3_3 + 4'd1 ;
  assign credits_3_read__1_PLUS_1___d1950 = credits_3 + 4'd1 ;
  assign credits_4_1_read__1_PLUS_1___d1955 = credits_4_1 + 4'd1 ;
  assign credits_4_2_read__9_PLUS_1___d1956 = credits_4_2 + 4'd1 ;
  assign credits_4_3_read__7_PLUS_1___d1957 = credits_4_3 + 4'd1 ;
  assign credits_4_read__3_PLUS_1___d1954 = credits_4 + 4'd1 ;
  assign fifo_out__h51388 =
	     flitBuffers$notEmpty[0] ?
	       IF_IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_cr_ETC___d462 :
	       IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_IF_I_ETC___d1924 ;
  assign fifo_out__h52918 =
	     flitBuffers_1$notEmpty[0] ?
	       IF_IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_cr_ETC___d530 :
	       IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_IF_ETC___d1922 ;
  assign fifo_out__h53619 =
	     flitBuffers_2$notEmpty[0] ?
	       IF_IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_cr_ETC___d598 :
	       IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_IF_ETC___d1920 ;
  assign fifo_out__h54320 =
	     flitBuffers_3$notEmpty[0] ?
	       IF_IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_cr_ETC___d666 :
	       IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_IF__ETC___d1918 ;
  assign fifo_out__h55021 =
	     flitBuffers_4$notEmpty[0] ?
	       IF_IF_outPortFIFOs_4_first_EQ_0_THEN_credits_0_ETC___d734 :
	       IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_IF_IF_o_ETC___d1916 ;
  assign flitBuffers_1_notEmpty__56_BIT_0_57_AND_NOT_IF_ETC___d539 =
	     flitBuffers_1$notEmpty[0] &&
	     CASE_outPortFIFOs_1first_credits_4_0_credits__ETC__q11 != 4'd0 ;
  assign flitBuffers_1_notEmpty__56_BIT_1_70_AND_NOT_IF_ETC___d544 =
	     flitBuffers_1$notEmpty[1] &&
	     CASE_outPortFIFOs_1_1first_credits_4_1_0_cred_ETC__q9 != 4'd0 ;
  assign flitBuffers_1_notEmpty__56_BIT_2_83_AND_NOT_IF_ETC___d2372 =
	     flitBuffers_1$notEmpty[2] &&
	     CASE_outPortFIFOs_1_2first_credits_4_2_0_cred_ETC__q10 != 4'd0 ;
  assign flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d2391 =
	     flitBuffers_1$notEmpty[3] &&
	     CASE_outPortFIFOs_1_3first_credits_4_3_0_cred_ETC__q4 != 4'd0 ;
  assign flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d311 =
	     flitBuffers_1$notEmpty[3] &&
	     CASE_outPortFIFOs_1_3first_credits_4_3_0_cred_ETC__q4 != 4'd0 &&
	     outPortFIFOs_1_3$first == 3'd4 ;
  assign flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d313 =
	     flitBuffers_1$notEmpty[3] &&
	     CASE_outPortFIFOs_1_3first_credits_4_3_0_cred_ETC__q4 != 4'd0 &&
	     outPortFIFOs_1_3$first == 3'd3 ;
  assign flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d315 =
	     flitBuffers_1$notEmpty[3] &&
	     CASE_outPortFIFOs_1_3first_credits_4_3_0_cred_ETC__q4 != 4'd0 &&
	     outPortFIFOs_1_3$first == 3'd2 ;
  assign flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d318 =
	     flitBuffers_1$notEmpty[3] &&
	     CASE_outPortFIFOs_1_3first_credits_4_3_0_cred_ETC__q4 != 4'd0 &&
	     outPortFIFOs_1_3$first == 3'd1 ;
  assign flitBuffers_1_notEmpty__56_BIT_3_96_AND_NOT_IF_ETC___d320 =
	     flitBuffers_1$notEmpty[3] &&
	     CASE_outPortFIFOs_1_3first_credits_4_3_0_cred_ETC__q4 != 4'd0 &&
	     outPortFIFOs_1_3$first == 3'd0 ;
  assign flitBuffers_2_notEmpty__77_BIT_0_78_AND_NOT_IF_ETC___d607 =
	     flitBuffers_2$notEmpty[0] &&
	     CASE_outPortFIFOs_2first_credits_4_0_credits__ETC__q13 != 4'd0 ;
  assign flitBuffers_2_notEmpty__77_BIT_1_91_AND_NOT_IF_ETC___d612 =
	     flitBuffers_2$notEmpty[1] &&
	     CASE_outPortFIFOs_2_1first_credits_4_1_0_cred_ETC__q14 != 4'd0 ;
  assign flitBuffers_2_notEmpty__77_BIT_2_04_AND_NOT_IF_ETC___d2376 =
	     flitBuffers_2$notEmpty[2] &&
	     CASE_outPortFIFOs_2_2first_credits_4_2_0_cred_ETC__q12 != 4'd0 ;
  assign flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d232 =
	     flitBuffers_2$notEmpty[3] &&
	     CASE_outPortFIFOs_2_3first_credits_4_3_0_cred_ETC__q3 != 4'd0 &&
	     outPortFIFOs_2_3$first == 3'd4 ;
  assign flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d234 =
	     flitBuffers_2$notEmpty[3] &&
	     CASE_outPortFIFOs_2_3first_credits_4_3_0_cred_ETC__q3 != 4'd0 &&
	     outPortFIFOs_2_3$first == 3'd3 ;
  assign flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d236 =
	     flitBuffers_2$notEmpty[3] &&
	     CASE_outPortFIFOs_2_3first_credits_4_3_0_cred_ETC__q3 != 4'd0 &&
	     outPortFIFOs_2_3$first == 3'd2 ;
  assign flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d239 =
	     flitBuffers_2$notEmpty[3] &&
	     CASE_outPortFIFOs_2_3first_credits_4_3_0_cred_ETC__q3 != 4'd0 &&
	     outPortFIFOs_2_3$first == 3'd1 ;
  assign flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d2394 =
	     flitBuffers_2$notEmpty[3] &&
	     CASE_outPortFIFOs_2_3first_credits_4_3_0_cred_ETC__q3 != 4'd0 ;
  assign flitBuffers_2_notEmpty__77_BIT_3_17_AND_NOT_IF_ETC___d241 =
	     flitBuffers_2$notEmpty[3] &&
	     CASE_outPortFIFOs_2_3first_credits_4_3_0_cred_ETC__q3 != 4'd0 &&
	     outPortFIFOs_2_3$first == 3'd0 ;
  assign flitBuffers_3_notEmpty__9_BIT_0_00_AND_NOT_IF__ETC___d675 =
	     flitBuffers_3$notEmpty[0] &&
	     CASE_outPortFIFOs_3first_credits_4_0_credits__ETC__q16 != 4'd0 ;
  assign flitBuffers_3_notEmpty__9_BIT_1_13_AND_NOT_IF__ETC___d680 =
	     flitBuffers_3$notEmpty[1] &&
	     CASE_outPortFIFOs_3_1first_credits_4_1_0_cred_ETC__q17 != 4'd0 ;
  assign flitBuffers_3_notEmpty__9_BIT_2_26_AND_NOT_IF__ETC___d2380 =
	     flitBuffers_3$notEmpty[2] &&
	     CASE_outPortFIFOs_3_2first_credits_4_2_0_cred_ETC__q15 != 4'd0 ;
  assign flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d154 =
	     flitBuffers_3$notEmpty[3] &&
	     CASE_outPortFIFOs_3_3first_credits_4_3_0_cred_ETC__q2 != 4'd0 &&
	     outPortFIFOs_3_3$first == 3'd4 ;
  assign flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d156 =
	     flitBuffers_3$notEmpty[3] &&
	     CASE_outPortFIFOs_3_3first_credits_4_3_0_cred_ETC__q2 != 4'd0 &&
	     outPortFIFOs_3_3$first == 3'd3 ;
  assign flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d158 =
	     flitBuffers_3$notEmpty[3] &&
	     CASE_outPortFIFOs_3_3first_credits_4_3_0_cred_ETC__q2 != 4'd0 &&
	     outPortFIFOs_3_3$first == 3'd2 ;
  assign flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d161 =
	     flitBuffers_3$notEmpty[3] &&
	     CASE_outPortFIFOs_3_3first_credits_4_3_0_cred_ETC__q2 != 4'd0 &&
	     outPortFIFOs_3_3$first == 3'd1 ;
  assign flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d163 =
	     flitBuffers_3$notEmpty[3] &&
	     CASE_outPortFIFOs_3_3first_credits_4_3_0_cred_ETC__q2 != 4'd0 &&
	     outPortFIFOs_3_3$first == 3'd0 ;
  assign flitBuffers_3_notEmpty__9_BIT_3_39_AND_NOT_IF__ETC___d2397 =
	     flitBuffers_3$notEmpty[3] &&
	     CASE_outPortFIFOs_3_3first_credits_4_3_0_cred_ETC__q2 != 4'd0 ;
  assign flitBuffers_4_notEmpty_BIT_0_AND_NOT_IF_outPor_ETC___d743 =
	     flitBuffers_4$notEmpty[0] &&
	     CASE_outPortFIFOs_4first_credits_4_0_credits__ETC__q19 != 4'd0 ;
  assign flitBuffers_4_notEmpty_BIT_1_0_AND_NOT_IF_outP_ETC___d748 =
	     flitBuffers_4$notEmpty[1] &&
	     CASE_outPortFIFOs_4_1first_credits_4_1_0_cred_ETC__q20 != 4'd0 ;
  assign flitBuffers_4_notEmpty_BIT_2_8_AND_NOT_IF_outP_ETC___d2384 =
	     flitBuffers_4$notEmpty[2] &&
	     CASE_outPortFIFOs_4_2first_credits_4_2_0_cred_ETC__q18 != 4'd0 ;
  assign flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d2400 =
	     flitBuffers_4$notEmpty[3] &&
	     CASE_outPortFIFOs_4_3first_credits_4_3_0_cred_ETC__q1 != 4'd0 ;
  assign flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d76 =
	     flitBuffers_4$notEmpty[3] &&
	     CASE_outPortFIFOs_4_3first_credits_4_3_0_cred_ETC__q1 != 4'd0 &&
	     outPortFIFOs_4_3$first == 3'd4 ;
  assign flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d78 =
	     flitBuffers_4$notEmpty[3] &&
	     CASE_outPortFIFOs_4_3first_credits_4_3_0_cred_ETC__q1 != 4'd0 &&
	     outPortFIFOs_4_3$first == 3'd3 ;
  assign flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d80 =
	     flitBuffers_4$notEmpty[3] &&
	     CASE_outPortFIFOs_4_3first_credits_4_3_0_cred_ETC__q1 != 4'd0 &&
	     outPortFIFOs_4_3$first == 3'd2 ;
  assign flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d83 =
	     flitBuffers_4$notEmpty[3] &&
	     CASE_outPortFIFOs_4_3first_credits_4_3_0_cred_ETC__q1 != 4'd0 &&
	     outPortFIFOs_4_3$first == 3'd1 ;
  assign flitBuffers_4_notEmpty_BIT_3_6_AND_NOT_IF_outP_ETC___d85 =
	     flitBuffers_4$notEmpty[3] &&
	     CASE_outPortFIFOs_4_3first_credits_4_3_0_cred_ETC__q1 != 4'd0 &&
	     outPortFIFOs_4_3$first == 3'd0 ;
  assign flitBuffers_notEmpty__34_BIT_0_35_AND_NOT_IF_o_ETC___d471 =
	     flitBuffers$notEmpty[0] &&
	     CASE_outPortFIFOs_0first_credits_4_0_credits__ETC__q7 != 4'd0 ;
  assign flitBuffers_notEmpty__34_BIT_1_48_AND_NOT_IF_o_ETC___d476 =
	     flitBuffers$notEmpty[1] &&
	     CASE_outPortFIFOs_0_1first_credits_4_1_0_cred_ETC__q8 != 4'd0 ;
  assign flitBuffers_notEmpty__34_BIT_2_61_AND_NOT_IF_o_ETC___d2368 =
	     flitBuffers$notEmpty[2] &&
	     CASE_outPortFIFOs_0_2first_credits_4_2_0_cred_ETC__q6 != 4'd0 ;
  assign flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d2388 =
	     flitBuffers$notEmpty[3] &&
	     CASE_outPortFIFOs_0_3first_credits_4_3_0_cred_ETC__q5 != 4'd0 ;
  assign flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d389 =
	     flitBuffers$notEmpty[3] &&
	     CASE_outPortFIFOs_0_3first_credits_4_3_0_cred_ETC__q5 != 4'd0 &&
	     outPortFIFOs_0_3$first == 3'd4 ;
  assign flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d391 =
	     flitBuffers$notEmpty[3] &&
	     CASE_outPortFIFOs_0_3first_credits_4_3_0_cred_ETC__q5 != 4'd0 &&
	     outPortFIFOs_0_3$first == 3'd3 ;
  assign flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d393 =
	     flitBuffers$notEmpty[3] &&
	     CASE_outPortFIFOs_0_3first_credits_4_3_0_cred_ETC__q5 != 4'd0 &&
	     outPortFIFOs_0_3$first == 3'd2 ;
  assign flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d396 =
	     flitBuffers$notEmpty[3] &&
	     CASE_outPortFIFOs_0_3first_credits_4_3_0_cred_ETC__q5 != 4'd0 &&
	     outPortFIFOs_0_3$first == 3'd1 ;
  assign flitBuffers_notEmpty__34_BIT_3_74_AND_NOT_IF_o_ETC___d398 =
	     flitBuffers$notEmpty[3] &&
	     CASE_outPortFIFOs_0_3first_credits_4_3_0_cred_ETC__q5 != 4'd0 &&
	     outPortFIFOs_0_3$first == 3'd0 ;
  assign outport_encoder_24_BIT_3_25_AND_IF_flitBuffers_ETC___d1289 =
	     outport_encoder___d2298[3] &&
	     (flitBuffers_1$notEmpty[0] ?
		NOT_IF_outPortFIFOs_1_first__58_EQ_0_59_THEN_c_ETC___d1287 :
		IF_flitBuffers_1_notEmpty__56_BIT_1_70_THEN_NO_ETC___d2393) ;
  assign outport_encoder_28_BIT_3_29_AND_IF_flitBuffers_ETC___d1382 =
	     outport_encoder___d2295[3] &&
	     (flitBuffers_4$notEmpty[0] ?
		NOT_IF_outPortFIFOs_4_first_EQ_0_THEN_credits__ETC___d1380 :
		IF_flitBuffers_4_notEmpty_BIT_1_0_THEN_NOT_IF__ETC___d2402) ;
  assign outport_encoder_56_BIT_3_57_AND_IF_flitBuffers_ETC___d1258 =
	     outport_encoder___d2299[3] &&
	     (flitBuffers$notEmpty[0] ?
		NOT_IF_outPortFIFOs_0_first__36_EQ_0_37_THEN_c_ETC___d1256 :
		IF_flitBuffers_notEmpty__34_BIT_1_48_THEN_NOT__ETC___d2390) ;
  assign outport_encoder_60_BIT_3_61_AND_IF_flitBuffers_ETC___d1351 =
	     outport_encoder___d2296[3] &&
	     (flitBuffers_3$notEmpty[0] ?
		NOT_IF_outPortFIFOs_3_first__01_EQ_0_02_THEN_c_ETC___d1349 :
		IF_flitBuffers_3_notEmpty__9_BIT_1_13_THEN_NOT_ETC___d2399) ;
  assign outport_encoder_92_BIT_3_93_AND_IF_flitBuffers_ETC___d1320 =
	     outport_encoder___d2297[3] &&
	     (flitBuffers_2$notEmpty[0] ?
		NOT_IF_outPortFIFOs_2_first__79_EQ_0_80_THEN_c_ETC___d1318 :
		IF_flitBuffers_2_notEmpty__77_BIT_1_91_THEN_NO_ETC___d2396) ;
  assign x__h56835 = credits_0 - 4'd1 ;
  assign x__h57565 = credits_0_1 - 4'd1 ;
  assign x__h58295 = credits_0_2 - 4'd1 ;
  assign x__h59025 = credits_0_3 - 4'd1 ;
  assign x__h60072 = credits_1 - 4'd1 ;
  assign x__h60802 = credits_1_1 - 4'd1 ;
  assign x__h61532 = credits_1_2 - 4'd1 ;
  assign x__h62262 = credits_1_3 - 4'd1 ;
  assign x__h63309 = credits_2 - 4'd1 ;
  assign x__h64039 = credits_2_1 - 4'd1 ;
  assign x__h64769 = credits_2_2 - 4'd1 ;
  assign x__h65499 = credits_2_3 - 4'd1 ;
  assign x__h66546 = credits_3 - 4'd1 ;
  assign x__h67276 = credits_3_1 - 4'd1 ;
  assign x__h68006 = credits_3_2 - 4'd1 ;
  assign x__h68736 = credits_3_3 - 4'd1 ;
  assign x__h69783 = credits_4 - 4'd1 ;
  assign x__h70513 = credits_4_1 - 4'd1 ;
  assign x__h71243 = credits_4_2 - 4'd1 ;
  assign x__h71973 = credits_4_3 - 4'd1 ;
  always@(outPortFIFOs_4_3$first or
	  credits_4_3 or
	  credits_0_3 or credits_1_3 or credits_2_3 or credits_3_3)
  begin
    case (outPortFIFOs_4_3$first)
      3'd0:
	  CASE_outPortFIFOs_4_3first_credits_4_3_0_cred_ETC__q1 = credits_0_3;
      3'd1:
	  CASE_outPortFIFOs_4_3first_credits_4_3_0_cred_ETC__q1 = credits_1_3;
      3'd2:
	  CASE_outPortFIFOs_4_3first_credits_4_3_0_cred_ETC__q1 = credits_2_3;
      3'd3:
	  CASE_outPortFIFOs_4_3first_credits_4_3_0_cred_ETC__q1 = credits_3_3;
      default: CASE_outPortFIFOs_4_3first_credits_4_3_0_cred_ETC__q1 =
		   credits_4_3;
    endcase
  end
  always@(outPortFIFOs_3_3$first or
	  credits_4_3 or
	  credits_0_3 or credits_1_3 or credits_2_3 or credits_3_3)
  begin
    case (outPortFIFOs_3_3$first)
      3'd0:
	  CASE_outPortFIFOs_3_3first_credits_4_3_0_cred_ETC__q2 = credits_0_3;
      3'd1:
	  CASE_outPortFIFOs_3_3first_credits_4_3_0_cred_ETC__q2 = credits_1_3;
      3'd2:
	  CASE_outPortFIFOs_3_3first_credits_4_3_0_cred_ETC__q2 = credits_2_3;
      3'd3:
	  CASE_outPortFIFOs_3_3first_credits_4_3_0_cred_ETC__q2 = credits_3_3;
      default: CASE_outPortFIFOs_3_3first_credits_4_3_0_cred_ETC__q2 =
		   credits_4_3;
    endcase
  end
  always@(outPortFIFOs_2_3$first or
	  credits_4_3 or
	  credits_0_3 or credits_1_3 or credits_2_3 or credits_3_3)
  begin
    case (outPortFIFOs_2_3$first)
      3'd0:
	  CASE_outPortFIFOs_2_3first_credits_4_3_0_cred_ETC__q3 = credits_0_3;
      3'd1:
	  CASE_outPortFIFOs_2_3first_credits_4_3_0_cred_ETC__q3 = credits_1_3;
      3'd2:
	  CASE_outPortFIFOs_2_3first_credits_4_3_0_cred_ETC__q3 = credits_2_3;
      3'd3:
	  CASE_outPortFIFOs_2_3first_credits_4_3_0_cred_ETC__q3 = credits_3_3;
      default: CASE_outPortFIFOs_2_3first_credits_4_3_0_cred_ETC__q3 =
		   credits_4_3;
    endcase
  end
  always@(outPortFIFOs_1_3$first or
	  credits_4_3 or
	  credits_0_3 or credits_1_3 or credits_2_3 or credits_3_3)
  begin
    case (outPortFIFOs_1_3$first)
      3'd0:
	  CASE_outPortFIFOs_1_3first_credits_4_3_0_cred_ETC__q4 = credits_0_3;
      3'd1:
	  CASE_outPortFIFOs_1_3first_credits_4_3_0_cred_ETC__q4 = credits_1_3;
      3'd2:
	  CASE_outPortFIFOs_1_3first_credits_4_3_0_cred_ETC__q4 = credits_2_3;
      3'd3:
	  CASE_outPortFIFOs_1_3first_credits_4_3_0_cred_ETC__q4 = credits_3_3;
      default: CASE_outPortFIFOs_1_3first_credits_4_3_0_cred_ETC__q4 =
		   credits_4_3;
    endcase
  end
  always@(outPortFIFOs_0_3$first or
	  credits_4_3 or
	  credits_0_3 or credits_1_3 or credits_2_3 or credits_3_3)
  begin
    case (outPortFIFOs_0_3$first)
      3'd0:
	  CASE_outPortFIFOs_0_3first_credits_4_3_0_cred_ETC__q5 = credits_0_3;
      3'd1:
	  CASE_outPortFIFOs_0_3first_credits_4_3_0_cred_ETC__q5 = credits_1_3;
      3'd2:
	  CASE_outPortFIFOs_0_3first_credits_4_3_0_cred_ETC__q5 = credits_2_3;
      3'd3:
	  CASE_outPortFIFOs_0_3first_credits_4_3_0_cred_ETC__q5 = credits_3_3;
      default: CASE_outPortFIFOs_0_3first_credits_4_3_0_cred_ETC__q5 =
		   credits_4_3;
    endcase
  end
  always@(outPortFIFOs_0_2$first or
	  credits_4_2 or
	  credits_0_2 or credits_1_2 or credits_2_2 or credits_3_2)
  begin
    case (outPortFIFOs_0_2$first)
      3'd0:
	  CASE_outPortFIFOs_0_2first_credits_4_2_0_cred_ETC__q6 = credits_0_2;
      3'd1:
	  CASE_outPortFIFOs_0_2first_credits_4_2_0_cred_ETC__q6 = credits_1_2;
      3'd2:
	  CASE_outPortFIFOs_0_2first_credits_4_2_0_cred_ETC__q6 = credits_2_2;
      3'd3:
	  CASE_outPortFIFOs_0_2first_credits_4_2_0_cred_ETC__q6 = credits_3_2;
      default: CASE_outPortFIFOs_0_2first_credits_4_2_0_cred_ETC__q6 =
		   credits_4_2;
    endcase
  end
  always@(outPortFIFOs_0$first or
	  credits_4 or credits_0 or credits_1 or credits_2 or credits_3)
  begin
    case (outPortFIFOs_0$first)
      3'd0: CASE_outPortFIFOs_0first_credits_4_0_credits__ETC__q7 = credits_0;
      3'd1: CASE_outPortFIFOs_0first_credits_4_0_credits__ETC__q7 = credits_1;
      3'd2: CASE_outPortFIFOs_0first_credits_4_0_credits__ETC__q7 = credits_2;
      3'd3: CASE_outPortFIFOs_0first_credits_4_0_credits__ETC__q7 = credits_3;
      default: CASE_outPortFIFOs_0first_credits_4_0_credits__ETC__q7 =
		   credits_4;
    endcase
  end
  always@(outPortFIFOs_0_1$first or
	  credits_4_1 or
	  credits_0_1 or credits_1_1 or credits_2_1 or credits_3_1)
  begin
    case (outPortFIFOs_0_1$first)
      3'd0:
	  CASE_outPortFIFOs_0_1first_credits_4_1_0_cred_ETC__q8 = credits_0_1;
      3'd1:
	  CASE_outPortFIFOs_0_1first_credits_4_1_0_cred_ETC__q8 = credits_1_1;
      3'd2:
	  CASE_outPortFIFOs_0_1first_credits_4_1_0_cred_ETC__q8 = credits_2_1;
      3'd3:
	  CASE_outPortFIFOs_0_1first_credits_4_1_0_cred_ETC__q8 = credits_3_1;
      default: CASE_outPortFIFOs_0_1first_credits_4_1_0_cred_ETC__q8 =
		   credits_4_1;
    endcase
  end
  always@(outPortFIFOs_1_1$first or
	  credits_4_1 or
	  credits_0_1 or credits_1_1 or credits_2_1 or credits_3_1)
  begin
    case (outPortFIFOs_1_1$first)
      3'd0:
	  CASE_outPortFIFOs_1_1first_credits_4_1_0_cred_ETC__q9 = credits_0_1;
      3'd1:
	  CASE_outPortFIFOs_1_1first_credits_4_1_0_cred_ETC__q9 = credits_1_1;
      3'd2:
	  CASE_outPortFIFOs_1_1first_credits_4_1_0_cred_ETC__q9 = credits_2_1;
      3'd3:
	  CASE_outPortFIFOs_1_1first_credits_4_1_0_cred_ETC__q9 = credits_3_1;
      default: CASE_outPortFIFOs_1_1first_credits_4_1_0_cred_ETC__q9 =
		   credits_4_1;
    endcase
  end
  always@(outPortFIFOs_1_2$first or
	  credits_4_2 or
	  credits_0_2 or credits_1_2 or credits_2_2 or credits_3_2)
  begin
    case (outPortFIFOs_1_2$first)
      3'd0:
	  CASE_outPortFIFOs_1_2first_credits_4_2_0_cred_ETC__q10 =
	      credits_0_2;
      3'd1:
	  CASE_outPortFIFOs_1_2first_credits_4_2_0_cred_ETC__q10 =
	      credits_1_2;
      3'd2:
	  CASE_outPortFIFOs_1_2first_credits_4_2_0_cred_ETC__q10 =
	      credits_2_2;
      3'd3:
	  CASE_outPortFIFOs_1_2first_credits_4_2_0_cred_ETC__q10 =
	      credits_3_2;
      default: CASE_outPortFIFOs_1_2first_credits_4_2_0_cred_ETC__q10 =
		   credits_4_2;
    endcase
  end
  always@(outPortFIFOs_1$first or
	  credits_4 or credits_0 or credits_1 or credits_2 or credits_3)
  begin
    case (outPortFIFOs_1$first)
      3'd0:
	  CASE_outPortFIFOs_1first_credits_4_0_credits__ETC__q11 = credits_0;
      3'd1:
	  CASE_outPortFIFOs_1first_credits_4_0_credits__ETC__q11 = credits_1;
      3'd2:
	  CASE_outPortFIFOs_1first_credits_4_0_credits__ETC__q11 = credits_2;
      3'd3:
	  CASE_outPortFIFOs_1first_credits_4_0_credits__ETC__q11 = credits_3;
      default: CASE_outPortFIFOs_1first_credits_4_0_credits__ETC__q11 =
		   credits_4;
    endcase
  end
  always@(outPortFIFOs_2_2$first or
	  credits_4_2 or
	  credits_0_2 or credits_1_2 or credits_2_2 or credits_3_2)
  begin
    case (outPortFIFOs_2_2$first)
      3'd0:
	  CASE_outPortFIFOs_2_2first_credits_4_2_0_cred_ETC__q12 =
	      credits_0_2;
      3'd1:
	  CASE_outPortFIFOs_2_2first_credits_4_2_0_cred_ETC__q12 =
	      credits_1_2;
      3'd2:
	  CASE_outPortFIFOs_2_2first_credits_4_2_0_cred_ETC__q12 =
	      credits_2_2;
      3'd3:
	  CASE_outPortFIFOs_2_2first_credits_4_2_0_cred_ETC__q12 =
	      credits_3_2;
      default: CASE_outPortFIFOs_2_2first_credits_4_2_0_cred_ETC__q12 =
		   credits_4_2;
    endcase
  end
  always@(outPortFIFOs_2$first or
	  credits_4 or credits_0 or credits_1 or credits_2 or credits_3)
  begin
    case (outPortFIFOs_2$first)
      3'd0:
	  CASE_outPortFIFOs_2first_credits_4_0_credits__ETC__q13 = credits_0;
      3'd1:
	  CASE_outPortFIFOs_2first_credits_4_0_credits__ETC__q13 = credits_1;
      3'd2:
	  CASE_outPortFIFOs_2first_credits_4_0_credits__ETC__q13 = credits_2;
      3'd3:
	  CASE_outPortFIFOs_2first_credits_4_0_credits__ETC__q13 = credits_3;
      default: CASE_outPortFIFOs_2first_credits_4_0_credits__ETC__q13 =
		   credits_4;
    endcase
  end
  always@(outPortFIFOs_2_1$first or
	  credits_4_1 or
	  credits_0_1 or credits_1_1 or credits_2_1 or credits_3_1)
  begin
    case (outPortFIFOs_2_1$first)
      3'd0:
	  CASE_outPortFIFOs_2_1first_credits_4_1_0_cred_ETC__q14 =
	      credits_0_1;
      3'd1:
	  CASE_outPortFIFOs_2_1first_credits_4_1_0_cred_ETC__q14 =
	      credits_1_1;
      3'd2:
	  CASE_outPortFIFOs_2_1first_credits_4_1_0_cred_ETC__q14 =
	      credits_2_1;
      3'd3:
	  CASE_outPortFIFOs_2_1first_credits_4_1_0_cred_ETC__q14 =
	      credits_3_1;
      default: CASE_outPortFIFOs_2_1first_credits_4_1_0_cred_ETC__q14 =
		   credits_4_1;
    endcase
  end
  always@(outPortFIFOs_3_2$first or
	  credits_4_2 or
	  credits_0_2 or credits_1_2 or credits_2_2 or credits_3_2)
  begin
    case (outPortFIFOs_3_2$first)
      3'd0:
	  CASE_outPortFIFOs_3_2first_credits_4_2_0_cred_ETC__q15 =
	      credits_0_2;
      3'd1:
	  CASE_outPortFIFOs_3_2first_credits_4_2_0_cred_ETC__q15 =
	      credits_1_2;
      3'd2:
	  CASE_outPortFIFOs_3_2first_credits_4_2_0_cred_ETC__q15 =
	      credits_2_2;
      3'd3:
	  CASE_outPortFIFOs_3_2first_credits_4_2_0_cred_ETC__q15 =
	      credits_3_2;
      default: CASE_outPortFIFOs_3_2first_credits_4_2_0_cred_ETC__q15 =
		   credits_4_2;
    endcase
  end
  always@(outPortFIFOs_3$first or
	  credits_4 or credits_0 or credits_1 or credits_2 or credits_3)
  begin
    case (outPortFIFOs_3$first)
      3'd0:
	  CASE_outPortFIFOs_3first_credits_4_0_credits__ETC__q16 = credits_0;
      3'd1:
	  CASE_outPortFIFOs_3first_credits_4_0_credits__ETC__q16 = credits_1;
      3'd2:
	  CASE_outPortFIFOs_3first_credits_4_0_credits__ETC__q16 = credits_2;
      3'd3:
	  CASE_outPortFIFOs_3first_credits_4_0_credits__ETC__q16 = credits_3;
      default: CASE_outPortFIFOs_3first_credits_4_0_credits__ETC__q16 =
		   credits_4;
    endcase
  end
  always@(outPortFIFOs_3_1$first or
	  credits_4_1 or
	  credits_0_1 or credits_1_1 or credits_2_1 or credits_3_1)
  begin
    case (outPortFIFOs_3_1$first)
      3'd0:
	  CASE_outPortFIFOs_3_1first_credits_4_1_0_cred_ETC__q17 =
	      credits_0_1;
      3'd1:
	  CASE_outPortFIFOs_3_1first_credits_4_1_0_cred_ETC__q17 =
	      credits_1_1;
      3'd2:
	  CASE_outPortFIFOs_3_1first_credits_4_1_0_cred_ETC__q17 =
	      credits_2_1;
      3'd3:
	  CASE_outPortFIFOs_3_1first_credits_4_1_0_cred_ETC__q17 =
	      credits_3_1;
      default: CASE_outPortFIFOs_3_1first_credits_4_1_0_cred_ETC__q17 =
		   credits_4_1;
    endcase
  end
  always@(outPortFIFOs_4_2$first or
	  credits_4_2 or
	  credits_0_2 or credits_1_2 or credits_2_2 or credits_3_2)
  begin
    case (outPortFIFOs_4_2$first)
      3'd0:
	  CASE_outPortFIFOs_4_2first_credits_4_2_0_cred_ETC__q18 =
	      credits_0_2;
      3'd1:
	  CASE_outPortFIFOs_4_2first_credits_4_2_0_cred_ETC__q18 =
	      credits_1_2;
      3'd2:
	  CASE_outPortFIFOs_4_2first_credits_4_2_0_cred_ETC__q18 =
	      credits_2_2;
      3'd3:
	  CASE_outPortFIFOs_4_2first_credits_4_2_0_cred_ETC__q18 =
	      credits_3_2;
      default: CASE_outPortFIFOs_4_2first_credits_4_2_0_cred_ETC__q18 =
		   credits_4_2;
    endcase
  end
  always@(outPortFIFOs_4$first or
	  credits_4 or credits_0 or credits_1 or credits_2 or credits_3)
  begin
    case (outPortFIFOs_4$first)
      3'd0:
	  CASE_outPortFIFOs_4first_credits_4_0_credits__ETC__q19 = credits_0;
      3'd1:
	  CASE_outPortFIFOs_4first_credits_4_0_credits__ETC__q19 = credits_1;
      3'd2:
	  CASE_outPortFIFOs_4first_credits_4_0_credits__ETC__q19 = credits_2;
      3'd3:
	  CASE_outPortFIFOs_4first_credits_4_0_credits__ETC__q19 = credits_3;
      default: CASE_outPortFIFOs_4first_credits_4_0_credits__ETC__q19 =
		   credits_4;
    endcase
  end
  always@(outPortFIFOs_4_1$first or
	  credits_4_1 or
	  credits_0_1 or credits_1_1 or credits_2_1 or credits_3_1)
  begin
    case (outPortFIFOs_4_1$first)
      3'd0:
	  CASE_outPortFIFOs_4_1first_credits_4_1_0_cred_ETC__q20 =
	      credits_0_1;
      3'd1:
	  CASE_outPortFIFOs_4_1first_credits_4_1_0_cred_ETC__q20 =
	      credits_1_1;
      3'd2:
	  CASE_outPortFIFOs_4_1first_credits_4_1_0_cred_ETC__q20 =
	      credits_2_1;
      3'd3:
	  CASE_outPortFIFOs_4_1first_credits_4_1_0_cred_ETC__q20 =
	      credits_3_1;
      default: CASE_outPortFIFOs_4_1first_credits_4_1_0_cred_ETC__q20 =
		   credits_4_1;
    endcase
  end
  always@(active_in__h82277 or
	  outport_encoder___d2295 or
	  hasFlitsToSend_perIn_4$wget or
	  outport_encoder___d2299 or
	  hasFlitsToSend_perIn$wget or
	  outport_encoder___d2298 or
	  hasFlitsToSend_perIn_1$wget or
	  outport_encoder___d2297 or
	  hasFlitsToSend_perIn_2$wget or
	  outport_encoder___d2296 or hasFlitsToSend_perIn_3$wget)
  begin
    case (active_in__h82277)
      3'd0:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1610 =
	      outport_encoder___d2299[3] && hasFlitsToSend_perIn$wget[71];
      3'd1:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1610 =
	      outport_encoder___d2298[3] && hasFlitsToSend_perIn_1$wget[71];
      3'd2:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1610 =
	      outport_encoder___d2297[3] && hasFlitsToSend_perIn_2$wget[71];
      3'd3:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1610 =
	      outport_encoder___d2296[3] && hasFlitsToSend_perIn_3$wget[71];
      default: IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1610 =
		   active_in__h82277 != 3'd4 ||
		   outport_encoder___d2295[3] &&
		   hasFlitsToSend_perIn_4$wget[71];
    endcase
  end
  always@(active_in__h84092 or
	  outport_encoder___d2295 or
	  hasFlitsToSend_perIn_4$wget or
	  outport_encoder___d2299 or
	  hasFlitsToSend_perIn$wget or
	  outport_encoder___d2298 or
	  hasFlitsToSend_perIn_1$wget or
	  outport_encoder___d2297 or
	  hasFlitsToSend_perIn_2$wget or
	  outport_encoder___d2296 or hasFlitsToSend_perIn_3$wget)
  begin
    case (active_in__h84092)
      3'd0:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1695 =
	      outport_encoder___d2299[3] && hasFlitsToSend_perIn$wget[71];
      3'd1:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1695 =
	      outport_encoder___d2298[3] && hasFlitsToSend_perIn_1$wget[71];
      3'd2:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1695 =
	      outport_encoder___d2297[3] && hasFlitsToSend_perIn_2$wget[71];
      3'd3:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1695 =
	      outport_encoder___d2296[3] && hasFlitsToSend_perIn_3$wget[71];
      default: IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1695 =
		   active_in__h84092 != 3'd4 ||
		   outport_encoder___d2295[3] &&
		   hasFlitsToSend_perIn_4$wget[71];
    endcase
  end
  always@(active_in__h85907 or
	  outport_encoder___d2295 or
	  hasFlitsToSend_perIn_4$wget or
	  outport_encoder___d2299 or
	  hasFlitsToSend_perIn$wget or
	  outport_encoder___d2298 or
	  hasFlitsToSend_perIn_1$wget or
	  outport_encoder___d2297 or
	  hasFlitsToSend_perIn_2$wget or
	  outport_encoder___d2296 or hasFlitsToSend_perIn_3$wget)
  begin
    case (active_in__h85907)
      3'd0:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1780 =
	      outport_encoder___d2299[3] && hasFlitsToSend_perIn$wget[71];
      3'd1:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1780 =
	      outport_encoder___d2298[3] && hasFlitsToSend_perIn_1$wget[71];
      3'd2:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1780 =
	      outport_encoder___d2297[3] && hasFlitsToSend_perIn_2$wget[71];
      3'd3:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1780 =
	      outport_encoder___d2296[3] && hasFlitsToSend_perIn_3$wget[71];
      default: IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1780 =
		   active_in__h85907 != 3'd4 ||
		   outport_encoder___d2295[3] &&
		   hasFlitsToSend_perIn_4$wget[71];
    endcase
  end
  always@(active_in__h87722 or
	  outport_encoder___d2295 or
	  hasFlitsToSend_perIn_4$wget or
	  outport_encoder___d2299 or
	  hasFlitsToSend_perIn$wget or
	  outport_encoder___d2298 or
	  hasFlitsToSend_perIn_1$wget or
	  outport_encoder___d2297 or
	  hasFlitsToSend_perIn_2$wget or
	  outport_encoder___d2296 or hasFlitsToSend_perIn_3$wget)
  begin
    case (active_in__h87722)
      3'd0:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1865 =
	      outport_encoder___d2299[3] && hasFlitsToSend_perIn$wget[71];
      3'd1:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1865 =
	      outport_encoder___d2298[3] && hasFlitsToSend_perIn_1$wget[71];
      3'd2:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1865 =
	      outport_encoder___d2297[3] && hasFlitsToSend_perIn_2$wget[71];
      3'd3:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1865 =
	      outport_encoder___d2296[3] && hasFlitsToSend_perIn_3$wget[71];
      default: IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1865 =
		   active_in__h87722 != 3'd4 ||
		   outport_encoder___d2295[3] &&
		   hasFlitsToSend_perIn_4$wget[71];
    endcase
  end
  always@(active_in__h82277 or
	  outport_encoder___d2295 or
	  hasFlitsToSend_perIn_4$wget or
	  outport_encoder___d2299 or
	  hasFlitsToSend_perIn$wget or
	  outport_encoder___d2298 or
	  hasFlitsToSend_perIn_1$wget or
	  outport_encoder___d2297 or
	  hasFlitsToSend_perIn_2$wget or
	  outport_encoder___d2296 or hasFlitsToSend_perIn_3$wget)
  begin
    case (active_in__h82277)
      3'd0:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2448 =
	      !outport_encoder___d2299[3] || !hasFlitsToSend_perIn$wget[71];
      3'd1:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2448 =
	      !outport_encoder___d2298[3] || !hasFlitsToSend_perIn_1$wget[71];
      3'd2:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2448 =
	      !outport_encoder___d2297[3] || !hasFlitsToSend_perIn_2$wget[71];
      3'd3:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2448 =
	      !outport_encoder___d2296[3] || !hasFlitsToSend_perIn_3$wget[71];
      default: IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2448 =
		   active_in__h82277 == 3'd4 &&
		   (!outport_encoder___d2295[3] ||
		    !hasFlitsToSend_perIn_4$wget[71]);
    endcase
  end
  always@(active_in__h84092 or
	  outport_encoder___d2295 or
	  hasFlitsToSend_perIn_4$wget or
	  outport_encoder___d2299 or
	  hasFlitsToSend_perIn$wget or
	  outport_encoder___d2298 or
	  hasFlitsToSend_perIn_1$wget or
	  outport_encoder___d2297 or
	  hasFlitsToSend_perIn_2$wget or
	  outport_encoder___d2296 or hasFlitsToSend_perIn_3$wget)
  begin
    case (active_in__h84092)
      3'd0:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2450 =
	      !outport_encoder___d2299[3] || !hasFlitsToSend_perIn$wget[71];
      3'd1:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2450 =
	      !outport_encoder___d2298[3] || !hasFlitsToSend_perIn_1$wget[71];
      3'd2:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2450 =
	      !outport_encoder___d2297[3] || !hasFlitsToSend_perIn_2$wget[71];
      3'd3:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2450 =
	      !outport_encoder___d2296[3] || !hasFlitsToSend_perIn_3$wget[71];
      default: IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2450 =
		   active_in__h84092 == 3'd4 &&
		   (!outport_encoder___d2295[3] ||
		    !hasFlitsToSend_perIn_4$wget[71]);
    endcase
  end
  always@(active_in__h85907 or
	  outport_encoder___d2295 or
	  hasFlitsToSend_perIn_4$wget or
	  outport_encoder___d2299 or
	  hasFlitsToSend_perIn$wget or
	  outport_encoder___d2298 or
	  hasFlitsToSend_perIn_1$wget or
	  outport_encoder___d2297 or
	  hasFlitsToSend_perIn_2$wget or
	  outport_encoder___d2296 or hasFlitsToSend_perIn_3$wget)
  begin
    case (active_in__h85907)
      3'd0:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2452 =
	      !outport_encoder___d2299[3] || !hasFlitsToSend_perIn$wget[71];
      3'd1:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2452 =
	      !outport_encoder___d2298[3] || !hasFlitsToSend_perIn_1$wget[71];
      3'd2:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2452 =
	      !outport_encoder___d2297[3] || !hasFlitsToSend_perIn_2$wget[71];
      3'd3:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2452 =
	      !outport_encoder___d2296[3] || !hasFlitsToSend_perIn_3$wget[71];
      default: IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2452 =
		   active_in__h85907 == 3'd4 &&
		   (!outport_encoder___d2295[3] ||
		    !hasFlitsToSend_perIn_4$wget[71]);
    endcase
  end
  always@(active_in__h87722 or
	  outport_encoder___d2295 or
	  hasFlitsToSend_perIn_4$wget or
	  outport_encoder___d2299 or
	  hasFlitsToSend_perIn$wget or
	  outport_encoder___d2298 or
	  hasFlitsToSend_perIn_1$wget or
	  outport_encoder___d2297 or
	  hasFlitsToSend_perIn_2$wget or
	  outport_encoder___d2296 or hasFlitsToSend_perIn_3$wget)
  begin
    case (active_in__h87722)
      3'd0:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2454 =
	      !outport_encoder___d2299[3] || !hasFlitsToSend_perIn$wget[71];
      3'd1:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2454 =
	      !outport_encoder___d2298[3] || !hasFlitsToSend_perIn_1$wget[71];
      3'd2:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2454 =
	      !outport_encoder___d2297[3] || !hasFlitsToSend_perIn_2$wget[71];
      3'd3:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2454 =
	      !outport_encoder___d2296[3] || !hasFlitsToSend_perIn_3$wget[71];
      default: IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2454 =
		   active_in__h87722 == 3'd4 &&
		   (!outport_encoder___d2295[3] ||
		    !hasFlitsToSend_perIn_4$wget[71]);
    endcase
  end
  always@(active_in__h82277 or
	  hasFlitsToSend_perIn_4$wget or
	  hasFlitsToSend_perIn$wget or
	  hasFlitsToSend_perIn_1$wget or
	  hasFlitsToSend_perIn_2$wget or hasFlitsToSend_perIn_3$wget)
  begin
    case (active_in__h82277)
      3'd0:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1912 =
	      hasFlitsToSend_perIn$wget[65:64];
      3'd1:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1912 =
	      hasFlitsToSend_perIn_1$wget[65:64];
      3'd2:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1912 =
	      hasFlitsToSend_perIn_2$wget[65:64];
      3'd3:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1912 =
	      hasFlitsToSend_perIn_3$wget[65:64];
      default: IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1912 =
		   hasFlitsToSend_perIn_4$wget[65:64];
    endcase
  end
  always@(active_in__h84092 or
	  hasFlitsToSend_perIn_4$wget or
	  hasFlitsToSend_perIn$wget or
	  hasFlitsToSend_perIn_1$wget or
	  hasFlitsToSend_perIn_2$wget or hasFlitsToSend_perIn_3$wget)
  begin
    case (active_in__h84092)
      3'd0:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1913 =
	      hasFlitsToSend_perIn$wget[65:64];
      3'd1:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1913 =
	      hasFlitsToSend_perIn_1$wget[65:64];
      3'd2:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1913 =
	      hasFlitsToSend_perIn_2$wget[65:64];
      3'd3:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1913 =
	      hasFlitsToSend_perIn_3$wget[65:64];
      default: IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1913 =
		   hasFlitsToSend_perIn_4$wget[65:64];
    endcase
  end
  always@(active_in__h85907 or
	  hasFlitsToSend_perIn_4$wget or
	  hasFlitsToSend_perIn$wget or
	  hasFlitsToSend_perIn_1$wget or
	  hasFlitsToSend_perIn_2$wget or hasFlitsToSend_perIn_3$wget)
  begin
    case (active_in__h85907)
      3'd0:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1914 =
	      hasFlitsToSend_perIn$wget[65:64];
      3'd1:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1914 =
	      hasFlitsToSend_perIn_1$wget[65:64];
      3'd2:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1914 =
	      hasFlitsToSend_perIn_2$wget[65:64];
      3'd3:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1914 =
	      hasFlitsToSend_perIn_3$wget[65:64];
      default: IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1914 =
		   hasFlitsToSend_perIn_4$wget[65:64];
    endcase
  end
  always@(active_in__h87722 or
	  hasFlitsToSend_perIn_4$wget or
	  hasFlitsToSend_perIn$wget or
	  hasFlitsToSend_perIn_1$wget or
	  hasFlitsToSend_perIn_2$wget or hasFlitsToSend_perIn_3$wget)
  begin
    case (active_in__h87722)
      3'd0:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1915 =
	      hasFlitsToSend_perIn$wget[65:64];
      3'd1:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1915 =
	      hasFlitsToSend_perIn_1$wget[65:64];
      3'd2:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1915 =
	      hasFlitsToSend_perIn_2$wget[65:64];
      3'd3:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1915 =
	      hasFlitsToSend_perIn_3$wget[65:64];
      default: IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d1915 =
		   hasFlitsToSend_perIn_4$wget[65:64];
    endcase
  end
  always@(active_in__h82277 or
	  hasFlitsToSend_perIn_4$wget or
	  hasFlitsToSend_perIn$wget or
	  hasFlitsToSend_perIn_1$wget or
	  hasFlitsToSend_perIn_2$wget or hasFlitsToSend_perIn_3$wget)
  begin
    case (active_in__h82277)
      3'd0:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2412 =
	      hasFlitsToSend_perIn$wget[70:0];
      3'd1:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2412 =
	      hasFlitsToSend_perIn_1$wget[70:0];
      3'd2:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2412 =
	      hasFlitsToSend_perIn_2$wget[70:0];
      3'd3:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2412 =
	      hasFlitsToSend_perIn_3$wget[70:0];
      3'd4:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2412 =
	      hasFlitsToSend_perIn_4$wget[70:0];
      default: IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2412 =
		   hasFlitsToSend_perIn_4$wget[70:0];
    endcase
  end
  always@(active_in__h84092 or
	  hasFlitsToSend_perIn_4$wget or
	  hasFlitsToSend_perIn$wget or
	  hasFlitsToSend_perIn_1$wget or
	  hasFlitsToSend_perIn_2$wget or hasFlitsToSend_perIn_3$wget)
  begin
    case (active_in__h84092)
      3'd0:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2413 =
	      hasFlitsToSend_perIn$wget[70:0];
      3'd1:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2413 =
	      hasFlitsToSend_perIn_1$wget[70:0];
      3'd2:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2413 =
	      hasFlitsToSend_perIn_2$wget[70:0];
      3'd3:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2413 =
	      hasFlitsToSend_perIn_3$wget[70:0];
      3'd4:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2413 =
	      hasFlitsToSend_perIn_4$wget[70:0];
      default: IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2413 =
		   hasFlitsToSend_perIn_4$wget[70:0];
    endcase
  end
  always@(active_in__h85907 or
	  hasFlitsToSend_perIn_4$wget or
	  hasFlitsToSend_perIn$wget or
	  hasFlitsToSend_perIn_1$wget or
	  hasFlitsToSend_perIn_2$wget or hasFlitsToSend_perIn_3$wget)
  begin
    case (active_in__h85907)
      3'd0:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2414 =
	      hasFlitsToSend_perIn$wget[70:0];
      3'd1:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2414 =
	      hasFlitsToSend_perIn_1$wget[70:0];
      3'd2:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2414 =
	      hasFlitsToSend_perIn_2$wget[70:0];
      3'd3:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2414 =
	      hasFlitsToSend_perIn_3$wget[70:0];
      3'd4:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2414 =
	      hasFlitsToSend_perIn_4$wget[70:0];
      default: IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2414 =
		   hasFlitsToSend_perIn_4$wget[70:0];
    endcase
  end
  always@(active_in__h87722 or
	  hasFlitsToSend_perIn_4$wget or
	  hasFlitsToSend_perIn$wget or
	  hasFlitsToSend_perIn_1$wget or
	  hasFlitsToSend_perIn_2$wget or hasFlitsToSend_perIn_3$wget)
  begin
    case (active_in__h87722)
      3'd0:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2415 =
	      hasFlitsToSend_perIn$wget[70:0];
      3'd1:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2415 =
	      hasFlitsToSend_perIn_1$wget[70:0];
      3'd2:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2415 =
	      hasFlitsToSend_perIn_2$wget[70:0];
      3'd3:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2415 =
	      hasFlitsToSend_perIn_3$wget[70:0];
      3'd4:
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2415 =
	      hasFlitsToSend_perIn_4$wget[70:0];
      default: IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2415 =
		   hasFlitsToSend_perIn_4$wget[70:0];
    endcase
  end

  // handling of inlined registers

  always@(posedge CLK)
  begin
    if (!RST_N)
      begin
        activeVC_perIn_reg <= `BSV_ASSIGNMENT_DELAY
	    { 1'd0, 2'bxx /* unspecified value */  };
	activeVC_perIn_reg_1 <= `BSV_ASSIGNMENT_DELAY
	    { 1'd0, 2'bxx /* unspecified value */  };
	activeVC_perIn_reg_2 <= `BSV_ASSIGNMENT_DELAY
	    { 1'd0, 2'bxx /* unspecified value */  };
	activeVC_perIn_reg_3 <= `BSV_ASSIGNMENT_DELAY
	    { 1'd0, 2'bxx /* unspecified value */  };
	activeVC_perIn_reg_4 <= `BSV_ASSIGNMENT_DELAY
	    { 1'd0, 2'bxx /* unspecified value */  };
	credits_0 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_0_1 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_0_2 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_0_3 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_1 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_1_1 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_1_2 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_1_3 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_2 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_2_1 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_2_2 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_2_3 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_3 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_3_1 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_3_2 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_3_3 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_4 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_4_1 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_4_2 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	credits_4_3 <= `BSV_ASSIGNMENT_DELAY 4'd8;
	inPortVL_0 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_0_1 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_0_2 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_0_3 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_1 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_1_1 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_1_2 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_1_3 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_2 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_2_1 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_2_2 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_2_3 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_3 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_3_1 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_3_2 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_3_3 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_4 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_4_1 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_4_2 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	inPortVL_4_3 <= `BSV_ASSIGNMENT_DELAY 3'd0;
	lockedVL_0 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_0_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_0_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_0_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_1_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_1_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_1_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_2_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_2_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_2_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_3_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_3_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_3_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_4 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_4_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_4_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	lockedVL_4_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_0 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_0_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_0_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_0_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_0_4 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_1_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_1_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_1_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_1_4 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_2_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_2_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_2_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_2_4 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_3_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_3_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_3_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_3_4 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_4 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_4_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_4_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_4_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
	selectedIO_reg_4_4 <= `BSV_ASSIGNMENT_DELAY 1'd0;
      end
    else
      begin
        if (activeVC_perIn_reg$EN)
	  activeVC_perIn_reg <= `BSV_ASSIGNMENT_DELAY activeVC_perIn_reg$D_IN;
	if (activeVC_perIn_reg_1$EN)
	  activeVC_perIn_reg_1 <= `BSV_ASSIGNMENT_DELAY
	      activeVC_perIn_reg_1$D_IN;
	if (activeVC_perIn_reg_2$EN)
	  activeVC_perIn_reg_2 <= `BSV_ASSIGNMENT_DELAY
	      activeVC_perIn_reg_2$D_IN;
	if (activeVC_perIn_reg_3$EN)
	  activeVC_perIn_reg_3 <= `BSV_ASSIGNMENT_DELAY
	      activeVC_perIn_reg_3$D_IN;
	if (activeVC_perIn_reg_4$EN)
	  activeVC_perIn_reg_4 <= `BSV_ASSIGNMENT_DELAY
	      activeVC_perIn_reg_4$D_IN;
	if (credits_0$EN) credits_0 <= `BSV_ASSIGNMENT_DELAY credits_0$D_IN;
	if (credits_0_1$EN)
	  credits_0_1 <= `BSV_ASSIGNMENT_DELAY credits_0_1$D_IN;
	if (credits_0_2$EN)
	  credits_0_2 <= `BSV_ASSIGNMENT_DELAY credits_0_2$D_IN;
	if (credits_0_3$EN)
	  credits_0_3 <= `BSV_ASSIGNMENT_DELAY credits_0_3$D_IN;
	if (credits_1$EN) credits_1 <= `BSV_ASSIGNMENT_DELAY credits_1$D_IN;
	if (credits_1_1$EN)
	  credits_1_1 <= `BSV_ASSIGNMENT_DELAY credits_1_1$D_IN;
	if (credits_1_2$EN)
	  credits_1_2 <= `BSV_ASSIGNMENT_DELAY credits_1_2$D_IN;
	if (credits_1_3$EN)
	  credits_1_3 <= `BSV_ASSIGNMENT_DELAY credits_1_3$D_IN;
	if (credits_2$EN) credits_2 <= `BSV_ASSIGNMENT_DELAY credits_2$D_IN;
	if (credits_2_1$EN)
	  credits_2_1 <= `BSV_ASSIGNMENT_DELAY credits_2_1$D_IN;
	if (credits_2_2$EN)
	  credits_2_2 <= `BSV_ASSIGNMENT_DELAY credits_2_2$D_IN;
	if (credits_2_3$EN)
	  credits_2_3 <= `BSV_ASSIGNMENT_DELAY credits_2_3$D_IN;
	if (credits_3$EN) credits_3 <= `BSV_ASSIGNMENT_DELAY credits_3$D_IN;
	if (credits_3_1$EN)
	  credits_3_1 <= `BSV_ASSIGNMENT_DELAY credits_3_1$D_IN;
	if (credits_3_2$EN)
	  credits_3_2 <= `BSV_ASSIGNMENT_DELAY credits_3_2$D_IN;
	if (credits_3_3$EN)
	  credits_3_3 <= `BSV_ASSIGNMENT_DELAY credits_3_3$D_IN;
	if (credits_4$EN) credits_4 <= `BSV_ASSIGNMENT_DELAY credits_4$D_IN;
	if (credits_4_1$EN)
	  credits_4_1 <= `BSV_ASSIGNMENT_DELAY credits_4_1$D_IN;
	if (credits_4_2$EN)
	  credits_4_2 <= `BSV_ASSIGNMENT_DELAY credits_4_2$D_IN;
	if (credits_4_3$EN)
	  credits_4_3 <= `BSV_ASSIGNMENT_DELAY credits_4_3$D_IN;
	if (inPortVL_0$EN)
	  inPortVL_0 <= `BSV_ASSIGNMENT_DELAY inPortVL_0$D_IN;
	if (inPortVL_0_1$EN)
	  inPortVL_0_1 <= `BSV_ASSIGNMENT_DELAY inPortVL_0_1$D_IN;
	if (inPortVL_0_2$EN)
	  inPortVL_0_2 <= `BSV_ASSIGNMENT_DELAY inPortVL_0_2$D_IN;
	if (inPortVL_0_3$EN)
	  inPortVL_0_3 <= `BSV_ASSIGNMENT_DELAY inPortVL_0_3$D_IN;
	if (inPortVL_1$EN)
	  inPortVL_1 <= `BSV_ASSIGNMENT_DELAY inPortVL_1$D_IN;
	if (inPortVL_1_1$EN)
	  inPortVL_1_1 <= `BSV_ASSIGNMENT_DELAY inPortVL_1_1$D_IN;
	if (inPortVL_1_2$EN)
	  inPortVL_1_2 <= `BSV_ASSIGNMENT_DELAY inPortVL_1_2$D_IN;
	if (inPortVL_1_3$EN)
	  inPortVL_1_3 <= `BSV_ASSIGNMENT_DELAY inPortVL_1_3$D_IN;
	if (inPortVL_2$EN)
	  inPortVL_2 <= `BSV_ASSIGNMENT_DELAY inPortVL_2$D_IN;
	if (inPortVL_2_1$EN)
	  inPortVL_2_1 <= `BSV_ASSIGNMENT_DELAY inPortVL_2_1$D_IN;
	if (inPortVL_2_2$EN)
	  inPortVL_2_2 <= `BSV_ASSIGNMENT_DELAY inPortVL_2_2$D_IN;
	if (inPortVL_2_3$EN)
	  inPortVL_2_3 <= `BSV_ASSIGNMENT_DELAY inPortVL_2_3$D_IN;
	if (inPortVL_3$EN)
	  inPortVL_3 <= `BSV_ASSIGNMENT_DELAY inPortVL_3$D_IN;
	if (inPortVL_3_1$EN)
	  inPortVL_3_1 <= `BSV_ASSIGNMENT_DELAY inPortVL_3_1$D_IN;
	if (inPortVL_3_2$EN)
	  inPortVL_3_2 <= `BSV_ASSIGNMENT_DELAY inPortVL_3_2$D_IN;
	if (inPortVL_3_3$EN)
	  inPortVL_3_3 <= `BSV_ASSIGNMENT_DELAY inPortVL_3_3$D_IN;
	if (inPortVL_4$EN)
	  inPortVL_4 <= `BSV_ASSIGNMENT_DELAY inPortVL_4$D_IN;
	if (inPortVL_4_1$EN)
	  inPortVL_4_1 <= `BSV_ASSIGNMENT_DELAY inPortVL_4_1$D_IN;
	if (inPortVL_4_2$EN)
	  inPortVL_4_2 <= `BSV_ASSIGNMENT_DELAY inPortVL_4_2$D_IN;
	if (inPortVL_4_3$EN)
	  inPortVL_4_3 <= `BSV_ASSIGNMENT_DELAY inPortVL_4_3$D_IN;
	if (lockedVL_0$EN)
	  lockedVL_0 <= `BSV_ASSIGNMENT_DELAY lockedVL_0$D_IN;
	if (lockedVL_0_1$EN)
	  lockedVL_0_1 <= `BSV_ASSIGNMENT_DELAY lockedVL_0_1$D_IN;
	if (lockedVL_0_2$EN)
	  lockedVL_0_2 <= `BSV_ASSIGNMENT_DELAY lockedVL_0_2$D_IN;
	if (lockedVL_0_3$EN)
	  lockedVL_0_3 <= `BSV_ASSIGNMENT_DELAY lockedVL_0_3$D_IN;
	if (lockedVL_1$EN)
	  lockedVL_1 <= `BSV_ASSIGNMENT_DELAY lockedVL_1$D_IN;
	if (lockedVL_1_1$EN)
	  lockedVL_1_1 <= `BSV_ASSIGNMENT_DELAY lockedVL_1_1$D_IN;
	if (lockedVL_1_2$EN)
	  lockedVL_1_2 <= `BSV_ASSIGNMENT_DELAY lockedVL_1_2$D_IN;
	if (lockedVL_1_3$EN)
	  lockedVL_1_3 <= `BSV_ASSIGNMENT_DELAY lockedVL_1_3$D_IN;
	if (lockedVL_2$EN)
	  lockedVL_2 <= `BSV_ASSIGNMENT_DELAY lockedVL_2$D_IN;
	if (lockedVL_2_1$EN)
	  lockedVL_2_1 <= `BSV_ASSIGNMENT_DELAY lockedVL_2_1$D_IN;
	if (lockedVL_2_2$EN)
	  lockedVL_2_2 <= `BSV_ASSIGNMENT_DELAY lockedVL_2_2$D_IN;
	if (lockedVL_2_3$EN)
	  lockedVL_2_3 <= `BSV_ASSIGNMENT_DELAY lockedVL_2_3$D_IN;
	if (lockedVL_3$EN)
	  lockedVL_3 <= `BSV_ASSIGNMENT_DELAY lockedVL_3$D_IN;
	if (lockedVL_3_1$EN)
	  lockedVL_3_1 <= `BSV_ASSIGNMENT_DELAY lockedVL_3_1$D_IN;
	if (lockedVL_3_2$EN)
	  lockedVL_3_2 <= `BSV_ASSIGNMENT_DELAY lockedVL_3_2$D_IN;
	if (lockedVL_3_3$EN)
	  lockedVL_3_3 <= `BSV_ASSIGNMENT_DELAY lockedVL_3_3$D_IN;
	if (lockedVL_4$EN)
	  lockedVL_4 <= `BSV_ASSIGNMENT_DELAY lockedVL_4$D_IN;
	if (lockedVL_4_1$EN)
	  lockedVL_4_1 <= `BSV_ASSIGNMENT_DELAY lockedVL_4_1$D_IN;
	if (lockedVL_4_2$EN)
	  lockedVL_4_2 <= `BSV_ASSIGNMENT_DELAY lockedVL_4_2$D_IN;
	if (lockedVL_4_3$EN)
	  lockedVL_4_3 <= `BSV_ASSIGNMENT_DELAY lockedVL_4_3$D_IN;
	if (selectedIO_reg_0$EN)
	  selectedIO_reg_0 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_0$D_IN;
	if (selectedIO_reg_0_1$EN)
	  selectedIO_reg_0_1 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_0_1$D_IN;
	if (selectedIO_reg_0_2$EN)
	  selectedIO_reg_0_2 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_0_2$D_IN;
	if (selectedIO_reg_0_3$EN)
	  selectedIO_reg_0_3 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_0_3$D_IN;
	if (selectedIO_reg_0_4$EN)
	  selectedIO_reg_0_4 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_0_4$D_IN;
	if (selectedIO_reg_1$EN)
	  selectedIO_reg_1 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_1$D_IN;
	if (selectedIO_reg_1_1$EN)
	  selectedIO_reg_1_1 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_1_1$D_IN;
	if (selectedIO_reg_1_2$EN)
	  selectedIO_reg_1_2 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_1_2$D_IN;
	if (selectedIO_reg_1_3$EN)
	  selectedIO_reg_1_3 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_1_3$D_IN;
	if (selectedIO_reg_1_4$EN)
	  selectedIO_reg_1_4 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_1_4$D_IN;
	if (selectedIO_reg_2$EN)
	  selectedIO_reg_2 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_2$D_IN;
	if (selectedIO_reg_2_1$EN)
	  selectedIO_reg_2_1 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_2_1$D_IN;
	if (selectedIO_reg_2_2$EN)
	  selectedIO_reg_2_2 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_2_2$D_IN;
	if (selectedIO_reg_2_3$EN)
	  selectedIO_reg_2_3 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_2_3$D_IN;
	if (selectedIO_reg_2_4$EN)
	  selectedIO_reg_2_4 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_2_4$D_IN;
	if (selectedIO_reg_3$EN)
	  selectedIO_reg_3 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_3$D_IN;
	if (selectedIO_reg_3_1$EN)
	  selectedIO_reg_3_1 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_3_1$D_IN;
	if (selectedIO_reg_3_2$EN)
	  selectedIO_reg_3_2 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_3_2$D_IN;
	if (selectedIO_reg_3_3$EN)
	  selectedIO_reg_3_3 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_3_3$D_IN;
	if (selectedIO_reg_3_4$EN)
	  selectedIO_reg_3_4 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_3_4$D_IN;
	if (selectedIO_reg_4$EN)
	  selectedIO_reg_4 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_4$D_IN;
	if (selectedIO_reg_4_1$EN)
	  selectedIO_reg_4_1 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_4_1$D_IN;
	if (selectedIO_reg_4_2$EN)
	  selectedIO_reg_4_2 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_4_2$D_IN;
	if (selectedIO_reg_4_3$EN)
	  selectedIO_reg_4_3 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_4_3$D_IN;
	if (selectedIO_reg_4_4$EN)
	  selectedIO_reg_4_4 <= `BSV_ASSIGNMENT_DELAY selectedIO_reg_4_4$D_IN;
      end
  end

  // synopsys translate_off
  `ifdef BSV_NO_INITIAL_BLOCKS
  `else // not BSV_NO_INITIAL_BLOCKS
  initial
  begin
    activeVC_perIn_reg = 3'h2;
    activeVC_perIn_reg_1 = 3'h2;
    activeVC_perIn_reg_2 = 3'h2;
    activeVC_perIn_reg_3 = 3'h2;
    activeVC_perIn_reg_4 = 3'h2;
    credits_0 = 4'hA;
    credits_0_1 = 4'hA;
    credits_0_2 = 4'hA;
    credits_0_3 = 4'hA;
    credits_1 = 4'hA;
    credits_1_1 = 4'hA;
    credits_1_2 = 4'hA;
    credits_1_3 = 4'hA;
    credits_2 = 4'hA;
    credits_2_1 = 4'hA;
    credits_2_2 = 4'hA;
    credits_2_3 = 4'hA;
    credits_3 = 4'hA;
    credits_3_1 = 4'hA;
    credits_3_2 = 4'hA;
    credits_3_3 = 4'hA;
    credits_4 = 4'hA;
    credits_4_1 = 4'hA;
    credits_4_2 = 4'hA;
    credits_4_3 = 4'hA;
    inPortVL_0 = 3'h2;
    inPortVL_0_1 = 3'h2;
    inPortVL_0_2 = 3'h2;
    inPortVL_0_3 = 3'h2;
    inPortVL_1 = 3'h2;
    inPortVL_1_1 = 3'h2;
    inPortVL_1_2 = 3'h2;
    inPortVL_1_3 = 3'h2;
    inPortVL_2 = 3'h2;
    inPortVL_2_1 = 3'h2;
    inPortVL_2_2 = 3'h2;
    inPortVL_2_3 = 3'h2;
    inPortVL_3 = 3'h2;
    inPortVL_3_1 = 3'h2;
    inPortVL_3_2 = 3'h2;
    inPortVL_3_3 = 3'h2;
    inPortVL_4 = 3'h2;
    inPortVL_4_1 = 3'h2;
    inPortVL_4_2 = 3'h2;
    inPortVL_4_3 = 3'h2;
    lockedVL_0 = 1'h0;
    lockedVL_0_1 = 1'h0;
    lockedVL_0_2 = 1'h0;
    lockedVL_0_3 = 1'h0;
    lockedVL_1 = 1'h0;
    lockedVL_1_1 = 1'h0;
    lockedVL_1_2 = 1'h0;
    lockedVL_1_3 = 1'h0;
    lockedVL_2 = 1'h0;
    lockedVL_2_1 = 1'h0;
    lockedVL_2_2 = 1'h0;
    lockedVL_2_3 = 1'h0;
    lockedVL_3 = 1'h0;
    lockedVL_3_1 = 1'h0;
    lockedVL_3_2 = 1'h0;
    lockedVL_3_3 = 1'h0;
    lockedVL_4 = 1'h0;
    lockedVL_4_1 = 1'h0;
    lockedVL_4_2 = 1'h0;
    lockedVL_4_3 = 1'h0;
    selectedIO_reg_0 = 1'h0;
    selectedIO_reg_0_1 = 1'h0;
    selectedIO_reg_0_2 = 1'h0;
    selectedIO_reg_0_3 = 1'h0;
    selectedIO_reg_0_4 = 1'h0;
    selectedIO_reg_1 = 1'h0;
    selectedIO_reg_1_1 = 1'h0;
    selectedIO_reg_1_2 = 1'h0;
    selectedIO_reg_1_3 = 1'h0;
    selectedIO_reg_1_4 = 1'h0;
    selectedIO_reg_2 = 1'h0;
    selectedIO_reg_2_1 = 1'h0;
    selectedIO_reg_2_2 = 1'h0;
    selectedIO_reg_2_3 = 1'h0;
    selectedIO_reg_2_4 = 1'h0;
    selectedIO_reg_3 = 1'h0;
    selectedIO_reg_3_1 = 1'h0;
    selectedIO_reg_3_2 = 1'h0;
    selectedIO_reg_3_3 = 1'h0;
    selectedIO_reg_3_4 = 1'h0;
    selectedIO_reg_4 = 1'h0;
    selectedIO_reg_4_1 = 1'h0;
    selectedIO_reg_4_2 = 1'h0;
    selectedIO_reg_4_3 = 1'h0;
    selectedIO_reg_4_4 = 1'h0;
  end
  `endif // BSV_NO_INITIAL_BLOCKS
  // synopsys translate_on

  // handling of system tasks

  // synopsys translate_off
  always@(negedge CLK)
  begin
    #0;
    if (RST_N) if (EN_out_ports_0_putCredits) $write("");
    if (RST_N)
      if (EN_out_ports_0_putCredits && out_ports_0_putCredits_cr_in[2])
	$write("");
    if (RST_N) if (EN_out_ports_1_putCredits) $write("");
    if (RST_N)
      if (EN_out_ports_1_putCredits && out_ports_1_putCredits_cr_in[2])
	$write("");
    if (RST_N) if (EN_out_ports_2_putCredits) $write("");
    if (RST_N)
      if (EN_out_ports_2_putCredits && out_ports_2_putCredits_cr_in[2])
	$write("");
    if (RST_N) if (EN_out_ports_3_putCredits) $write("");
    if (RST_N)
      if (EN_out_ports_3_putCredits && out_ports_3_putCredits_cr_in[2])
	$write("");
    if (RST_N) if (EN_out_ports_4_putCredits) $write("");
    if (RST_N)
      if (EN_out_ports_4_putCredits && out_ports_4_putCredits_cr_in[2])
	$write("");
    if (RST_N)
      if (outport_encoder___d2299[3] &&
	  flitBuffers$deq[65:64] != fifo_out__h51388)
	$write("");
    if (RST_N)
      if (outport_encoder___d2298[3] &&
	  flitBuffers_1$deq[65:64] != fifo_out__h52918)
	$write("");
    if (RST_N)
      if (outport_encoder___d2297[3] &&
	  flitBuffers_2$deq[65:64] != fifo_out__h53619)
	$write("");
    if (RST_N)
      if (outport_encoder___d2296[3] &&
	  flitBuffers_3$deq[65:64] != fifo_out__h54320)
	$write("");
    if (RST_N)
      if (outport_encoder___d2295[3] &&
	  flitBuffers_4$deq[65:64] != fifo_out__h55021)
	$write("");
    if (RST_N)
      if (EN_out_ports_0_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2178 &&
	  (outport_encoder___d2295[3] ?
	     outport_encoder___d2295[2:0] != 3'd0 &&
	     IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2283 :
	     IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2283))
	$write("");
    if (RST_N)
      if (EN_out_ports_0_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2178 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d2446)
	$display("Dynamic assertion failed: \"Router.bsv\", line 769, column 47\nOutput selected invalid flit!");
    if (RST_N)
      if (EN_out_ports_0_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2178 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d2446)
	$finish(32'd0);
    if (RST_N)
      if (EN_out_ports_0_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2178 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d2446)
	$display("Dynamic assertion failed: \"Router.bsv\", line 780, column 47\nAllocation selected input port with invalid flit!");
    if (RST_N)
      if (EN_out_ports_0_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2178 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_NOT_out_ETC___d2446)
	$finish(32'd0);
    if (RST_N)
      if (EN_out_ports_1_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2188 &&
	  (outport_encoder___d2295[3] ?
	     outport_encoder___d2295[2:0] != 3'd1 &&
	     IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2284 :
	     IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2284))
	$write("");
    if (RST_N)
      if (EN_out_ports_1_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2188 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2448)
	$display("Dynamic assertion failed: \"Router.bsv\", line 769, column 47\nOutput selected invalid flit!");
    if (RST_N)
      if (EN_out_ports_1_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2188 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2448)
	$finish(32'd0);
    if (RST_N)
      if (EN_out_ports_1_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2188 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2448)
	$display("Dynamic assertion failed: \"Router.bsv\", line 780, column 47\nAllocation selected input port with invalid flit!");
    if (RST_N)
      if (EN_out_ports_1_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2188 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2448)
	$finish(32'd0);
    if (RST_N)
      if (EN_out_ports_2_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2190 &&
	  (outport_encoder___d2295[3] ?
	     outport_encoder___d2295[2:0] != 3'd2 &&
	     IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2285 :
	     IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2285))
	$write("");
    if (RST_N)
      if (EN_out_ports_2_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2190 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2450)
	$display("Dynamic assertion failed: \"Router.bsv\", line 769, column 47\nOutput selected invalid flit!");
    if (RST_N)
      if (EN_out_ports_2_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2190 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2450)
	$finish(32'd0);
    if (RST_N)
      if (EN_out_ports_2_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2190 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2450)
	$display("Dynamic assertion failed: \"Router.bsv\", line 780, column 47\nAllocation selected input port with invalid flit!");
    if (RST_N)
      if (EN_out_ports_2_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2190 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2450)
	$finish(32'd0);
    if (RST_N)
      if (EN_out_ports_3_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2192 &&
	  (outport_encoder___d2295[3] ?
	     outport_encoder___d2295[2:0] != 3'd3 &&
	     IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2286 :
	     IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2286))
	$write("");
    if (RST_N)
      if (EN_out_ports_3_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2192 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2452)
	$display("Dynamic assertion failed: \"Router.bsv\", line 769, column 47\nOutput selected invalid flit!");
    if (RST_N)
      if (EN_out_ports_3_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2192 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2452)
	$finish(32'd0);
    if (RST_N)
      if (EN_out_ports_3_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2192 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2452)
	$display("Dynamic assertion failed: \"Router.bsv\", line 780, column 47\nAllocation selected input port with invalid flit!");
    if (RST_N)
      if (EN_out_ports_3_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2192 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2452)
	$finish(32'd0);
    if (RST_N)
      if (EN_out_ports_4_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2194 &&
	  (outport_encoder___d2295[3] ?
	     outport_encoder___d2295[2:0] != 3'd4 &&
	     IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2287 :
	     IF_outport_encoder_60_BIT_3_61_THEN_NOT_outpor_ETC___d2287))
	$write("");
    if (RST_N)
      if (EN_out_ports_4_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2194 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2454)
	$display("Dynamic assertion failed: \"Router.bsv\", line 769, column 47\nOutput selected invalid flit!");
    if (RST_N)
      if (EN_out_ports_4_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2194 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2454)
	$finish(32'd0);
    if (RST_N)
      if (EN_out_ports_4_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2194 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2454)
	$display("Dynamic assertion failed: \"Router.bsv\", line 780, column 47\nAllocation selected input port with invalid flit!");
    if (RST_N)
      if (EN_out_ports_4_getFlit &&
	  IF_outport_encoder_28_BIT_3_29_THEN_outport_en_ETC___d2194 &&
	  IF_IF_outport_encoder_28_BIT_3_29_THEN_IF_outp_ETC___d2454)
	$finish(32'd0);
    if (RST_N)
      if (credits_set_0$whas && !credits_clear_0$whas &&
	  credits_0_read_PLUS_1___d1938 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_0$whas && credits_clear_0$whas && credits_0 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_0_1$whas && !credits_clear_0_1$whas &&
	  credits_0_1_read__3_PLUS_1___d1939 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_0_1$whas && credits_clear_0_1$whas &&
	  credits_0_1 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_0_2$whas && !credits_clear_0_2$whas &&
	  credits_0_2_read__1_PLUS_1___d1940 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_0_2$whas && credits_clear_0_2$whas &&
	  credits_0_2 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_0_3$whas && !credits_clear_0_3$whas &&
	  credits_0_3_read__9_PLUS_1___d1941 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_0_3$whas && credits_clear_0_3$whas &&
	  credits_0_3 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_1$whas && !credits_clear_1$whas &&
	  credits_1_read_PLUS_1___d1942 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_1$whas && credits_clear_1$whas && credits_1 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_1_1$whas && !credits_clear_1_1$whas &&
	  credits_1_1_read__5_PLUS_1___d1943 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_1_1$whas && credits_clear_1_1$whas &&
	  credits_1_1 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_1_2$whas && !credits_clear_1_2$whas &&
	  credits_1_2_read__3_PLUS_1___d1944 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_1_2$whas && credits_clear_1_2$whas &&
	  credits_1_2 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_1_3$whas && !credits_clear_1_3$whas &&
	  credits_1_3_read__1_PLUS_1___d1945 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_1_3$whas && credits_clear_1_3$whas &&
	  credits_1_3 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_2$whas && !credits_clear_2$whas &&
	  credits_2_read_PLUS_1___d1946 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_2$whas && credits_clear_2$whas && credits_2 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_2_1$whas && !credits_clear_2_1$whas &&
	  credits_2_1_read__7_PLUS_1___d1947 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_2_1$whas && credits_clear_2_1$whas &&
	  credits_2_1 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_2_2$whas && !credits_clear_2_2$whas &&
	  credits_2_2_read__5_PLUS_1___d1948 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_2_2$whas && credits_clear_2_2$whas &&
	  credits_2_2 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_2_3$whas && !credits_clear_2_3$whas &&
	  credits_2_3_read__3_PLUS_1___d1949 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_2_3$whas && credits_clear_2_3$whas &&
	  credits_2_3 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_3$whas && !credits_clear_3$whas &&
	  credits_3_read__1_PLUS_1___d1950 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_3$whas && credits_clear_3$whas && credits_3 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_3_1$whas && !credits_clear_3_1$whas &&
	  credits_3_1_read__9_PLUS_1___d1951 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_3_1$whas && credits_clear_3_1$whas &&
	  credits_3_1 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_3_2$whas && !credits_clear_3_2$whas &&
	  credits_3_2_read__7_PLUS_1___d1952 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_3_2$whas && credits_clear_3_2$whas &&
	  credits_3_2 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_3_3$whas && !credits_clear_3_3$whas &&
	  credits_3_3_read__5_PLUS_1___d1953 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_3_3$whas && credits_clear_3_3$whas &&
	  credits_3_3 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_4$whas && !credits_clear_4$whas &&
	  credits_4_read__3_PLUS_1___d1954 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_4$whas && credits_clear_4$whas && credits_4 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_4_1$whas && !credits_clear_4_1$whas &&
	  credits_4_1_read__1_PLUS_1___d1955 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_4_1$whas && credits_clear_4_1$whas &&
	  credits_4_1 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_4_2$whas && !credits_clear_4_2$whas &&
	  credits_4_2_read__9_PLUS_1___d1956 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_4_2$whas && credits_clear_4_2$whas &&
	  credits_4_2 == 4'd0)
	$write("");
    if (RST_N)
      if (credits_set_4_3$whas && !credits_clear_4_3$whas &&
	  credits_4_3_read__7_PLUS_1___d1957 > 4'd8)
	$write("");
    if (RST_N)
      if (!credits_set_4_3$whas && credits_clear_4_3$whas &&
	  credits_4_3 == 4'd0)
	$write("");
  end
  // synopsys translate_on
endmodule  // mkRouterCore