diff --git a/hal/arm/scs.c b/hal/arm/scs.c
index b8536aeb..594a3b74 100644
--- a/hal/arm/scs.c
+++ b/hal/arm/scs.c
@@ -92,7 +92,7 @@ static struct {
 } scs_common;
 
 
-void _hal_nvicSetIRQ(s8 irqn, u8 state)
+void _hal_scsIRQSet(s8 irqn, u8 state)
 {
 	volatile u32 *ptr = (state != 0) ? scs_common.scs->iser : scs_common.scs->icer;
 
@@ -103,7 +103,7 @@ void _hal_nvicSetIRQ(s8 irqn, u8 state)
 }
 
 
-void _hal_nvicSetPriority(s8 irqn, u32 priority)
+void _hal_scsIRQPrioritySet(s8 irqn, u32 priority)
 {
 	volatile u8 *ptr = (volatile u8 *)scs_common.scs->ip;
 
@@ -114,7 +114,7 @@ void _hal_nvicSetPriority(s8 irqn, u32 priority)
 }
 
 
-void _hal_nvicSetPending(s8 irqn)
+void _hal_scsIRQPendingSet(s8 irqn)
 {
 	volatile u32 *ptr = scs_common.scs->ispr;
 
@@ -125,21 +125,21 @@ void _hal_nvicSetPending(s8 irqn)
 }
 
 
-int _hal_nvicGetPendingIRQ(s8 irqn)
+int _hal_scsIRQPendingGet(s8 irqn)
 {
 	volatile u32 *ptr = &scs_common.scs->ispr[(u8)irqn >> 5];
 	return ((*ptr & (1 << (irqn & 0x1f))) != 0) ? 1 : 0;
 }
 
 
-int _hal_nvicGetActive(s8 irqn)
+int _hal_scsIRQActiveGet(s8 irqn)
 {
 	volatile u32 *ptr = &scs_common.scs->iabr[(u8)irqn >> 5];
 	return ((*ptr & (1 << (irqn & 0x1f))) != 0) ? 1 : 0;
 }
 
 
-void _hal_scbSetPriorityGrouping(u32 group)
+void _hal_scsPriorityGroupingSet(u32 group)
 {
 	u32 t;
 
@@ -153,13 +153,13 @@ void _hal_scbSetPriorityGrouping(u32 group)
 }
 
 
-u32 _hal_scbGetPriorityGrouping(void)
+u32 _hal_scsPriorityGroupingGet(void)
 {
 	return (scs_common.scs->aircr & 0x700) >> 8;
 }
 
 
-void _hal_scbSetPriority(s8 excpn, u32 priority)
+void _hal_scsExceptionPrioritySet(s8 excpn, u32 priority)
 {
 	volatile u8 *ptr = (u8 *)&scs_common.scs->shpr1 + excpn - 4;
 
@@ -168,7 +168,7 @@ void _hal_scbSetPriority(s8 excpn, u32 priority)
 }
 
 
-u32 _imxrt_scbGetPriority(s8 excpn)
+u32 _imxrt_scsExceptionPriorityGet(s8 excpn)
 {
 	volatile u8 *ptr = (u8 *)&scs_common.scs->shpr1 + excpn - 4;
 
@@ -176,7 +176,7 @@ u32 _imxrt_scbGetPriority(s8 excpn)
 }
 
 
-void _hal_scbSystemReset(void)
+void _hal_scsSystemReset(void)
 {
 	scs_common.scs->aircr = ((0x5fau << 16) | (scs_common.scs->aircr & (0x700u)) | (1u << 2));
 
@@ -188,13 +188,13 @@ void _hal_scbSystemReset(void)
 }
 
 
-unsigned int _hal_scbCpuid(void)
+unsigned int _hal_scsCpuID(void)
 {
 	return scs_common.scs->cpuid;
 }
 
 
-void _hal_scbSetFPU(int state)
+void _hal_scsFPUSet(int state)
 {
 	if (state != 0) {
 		scs_common.scs->cpacr |= 0xf << 20;
@@ -209,7 +209,7 @@ void _hal_scbSetFPU(int state)
 
 static int _hal_scbCacheIsSupported(void)
 {
-	u32 partno = ((_hal_scbCpuid() >> 4) & 0xfff);
+	u32 partno = ((_hal_scsCpuID() >> 4) & 0xfff);
 
 	/* Only supported on Cortex-M7 for now */
 	if (partno == 0xc27) {
@@ -220,7 +220,7 @@ static int _hal_scbCacheIsSupported(void)
 }
 
 
-void _hal_scbEnableDCache(void)
+void _hal_scsDCacheEnable(void)
 {
 	u32 ccsidr, sets, ways;
 
@@ -252,7 +252,7 @@ void _hal_scbEnableDCache(void)
 }
 
 
-void _hal_scbDisableDCache(void)
+void _hal_scsDCacheDisable(void)
 {
 	register u32 ccsidr, sets, ways;
 
@@ -281,7 +281,7 @@ void _hal_scbDisableDCache(void)
 }
 
 
-void _hal_scbCleanInvalDCacheAddr(void *addr, u32 sz)
+void _hal_scsDCacheCleanInvalAddr(void *addr, u32 sz)
 {
 	u32 daddr;
 	int dsize;
@@ -310,7 +310,7 @@ void _hal_scbCleanInvalDCacheAddr(void *addr, u32 sz)
 }
 
 
-void _hal_scbEnableICache(void)
+void _hal_scsICacheEnable(void)
 {
 	if (_hal_scbCacheIsSupported() == 0) {
 		return;
@@ -329,7 +329,7 @@ void _hal_scbEnableICache(void)
 }
 
 
-void _hal_scbDisableICache(void)
+void _hal_scsICacheDisable(void)
 {
 	if (_hal_scbCacheIsSupported() == 0) {
 		return;
@@ -344,7 +344,7 @@ void _hal_scbDisableICache(void)
 }
 
 
-void _hal_scbSetDeepSleep(int state)
+void _hal_scsDeepSleepSet(int state)
 {
 	if (state != 0) {
 		scs_common.scs->scr |= 1 << 2;
@@ -357,7 +357,7 @@ void _hal_scbSetDeepSleep(int state)
 }
 
 
-void _hal_scbSystickInit(u32 load)
+void _hal_scsSystickInit(u32 load)
 {
 	scs_common.scs->rvr = load;
 	scs_common.scs->cvr = 0;
diff --git a/hal/arm/scs.h b/hal/arm/scs.h
index d1a9665b..254453d3 100644
--- a/hal/arm/scs.h
+++ b/hal/arm/scs.h
@@ -21,61 +21,61 @@
 #include "hal/types.h"
 
 
-void _hal_nvicSetIRQ(s8 irqn, u8 state);
+void _hal_scsIRQSet(s8 irqn, u8 state);
 
 
-void _hal_nvicSetPriority(s8 irqn, u32 priority);
+void _hal_scsIRQPrioritySet(s8 irqn, u32 priority);
 
 
-void _hal_nvicSetPending(s8 irqn);
+void _hal_scsIRQPendingSet(s8 irqn);
 
 
-int _hal_nvicGetPendingIRQ(s8 irqn);
+int _hal_scsIRQPendingGet(s8 irqn);
 
 
-int _hal_nvicGetActive(s8 irqn);
+int _hal_scsIRQActiveGet(s8 irqn);
 
 
-void _hal_scbSetPriorityGrouping(u32 group);
+void _hal_scsPriorityGroupingSet(u32 group);
 
 
-u32 _hal_scbGetPriorityGrouping(void);
+u32 _hal_scsPriorityGroupingGet(void);
 
 
-void _hal_scbSetPriority(s8 excpn, u32 priority);
+void _hal_scsExceptionPrioritySet(s8 excpn, u32 priority);
 
 
-u32 _imxrt_scbGetPriority(s8 excpn);
+u32 _imxrt_scsExceptionPriorityGet(s8 excpn);
 
 
-void _hal_scbSystemReset(void);
+void _hal_scsSystemReset(void);
 
 
-unsigned int _hal_scbCpuid(void);
+unsigned int _hal_scsCpuID(void);
 
 
-void _hal_scbSetFPU(int state);
+void _hal_scsFPUSet(int state);
 
 
-void _hal_scbEnableDCache(void);
+void _hal_scsDCacheEnable(void);
 
 
-void _hal_scbDisableDCache(void);
+void _hal_scsDCacheDisable(void);
 
 
-void _hal_scbCleanInvalDCacheAddr(void *addr, u32 sz);
+void _hal_scsDCacheCleanInvalAddr(void *addr, u32 sz);
 
 
-void _hal_scbEnableICache(void);
+void _hal_scsICacheEnable(void);
 
 
-void _hal_scbDisableICache(void);
+void _hal_scsICacheDisable(void);
 
 
-void _hal_scbSetDeepSleep(int state);
+void _hal_scsDeepSleepSet(int state);
 
 
-void _hal_scbSystickInit(u32 load);
+void _hal_scsSystickInit(u32 load);
 
 
 void _hal_scsInit(void);
diff --git a/hal/armv7m/cpu.c b/hal/armv7m/cpu.c
index d8eca4d4..e3d6b250 100644
--- a/hal/armv7m/cpu.c
+++ b/hal/armv7m/cpu.c
@@ -195,7 +195,7 @@ void hal_cpuSigreturn(void *kstack, void *ustack, cpu_context_t **ctx)
 char *hal_cpuInfo(char *info)
 {
 	int i;
-	unsigned int cpuinfo = _hal_scbCpuid();
+	unsigned int cpuinfo = _hal_scsCpuID();
 
 	hal_strcpy(info, HAL_NAME_PLATFORM);
 	i = sizeof(HAL_NAME_PLATFORM) - 1;
@@ -276,7 +276,7 @@ void hal_wdgReload(void)
 
 void hal_cpuReboot(void)
 {
-	_hal_scbSystemReset();
+	_hal_scsSystemReset();
 }
 
 
@@ -285,7 +285,7 @@ void hal_cpuReboot(void)
 
 void hal_cleanDCache(ptr_t start, size_t len)
 {
-	_hal_scbCleanInvalDCacheAddr((void *)start, len);
+	_hal_scsDCacheCleanInvalAddr((void *)start, len);
 }
 
 
diff --git a/hal/armv7m/imxrt/10xx/imxrt10xx.c b/hal/armv7m/imxrt/10xx/imxrt10xx.c
index f3e58d3b..4cca5469 100644
--- a/hal/armv7m/imxrt/10xx/imxrt10xx.c
+++ b/hal/armv7m/imxrt/10xx/imxrt10xx.c
@@ -546,7 +546,7 @@ int hal_platformctl(void *ptr)
 		case pctl_reboot:
 			if (data->action == pctl_set) {
 				if (data->reboot.magic == PCTL_REBOOT_MAGIC) {
-					_hal_scbSystemReset();
+					_hal_scsSystemReset();
 				}
 			}
 			else if (data->action == pctl_get) {
@@ -558,12 +558,12 @@ int hal_platformctl(void *ptr)
 		case pctl_devcache:
 			if (data->action == pctl_set) {
 				if (data->devcache.state == 0) {
-					_hal_scbDisableDCache();
-					_hal_scbDisableICache();
+					_hal_scsDCacheDisable();
+					_hal_scsICacheDisable();
 				}
 				else {
-					_hal_scbEnableDCache();
-					_hal_scbEnableICache();
+					_hal_scsDCacheEnable();
+					_hal_scsICacheEnable();
 				}
 
 				ret = EOK;
@@ -572,7 +572,7 @@ int hal_platformctl(void *ptr)
 
 		case pctl_cleanInvalDCache:
 			if (data->action == pctl_set) {
-				_hal_scbCleanInvalDCacheAddr(data->cleanInvalDCache.addr, data->cleanInvalDCache.sz);
+				_hal_scsDCacheCleanInvalAddr(data->cleanInvalDCache.addr, data->cleanInvalDCache.sz);
 				ret = EOK;
 			}
 			break;
@@ -1961,8 +1961,8 @@ void _imxrt_init(void)
 	}
 
 	/* Configure cache */
-	_hal_scbEnableDCache();
-	_hal_scbEnableICache();
+	_hal_scsDCacheEnable();
+	_hal_scsICacheEnable();
 
 	_imxrt_ccmControlGate(pctl_clk_iomuxc, clk_state_run_wait);
 
@@ -2018,5 +2018,5 @@ void _imxrt_init(void)
 	_imxrt_ccmControlGate(GPT_BUS_CLK, clk_state_run_wait);
 
 	/* Enable FPU */
-	_hal_scbSetFPU(1);
+	_hal_scsFPUSet(1);
 }
diff --git a/hal/armv7m/imxrt/117x/imxrt117x.c b/hal/armv7m/imxrt/117x/imxrt117x.c
index e9db6f8c..d80ec88d 100644
--- a/hal/armv7m/imxrt/117x/imxrt117x.c
+++ b/hal/armv7m/imxrt/117x/imxrt117x.c
@@ -666,7 +666,7 @@ int hal_platformctl(void *ptr)
 		case pctl_reboot:
 			if (data->action == pctl_set) {
 				if (data->reboot.magic == PCTL_REBOOT_MAGIC) {
-					_hal_scbSystemReset();
+					_hal_scsSystemReset();
 				}
 			}
 			else if (data->action == pctl_get) {
@@ -678,12 +678,12 @@ int hal_platformctl(void *ptr)
 		case pctl_devcache:
 			if (data->action == pctl_set) {
 				if (data->devcache.state == 0) {
-					_hal_scbDisableDCache();
-					_hal_scbDisableICache();
+					_hal_scsDCacheDisable();
+					_hal_scsICacheDisable();
 				}
 				else {
-					_hal_scbEnableDCache();
-					_hal_scbEnableICache();
+					_hal_scsDCacheEnable();
+					_hal_scsICacheEnable();
 				}
 
 				ret = EOK;
@@ -692,7 +692,7 @@ int hal_platformctl(void *ptr)
 
 		case pctl_cleanInvalDCache:
 			if (data->action == pctl_set) {
-				_hal_scbCleanInvalDCacheAddr(data->cleanInvalDCache.addr, data->cleanInvalDCache.sz);
+				_hal_scsDCacheCleanInvalAddr(data->cleanInvalDCache.addr, data->cleanInvalDCache.sz);
 				ret = EOK;
 			}
 			break;
@@ -812,5 +812,5 @@ void _imxrt_init(void)
 	_imxrt_setDevClock(GPT_BUS_CLK, 0, 4, 0, 0, 1);
 
 	/* Enable FPU */
-	_hal_scbSetFPU(1);
+	_hal_scsFPUSet(1);
 }
diff --git a/hal/armv7m/imxrt/interrupts.c b/hal/armv7m/imxrt/interrupts.c
index 4e2a1749..87c484e1 100644
--- a/hal/armv7m/imxrt/interrupts.c
+++ b/hal/armv7m/imxrt/interrupts.c
@@ -72,8 +72,8 @@ int hal_interruptsSetHandler(intr_handler_t *h)
 	HAL_LIST_ADD(&interrupts.handlers[h->n], h);
 
 	if (h->n >= 0x10) {
-		_hal_nvicSetPriority(h->n - 0x10, 0);
-		_hal_nvicSetIRQ(h->n - 0x10, 1);
+		_hal_scsIRQPrioritySet(h->n - 0x10, 0);
+		_hal_scsIRQSet(h->n - 0x10, 1);
 	}
 	hal_spinlockClear(&interrupts.spinlock, &sc);
 
@@ -92,7 +92,7 @@ int hal_interruptsDeleteHandler(intr_handler_t *h)
 	HAL_LIST_REMOVE(&interrupts.handlers[h->n], h);
 
 	if (h->n >= 0x10 && interrupts.handlers[h->n] == NULL)
-		_hal_nvicSetIRQ(h->n - 0x10, 0);
+		_hal_scsIRQSet(h->n - 0x10, 0);
 
 	hal_spinlockClear(&interrupts.spinlock, &sc);
 
@@ -120,12 +120,12 @@ __attribute__ ((section (".init"))) void _hal_interruptsInit(void)
 
 	hal_spinlockCreate(&interrupts.spinlock, "interrupts.spinlock");
 
-	_hal_scbSetPriority(SYSTICK_IRQ, 0);
-	_hal_scbSetPriority(PENDSV_IRQ, 0);
-	_hal_scbSetPriority(SVC_IRQ, 0);
+	_hal_scsExceptionPrioritySet(SYSTICK_IRQ, 0);
+	_hal_scsExceptionPrioritySet(PENDSV_IRQ, 0);
+	_hal_scsExceptionPrioritySet(SVC_IRQ, 0);
 
 	/* Set no subprorities in Interrupt Group Priority */
-	_hal_scbSetPriorityGrouping(3);
+	_hal_scsPriorityGroupingSet(3);
 
 	return;
 }
diff --git a/hal/armv7m/stm32/interrupts.c b/hal/armv7m/stm32/interrupts.c
index a04d759b..e30f508c 100644
--- a/hal/armv7m/stm32/interrupts.c
+++ b/hal/armv7m/stm32/interrupts.c
@@ -81,8 +81,8 @@ int hal_interruptsSetHandler(intr_handler_t *h)
 	HAL_LIST_ADD(&interrupts.handlers[h->n], h);
 
 	if (h->n >= 0x10) {
-		_hal_nvicSetPriority(h->n - 0x10, 1);
-		_hal_nvicSetIRQ(h->n - 0x10, 1);
+		_hal_scsIRQPrioritySet(h->n - 0x10, 1);
+		_hal_scsIRQSet(h->n - 0x10, 1);
 	}
 	hal_spinlockClear(&interrupts.spinlock, &sc);
 
@@ -101,7 +101,7 @@ int hal_interruptsDeleteHandler(intr_handler_t *h)
 	HAL_LIST_REMOVE(&interrupts.handlers[h->n], h);
 
 	if (h->n >= 0x10 && interrupts.handlers[h->n] == NULL)
-		_hal_nvicSetIRQ(h->n - 0x10, 0);
+		_hal_scsIRQSet(h->n - 0x10, 0);
 
 	hal_spinlockClear(&interrupts.spinlock, &sc);
 
@@ -129,12 +129,12 @@ __attribute__ ((section (".init"))) void _hal_interruptsInit(void)
 
 	hal_spinlockCreate(&interrupts.spinlock, "interrupts.spinlock");
 
-	_hal_scbSetPriority(SYSTICK_IRQ, 1);
-	_hal_scbSetPriority(PENDSV_IRQ, 0);
-	_hal_scbSetPriority(SVC_IRQ, 0);
+	_hal_scsExceptionPrioritySet(SYSTICK_IRQ, 1);
+	_hal_scsExceptionPrioritySet(PENDSV_IRQ, 0);
+	_hal_scsExceptionPrioritySet(SVC_IRQ, 0);
 
 	/* Set no subprorities in Interrupt Group Priority */
-	_hal_scbSetPriorityGrouping(3);
+	_hal_scsPriorityGroupingSet(3);
 
 	return;
 }
diff --git a/hal/armv7m/stm32/l4/stm32l4.c b/hal/armv7m/stm32/l4/stm32l4.c
index 60d93cff..408a11c0 100644
--- a/hal/armv7m/stm32/l4/stm32l4.c
+++ b/hal/armv7m/stm32/l4/stm32l4.c
@@ -127,7 +127,7 @@ int hal_platformctl(void *ptr)
 	case pctl_reboot:
 		if (data->action == pctl_set) {
 			if (data->reboot.magic == PCTL_REBOOT_MAGIC) {
-				_hal_scbSystemReset();
+				_hal_scsSystemReset();
 			}
 		}
 		else if (data->action == pctl_get) {
@@ -473,7 +473,7 @@ time_t _stm32_pwrEnterLPStop(time_t us)
 	hal_cpuDataMemoryBarrier();
 
 	/* Set SLEEPDEEP bit of Cortex System Control Register */
-	_hal_scbSetDeepSleep(1);
+	_hal_scsDeepSleepSet(1);
 
 	timer_setAlarm(us);
 
@@ -484,7 +484,7 @@ time_t _stm32_pwrEnterLPStop(time_t us)
 		nop; ");
 
 	/* Reset SLEEPDEEP bit of Cortex System Control Register */
-	_hal_scbSetDeepSleep(0);
+	_hal_scsDeepSleepSet(0);
 
 	if (restoreMsi != 0) {
 		/* Restore pre-sleep MSI clock */
@@ -581,7 +581,7 @@ int _stm32_systickInit(u32 interval)
 		return -EINVAL;
 	}
 
-	_hal_scbSystickInit(load);
+	_hal_scsSystickInit(load);
 
 	return EOK;
 }
@@ -817,7 +817,7 @@ void _stm32_init(void)
 #endif
 
 	/* Disable FPU */
-	_hal_scbSetFPU(0);
+	_hal_scsFPUSet(0);
 
 	/* Enable internal wakeup line */
 	*(stm32_common.pwr + pwr_cr3) |= 1 << 15;
diff --git a/hal/armv8m/cpu.c b/hal/armv8m/cpu.c
index c80f7279..bd654647 100644
--- a/hal/armv8m/cpu.c
+++ b/hal/armv8m/cpu.c
@@ -181,7 +181,7 @@ void hal_cpuSigreturn(void *kstack, void *ustack, cpu_context_t **ctx)
 char *hal_cpuInfo(char *info)
 {
 	int i;
-	unsigned int cpuinfo = _hal_scbCpuid();
+	unsigned int cpuinfo = _hal_scsCpuID();
 
 	hal_strcpy(info, HAL_NAME_PLATFORM);
 	i = sizeof(HAL_NAME_PLATFORM) - 1;
@@ -247,7 +247,7 @@ void hal_wdgReload(void)
 
 void hal_cpuReboot(void)
 {
-	_hal_scbSystemReset();
+	_hal_scsSystemReset();
 }
 
 
diff --git a/hal/armv8m/interrupts.c b/hal/armv8m/interrupts.c
index 6f21383e..800add35 100644
--- a/hal/armv8m/interrupts.c
+++ b/hal/armv8m/interrupts.c
@@ -81,8 +81,8 @@ int hal_interruptsSetHandler(intr_handler_t *h)
 	HAL_LIST_ADD(&interrupts.handlers[h->n], h);
 
 	if (h->n >= 0x10) {
-		_hal_nvicSetPriority(h->n - 0x10, 1);
-		_hal_nvicSetIRQ(h->n - 0x10, 1);
+		_hal_scsIRQPrioritySet(h->n - 0x10, 1);
+		_hal_scsIRQSet(h->n - 0x10, 1);
 	}
 	hal_spinlockClear(&interrupts.spinlock, &sc);
 
@@ -102,7 +102,7 @@ int hal_interruptsDeleteHandler(intr_handler_t *h)
 	HAL_LIST_REMOVE(&interrupts.handlers[h->n], h);
 
 	if (h->n >= 0x10 && interrupts.handlers[h->n] == NULL) {
-		_hal_nvicSetIRQ(h->n - 0x10, 0);
+		_hal_scsIRQSet(h->n - 0x10, 0);
 	}
 
 	hal_spinlockClear(&interrupts.spinlock, &sc);
@@ -131,12 +131,12 @@ __attribute__((section(".init"))) void _hal_interruptsInit(void)
 
 	hal_spinlockCreate(&interrupts.spinlock, "interrupts.spinlock");
 
-	_hal_scbSetPriority(SYSTICK_IRQ, 1);
-	_hal_scbSetPriority(PENDSV_IRQ, 1);
-	_hal_scbSetPriority(SVC_IRQ, 0);
+	_hal_scsExceptionPrioritySet(SYSTICK_IRQ, 1);
+	_hal_scsExceptionPrioritySet(PENDSV_IRQ, 1);
+	_hal_scsExceptionPrioritySet(SVC_IRQ, 0);
 
 	/* Set no subprorities in Interrupt Group Priority */
-	_hal_scbSetPriorityGrouping(3);
+	_hal_scsPriorityGroupingSet(3);
 
 	return;
 }
diff --git a/hal/armv8m/mcx/n94x/mcxn94x.c b/hal/armv8m/mcx/n94x/mcxn94x.c
index c5fcd31a..f8c655fa 100644
--- a/hal/armv8m/mcx/n94x/mcxn94x.c
+++ b/hal/armv8m/mcx/n94x/mcxn94x.c
@@ -549,7 +549,7 @@ int hal_platformctl(void *ptr)
 		case pctl_reboot:
 			if (data->action == pctl_set) {
 				if (data->reboot.magic == PCTL_REBOOT_MAGIC) {
-					_hal_scbSystemReset();
+					_hal_scsSystemReset();
 				}
 			}
 			else {
diff --git a/hal/armv8m/mcx/n94x/timer.c b/hal/armv8m/mcx/n94x/timer.c
index 54fdc7cc..f2589926 100644
--- a/hal/armv8m/mcx/n94x/timer.c
+++ b/hal/armv8m/mcx/n94x/timer.c
@@ -119,7 +119,7 @@ void hal_timerSetWakeup(u32 waitUs)
 			((*(timer_common.base + ostimer_oseventctrl) & 1) == 0)) {
 		/* We just missed the timer value and be the interrupt won't
 		 * be generated. Trigger the interrupt manually instead. */
-		_hal_nvicSetPending(ostimer0_irq - 0x10);
+		_hal_scsIRQPendingSet(ostimer0_irq - 0x10);
 	}
 
 	hal_spinlockClear(&timer_common.lock, &sc);
diff --git a/hal/armv8m/nrf/91/nrf91.c b/hal/armv8m/nrf/91/nrf91.c
index 1711469e..53cbcaed 100644
--- a/hal/armv8m/nrf/91/nrf91.c
+++ b/hal/armv8m/nrf/91/nrf91.c
@@ -192,5 +192,5 @@ void _nrf91_init(void)
 	hal_cpuDataMemoryBarrier();
 
 	/* Disable FPU */
-	_hal_scbSetFPU(0);
+	_hal_scsFPUSet(0);
 }