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final_project.qsf
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# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, the Altera Quartus II License Agreement,
# the Altera MegaCore Function License Agreement, or other
# applicable license agreement, including, without limitation,
# that your use is for the sole purpose of programming logic
# devices manufactured by Altera and sold by Altera or its
# authorized distributors. Please refer to the applicable
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 15.0.0 Build 145 04/22/2015 SJ Web Edition
# Date created = 11:19:02 April 15, 2017
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# final_project_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "Cyclone IV E"
set_global_assignment -name DEVICE EP4CE115F29C7
set_global_assignment -name TOP_LEVEL_ENTITY final_project
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 15.0.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:19:02 APRIL 15, 2017"
set_global_assignment -name LAST_QUARTUS_VERSION 15.0.0
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (SystemVerilog)"
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "SYSTEMVERILOG HDL" -section_id eda_simulation
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
set_location_assignment PIN_C13 -to VGA_VS
set_location_assignment PIN_C10 -to VGA_SYNC_N
set_location_assignment PIN_H10 -to VGA_R[7]
set_location_assignment PIN_H8 -to VGA_R[6]
set_location_assignment PIN_J12 -to VGA_R[5]
set_location_assignment PIN_G10 -to VGA_R[4]
set_location_assignment PIN_F12 -to VGA_R[3]
set_location_assignment PIN_D10 -to VGA_R[2]
set_location_assignment PIN_E11 -to VGA_R[1]
set_location_assignment PIN_E12 -to VGA_R[0]
set_location_assignment PIN_G13 -to VGA_HS
set_location_assignment PIN_C9 -to VGA_G[7]
set_location_assignment PIN_F10 -to VGA_G[6]
set_location_assignment PIN_B8 -to VGA_G[5]
set_location_assignment PIN_C8 -to VGA_G[4]
set_location_assignment PIN_H12 -to VGA_G[3]
set_location_assignment PIN_F8 -to VGA_G[2]
set_location_assignment PIN_G11 -to VGA_G[1]
set_location_assignment PIN_G8 -to VGA_G[0]
set_location_assignment PIN_A12 -to VGA_CLK
set_location_assignment PIN_D12 -to VGA_B[7]
set_location_assignment PIN_D11 -to VGA_B[6]
set_location_assignment PIN_C12 -to VGA_B[5]
set_location_assignment PIN_A11 -to VGA_B[4]
set_location_assignment PIN_B11 -to VGA_B[3]
set_location_assignment PIN_C11 -to VGA_B[2]
set_location_assignment PIN_A10 -to VGA_B[1]
set_location_assignment PIN_B10 -to VGA_B[0]
set_location_assignment PIN_F11 -to VGA_BLANK_N
set_location_assignment PIN_A4 -to OTG_WR_N
set_location_assignment PIN_C5 -to OTG_RST_N
set_location_assignment PIN_B3 -to OTG_RD_N
set_location_assignment PIN_D5 -to OTG_INT
set_location_assignment PIN_G4 -to OTG_DATA[15]
set_location_assignment PIN_F3 -to OTG_DATA[14]
set_location_assignment PIN_F1 -to OTG_DATA[13]
set_location_assignment PIN_G3 -to OTG_DATA[12]
set_location_assignment PIN_G2 -to OTG_DATA[11]
set_location_assignment PIN_G1 -to OTG_DATA[10]
set_location_assignment PIN_H4 -to OTG_DATA[9]
set_location_assignment PIN_H3 -to OTG_DATA[8]
set_location_assignment PIN_H6 -to OTG_DATA[7]
set_location_assignment PIN_J7 -to OTG_DATA[6]
set_location_assignment PIN_J3 -to OTG_DATA[5]
set_location_assignment PIN_J4 -to OTG_DATA[4]
set_location_assignment PIN_K3 -to OTG_DATA[3]
set_location_assignment PIN_J5 -to OTG_DATA[2]
set_location_assignment PIN_K4 -to OTG_DATA[1]
set_location_assignment PIN_J6 -to OTG_DATA[0]
set_location_assignment PIN_A3 -to OTG_CS_N
set_location_assignment PIN_C3 -to OTG_ADDR[1]
set_location_assignment PIN_H7 -to OTG_ADDR[0]
set_location_assignment PIN_R24 -to KEY[3]
set_location_assignment PIN_N21 -to KEY[2]
set_location_assignment PIN_M21 -to KEY[1]
set_location_assignment PIN_M23 -to KEY[0]
set_location_assignment PIN_U24 -to HEX1[6]
set_location_assignment PIN_U23 -to HEX1[5]
set_location_assignment PIN_W25 -to HEX1[4]
set_location_assignment PIN_W22 -to HEX1[3]
set_location_assignment PIN_W21 -to HEX1[2]
set_location_assignment PIN_Y22 -to HEX1[1]
set_location_assignment PIN_M24 -to HEX1[0]
set_location_assignment PIN_H22 -to HEX0[6]
set_location_assignment PIN_J22 -to HEX0[5]
set_location_assignment PIN_L25 -to HEX0[4]
set_location_assignment PIN_L26 -to HEX0[3]
set_location_assignment PIN_E17 -to HEX0[2]
set_location_assignment PIN_F22 -to HEX0[1]
set_location_assignment PIN_G18 -to HEX0[0]
set_location_assignment PIN_V6 -to DRAM_WE_N
set_location_assignment PIN_U6 -to DRAM_RAS_N
set_location_assignment PIN_U1 -to DRAM_DQ[31]
set_location_assignment PIN_U4 -to DRAM_DQ[30]
set_location_assignment PIN_T3 -to DRAM_DQ[29]
set_location_assignment PIN_R3 -to DRAM_DQ[28]
set_location_assignment PIN_R2 -to DRAM_DQ[27]
set_location_assignment PIN_R1 -to DRAM_DQ[26]
set_location_assignment PIN_R7 -to DRAM_DQ[25]
set_location_assignment PIN_U5 -to DRAM_DQ[24]
set_location_assignment PIN_L7 -to DRAM_DQ[23]
set_location_assignment PIN_M7 -to DRAM_DQ[22]
set_location_assignment PIN_M4 -to DRAM_DQ[21]
set_location_assignment PIN_N4 -to DRAM_DQ[20]
set_location_assignment PIN_N3 -to DRAM_DQ[19]
set_location_assignment PIN_P2 -to DRAM_DQ[18]
set_location_assignment PIN_L8 -to DRAM_DQ[17]
set_location_assignment PIN_M8 -to DRAM_DQ[16]
set_location_assignment PIN_AC2 -to DRAM_DQ[15]
set_location_assignment PIN_AB3 -to DRAM_DQ[14]
set_location_assignment PIN_AC1 -to DRAM_DQ[13]
set_location_assignment PIN_AB2 -to DRAM_DQ[12]
set_location_assignment PIN_AA3 -to DRAM_DQ[11]
set_location_assignment PIN_AB1 -to DRAM_DQ[10]
set_location_assignment PIN_Y4 -to DRAM_DQ[9]
set_location_assignment PIN_Y3 -to DRAM_DQ[8]
set_location_assignment PIN_U3 -to DRAM_DQ[7]
set_location_assignment PIN_V1 -to DRAM_DQ[6]
set_location_assignment PIN_V2 -to DRAM_DQ[5]
set_location_assignment PIN_V3 -to DRAM_DQ[4]
set_location_assignment PIN_W1 -to DRAM_DQ[3]
set_location_assignment PIN_V4 -to DRAM_DQ[2]
set_location_assignment PIN_W2 -to DRAM_DQ[1]
set_location_assignment PIN_W3 -to DRAM_DQ[0]
set_location_assignment PIN_N8 -to DRAM_DQM[3]
set_location_assignment PIN_K8 -to DRAM_DQM[2]
set_location_assignment PIN_W4 -to DRAM_DQM[1]
set_location_assignment PIN_U2 -to DRAM_DQM[0]
set_location_assignment PIN_T4 -to DRAM_CS_N
set_location_assignment PIN_AE5 -to DRAM_CLK
set_location_assignment PIN_AA6 -to DRAM_CKE
set_location_assignment PIN_V7 -to DRAM_CAS_N
set_location_assignment PIN_R4 -to DRAM_BA[1]
set_location_assignment PIN_U7 -to DRAM_BA[0]
set_location_assignment PIN_Y7 -to DRAM_ADDR[12]
set_location_assignment PIN_AA5 -to DRAM_ADDR[11]
set_location_assignment PIN_R5 -to DRAM_ADDR[10]
set_location_assignment PIN_Y6 -to DRAM_ADDR[9]
set_location_assignment PIN_Y5 -to DRAM_ADDR[8]
set_location_assignment PIN_AA7 -to DRAM_ADDR[7]
set_location_assignment PIN_W7 -to DRAM_ADDR[6]
set_location_assignment PIN_W8 -to DRAM_ADDR[5]
set_location_assignment PIN_V5 -to DRAM_ADDR[4]
set_location_assignment PIN_P1 -to DRAM_ADDR[3]
set_location_assignment PIN_U8 -to DRAM_ADDR[2]
set_location_assignment PIN_V8 -to DRAM_ADDR[1]
set_location_assignment PIN_R6 -to DRAM_ADDR[0]
set_location_assignment PIN_Y2 -to CLOCK_50
set_location_assignment PIN_G6 -to ps2_CLK
set_location_assignment PIN_H5 -to ps2_DAT
set_location_assignment PIN_T8 -to SRAM_ADDR[19]
set_location_assignment PIN_AB8 -to SRAM_ADDR[18]
set_location_assignment PIN_AB9 -to SRAM_ADDR[17]
set_location_assignment PIN_AC11 -to SRAM_ADDR[16]
set_location_assignment PIN_AB11 -to SRAM_ADDR[15]
set_location_assignment PIN_AA4 -to SRAM_ADDR[14]
set_location_assignment PIN_AC3 -to SRAM_ADDR[13]
set_location_assignment PIN_AB4 -to SRAM_ADDR[12]
set_location_assignment PIN_AD3 -to SRAM_ADDR[11]
set_location_assignment PIN_AF2 -to SRAM_ADDR[10]
set_location_assignment PIN_T7 -to SRAM_ADDR[9]
set_location_assignment PIN_AF5 -to SRAM_ADDR[8]
set_location_assignment PIN_AC5 -to SRAM_ADDR[7]
set_location_assignment PIN_AB5 -to SRAM_ADDR[6]
set_location_assignment PIN_AE6 -to SRAM_ADDR[5]
set_location_assignment PIN_AB6 -to SRAM_ADDR[4]
set_location_assignment PIN_AC7 -to SRAM_ADDR[3]
set_location_assignment PIN_AE7 -to SRAM_ADDR[2]
set_location_assignment PIN_AD7 -to SRAM_ADDR[1]
set_location_assignment PIN_AB7 -to SRAM_ADDR[0]
set_location_assignment PIN_AF8 -to SRAM_CE
set_location_assignment PIN_AG3 -to SRAM_Data[15]
set_location_assignment PIN_AF3 -to SRAM_Data[14]
set_location_assignment PIN_AE4 -to SRAM_Data[13]
set_location_assignment PIN_AE3 -to SRAM_Data[12]
set_location_assignment PIN_AE1 -to SRAM_Data[11]
set_location_assignment PIN_AE2 -to SRAM_Data[10]
set_location_assignment PIN_AD2 -to SRAM_Data[9]
set_location_assignment PIN_AD1 -to SRAM_Data[8]
set_location_assignment PIN_AF7 -to SRAM_Data[7]
set_location_assignment PIN_AH6 -to SRAM_Data[6]
set_location_assignment PIN_AG6 -to SRAM_Data[5]
set_location_assignment PIN_AF6 -to SRAM_Data[4]
set_location_assignment PIN_AH4 -to SRAM_Data[3]
set_location_assignment PIN_AG4 -to SRAM_Data[2]
set_location_assignment PIN_AF4 -to SRAM_Data[1]
set_location_assignment PIN_AH3 -to SRAM_Data[0]
set_location_assignment PIN_AC4 -to SRAM_UB
set_location_assignment PIN_AE8 -to SRAM_WE
set_location_assignment PIN_AD4 -to SRAM_LB
set_location_assignment PIN_AD5 -to SRAM_OE
set_global_assignment -name SYSTEMVERILOG_FILE palette_toad.sv
set_global_assignment -name SYSTEMVERILOG_FILE palette_tank.sv
set_global_assignment -name SYSTEMVERILOG_FILE palette_rocket.sv
set_global_assignment -name SYSTEMVERILOG_FILE palette_player_attack.sv
set_global_assignment -name SYSTEMVERILOG_FILE palette_player.sv
set_global_assignment -name SYSTEMVERILOG_FILE palette_mc.sv
set_global_assignment -name SYSTEMVERILOG_FILE palette_hp.sv
set_global_assignment -name QIP_FILE final_project_soc/synthesis/final_project_soc.qip
set_global_assignment -name SYSTEMVERILOG_FILE font_rom.sv
set_global_assignment -name SYSTEMVERILOG_FILE sram_control.sv
set_global_assignment -name SYSTEMVERILOG_FILE tristate.sv
set_global_assignment -name SYSTEMVERILOG_FILE keyboard.sv
set_global_assignment -name SYSTEMVERILOG_FILE Dreg.sv
set_global_assignment -name SYSTEMVERILOG_FILE 11_reg.sv
set_global_assignment -name SYSTEMVERILOG_FILE HexDriver.sv
set_global_assignment -name SYSTEMVERILOG_FILE ram.sv
set_global_assignment -name SYSTEMVERILOG_FILE final_project.sv
set_global_assignment -name SYSTEMVERILOG_FILE VGA_controller.sv
set_global_assignment -name SYSTEMVERILOG_FILE Color_Mapper.sv
set_global_assignment -name SYSTEMVERILOG_FILE palette_background.sv
set_global_assignment -name SYSTEMVERILOG_FILE hp.sv
set_global_assignment -name SYSTEMVERILOG_FILE palette_cover.sv
set_global_assignment -name SYSTEMVERILOG_FILE palette_go.sv
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top