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[ARM64_DYNAREC] Improved 0F AE opcodes
1 parent 2984d30 commit d5808f6

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+24
-27
lines changed

1 file changed

+24
-27
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src/dynarec/arm64/dynarec_arm64_0f.c

+24-27
Original file line numberDiff line numberDiff line change
@@ -1687,42 +1687,40 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
16871687

16881688
case 0xAE:
16891689
nextop = F8;
1690-
if((nextop&0xF8)==0xE8) {
1691-
INST_NAME("LFENCE");
1692-
SMDMB();
1693-
} else
1694-
if((nextop&0xF8)==0xF0) {
1695-
INST_NAME("MFENCE");
1696-
SMDMB();
1697-
} else
1698-
if((nextop&0xF8)==0xF8) {
1699-
INST_NAME("SFENCE");
1700-
SMDMB();
1701-
} else {
1690+
if(MODREG)
1691+
switch (nextop) {
1692+
case 0xE8:
1693+
INST_NAME("LFENCE");
1694+
SMDMB();
1695+
break;
1696+
case 0xF0:
1697+
INST_NAME("MFENCE");
1698+
SMDMB();
1699+
break;
1700+
case 0xF8:
1701+
INST_NAME("SFENCE");
1702+
SMDMB();
1703+
break;
1704+
default:
1705+
DEFAULT;
1706+
}
1707+
else
17021708
switch((nextop>>3)&7) {
17031709
case 0:
17041710
INST_NAME("FXSAVE Ed");
17051711
MESSAGE(LOG_DUMP, "Need Optimization\n");
17061712
fpu_purgecache(dyn, ninst, 0, x1, x2, x3);
1707-
if(MODREG) {
1708-
DEFAULT;
1709-
} else {
1710-
addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
1711-
if(ed!=x1) {MOVx_REG(x1, ed);}
1712-
CALL(rex.w?((void*)fpu_fxsave64):((void*)fpu_fxsave32), -1);
1713-
}
1713+
addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
1714+
if(ed!=x1) {MOVx_REG(x1, ed);}
1715+
CALL(rex.w?((void*)fpu_fxsave64):((void*)fpu_fxsave32), -1);
17141716
break;
17151717
case 1:
17161718
INST_NAME("FXRSTOR Ed");
17171719
MESSAGE(LOG_DUMP, "Need Optimization\n");
17181720
fpu_purgecache(dyn, ninst, 0, x1, x2, x3);
1719-
if(MODREG) {
1720-
DEFAULT;
1721-
} else {
1722-
addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
1723-
if(ed!=x1) {MOVx_REG(x1, ed);}
1724-
CALL(rex.w?((void*)fpu_fxrstor64):((void*)fpu_fxrstor32), -1);
1725-
}
1721+
addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
1722+
if(ed!=x1) {MOVx_REG(x1, ed);}
1723+
CALL(rex.w?((void*)fpu_fxrstor64):((void*)fpu_fxrstor32), -1);
17261724
break;
17271725
case 2:
17281726
INST_NAME("LDMXCSR Md");
@@ -1755,7 +1753,6 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
17551753
default:
17561754
DEFAULT;
17571755
}
1758-
}
17591756
break;
17601757
case 0xAF:
17611758
INST_NAME("IMUL Gd, Ed");

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