fpga: Debug once again spi

Author: CyrilKoe

target/xilinx/scripts/flash_spi.tcl

@@ -13,35 +13,40 @@ open_hw_target $::env(XILINX_HOST):$::env(XILINX_PORT)/$::env(XILINX_FPGA_PATH)
 set file $::env(FILE)
 set offset $::env(OFFSET)
 set mcs_file image.mcs
-set mcs_files_x8 [list image_primary.mcs image_secondary.mcs]
 
-if {$::env(XILINX_BOARD) eq "vcu118"} {
+if {$::env(XILINX_BOARD) eq "vcu128"} {
+  set hw_device [get_hw_devices xcvu37p_0]
+  set hw_mem_device [lindex [get_cfgmem_parts {mt25qu02g-spi-x1_x2_x4}] 0]
+} elseif {$::env(XILINX_BOARD) eq "vcu118"} {
+  set mcs_primary_file image_primary.mcs
+  set mcs_secondary_file image_secondary.mcs
   set hw_device [get_hw_devices xcvu9p_0]
   set hw_mem_device [lindex [get_cfgmem_parts {mt25qu01g-spi-x1_x2_x4_x8}] 0]
-  write_cfgmem -force -format mcs -size 256 -interface SPIx8 \
-    -loaddata "up $offset $file" \
-    -checksum \
-    -file $mcs_file
-  # Two files are generated for spix8
-  set $mcs_file $mcs_files_x8
 }
 
-if {$::env(XILINX_BOARD) eq "vcu128"} {
-  set hw_device [get_hw_devices xcvu37p_0]
-  set hw_mem_device [lindex [get_cfgmem_parts {mt25qu02g-spi-x1_x2_x4}] 0]
+# Create flash configuration file
+if {$::env(XILINX_BOARD) eq "vcu118"} {
+  write_cfgmem -force -format mcs -size 256 -interface SPIx8 \
+  -loaddata "up $offset $file" \
+  -checksum \
+  -file $mcs_file
+} else {
   write_cfgmem -force -format mcs -size 256 -interface SPIx4 \
-    -loaddata "up $offset $file" \
-    -checksum \
-    -file $mcs_file
+  -loaddata "up $offset $file" \
+  -checksum \
+  -file $mcs_file
 }
 
-
 set_property PARAM.FREQUENCY 15000000 [get_hw_targets *]
 
 create_hw_cfgmem -hw_device $hw_device $hw_mem_device
 set hw_cfgmem [get_property PROGRAM.HW_CFGMEM $hw_device]
-set_property PROGRAM.FILES $mcs_file $hw_cfgmem
 set_property PROGRAM.ADDRESS_RANGE  {use_file} $hw_cfgmem
+if {$::env(XILINX_BOARD) eq "vcu118"} {
+ set_property PROGRAM.FILES [list $mcs_primary_file $mcs_secondary_file] $hw_cfgmem
+} else {
+ set_property PROGRAM.FILES [list $mcs_file ] $hw_cfgmem
+}
 set_property PROGRAM.PRM_FILE {} $hw_cfgmem
 set_property PROGRAM.UNUSED_PIN_TERMINATION {pull-none} $hw_cfgmem
 set_property PROGRAM.BLANK_CHECK  0 $hw_cfgmem

target/xilinx/xilinx_ips/carfield_ip/src/carfield_xilinx.sv

@@ -595,6 +595,14 @@ module carfield_xilinx
      .USRDONETS (1'b1)
   );
 
+  `ila(qspi_dqi_ila, qspi_dqi)
+  `ila(qspi_dqo_ila, qspi_dqo)
+  `ila(qspi_cs_b_ila, qspi_cs_b[1])
+  `ila(qspi_cs_b_ts_ila, qspi_cs_b_ts[1])
+  `ila(qspi_clk_ila, qspi_clk)
+  `ila(qspi_clk_ts_ila, qspi_clk_ts)
+
+
   ///////////////////
   // Hyperram PADS //
   ///////////////////