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pdfquestionFurther information is requestedFurther information is requestedrp2350Concerning the RP2350 chipConcerning the RP2350 chip
Description
The following registers appear in the datasheet, but are not documented. Given the names, I assume they are used for testing, but a confirmation in the documentation (or details on what they do!) would be nice.
DFTCLK_XOSC_CTRLDFTCLK_ROSC_CTRLDFTCLK_LPOSC_CTRL
The following sources are listed on clock generators, but it's not clear what they refer to:
CLKSRC_PLL_USB_PRIMARY_REF_OPCG- how does this differ fromCLKSRC_PLL_USB?OTP_CLK2FC- is this related to the OTP boot oscillator?ROSC_CLKSRC_PH- how does this differ fromROSC_CLKSRC?
Along with some of the above, the frequency counter also lists the following clock sources:
PLL_SYS_CLKSRC_PRIMARYPLL_USB_CLKSRC_PRIMARYPLL_USB_CLKSRC_PRIMARY_DFT
A couple of other minor nits:
- Section 8.1.2 mentions that "the list of clock sources is different per clock generator". A matrix showing which sources are available on which clock generators would be extremely helpful.
- The behavior of the frequency counter isn't well explained. A quick explanation of the theory of operation would be nice. (For example: is the test interval based on a number of
clk_refcycles, or something else?) - What are the units of the FRAC field in
FC0_RESULT? - Section 8.1.5 refers to the "
CLOCKS_DEFAULT_IRQprocessor interrupt", but the name is actuallyCLOCKS_IRQ.
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pdfquestionFurther information is requestedFurther information is requestedrp2350Concerning the RP2350 chipConcerning the RP2350 chip