From 8576bd12b784e753c5f3a843e5dcc647670b5244 Mon Sep 17 00:00:00 2001
From: Agaxia <agaxia@zxe.io>
Date: Tue, 6 Dec 2022 20:07:43 +0100
Subject: [PATCH] Optimize the `out (c),0` instruction

---
 API/Z80.h     | 12 ++++++------
 sources/Z80.c |  2 +-
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/API/Z80.h b/API/Z80.h
index 485599e9..6ed8204b 100644
--- a/API/Z80.h
+++ b/API/Z80.h
@@ -435,17 +435,17 @@ typedef struct {
 	zuint8 halt_line;
 } Z80;
 
+/** @brief <tt>@ref Z80::options</tt> bitmask that enables emulation of the
+  * <tt>out (c),255</tt> instruction, specific to the Zilog Z80 CMOS. */
+
+#define Z80_OPTION_OUT_VC_255 1
+
 /** @brief <tt>@ref Z80::options</tt> bitmask that enables emulation of the bug
   * affecting the Zilog Z80 NMOS, which causes the P/V flag to be reset when a
   * maskable interrupt is accepted during the execution of the
   * <tt>ld a,{i|r}</tt> instructions. */
 
-#define Z80_OPTION_LD_A_IR_BUG 1
-
-/** @brief <tt>@ref Z80::options</tt> bitmask that enables emulation of the
-  * <tt>out (c),255</tt> instruction, specific to the Zilog Z80 CMOS. */
-
-#define Z80_OPTION_OUT_VC_255 2
+#define Z80_OPTION_LD_A_IR_BUG 2
 
 /** @brief <tt>@ref Z80::options</tt> bitmask that enables the XQ factor in the
   * emulation of the @c ccf and @c scf instructions. */
diff --git a/sources/Z80.c b/sources/Z80.c
index 8e007712..08b44659 100644
--- a/sources/Z80.c
+++ b/sources/Z80.c
@@ -1696,7 +1696,7 @@ INSTRUCTION(out_vc_0)
 	Q_0
 	PC += 2;
 	MEMPTR = BC + 1;
-	OUT(BC, (OPTIONS & Z80_OPTION_OUT_VC_255) ? 255 : 0);
+	OUT(BC, (zuint8)0 - (OPTIONS & (zuint8)Z80_OPTION_OUT_VC_255));
 	return 12;
 	}