diff --git a/portable/CCRH/F1Kx/README.md b/portable/CCRH/F1Kx/README.md index 152b51d1c34..6e0c7fe55eb 100644 --- a/portable/CCRH/F1Kx/README.md +++ b/portable/CCRH/F1Kx/README.md @@ -25,6 +25,7 @@ The test project can be found [here](https://github.com/FreeRTOS/FreeRTOS-Commun 2. `Channel 0` and address `0xFFFEEC00` are used as default configuration for configIPIR_CHANNEL and configEXCLUSIVE_ADDRESS, in case of resource confliction other channel/address can be used. (2) 3. The minimal stack size (configMINIMAL_STACK_SIZE) must be included the reserved memory for nested interrupt. This formula can be referred: `(task_context_size) * (1 + configMAX_INT_NESTING) + Stack_depth_of_taskcode` In which, `task_context_size` is calculated as `36*4bytes = 144bytes` (when FPU enabled) or `34*4bytes = 136` (when FPU disabled), configMAX_INT_NESTING is 02 as default. + 4. `configTIMER_PRESCALE`: This value is required in order to correctly configure clock for `CPUCLK_L`. Refer to HWUM at `Table 44.22` for `option byte`: If the user sets the option byte `CKDIVMD to 1`, then `configTIMER_PRESCALE = 4`. Otherwise, if `CKDIVMD is set to 0`, then `configTIMER_PRESCALE = 2`. (1) This is applicable for F1KH-D8 with SMP only. diff --git a/portable/CCRH/F1Kx/port.c b/portable/CCRH/F1Kx/port.c index b2a02846ce1..e3d71929d8e 100644 --- a/portable/CCRH/F1Kx/port.c +++ b/portable/CCRH/F1Kx/port.c @@ -638,8 +638,10 @@ static void prvSetupTimerInterrupt( void ) *pulOSTMIntReg = ( portINT_PROCESSING_ENABLED | portINT_DIRECT_VECTOR | portINT_PRIORITY_LEVEL14 ); /* Set OSTM0 control setting */ - *( ( volatile uint32_t * ) portOSTM0CTL_ADDR ) = ( portOSTM_MODE_INTERVAL_TIMER | portOSTM_START_INTERRUPT_DISABLE ); - *( ( volatile uint32_t * ) portOSTM0CMP_ADDR ) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ / 2 ) - 1; + *( ( volatile uint32_t * ) portOSTM0CTL_ADDR ) = + ( portOSTM_MODE_INTERVAL_TIMER | portOSTM_START_INTERRUPT_DISABLE ); + *( ( volatile uint32_t * ) portOSTM0CMP_ADDR ) = + ( ( configCPU_CLOCK_HZ / configTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1; /* Enable OSTM0 operation */ *( ( volatile uint32_t * ) portOSTM0TS_ADDR ) = portOSTM_COUNTER_START;