-
Notifications
You must be signed in to change notification settings - Fork 0
/
cpuaddr.h
338 lines (305 loc) · 9.9 KB
/
cpuaddr.h
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
/*
* Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
*
* (c) Copyright 1996 - 2001 Gary Henderson (gary.henderson@ntlworld.com) and
* Jerremy Koot (jkoot@snes9x.com)
*
* Super FX C emulator code
* (c) Copyright 1997 - 1999 Ivar (ivar@snes9x.com) and
* Gary Henderson.
* Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_.
*
* DSP1 emulator code (c) Copyright 1998 Ivar, _Demo_ and Gary Henderson.
* C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_.
* C4 C code (c) Copyright 2001 Gary Henderson (gary.henderson@ntlworld.com).
*
* DOS port code contains the works of other authors. See headers in
* individual files.
*
* Snes9x homepage: http://www.snes9x.com
*
* Permission to use, copy, modify and distribute Snes9x in both binary and
* source form, for non-commercial purposes, is hereby granted without fee,
* providing that this license information and copyright notice appear with
* all copies and any derived work.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event shall the authors be held liable for any damages
* arising from the use of this software.
*
* Snes9x is freeware for PERSONAL USE only. Commercial users should
* seek permission of the copyright holders first. Commercial use includes
* charging money for Snes9x or software derived from Snes9x.
*
* The copyright holders request that bug fixes and improvements to the code
* should be forwarded to them so everyone can benefit from the modifications
* in future versions.
*
* Super NES and Super Nintendo Entertainment System are trademarks of
* Nintendo Co., Limited and its subsidiary companies.
*/
#ifndef _CPUADDR_H_
#define _CPUADDR_H_
//EXTERN_C long OpAddress;
STATIC inline long Immediate8 (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
long OpAddress = icpu->ShiftedPB + cpu->PC - cpu->PCBase;
cpu->PC++;
return OpAddress;
}
STATIC inline long Immediate16 (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
long OpAddress = icpu->ShiftedPB + cpu->PC - cpu->PCBase;
cpu->PC += 2;
return OpAddress;
}
STATIC inline long Relative (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
int8 Int8 = *cpu->PC++;
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeed;
#endif
return ((int) (cpu->PC - cpu->PCBase) + Int8) & 0xffff;
}
STATIC inline long RelativeLong (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
#ifdef FAST_LSB_WORD_ACCESS
long OpAddress = *(uint16 *) cpu->PC;
#else
long OpAddress = *cpu->PC + (*(cpu->PC + 1) << 8);
#endif
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeedx2 + ONE_CYCLE;
#endif
cpu->PC += 2;
OpAddress += (cpu->PC - cpu->PCBase);
OpAddress &= 0xffff;
return OpAddress;
}
STATIC inline long AbsoluteIndexedIndirect (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
#ifdef FAST_LSB_WORD_ACCESS
long OpAddress = (reg->X.W + *(uint16 *) cpu->PC) & 0xffff;
#else
long OpAddress = (reg->X.W + *cpu->PC + (*(cpu->PC + 1) << 8)) & 0xffff;
#endif
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeedx2;
#endif
cpu->PC += 2;
return S9xGetWord (icpu->ShiftedPB + OpAddress, cpu);
}
STATIC inline long AbsoluteIndirectLong (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
#ifdef FAST_LSB_WORD_ACCESS
long OpAddress = *(uint16 *) cpu->PC;
#else
long OpAddress = *cpu->PC + (*(cpu->PC + 1) << 8);
#endif
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeedx2;
#endif
cpu->PC += 2;
return S9xGetWord (OpAddress, cpu) | (S9xGetByte (OpAddress + 2, cpu) << 16);
}
STATIC inline long AbsoluteIndirect (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
#ifdef FAST_LSB_WORD_ACCESS
long OpAddress = *(uint16 *) cpu->PC;
#else
long OpAddress = *cpu->PC + (*(cpu->PC + 1) << 8);
#endif
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeedx2;
#endif
cpu->PC += 2;
return S9xGetWord (OpAddress, cpu) + icpu->ShiftedPB;
}
STATIC inline long Absolute (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
#ifdef FAST_LSB_WORD_ACCESS
long OpAddress = *(uint16 *) cpu->PC + icpu->ShiftedDB;
#else
long OpAddress = *cpu->PC + (*(cpu->PC + 1) << 8) + icpu->ShiftedDB;
#endif
cpu->PC += 2;
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeedx2;
#endif
return OpAddress;
}
STATIC inline long AbsoluteLong (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
#ifdef FAST_LSB_WORD_ACCESS
long OpAddress = (*(uint32 *) cpu->PC) & 0xffffff;
#else
long OpAddress = *cpu->PC + (*(cpu->PC + 1) << 8) + (*(cpu->PC + 2) << 16);
#endif
cpu->PC += 3;
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeedx2 + cpu->MemSpeed;
#endif
return OpAddress;
}
STATIC inline long Direct(struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
long OpAddress = (*cpu->PC++ + reg->D.W) & 0xffff;
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeed;
#endif
// if (reg->DL != 0) cpu->Cycles += ONE_CYCLE;
return OpAddress;
}
STATIC inline long DirectIndirectIndexed (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
long OpAddress = (*cpu->PC++ + reg->D.W) & 0xffff;
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeed;
#endif
OpAddress = icpu->ShiftedDB + S9xGetWord (OpAddress, cpu) + reg->Y.W;
// if (reg->DL != 0) cpu->Cycles += ONE_CYCLE;
// XXX: always add one if STA
// XXX: else Add one cycle if crosses page boundary
return OpAddress;
}
STATIC inline long DirectIndirectIndexedLong (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
long OpAddress = (*cpu->PC++ + reg->D.W) & 0xffff;
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeed;
#endif
OpAddress = S9xGetWord (OpAddress, cpu) + (S9xGetByte (OpAddress + 2, cpu) << 16) +
reg->Y.W;
// if (reg->DL != 0) cpu->Cycles += ONE_CYCLE;
return OpAddress;
}
STATIC inline long DirectIndexedIndirect(struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
long OpAddress = (*cpu->PC++ + reg->D.W + reg->X.W) & 0xffff;
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeed;
#endif
OpAddress = S9xGetWord (OpAddress, cpu) + icpu->ShiftedDB;
#ifdef VAR_CYCLES
// if (reg->DL != 0)
// cpu->Cycles += TWO_CYCLES;
// else
cpu->Cycles += ONE_CYCLE;
#endif
return OpAddress;
}
STATIC inline long DirectIndexedX (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
long OpAddress = (*cpu->PC++ + reg->D.W + reg->X.W) & 0xffff;
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeed;
#endif
#ifdef VAR_CYCLES
// if (reg->DL != 0)
// cpu->Cycles += TWO_CYCLES;
// else
cpu->Cycles += ONE_CYCLE;
#endif
return OpAddress;
}
STATIC inline long DirectIndexedY (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
long OpAddress = (*cpu->PC++ + reg->D.W + reg->Y.W) & 0xffff;
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeed;
#endif
#ifdef VAR_CYCLES
// if (reg->DL != 0)
// cpu->Cycles += TWO_CYCLES;
// else
cpu->Cycles += ONE_CYCLE;
#endif
return OpAddress;
}
STATIC inline long AbsoluteIndexedX (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
#ifdef FAST_LSB_WORD_ACCESS
long OpAddress = icpu->ShiftedDB + *(uint16 *) cpu->PC + reg->X.W;
#else
long OpAddress = icpu->ShiftedDB + *cpu->PC + (*(cpu->PC + 1) << 8) +
reg->X.W;
#endif
cpu->PC += 2;
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeedx2;
#endif
// XXX: always add one cycle for ROL, LSR, etc
// XXX: else is cross page boundary add one cycle
return OpAddress;
}
STATIC inline long AbsoluteIndexedY (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
#ifdef FAST_LSB_WORD_ACCESS
long OpAddress = icpu->ShiftedDB + *(uint16 *) cpu->PC + reg->Y.W;
#else
long OpAddress = icpu->ShiftedDB + *cpu->PC + (*(cpu->PC + 1) << 8) +
reg->Y.W;
#endif
cpu->PC += 2;
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeedx2;
#endif
// XXX: always add cycle for STA
// XXX: else is cross page boundary add one cycle
return OpAddress;
}
STATIC inline long AbsoluteLongIndexedX (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
#ifdef FAST_LSB_WORD_ACCESS
long OpAddress = (*(uint32 *) cpu->PC + reg->X.W) & 0xffffff;
#else
long OpAddress = (*cpu->PC + (*(cpu->PC + 1) << 8) + (*(cpu->PC + 2) << 16) + reg->X.W) & 0xffffff;
#endif
cpu->PC += 3;
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeedx2 + cpu->MemSpeed;
#endif
return OpAddress;
}
STATIC inline long DirectIndirect (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
long OpAddress = (*cpu->PC++ + reg->D.W) & 0xffff;
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeed;
#endif
OpAddress = S9xGetWord (OpAddress, cpu) + icpu->ShiftedDB;
// if (reg->DL != 0) cpu->Cycles += ONE_CYCLE;
return OpAddress;
}
STATIC inline long DirectIndirectLong (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
long OpAddress = (*cpu->PC++ + reg->D.W) & 0xffff;
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeed;
#endif
OpAddress = S9xGetWord (OpAddress, cpu) +
(S9xGetByte (OpAddress + 2, cpu) << 16);
// if (reg->DL != 0) cpu->Cycles += ONE_CYCLE;
return OpAddress;
}
STATIC inline long StackRelative (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
long OpAddress = (*cpu->PC++ + reg->S.W) & 0xffff;
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeed;
cpu->Cycles += ONE_CYCLE;
#endif
return OpAddress;
}
STATIC inline long StackRelativeIndirectIndexed (struct SRegisters * reg, struct SICPU * icpu, struct SCPUState * cpu)
{
long OpAddress = (*cpu->PC++ + reg->S.W) & 0xffff;
#ifdef VAR_CYCLES
cpu->Cycles += cpu->MemSpeed;
cpu->Cycles += TWO_CYCLES;
#endif
OpAddress = (S9xGetWord (OpAddress, cpu) + icpu->ShiftedDB +
reg->Y.W) & 0xffffff;
return OpAddress;
}
#endif