Skip to content

Commit 40b3e8c

Browse files
committed
Fix CI errors
1 parent 5f1c213 commit 40b3e8c

File tree

5 files changed

+10
-8
lines changed

5 files changed

+10
-8
lines changed

riscv-peripheral/src/macros.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ pub use paste::paste;
3131
/// ## Base address and per-HART mtimecmp registers, private `fn new()` function
3232
///
3333
/// ```
34-
/// use riscv_pac::result::{Error, Result};
34+
/// use riscv::result::{Error, Result};
3535
///
3636
/// /// HART IDs for the target CLINT peripheral
3737
/// #[derive(Clone, Copy, Debug, Eq, PartialEq)]
@@ -142,7 +142,7 @@ macro_rules! clint_codegen {
142142
/// ## Base address and per-HART context proxies, private `fn new()` function
143143
///
144144
/// ```
145-
/// use riscv_pac::result::{Error, Result};
145+
/// use riscv::result::{Error, Result};
146146
///
147147
/// /// HART IDs for the target CLINT peripheral
148148
/// #[derive(Clone, Copy, Debug, Eq, PartialEq)]

riscv-peripheral/src/plic.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -200,7 +200,7 @@ impl<P: Plic> CTX<P> {
200200
#[cfg(test)]
201201
pub(crate) mod test {
202202
use crate::test::HartId;
203-
use riscv_pac::HartIdNumber;
203+
use riscv::HartIdNumber;
204204

205205
#[allow(dead_code)]
206206
#[test]

riscv-peripheral/src/plic/claim.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ impl CLAIM {
3232
mod test {
3333
use super::*;
3434
use crate::test::Interrupt;
35-
use riscv_pac::InterruptNumber;
35+
use riscv::InterruptNumber;
3636

3737
#[test]
3838
fn test_claim() {

riscv-peripheral/src/plic/priorities.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -71,7 +71,7 @@ impl PRIORITIES {
7171
mod test {
7272
use super::*;
7373
use crate::test::{Interrupt, Priority};
74-
use riscv_pac::InterruptNumber;
74+
use riscv::InterruptNumber;
7575

7676
#[test]
7777
fn test_priorities() {

riscv/src/register/mvienh.rs

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,10 @@
11
//! mvienh register
22
3-
use crate::bits::{bf_extract, bf_insert};
4-
use riscv_pac::result::{Error, Result};
5-
use riscv_pac::InterruptNumber;
3+
use crate::{
4+
bits::{bf_extract, bf_insert},
5+
result::{Error, Result},
6+
InterruptNumber,
7+
};
68

79
read_write_csr! {
810
/// `mvienh` register

0 commit comments

Comments
 (0)