From 894fe28968243a6873c516a98278691174bb442c Mon Sep 17 00:00:00 2001
From: Luca Barbato <lu_zero@gentoo.org>
Date: Sun, 21 Jan 2024 18:51:24 +0000
Subject: [PATCH] Add vec_cmpne

---
 crates/core_arch/src/powerpc/altivec.rs | 86 +++++++++++++++++++++++++
 1 file changed, 86 insertions(+)

diff --git a/crates/core_arch/src/powerpc/altivec.rs b/crates/core_arch/src/powerpc/altivec.rs
index b28ef6e561..4fc166da7a 100644
--- a/crates/core_arch/src/powerpc/altivec.rs
+++ b/crates/core_arch/src/powerpc/altivec.rs
@@ -244,6 +244,13 @@ extern "C" {
     #[link_name = "llvm.ppc.altivec.vcmpequw"]
     fn vcmpequw(a: vector_unsigned_int, b: vector_unsigned_int) -> vector_bool_int;
 
+    #[link_name = "llvm.ppc.altivec.vcmpneb"]
+    fn vcmpneb(a: vector_signed_char, b: vector_signed_char) -> vector_bool_char;
+    #[link_name = "llvm.ppc.altivec.vcmpneh"]
+    fn vcmpneh(a: vector_signed_short, b: vector_signed_short) -> vector_bool_short;
+    #[link_name = "llvm.ppc.altivec.vcmpnew"]
+    fn vcmpnew(a: vector_signed_int, b: vector_signed_int) -> vector_bool_int;
+
     #[link_name = "llvm.ppc.altivec.vcmpgefp"]
     fn vcmpgefp(a: vector_float, b: vector_float) -> vector_bool_int;
 
@@ -739,6 +746,34 @@ mod sealed {
 
     impl_vec_cmp! { [VectorCmpEq vec_cmpeq] (vec_vcmpequb, vec_vcmpequh, vec_vcmpequw) }
 
+    macro_rules! impl_cmpne {
+        ($fun:ident ($ty:ident) -> $r:ident $([ $pwr9:ident ])? ) => {
+            #[inline]
+            #[target_feature(enable = "altivec")]
+            $( #[cfg_attr(all(test, target_feature = "power9-altivec"), assert_instr($pwr9))] )?
+            unsafe fn $fun(a: $ty, b: $ty) -> $r {
+                $( if cfg!(target_feature = "power9-altivec") {
+                    transmute($pwr9(transmute(a), transmute(b)))
+                } else )? {
+                    let zero = transmute(i32x4::new(0, 0, 0, 0));
+                    vec_nor(vec_cmpeq(a, b), zero)
+                }
+            }
+        };
+    }
+
+    impl_cmpne! { vec_vcmpneb(vector_signed_char) -> vector_bool_char [ vcmpneb ] }
+    impl_cmpne! { vec_vcmpneh(vector_signed_short) -> vector_bool_short [ vcmpneh ] }
+    impl_cmpne! { vec_vcmpnew(vector_signed_int) -> vector_bool_int [ vcmpnew ] }
+
+    #[unstable(feature = "stdarch_powerpc", issue = "111145")]
+    pub trait VectorCmpNe<Other> {
+        type Result;
+        unsafe fn vec_cmpne(self, b: Other) -> Self::Result;
+    }
+
+    impl_vec_cmp! { [VectorCmpNe vec_cmpne] (vec_vcmpneb, vec_vcmpneh, vec_vcmpnew) }
+
     test_impl! { vec_vcmpbfp(a: vector_float, b: vector_float) -> vector_signed_int [vcmpbfp, vcmpbfp] }
 
     #[inline]
@@ -3331,6 +3366,21 @@ where
     a.vec_cmpeq(b)
 }
 
+/// Vector Compare Not Equal
+///
+/// ## Result value
+/// For each element of r, the value of each bit is 1 if the corresponding elements
+/// of a and b are not equal. Otherwise, the value of each bit is 0.
+#[inline]
+#[target_feature(enable = "altivec")]
+#[unstable(feature = "stdarch_powerpc", issue = "111145")]
+pub unsafe fn vec_cmpne<T, U>(a: T, b: U) -> <T as sealed::VectorCmpNe<U>>::Result
+where
+    T: sealed::VectorCmpNe<U>,
+{
+    a.vec_cmpne(b)
+}
+
 /// Vector cmpb.
 #[inline]
 #[target_feature(enable = "altivec")]
@@ -4317,6 +4367,42 @@ mod tests {
         [false, true, true, false]
     }
 
+    test_vec_2! { test_vec_cmpne_i8, vec_cmpne, i8x16 -> m8x16,
+        [1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
+        [0, 0, -1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
+        [true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false]
+    }
+
+    test_vec_2! { test_vec_cmpne_u8, vec_cmpne, u8x16 -> m8x16,
+        [1, 255, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
+        [0, 0, 255, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
+        [true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false]
+    }
+
+    test_vec_2! { test_vec_cmpne_i16, vec_cmpne, i16x8 -> m16x8,
+        [1, -1, 0, 0, 0, 0, 0, 0],
+        [0, 0, -1, 1, 0, 0, 0, 0],
+        [true, true, true, true, false, false, false, false]
+    }
+
+    test_vec_2! { test_vec_cmpne_u16, vec_cmpne, u16x8 -> m16x8,
+        [1, 255, 0, 0, 0, 0, 0, 0],
+        [0, 0, 255, 1, 0, 0, 0, 0],
+        [true, true, true, true, false, false, false, false]
+    }
+
+    test_vec_2! { test_vec_cmpne_i32, vec_cmpne, i32x4 -> m32x4,
+        [1, -1, 0, 0],
+        [0, -1, 0, 1],
+        [true, false, false, true]
+    }
+
+    test_vec_2! { test_vec_cmpne_u32, vec_cmpne, u32x4 -> m32x4,
+        [1, 255, 0, 0],
+        [0, 255,  0, 1],
+        [true, false, false, true]
+    }
+
     test_vec_2! { test_vec_all_eq_i8_false, vec_all_eq, i8x16 -> bool,
         [1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
         [0, 0, -1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0],